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Commit 84af6103 authored by yilmazt's avatar yilmazt
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another batch of cppcheck error corrections

parent 47825cbc
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Showing with 305 additions and 284 deletions
common/utils/LOG/log.c
View file @ 84af6103
......@@ -232,7 +232,7 @@ int write_file_matlab(const char *fname,
void log_getconfig(log_t *g_log)
{
char *gloglevel = NULL;
int consolelog ;
int consolelog = 0;
paramdef_t logparams_defaults[] = LOG_GLOBALPARAMS_DESC;
paramdef_t logparams_level[MAX_LOG_PREDEF_COMPONENTS];
paramdef_t logparams_logfile[MAX_LOG_PREDEF_COMPONENTS];
......
common/utils/LOG/log.h
View file @ 84af6103
......@@ -363,14 +363,14 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int
/*------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* LOG globalconfiguration parameters */
/* optname help paramflags XXXptr defXXXval type numelt */
/*------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* LOG globalconfiguration parameters */
/* optname help paramflags XXXptr defXXXval type numelt */
/*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define LOG_GLOBALPARAMS_DESC { \
{LOG_CONFIG_STRING_GLOBAL_LOG_LEVEL, "Default log level for all componemts\n", 0, strptr:(char **)&gloglevel, defstrval:log_level_names[2].name, TYPE_STRING, 0}, \
{LOG_CONFIG_STRING_GLOBAL_LOG_ONLINE, "Default console output option, for all components\n", 0, iptr:&(consolelog), defintval:1, TYPE_INT, 0}, \
{LOG_CONFIG_STRING_GLOBAL_LOG_OPTIONS, LOG_CONFIG_HELP_OPTIONS, 0, strlistptr:NULL, defstrlistval:NULL, TYPE_STRINGLIST,0} \
{LOG_CONFIG_STRING_GLOBAL_LOG_LEVEL, "Default log level for all componemts\n", 0, strptr:(char **)&gloglevel, defstrval:log_level_names[2].name, TYPE_STRING, 0}, \
{LOG_CONFIG_STRING_GLOBAL_LOG_ONLINE, "Default console output option, for all components\n", 0, iptr:&(consolelog), defintval:1, TYPE_INT, 0}, \
{LOG_CONFIG_STRING_GLOBAL_LOG_OPTIONS, LOG_CONFIG_HELP_OPTIONS, 0, strlistptr:NULL, defstrlistval:NULL, TYPE_STRINGLIST, 0} \
}
#define LOG_OPTIONS_IDX 2
......
common/utils/ocp_itti/intertask_interface.cpp
View file @ 84af6103
......@@ -11,11 +11,11 @@
#include <common/utils/system.h>
typedef struct timer_elm_s {
timer_type_t type; ///< Timer type
long instance;
timer_type_t type; ///< Timer type
long instance;
long duration;
uint64_t timeout;
void *timer_arg; ///< Optional argument that will be passed when timer expires
void *timer_arg; ///< Optional argument that will be passed when timer expires
} timer_elm_t ;
typedef struct task_list_s {
......
executables/nr-ru.c
View file @ 84af6103
......@@ -1228,12 +1228,12 @@ static void *ru_stats_thread(void *param) {
}
static void *ru_thread_tx( void *param ) {
RU_t *ru = (RU_t *)param;
RU_proc_t *proc = &ru->proc;
PHY_VARS_gNB *gNB;
gNB_L1_proc_t *gNB_proc;
RU_t *ru = (RU_t *)param;
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
PHY_VARS_gNB *gNB;
gNB_L1_proc_t *gNB_proc;
gNB_L1_rxtx_proc_t *L1_proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
char filename[40];
int print_frame = 8;
int i = 0;
......@@ -1257,12 +1257,14 @@ static void *ru_thread_tx( void *param ) {
// wait until eNBs are finished subframe RX n and TX n+4
wait_on_condition(&proc->mutex_gNBs,&proc->cond_gNBs,&proc->instance_cnt_gNBs,"ru_thread_tx");
AssertFatal((ret=pthread_mutex_lock(&proc->mutex_gNBs))==0,"mutex_lock return %d\n",ret);
ret = pthread_mutex_lock(&proc->mutex_gNBs);
AssertFatal(ret == 0,"mutex_lock return %d\n",ret);
int frame_tx=proc->frame_tx;
int tti_tx =proc->tti_tx;
uint64_t timestamp_tx = proc->timestamp_tx;
AssertFatal((ret=pthread_mutex_unlock(&proc->mutex_gNBs))==0,"mutex_lock returns %d\n",ret);
ret = pthread_mutex_unlock(&proc->mutex_gNBs);
AssertFatal(ret == 0,"mutex_lock returns %d\n",ret);
if (oai_exit) break;
......@@ -1313,7 +1315,8 @@ static void *ru_thread_tx( void *param ) {
gNB = ru->gNB_list[i];
gNB_proc = &gNB->proc;
L1_proc = (get_thread_parallel_conf() == PARALLEL_RU_L1_TRX_SPLIT)? &gNB_proc->L1_proc_tx : &gNB_proc->L1_proc;
AssertFatal((ret=pthread_mutex_lock(&gNB_proc->mutex_RU_tx))==0,"mutex_lock returns %d\n",ret);
ret = pthread_mutex_lock(&gNB_proc->mutex_RU_tx);
AssertFatal(ret == 0,"mutex_lock returns %d\n",ret);
for (int j=0; j<gNB->num_RU; j++) {
if (ru == gNB->RU_list[j]) {
......@@ -1326,12 +1329,15 @@ static void *ru_thread_tx( void *param ) {
}
if (gNB_proc->RU_mask_tx != (1<<gNB->num_RU)-1) { // not all RUs have provided their information so return
AssertFatal((ret=pthread_mutex_unlock(&gNB_proc->mutex_RU_tx))==0,"mutex_unlock returns %d\n",ret);
ret = pthread_mutex_unlock(&gNB_proc->mutex_RU_tx);
AssertFatal(ret == 0,"mutex_unlock returns %d\n",ret);
} else { // all RUs TX are finished so send the ready signal to gNB processing
gNB_proc->RU_mask_tx = 0;
AssertFatal((ret=pthread_mutex_unlock(&gNB_proc->mutex_RU_tx))==0,"mutex_unlock returns %d\n",ret);
ret = pthread_mutex_unlock(&gNB_proc->mutex_RU_tx);
AssertFatal(ret == 0,"mutex_unlock returns %d\n",ret);
AssertFatal((ret=pthread_mutex_lock(&L1_proc->mutex_RUs_tx))==0,"mutex_lock returns %d\n",ret);
ret = pthread_mutex_lock(&L1_proc->mutex_RUs_tx);
AssertFatal(ret == 0,"mutex_lock returns %d\n",ret);
// the thread can now be woken up
if (L1_proc->instance_cnt_RUs==-1) {
AssertFatal(pthread_cond_signal(&L1_proc->cond_RUs) == 0,
......@@ -1339,8 +1345,8 @@ static void *ru_thread_tx( void *param ) {
} //else AssertFatal(1==0,"gNB TX thread is not ready\n");
L1_proc->instance_cnt_RUs = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,L1_proc->instance_cnt_RUs);
AssertFatal((ret=pthread_mutex_unlock(&L1_proc->mutex_RUs_tx))==0,"mutex_unlock returns %d\n",ret);
ret = pthread_mutex_unlock(&L1_proc->mutex_RUs_tx);
AssertFatal(ret == 0,"mutex_unlock returns %d\n",ret);
}
}
}
......@@ -1353,11 +1359,11 @@ static void *ru_thread( void *param ) {
static int ru_thread_status;
RU_t *ru = (RU_t *)param;
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
int ret;
int slot = fp->slots_per_frame-1;
int frame =1023;
char filename[40],threadname[40];
int slot = fp->slots_per_frame-1;
int frame = 1023;
char filename[40], threadname[40];
int print_frame = 8;
int i = 0;
// set default return value
......@@ -1645,7 +1651,7 @@ void init_RU_proc(RU_t *ru) {
memset((void *)proc,0,sizeof(RU_proc_t));
proc->ru = ru;
proc->instance_cnt_prach = -1;
proc->instance_cnt_synch = -1; ;
proc->instance_cnt_synch = -1;
proc->instance_cnt_FH = -1;
proc->instance_cnt_FH1 = -1;
proc->instance_cnt_gNBs = -1;
......@@ -1858,8 +1864,8 @@ void configure_ru(int idx,
if (capabilities->FH_fmt < MAX_FH_FMTs) LOG_I(PHY, "RU FH options %s\n",rru_format_options[capabilities->FH_fmt]);
AssertFatal((ret=check_capabilities(ru,capabilities)) == 0,
"Cannot configure RRU %d, check_capabilities returned %d\n", idx,ret);
ret = check_capabilities(ru,capabilities);
AssertFatal(ret == 0, "Cannot configure RRU %d, check_capabilities returned %d\n", idx, ret);
// take antenna capabilities of RRU
ru->nb_tx = capabilities->nb_tx[0];
ru->nb_rx = capabilities->nb_rx[0];
......
executables/nr-softmodem.c
View file @ 84af6103
......@@ -508,7 +508,7 @@ static void get_options(void) {
int tddflag, nonbiotflag;
uint32_t online_log_messages;
uint32_t glog_level, glog_verbosity;
uint32_t start_telnetsrv;
uint32_t start_telnetsrv = 0;
paramdef_t cmdline_params[] = CMDLINE_PARAMS_DESC_GNB ;
paramdef_t cmdline_logparams[] = CMDLINE_LOGPARAMS_DESC_NR ;
config_process_cmdline( cmdline_params,sizeof(cmdline_params)/sizeof(paramdef_t),NULL);
......
openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
View file @ 84af6103
......@@ -445,7 +445,7 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
pointer_shift_values=(short *) pointer_shift_values_BG2;
}
else {
AssertFatal(0,"BG %d is not supported yet\n",BG);
AssertFatal(0,"BG %d is not supported yet\n",BG);
}
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
......
openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
View file @ 84af6103
......@@ -601,7 +601,8 @@ void init_polar_deinterleaver_table(t_nrPolar_params *polarParams) {
uint32_t polar_decoder_int16(int16_t *input,
uint64_t *out,
const t_nrPolar_params *polarParams) {
const t_nrPolar_params *polarParams)
{
int16_t d_tilde[polarParams->N];// = malloc(sizeof(double) * polarParams->N);
nr_polar_rate_matching_int16(input, d_tilde, polarParams->rate_matching_pattern, polarParams->K, polarParams->N, polarParams->encoderLength);
......@@ -645,8 +646,8 @@ uint32_t polar_decoder_int16(int16_t *input,
//int len_mod64=len&63;
int crclen = polarParams->crcParityBits;
uint64_t rxcrc=B[0]&((1<<crclen)-1);
uint32_t crc;
uint64_t Ar;
uint32_t crc = 0;
uint64_t Ar = 0;
AssertFatal(len<65,"A must be less than 65 bits\n");
if (len<=32) {
......
openair1/PHY/LTE_ESTIMATION/lte_ul_channel_estimation.c
View file @ 84af6103
......@@ -880,8 +880,8 @@ int16_t lte_ul_freq_offset_estimation(LTE_DL_FRAME_PARMS *frame_parms,
int16_t Ravg[2];
Ravg[0]=0;
Ravg[1]=0;
int16_t iv, rv, phase_idx;
__m128i avg128U1, avg128U2, R[3], mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3;
int16_t iv, rv, phase_idx = 0;
__m128i avg128U1, avg128U2, R[3], mmtmpD0, mmtmpD1, mmtmpD2, mmtmpD3;
// round(tan((pi/4)*[1:1:N]/N)*pow2(15))
int16_t alpha[128] = {201, 402, 603, 804, 1006, 1207, 1408, 1610, 1811, 2013, 2215, 2417, 2619, 2822, 3024, 3227, 3431, 3634, 3838, 4042, 4246, 4450, 4655, 4861, 5066, 5272, 5479, 5686, 5893, 6101, 6309, 6518, 6727, 6937, 7147, 7358, 7570, 7782, 7995, 8208, 8422, 8637, 8852, 9068, 9285, 9503, 9721, 9940, 10160, 10381, 10603, 10825, 11049, 11273, 11498, 11725, 11952, 12180, 12410, 12640, 12872, 13104, 13338, 13573, 13809, 14046, 14285, 14525, 14766, 15009, 15253, 15498, 15745, 15993, 16243, 16494, 16747, 17001, 17257, 17515, 17774, 18035, 18298, 18563, 18829, 19098, 19368, 19640, 19915, 20191, 20470, 20750, 21033, 21318, 21605, 21895, 22187, 22481, 22778, 23078, 23380, 23685, 23992, 24302, 24615, 24931, 25250, 25572, 25897, 26226, 26557, 26892, 27230, 27572, 27917, 28266, 28618, 28975, 29335, 29699, 30067, 30440, 30817, 31198, 31583, 31973, 32368, 32767};
......
openair1/PHY/LTE_TRANSPORT/lte_mcs.c
View file @ 84af6103
......@@ -107,7 +107,8 @@ unsigned char I_TBS2I_MCS(unsigned char I_TBS)
return I_MCS;
}
uint32_t get_TBS_DL(uint8_t mcs, uint16_t nb_rb)
uint32_t get_TBS_DL(uint8_t mcs,
uint16_t nb_rb)
{
uint32_t TBS;
......@@ -121,7 +122,8 @@ uint32_t get_TBS_DL(uint8_t mcs, uint16_t nb_rb)
}
}
uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb)
uint32_t get_TBS_UL(uint8_t mcs,
uint16_t nb_rb)
{
uint32_t TBS = 0;
......@@ -136,7 +138,11 @@ uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb)
}
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol)
int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,
uint32_t *rb_alloc,
uint8_t mod_order,
uint8_t subframe,
uint8_t symbol)
{
int rb,re_pbch_sss=0;
......@@ -228,7 +234,10 @@ int adjust_G2(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_ord
return(re_pbch_sss);
}
int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe)
int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,
uint32_t *rb_alloc,
uint8_t mod_order,
uint8_t subframe)
{
int rb,re_pbch_sss=0;
......@@ -315,7 +324,15 @@ int adjust_G(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_orde
return(0);
}
int get_G(LTE_DL_FRAME_PARMS *frame_parms,uint16_t nb_rb,uint32_t *rb_alloc,uint8_t mod_order,uint8_t Nl,uint8_t num_pdcch_symbols,int frame,uint8_t subframe,uint8_t beamforming_mode)
int get_G(LTE_DL_FRAME_PARMS *frame_parms,
uint16_t nb_rb,
uint32_t *rb_alloc,
uint8_t mod_order,
uint8_t Nl,
uint8_t num_pdcch_symbols,
int frame,
uint8_t subframe,
uint8_t beamforming_mode)
{
int G_adj;
......@@ -426,10 +443,8 @@ unsigned char SE2I_TBS(float SE,
}
//added for ALU icic purpose
uint8_t Get_SB_size(uint8_t n_rb_dl)
{
if(n_rb_dl<27)
return 4;
else if(n_rb_dl<64)
......@@ -437,6 +452,4 @@ uint8_t Get_SB_size(uint8_t n_rb_dl)
else
return 8;
}
//end ALU's algo
openair1/PHY/TOOLS/lte_phy_scope.c
View file @ 84af6103
......@@ -559,7 +559,10 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
}
chest_f_abs = (float*) calloc(nsymb_ce*nb_antennas_rx*nb_antennas_tx,sizeof(float));
llr = (float*) calloc(coded_bits_per_codeword,sizeof(float)); // init to zero
//llr = (float*) calloc(coded_bits_per_codeword,sizeof(float)); // Cppcheck returns "invalidFunctionArg" error.
llr = (float*) malloc(coded_bits_per_codeword*sizeof(float));
memset((void *)llr, 0,coded_bits_per_codeword*sizeof(float)); // init to zero
bit = malloc(coded_bits_per_codeword*sizeof(float));
llr_pdcch = (float*) calloc(12*frame_parms->N_RB_DL*num_pdcch_symbols*2,sizeof(float)); // init to zero
bit_pdcch = (float*) calloc(12*frame_parms->N_RB_DL*num_pdcch_symbols*2,sizeof(float));
......@@ -572,7 +575,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
pdcch_llr = (int8_t*) phy_vars_ue->pdcch_vars[phy_vars_ue->current_thread_id[subframe]][eNB_id]->llr;
pdcch_comp = (int16_t*) phy_vars_ue->pdcch_vars[phy_vars_ue->current_thread_id[subframe]][eNB_id]->rxdataF_comp[0];
pdsch_llr = (int16_t*) phy_vars_ue->pdsch_vars[phy_vars_ue->current_thread_id[subframe]][eNB_id]->llr[0]; // stream 0
// pdsch_llr = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars_SI[eNB_id]->llr[0]; // stream 0
//pdsch_llr = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars_SI[eNB_id]->llr[0]; // stream 0
pdsch_comp = (int16_t*) phy_vars_ue->pdsch_vars[phy_vars_ue->current_thread_id[subframe]][eNB_id]->rxdataF_comp0[0];
pdsch_mag = (int16_t*) phy_vars_ue->pdsch_vars[phy_vars_ue->current_thread_id[subframe]][eNB_id]->dl_ch_mag0[0];
......
openair1/PHY/TOOLS/lte_phy_scope_tm4.c
View file @ 84af6103
......@@ -31,6 +31,7 @@ float tput_enb[NUMBER_OF_UE_MAX][TPUT_WINDOW_LENGTH] = {{0}};
float tput_time_ue[NUMBER_OF_UE_MAX][TPUT_WINDOW_LENGTH] = {{0}};
float tput_ue[NUMBER_OF_UE_MAX][TPUT_WINDOW_LENGTH] = {{0}};
float tput_ue_max[NUMBER_OF_UE_MAX] = {0};
static void ia_receiver_on_off( FL_OBJECT *button, long arg)
{
if (fl_get_button(button)) {
......@@ -43,6 +44,7 @@ static void ia_receiver_on_off( FL_OBJECT *button, long arg)
fl_set_object_color(button, FL_RED, FL_RED);
}
}
static void dl_traffic_on_off( FL_OBJECT *button, long arg)
{
if (fl_get_button(button)) {
......@@ -140,6 +142,7 @@ FD_lte_phy_scope_enb *create_lte_phy_scope_enb( void )
fdui->lte_phy_scope_enb->fdui = fdui;
return fdui;
}
void phy_scope_eNB(FD_lte_phy_scope_enb *form,
PHY_VARS_eNB *phy_vars_enb,
int UE_id)
......@@ -325,7 +328,9 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
free(bit);
free(chest_f_abs);
}
FD_lte_phy_scope_ue *create_lte_phy_scope_ue( void ) {
FD_lte_phy_scope_ue *create_lte_phy_scope_ue( void )
{
FL_OBJECT *obj;
FD_lte_phy_scope_ue *fdui = fl_malloc( sizeof *fdui );
// Define form
......@@ -429,11 +434,13 @@ FD_lte_phy_scope_ue *create_lte_phy_scope_ue( void ) {
fdui->lte_phy_scope_ue->fdui = fdui;
return fdui;
}
void phy_scope_UE(FD_lte_phy_scope_ue *form,
PHY_VARS_UE *phy_vars_ue,
int eNB_id,
int UE_id,
uint8_t subframe){
uint8_t subframe)
{
int i,arx,atx,ind,k;
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_ue->frame_parms;
int nsymb_ce = frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti;
......@@ -492,14 +499,14 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
if (phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][0]!=NULL) {
mod0 = get_Qm(mcs0);
coded_bits_per_codeword0 = get_G(frame_parms,
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->nb_rb,
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->rb_alloc_even,
get_Qm(mcs0),
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->Nl,
num_pdcch_symbols,
frame,
subframe,
beamforming_mode);
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->nb_rb,
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->rb_alloc_even,
get_Qm(mcs0),
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->Nl,
num_pdcch_symbols,
frame,
subframe,
beamforming_mode);
} else {
coded_bits_per_codeword0 = 0; //frame_parms->N_RB_DL*12*get_Qm(mcs)*(frame_parms->symbols_per_tti);
mod0=0;
......@@ -507,14 +514,14 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
if (phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][1]!=NULL) {
mod1 = get_Qm(mcs1);
coded_bits_per_codeword1 = get_G(frame_parms,
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][1]->harq_processes[harq_pid]->nb_rb,
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][1]->harq_processes[harq_pid]->rb_alloc_even,
get_Qm(mcs1),
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][1]->harq_processes[harq_pid]->Nl,
num_pdcch_symbols,
frame,
subframe,
beamforming_mode);
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][1]->harq_processes[harq_pid]->nb_rb,
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][1]->harq_processes[harq_pid]->rb_alloc_even,
get_Qm(mcs1),
phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][1]->harq_processes[harq_pid]->Nl,
num_pdcch_symbols,
frame,
subframe,
beamforming_mode);
} else {
coded_bits_per_codeword1 = 0; //frame_parms->N_RB_DL*12*get_Qm(mcs)*(frame_parms->symbols_per_tti);
mod1=0;
......@@ -526,9 +533,14 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
chest_t_abs[arx] = (float*) calloc(frame_parms->ofdm_symbol_size,sizeof(float));
}
chest_f_abs = (float*) calloc(nsymb_ce*nb_antennas_rx*nb_antennas_tx,sizeof(float));
llr0 = (float*) calloc(coded_bits_per_codeword0,sizeof(float)); // init to zero
//llr0 = (float*) calloc(coded_bits_per_codeword0,sizeof(float)); // Cppcheck returns "invalidFunctionArg" error.
llr0 = (float*) malloc(coded_bits_per_codeword0*sizeof(float));
memset((void *)llr0, 0,coded_bits_per_codeword0*sizeof(float)); // init to zero
bit0 = malloc(coded_bits_per_codeword0*sizeof(float));
llr1 = (float*) calloc(coded_bits_per_codeword1,sizeof(float)); // init to zero
//llr1 = (float*) calloc(coded_bits_per_codeword1,sizeof(float)); // Cppcheck returns "invalidFunctionArg" error.
llr1 = (float*) malloc(coded_bits_per_codeword1*sizeof(float));
memset((void *)llr1, 0,coded_bits_per_codeword1*sizeof(float)); // init to zero
bit1 = malloc(coded_bits_per_codeword1*sizeof(float));
llr_pdcch = (float*) calloc(12*frame_parms->N_RB_DL*num_pdcch_symbols*2,sizeof(float)); // init to zero
bit_pdcch = (float*) calloc(12*frame_parms->N_RB_DL*num_pdcch_symbols*2,sizeof(float));
......@@ -822,6 +834,4 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
for (int m=0; m<coded_bits_per_codeword1; ++m)
phy_vars_ue->pdsch_vars[subframe&0x1][eNB_id]->llr[0][m]=0;
}*/
}
}
openair1/SIMULATION/LTE_PHY/syncsim.c
View file @ 84af6103
......@@ -58,7 +58,7 @@
#define BW 5.0
PHY_VARS_eNB *PHY_vars_eNB,*PHY_vars_eNB1,*PHY_vars_eNB2;
PHY_VARS_eNB *PHY_vars_eNB, *PHY_vars_eNB1, *PHY_vars_eNB2;
PHY_VARS_UE *PHY_vars_UE[2];
#define DLSCH_RB_ALLOC 0x1fff // igore DC component,RB13
......@@ -699,7 +699,7 @@ int main(int argc, char **argv) {
bzero(txdataF2[0],FRAME_LENGTH_BYTES_NO_PREFIX);
bzero(txdataF2[1],FRAME_LENGTH_BYTES_NO_PREFIX);
#else
txdata = PHY_vars_eNB->lte_eNB_common_vars.txdata[eNb_id];
txdata = PHY_vars_eNB->common_vars.txdataF[eNb_id];
txdata1 = PHY_vars_eNB1->lte_eNB_common_vars.txdata[eNb_id];
txdata2 = PHY_vars_eNB2->lte_eNB_common_vars.txdata[eNb_id];
#endif
......
openair2/ENB_APP/enb_paramdef.h
View file @ 84af6103
......@@ -538,7 +538,7 @@ typedef struct ccparams_lte_s {
int32_t srb1_max_retx_threshold;
} ccparams_lte_t;
#define CCPARAMS_CHECK { \
#define CCPARAMS_CHECK { \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
......@@ -600,7 +600,7 @@ typedef struct ccparams_lte_s {
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
......@@ -612,49 +612,49 @@ typedef struct ccparams_lte_s {
{ .s1a= { config_check_modify_integer, UETIMER_T301_OKVALUES, UETIMER_T301_MODVALUES,8}} , \
{ .s1a= { config_check_modify_integer, UETIMER_T310_OKVALUES, UETIMER_T310_MODVALUES,7}} , \
{ .s1a= { config_check_modify_integer, UETIMER_T311_OKVALUES, UETIMER_T311_MODVALUES,7}} , \
{ .s1a= { config_check_modify_integer, UETIMER_N310_OKVALUES, UETIMER_N310_MODVALUES,8}} , \
{ .s1a= { config_check_modify_integer, UETIMER_N311_OKVALUES, UETIMER_N311_MODVALUES,8}} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} \
{ .s1a= { config_check_modify_integer, UETIMER_N310_OKVALUES, UETIMER_N310_MODVALUES,8}} , \
{ .s1a= { config_check_modify_integer, UETIMER_N311_OKVALUES, UETIMER_N311_MODVALUES,8}} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} , \
{ .s5= {NULL }} \
}
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* component carriers configuration parameters */
......@@ -744,83 +744,83 @@ typedef struct ccparams_lte_s {
#define ENB_CONFIG_FRAME_TYPE_IDX 0
#define ENB_CONFIG_TDD_CONFIG_IDX 1
#define ENB_CONFIG_TDD_CONFIG_S_IDX 2
#define ENB_CONFIG_PREFIX_TYPE_IDX 3
#define ENB_CONFIG_PBCH_REPETITION_IDX 4
#define ENB_CONFIG_EUTRA_BAND_IDX 5
#define ENB_CONFIG_DOWNLINK_FREQUENCY_IDX 6
#define ENB_CONFIG_UPLINK_FREQUENCY_OFFSET_IDX 7
#define ENB_CONFIG_NID_CELL_IDX 8
#define ENB_CONFIG_N_RB_DL_IDX 9
#define ENB_CONFIG_CELL_MBSFN_IDX 10
#define ENB_CONFIG_NB_ANT_PORTS_IDX 11
#define ENB_CONFIG_PRACH_ROOT_IDX 12
#define ENB_CONFIG_PRACH_CONFIG_INDEX_IDX 13
#define ENB_CONFIG_PRACH_HIGH_SPEED_IDX 14
#define ENB_CONFIG_PRACH_ZERO_CORRELATION_IDX 15
#define ENB_CONFIG_PRACH_FREQ_OFFSET_IDX 16
#define ENB_CONFIG_PUCCH_DELTA_SHIFT_IDX 17
#define ENB_CONFIG_PUCCH_NRB_CQI_IDX 18
#define ENB_CONFIG_PUCCH_NCS_AN_IDX 19
#define ENB_CONFIG_PUCCH_N1_AN_IDX 20
#define ENB_CONFIG_PDSCH_RS_EPRE_IDX 21
#define ENB_CONFIG_PDSCH_PB_IDX 22
#define ENB_CONFIG_PUSCH_N_SB_IDX 23
#define ENB_CONFIG_PUSCH_HOPPINGMODE_IDX 24
#define ENB_CONFIG_PUSCH_HOPPINGOFFSET_IDX 25
#define ENB_CONFIG_PUSCH_ENABLE64QAM_IDX 26
#define ENB_CONFIG_PUSCH_GROUP_HOPPING_EN_IDX 27
#define ENB_CONFIG_PUSCH_GROUP_ASSIGNMENT_IDX 28
#define ENB_CONFIG_PUSCH_SEQUENCE_HOPPING_EN_IDX 29
#define ENB_CONFIG_PUSCH_NDMRS1_IDX 30
#define ENB_CONFIG_PHICH_DURATION_IDX 31
#define ENB_CONFIG_PHICH_RESOURCE_IDX 32
#define ENB_CONFIG_SRS_ENABLE_IDX 33
#define ENB_CONFIG_SRS_BANDWIDTH_CONFIG_IDX 34
#define ENB_CONFIG_SRS_SUBFRAME_CONFIG_IDX 35
#define ENB_CONFIG_SRS_ACKNACKST_CONFIG_IDX 36
#define ENB_CONFIG_SRS_MAXUPPTS_IDX 37
#define ENB_CONFIG_PUSCH_PO_NOMINAL_IDX 38
#define ENB_CONFIG_PUSCH_ALPHA_IDX 39
#define ENB_CONFIG_PUCCH_PO_NOMINAL_IDX 40
#define ENB_CONFIG_MSG3_DELTA_PREAMBLE_IDX 41
#define ENB_CONFIG_PUCCH_DELTAF_FORMAT1_IDX 42
#define ENB_CONFIG_PUCCH_DELTAF_FORMAT1b_IDX 43
#define ENB_CONFIG_PUCCH_DELTAF_FORMAT2_IDX 44
#define ENB_CONFIG_PUCCH_DELTAF_FORMAT2A_IDX 45
#define ENB_CONFIG_PUCCH_DELTAF_FORMAT2B_IDX 46
#define ENB_CONFIG_RACH_NUM_RA_PREAMBLES_IDX 47
#define ENB_CONFIG_RACH_PREAMBLESGROUPACONFIG_IDX 48
#define ENB_CONFIG_RACH_SIZEOFRA_PREAMBLESGROUPA_IDX 49
#define ENB_CONFIG_RACH_MESSAGESIZEGROUPA_IDX 50
#define ENB_CONFIG_RACH_MESSAGEPOWEROFFSETGROUPB_IDX 51
#define ENB_CONFIG_RACH_POWERRAMPINGSTEP_IDX 52
#define ENB_CONFIG_RACH_PREAMBLEINITIALRECEIVEDTARGETPOWER_IDX 53
#define ENB_CONFIG_RACH_PREAMBLETRANSMAX_IDX 54
#define ENB_CONFIG_RACH_RARESPONSEWINDOWSIZE_IDX 55
#define ENB_CONFIG_RACH_MACCONTENTIONRESOLUTIONTIMER_IDX 56
#define ENB_CONFIG_RACH_MAXHARQMSG3TX_IDX 57
#define ENB_CONFIG_PCCH_DEFAULT_PAGING_CYCLE_IDX 58
#define ENB_CONFIG_PCCH_NB_IDX 59
#define ENB_CONFIG_STRING_DRX_CONFIG_PRESENT_IDX 60
#define ENB_CONFIG_STRING_DRX_ONDURATIONTIMER_IDX 61
#define ENB_CONFIG_STRING_DRX_INACTIVITYTIMER_IDX 62
#define ENB_CONFIG_STRING_DRX_RETRANSMISSIONTIMER_IDX 63
#define ENB_CONFIG_FRAME_TYPE_IDX 0
#define ENB_CONFIG_TDD_CONFIG_IDX 1
#define ENB_CONFIG_TDD_CONFIG_S_IDX 2
#define ENB_CONFIG_PREFIX_TYPE_IDX 3
#define ENB_CONFIG_PBCH_REPETITION_IDX 4
#define ENB_CONFIG_EUTRA_BAND_IDX 5
#define ENB_CONFIG_DOWNLINK_FREQUENCY_IDX 6
#define ENB_CONFIG_UPLINK_FREQUENCY_OFFSET_IDX 7
#define ENB_CONFIG_NID_CELL_IDX 8
#define ENB_CONFIG_N_RB_DL_IDX 9
#define ENB_CONFIG_CELL_MBSFN_IDX 10
#define ENB_CONFIG_NB_ANT_PORTS_IDX 11
#define ENB_CONFIG_PRACH_ROOT_IDX 12
#define ENB_CONFIG_PRACH_CONFIG_INDEX_IDX 13
#define ENB_CONFIG_PRACH_HIGH_SPEED_IDX 14
#define ENB_CONFIG_PRACH_ZERO_CORRELATION_IDX 15
#define ENB_CONFIG_PRACH_FREQ_OFFSET_IDX 16
#define ENB_CONFIG_PUCCH_DELTA_SHIFT_IDX 17
#define ENB_CONFIG_PUCCH_NRB_CQI_IDX 18
#define ENB_CONFIG_PUCCH_NCS_AN_IDX 19
#define ENB_CONFIG_PUCCH_N1_AN_IDX 20
#define ENB_CONFIG_PDSCH_RS_EPRE_IDX 21
#define ENB_CONFIG_PDSCH_PB_IDX 22
#define ENB_CONFIG_PUSCH_N_SB_IDX 23
#define ENB_CONFIG_PUSCH_HOPPINGMODE_IDX 24
#define ENB_CONFIG_PUSCH_HOPPINGOFFSET_IDX 25
#define ENB_CONFIG_PUSCH_ENABLE64QAM_IDX 26
#define ENB_CONFIG_PUSCH_GROUP_HOPPING_EN_IDX 27
#define ENB_CONFIG_PUSCH_GROUP_ASSIGNMENT_IDX 28
#define ENB_CONFIG_PUSCH_SEQUENCE_HOPPING_EN_IDX 29
#define ENB_CONFIG_PUSCH_NDMRS1_IDX 30
#define ENB_CONFIG_PHICH_DURATION_IDX 31
#define ENB_CONFIG_PHICH_RESOURCE_IDX 32
#define ENB_CONFIG_SRS_ENABLE_IDX 33
#define ENB_CONFIG_SRS_BANDWIDTH_CONFIG_IDX 34
#define ENB_CONFIG_SRS_SUBFRAME_CONFIG_IDX 35
#define ENB_CONFIG_SRS_ACKNACKST_CONFIG_IDX 36
#define ENB_CONFIG_SRS_MAXUPPTS_IDX 37
#define ENB_CONFIG_PUSCH_PO_NOMINAL_IDX 38
#define ENB_CONFIG_PUSCH_ALPHA_IDX 39
#define ENB_CONFIG_PUCCH_PO_NOMINAL_IDX 40
#define ENB_CONFIG_MSG3_DELTA_PREAMBLE_IDX 41
#define ENB_CONFIG_PUCCH_DELTAF_FORMAT1_IDX 42
#define ENB_CONFIG_PUCCH_DELTAF_FORMAT1b_IDX 43
#define ENB_CONFIG_PUCCH_DELTAF_FORMAT2_IDX 44
#define ENB_CONFIG_PUCCH_DELTAF_FORMAT2A_IDX 45
#define ENB_CONFIG_PUCCH_DELTAF_FORMAT2B_IDX 46
#define ENB_CONFIG_RACH_NUM_RA_PREAMBLES_IDX 47
#define ENB_CONFIG_RACH_PREAMBLESGROUPACONFIG_IDX 48
#define ENB_CONFIG_RACH_SIZEOFRA_PREAMBLESGROUPA_IDX 49
#define ENB_CONFIG_RACH_MESSAGESIZEGROUPA_IDX 50
#define ENB_CONFIG_RACH_MESSAGEPOWEROFFSETGROUPB_IDX 51
#define ENB_CONFIG_RACH_POWERRAMPINGSTEP_IDX 52
#define ENB_CONFIG_RACH_PREAMBLEINITIALRECEIVEDTARGETPOWER_IDX 53
#define ENB_CONFIG_RACH_PREAMBLETRANSMAX_IDX 54
#define ENB_CONFIG_RACH_RARESPONSEWINDOWSIZE_IDX 55
#define ENB_CONFIG_RACH_MACCONTENTIONRESOLUTIONTIMER_IDX 56
#define ENB_CONFIG_RACH_MAXHARQMSG3TX_IDX 57
#define ENB_CONFIG_PCCH_DEFAULT_PAGING_CYCLE_IDX 58
#define ENB_CONFIG_PCCH_NB_IDX 59
#define ENB_CONFIG_STRING_DRX_CONFIG_PRESENT_IDX 60
#define ENB_CONFIG_STRING_DRX_ONDURATIONTIMER_IDX 61
#define ENB_CONFIG_STRING_DRX_INACTIVITYTIMER_IDX 62
#define ENB_CONFIG_STRING_DRX_RETRANSMISSIONTIMER_IDX 63
#define ENB_CONFIG_STRING_DRX_LONGDRX_CYCLESTARTOFFSET_PRESENT_IDX 64
#define ENB_CONFIG_STRING_DRX_LONGDRX_CYCLESTARTOFFSET_IDX 65
#define ENB_CONFIG_STRING_DRX_SHORTDRX_CYCLE_IDX 66
#define ENB_CONFIG_STRING_DRX_SHORTDRX_SHORTCYCLETIMER_IDX 67
#define ENB_CONFIG_BCCH_MODIFICATIONPERIODCOEFF_IDX 68
#define ENB_CONFIG_UETIMERS_T300_IDX 69
#define ENB_CONFIG_UETIMERS_T301_IDX 70
#define ENB_CONFIG_UETIMERS_T310_IDX 71
#define ENB_CONFIG_UETIMERS_T311_IDX 72
#define ENB_CONFIG_UETIMERS_N310_IDX 73
#define ENB_CONFIG_UETIMERS_N311_IDX 74
#define ENB_CONFIG_UE_TRANSMISSION_MODE_IDX 75
#define ENB_CONFIG_MBMS_DEDICATED_SERVING_CELL_IDX 76
#define ENB_CONFIG_STRING_DRX_LONGDRX_CYCLESTARTOFFSET_IDX 65
#define ENB_CONFIG_STRING_DRX_SHORTDRX_CYCLE_IDX 66
#define ENB_CONFIG_STRING_DRX_SHORTDRX_SHORTCYCLETIMER_IDX 67
#define ENB_CONFIG_BCCH_MODIFICATIONPERIODCOEFF_IDX 68
#define ENB_CONFIG_UETIMERS_T300_IDX 69
#define ENB_CONFIG_UETIMERS_T301_IDX 70
#define ENB_CONFIG_UETIMERS_T310_IDX 71
#define ENB_CONFIG_UETIMERS_T311_IDX 72
#define ENB_CONFIG_UETIMERS_N310_IDX 73
#define ENB_CONFIG_UETIMERS_N311_IDX 74
#define ENB_CONFIG_UE_TRANSMISSION_MODE_IDX 75
#define ENB_CONFIG_MBMS_DEDICATED_SERVING_CELL_IDX 76
/*------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* SRB1 configuration parameters section name */
......@@ -869,14 +869,14 @@ typedef struct srb1_params_s {
/*-------------------------------------------------------------------------------------------------------------------------------------*/
/* MME configuration parameters */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*-------------------------------------------------------------------------------------------------------------------------------------*/
#define S1PARAMS_DESC { \
{ENB_CONFIG_STRING_MME_IPV4_ADDRESS, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_IPV6_ADDRESS, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_IP_ADDRESS_ACTIVE, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_IP_ADDRESS_PREFERENCE, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_BROADCAST_PLMN_INDEX, NULL, 0, uptr:NULL, defintarrayval:NULL,TYPE_UINTARRAY, 6} \
{ENB_CONFIG_STRING_MME_IPV4_ADDRESS, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_IPV6_ADDRESS, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_IP_ADDRESS_ACTIVE, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_IP_ADDRESS_PREFERENCE, NULL, 0, uptr:NULL, defstrval:NULL, TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_MME_BROADCAST_PLMN_INDEX, NULL, 0, uptr:NULL, defintarrayval:NULL, TYPE_UINTARRAY, 6} \
}
#define ENB_MME_IPV4_ADDRESS_IDX 0
......@@ -941,8 +941,8 @@ typedef struct srb1_params_s {
#define ENB_INTERFACE_NAME_FOR_S1U_IDX 2
#define ENB_IPV4_ADDR_FOR_S1U_IDX 3
#define ENB_PORT_FOR_S1U_IDX 4
#define ENB_IPV4_ADDR_FOR_X2C_IDX 5
#define ENB_PORT_FOR_X2C_IDX 6
#define ENB_IPV4_ADDR_FOR_X2C_IDX 5
#define ENB_PORT_FOR_X2C_IDX 6
/* S1 interface configuration parameters names */
#define ENB_CONFIG_STRING_ENB_INTERFACE_NAME_FOR_S1_MME "ENB_INTERFACE_NAME_FOR_S1_MME"
......@@ -1022,52 +1022,52 @@ typedef struct srb1_params_s {
/* CU/DU configuration section names*/
#define CONFIG_STRING_DU_LIST "DU"
#define CONFIG_STRING_CU_LIST "CU"
#define DU_TYPE_LTE 0
#define DU_TYPE_WIFI 1
#define DU_TYPE_LTE 0
#define DU_TYPE_WIFI 1
#define ENB_CONFIG_STRING_CU_INTERFACES_CONFIG "CU_INTERFACES"
#define ENB_CONFIG_STRING_CU_INTERFACE_NAME_FOR_F1U "CU_INTERFACE_NAME_FOR_F1U"
#define ENB_CONFIG_STRING_CU_IPV4_ADDRESS_FOR_F1U "CU_IPV4_ADDRESS_FOR_F1U"
#define ENB_CONFIG_STRING_CU_PORT_FOR_F1U "CU_PORT_FOR_F1U"
#define ENB_CONFIG_STRING_CU_INTERFACE_NAME_FOR_F1U "CU_INTERFACE_NAME_FOR_F1U"
#define ENB_CONFIG_STRING_CU_IPV4_ADDRESS_FOR_F1U "CU_IPV4_ADDRESS_FOR_F1U"
#define ENB_CONFIG_STRING_CU_PORT_FOR_F1U "CU_PORT_FOR_F1U"
#define ENB_CONFIG_STRING_DU_TYPE "DU_TYPE"
#define ENB_CONFIG_STRING_F1_U_CU_TRANSPORT_TYPE "F1_U_CU_TRANSPORT_TYPE"
#define ENB_CONFIG_STRING_F1_U_CU_TRANSPORT_TYPE "F1_U_CU_TRANSPORT_TYPE"
#define ENB_CONFIG_STRING_DU_INTERFACES_CONFIG "DU_INTERFACES"
#define ENB_CONFIG_STRING_DU_INTERFACE_NAME_FOR_F1U "DU_INTERFACE_NAME_FOR_F1U"
#define ENB_CONFIG_STRING_DU_IPV4_ADDRESS_FOR_F1U "DU_IPV4_ADDRESS_FOR_F1U"
#define ENB_CONFIG_STRING_DU_PORT_FOR_F1U "DU_PORT_FOR_F1U"
#define ENB_CONFIG_STRING_F1_U_DU_TRANSPORT_TYPE "F1_U_DU_TRANSPORT_TYPE"
#define ENB_CONFIG_STRING_DU_INTERFACE_NAME_FOR_F1U "DU_INTERFACE_NAME_FOR_F1U"
#define ENB_CONFIG_STRING_DU_IPV4_ADDRESS_FOR_F1U "DU_IPV4_ADDRESS_FOR_F1U"
#define ENB_CONFIG_STRING_DU_PORT_FOR_F1U "DU_PORT_FOR_F1U"
#define ENB_CONFIG_STRING_F1_U_DU_TRANSPORT_TYPE "F1_U_DU_TRANSPORT_TYPE"
#define CONFIG_STRING_CU_BALANCING "CU_BALANCING"
#define CUPARAMS_DESC { \
{ENB_CONFIG_STRING_CU_INTERFACE_NAME_FOR_F1U, NULL, 0, strptr:NULL, defstrval:"eth0", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_CU_IPV4_ADDRESS_FOR_F1U, NULL, 0, strptr:NULL, defstrval:"127.0.0.1", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_CU_PORT_FOR_F1U, NULL, 0, uptr:NULL, defintval:2210, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_F1_U_CU_TRANSPORT_TYPE, NULL, 0, strptr:NULL, defstrval:"TCP", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DU_TYPE, NULL, 0, strptr:NULL, defstrval:"LTE", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_CU_INTERFACE_NAME_FOR_F1U, NULL, 0, strptr:NULL, defstrval:"eth0", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_CU_IPV4_ADDRESS_FOR_F1U, NULL, 0, strptr:NULL, defstrval:"127.0.0.1", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_CU_PORT_FOR_F1U, NULL, 0, uptr:NULL, defintval:2210, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_F1_U_CU_TRANSPORT_TYPE, NULL, 0, strptr:NULL, defstrval:"TCP", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DU_TYPE, NULL, 0, strptr:NULL, defstrval:"LTE", TYPE_STRING, 0}, \
}
#define DUPARAMS_DESC { \
{ENB_CONFIG_STRING_DU_INTERFACE_NAME_FOR_F1U, NULL, 0, strptr:NULL, defstrval:"eth0", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DU_IPV4_ADDRESS_FOR_F1U, NULL, 0, strptr:NULL, defstrval:"127.0.0.1", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DU_PORT_FOR_F1U, NULL, 0, uptr:NULL, defintval:2210, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_F1_U_DU_TRANSPORT_TYPE, NULL, 0, strptr:NULL, defstrval:"TCP", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DU_INTERFACE_NAME_FOR_F1U, NULL, 0, strptr:NULL, defstrval:"eth0", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DU_IPV4_ADDRESS_FOR_F1U, NULL, 0, strptr:NULL, defstrval:"127.0.0.1", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_DU_PORT_FOR_F1U, NULL, 0, uptr:NULL, defintval:2210, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_F1_U_DU_TRANSPORT_TYPE, NULL, 0, strptr:NULL, defstrval:"TCP", TYPE_STRING, 0}, \
}
#define CU_BAL_DESC { \
{CONFIG_STRING_CU_BALANCING, NULL, 0, strptr:NULL, defstrval:"ALL", TYPE_STRING, 0}, \
{CONFIG_STRING_CU_BALANCING, NULL, 0, strptr:NULL, defstrval:"ALL", TYPE_STRING, 0}, \
}
#define CU_INTERFACE_F1U 0
#define CU_ADDRESS_F1U 1
#define CU_ADDRESS_F1U 1
#define CU_PORT_F1U 2
#define CU_TYPE_F1U 3
#define DU_INTERFACE_F1U 0
#define DU_ADDRESS_F1U 1
#define DU_PORT_F1U 2
#define DU_TYPE_F1U 3
#define DU_TECH 4
#define DU_INTERFACE_F1U 0
#define DU_ADDRESS_F1U 1
#define DU_PORT_F1U 2
#define DU_TYPE_F1U 3
#define DU_TECH 4
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
......
openair2/NETWORK_DRIVER/MESH/common.c
View file @ 84af6103
......@@ -110,13 +110,12 @@ void nas_COMMON_receive(uint16_t dlen,
#ifdef NAS_ADDRESS_FIX
// Make the third byte of both the source and destination equal to the fourth of the destination
unsigned char * ifaddr, *saddr, daddr;
uint32_t odaddr = 0, osaddr;
daddr = (unsigned char *)&((struct iphdr *)skb->data)->daddr;
odaddr = ((struct iphdr *)skb->data)->daddr;
// sn = addr[3];
//sn = addr[3];
saddr = (unsigned char *)&((struct iphdr *)skb->data)->saddr;
uint32_t odaddr,osaddr;
osaddr = ((struct iphdr *)skb->data)->saddr;
if (daddr[0] == saddr[0]) {// same network
......
openair2/RRC/LTE/rrm_2_rrc_msg.c
View file @ 84af6103
......@@ -117,7 +117,7 @@ void fn_rrc (void) {
case RRCI_CX_ESTABLISH_RESP: {
rrci_cx_establish_resp_t *p = (rrci_cx_establish_resp_t *) Data;
unsigned char CH_index,i;
unsigned char i, CH_index = 0;
msg( "[RRCI]>[RRC][Inst %d]:RRCI_CX_ESTABLISH_RESP\n",Header->inst);
for(i=0; i<NB_SIG_CNX_UE; i++)
......@@ -185,6 +185,3 @@ void fn_rrc (void) {
}
}
}
openair2/UTIL/OTG/otg_tx.c
View file @ 84af6103
......@@ -224,9 +224,9 @@ int size_dist(
return size_data;
}
int adjust_size(int size)
{
if (size<PAYLOAD_MIN) {
LOG_W(OTG,"Packet Size=%d out of range, size=%d \n", size, PAYLOAD_MIN);
size=PAYLOAD_MIN;
......@@ -239,9 +239,6 @@ int adjust_size(int size)
}
unsigned char *packet_gen(
const int src_instance,
const int dst_instance,
......@@ -391,22 +388,20 @@ unsigned char *packet_gen(
}
unsigned char *packet_gen_multicast(
const int src_instance,
const int dst_instance,
const int ctime,
unsigned int * const pkt_size)
{
*pkt_size =0;
unsigned int size=0;
unsigned int buffer_size =0;
*pkt_size = 0;
unsigned int size = 0;
unsigned int buffer_size = 0;
char *payload=NULL;
char *header=NULL;
unsigned int flag;
int app,seq_num=0;
int otg_hdr_size= sizeof(otg_hdr_info_t) + sizeof(otg_hdr_t);
unsigned int flag = 0;
int app, seq_num = 0;
int otg_hdr_size = sizeof(otg_hdr_info_t) + sizeof(otg_hdr_t);
set_ctime(ctime); // fixme: this should be done separetly from packet_gen and packet_gen_multicast
......@@ -488,7 +483,9 @@ unsigned char *packet_gen_multicast(
payload,
buffer_size,
0/*g_otg_multicast->application_type[src_instance][dst][app]*/,
flag, 0, ctime,
flag,
0,
ctime,
seq_num,
0,
HDR_IP_v4_MIN+HDR_UDP,
......
openair3/SCTP/sctp_common.h
View file @ 84af6103
......@@ -37,8 +37,8 @@
#if defined(ENB_MODE)
# include "common/utils/LOG/log.h"
# define SCTP_ERROR(x, args...) LOG_E(SCTP, x, ##args)
# define SCTP_WARN(x, args...) LOG_W(SCTP, x, ##args)
# define SCTP_DEBUG(x, args...) LOG_I(SCTP, x, ##args)
# define SCTP_WARN(x, args...) LOG_W(SCTP, x, ##args)
#else
# define SCTP_ERROR(x, args...) do { fprintf(stderr, "[SCTP][E]"x, ##args); } while(0)
# define SCTP_DEBUG(x, args...) do { fprintf(stdout, "[SCTP][D]"x, ##args); } while(0)
......
openair3/SCTP/sctp_eNB_task.c
View file @ 84af6103
......@@ -717,8 +717,7 @@ static int sctp_create_new_listener(
SCTP_DEBUG("ipv4 addresses:\n");
for (i = 0; i < init_p->nb_ipv4_addr; i++) {
SCTP_DEBUG("\t- "IPV4_ADDR"\n",
IPV4_ADDR_FORMAT(init_p->ipv4_address[i]));
SCTP_DEBUG("\t- "IPV4_ADDR"\n", IPV4_ADDR_FORMAT(init_p->ipv4_address[i]));
ip4_addr = (struct sockaddr_in *)&addr[i];
ip4_addr->sin_family = AF_INET;
ip4_addr->sin_port = htons(init_p->port);
......
targets/RT/USER/lte-softmodem-common.c
View file @ 84af6103
......@@ -56,14 +56,10 @@ softmodem_params_t *get_softmodem_params(void) {
void get_common_options(void) {
uint32_t online_log_messages;
uint32_t glog_level ;
uint32_t start_telnetsrv;
uint32_t noS1;
uint32_t nokrnmod;
uint32_t nonbiot;
uint32_t rfsim;
uint32_t basicsim;
uint32_t start_telnetsrv = 0;
uint32_t noS1 = 0, nokrnmod = 0, nonbiot = 0;
uint32_t rfsim = 0, basicsim = 0, do_forms = 0;
char *logmem_filename = NULL;
uint32_t do_forms;
paramdef_t cmdline_params[] =CMDLINE_PARAMS_DESC ;
paramdef_t cmdline_logparams[] =CMDLINE_LOGPARAMS_DESC ;
checkedparam_t cmdline_log_CheckParams[] = CMDLINE_LOGPARAMS_CHECK_DESC;
......
targets/RT/USER/lte-softmodem.h
View file @ 84af6103
......@@ -168,10 +168,10 @@
#define DEFAULT_DLF 2680000000
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* command line parameters common to eNodeB and UE */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------------------------------------------------------------------------*/
/* command line parameters common to eNodeB and UE */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*-----------------------------------------------------------------------------------------------------------------------------------------------------*/
#define RF_CONFIG_FILE softmodem_params.rf_config_file
#define PHY_TEST softmodem_params.phy_test
#define WAIT_FOR_SYNC softmodem_params.wait_for_sync
......@@ -184,27 +184,27 @@
#define SEND_DMRSSYNC softmodem_params.send_dmrs_sync
#define USIM_TEST softmodem_params.usim_test
#define CMDLINE_PARAMS_DESC { \
{"rf-config-file", CONFIG_HLP_RFCFGF, 0, strptr:(char **)&RF_CONFIG_FILE, defstrval:NULL, TYPE_STRING, sizeof(RF_CONFIG_FILE)},\
{"ulsch-max-errors", CONFIG_HLP_ULMAXE, 0, uptr:&ULSCH_max_consecutive_errors, defuintval:0, TYPE_UINT, 0}, \
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&PHY_TEST, defintval:0, TYPE_INT, 0}, \
{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&USIM_TEST, defintval:0, TYPE_UINT8, 0}, \
{"clock", CONFIG_HLP_CLK, 0, uptr:&CLOCK_SOURCE, defintval:0, TYPE_UINT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&WAIT_FOR_SYNC, defintval:0, TYPE_INT, 0}, \
{"single-thread-enable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&SINGLE_THREAD_FLAG, defintval:0, TYPE_INT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&CHAIN_OFFSET, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \
{"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr:&opp_enabled, defintval:0, TYPE_INT, 0}, \
{"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, iptr:&NUMEROLOGY, defintval:0, TYPE_INT, 0}, \
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&EMULATE_RF, defintval:0, TYPE_INT, 0}, \
{"parallel-config", CONFIG_HLP_PARALLEL_CMD,0, strptr:(char **)&parallel_config, defstrval:NULL, TYPE_STRING, 0}, \
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:(char **)&worker_config, defstrval:NULL, TYPE_STRING, 0}, \
{"noS1", CONFIG_HLP_NOS1, PARAMFLAG_BOOL, uptr:&noS1, defintval:0, TYPE_INT, 0}, \
{"rfsim", CONFIG_HLP_RFSIM, PARAMFLAG_BOOL, uptr:&rfsim, defintval:0, TYPE_INT, 0}, \
{"basicsim", CONFIG_HLP_RFSIM, PARAMFLAG_BOOL, uptr:&basicsim, defintval:0, TYPE_INT, 0}, \
{"nokrnmod", CONFIG_HLP_NOKRNMOD, PARAMFLAG_BOOL, uptr:&nokrnmod, defintval:0, TYPE_INT, 0}, \
{"nbiot-disable", CONFIG_HLP_DISABLNBIOT, PARAMFLAG_BOOL, uptr:&nonbiot, defuintval:0, TYPE_INT, 0}, \
{"rf-config-file", CONFIG_HLP_RFCFGF, 0, strptr:(char **)&RF_CONFIG_FILE, defstrval:NULL, TYPE_STRING, sizeof(RF_CONFIG_FILE)},\
{"ulsch-max-errors", CONFIG_HLP_ULMAXE, 0, uptr:&ULSCH_max_consecutive_errors, defuintval:0, TYPE_UINT, 0}, \
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&PHY_TEST, defintval:0, TYPE_INT, 0}, \
{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&USIM_TEST, defintval:0, TYPE_UINT8, 0}, \
{"clock", CONFIG_HLP_CLK, 0, uptr:&CLOCK_SOURCE, defintval:0, TYPE_UINT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&WAIT_FOR_SYNC, defintval:0, TYPE_INT, 0}, \
{"single-thread-enable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&SINGLE_THREAD_FLAG, defintval:0, TYPE_INT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&CHAIN_OFFSET, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \
{"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr:&opp_enabled, defintval:0, TYPE_INT, 0}, \
{"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, iptr:&NUMEROLOGY, defintval:0, TYPE_INT, 0}, \
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&EMULATE_RF, defintval:0, TYPE_INT, 0}, \
{"parallel-config", CONFIG_HLP_PARALLEL_CMD, 0, strptr:(char **)&parallel_config, defstrval:NULL, TYPE_STRING, 0}, \
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:(char **)&worker_config, defstrval:NULL, TYPE_STRING, 0}, \
{"noS1", CONFIG_HLP_NOS1, PARAMFLAG_BOOL, uptr:&noS1, defintval:0, TYPE_INT, 0}, \
{"rfsim", CONFIG_HLP_RFSIM, PARAMFLAG_BOOL, uptr:&rfsim, defintval:0, TYPE_INT, 0}, \
{"basicsim", CONFIG_HLP_RFSIM, PARAMFLAG_BOOL, uptr:&basicsim, defintval:0, TYPE_INT, 0}, \
{"nokrnmod", CONFIG_HLP_NOKRNMOD, PARAMFLAG_BOOL, uptr:&nokrnmod, defintval:0, TYPE_INT, 0}, \
{"nbiot-disable", CONFIG_HLP_DISABLNBIOT, PARAMFLAG_BOOL, uptr:&nonbiot, defuintval:0, TYPE_INT, 0}, \
}
#define CONFIG_HLP_FLOG "Enable online log \n"
......
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