Commit adaf5a72 authored by luis_pereira87's avatar luis_pereira87

Define Initial BWP with the same locationAndBandwidth as Coreset0 defined by PDCCHConfigSIB1 in MIB

parent d1ba40cc
...@@ -50,8 +50,8 @@ gNBs = ...@@ -50,8 +50,8 @@ gNBs =
dl_carrierBandwidth = 106; dl_carrierBandwidth = 106;
#initialDownlinkBWP #initialDownlinkBWP
#genericParameters #genericParameters
# this is RBstart=41,L=24 (275*(L-1))+RBstart # this is RBstart=27,L=48 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6366; # 6366 12925 12956 28875 initialDLBWPlocationAndBandwidth = 12952; # 6366 12925 12956 28875 12952
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1; initialDLBWPsubcarrierSpacing = 1;
...@@ -94,7 +94,7 @@ gNBs = ...@@ -94,7 +94,7 @@ gNBs =
pMax = 20; pMax = 20;
#initialUplinkBWP #initialUplinkBWP
#genericParameters #genericParameters
initialULBWPlocationAndBandwidth = 6366; initialULBWPlocationAndBandwidth = 12952;
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1; initialULBWPsubcarrierSpacing = 1;
......
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