Commit 2407b4af authored by Xu Bo's avatar Xu Bo

fix issue 274, ulsch mcs

parent ac0d39af
...@@ -1375,7 +1375,9 @@ fill_DLSCH_dci( ...@@ -1375,7 +1375,9 @@ fill_DLSCH_dci(
int N_RBG; int N_RBG;
int N_RB_DL; int N_RB_DL;
COMMON_channels_t *cc; COMMON_channels_t *cc;
#ifdef UE_EXPANSION
int j;
#endif
start_meas(&eNB->fill_DLSCH_dci); start_meas(&eNB->fill_DLSCH_dci);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_FILL_DLSCH_DCI,VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_FILL_DLSCH_DCI,VCD_FUNCTION_IN);
...@@ -1391,8 +1393,8 @@ fill_DLSCH_dci( ...@@ -1391,8 +1393,8 @@ fill_DLSCH_dci(
// UE specific DCIs // UE specific DCIs
#ifdef UE_EXPANSION #ifdef UE_EXPANSION
for (i = 0; i < dlsch_ue_select[CC_id].ue_num; i++) { for (j = 0; j < dlsch_ue_select[CC_id].ue_num; j++) {
UE_id = dlsch_ue_select[CC_id].list[i].UE_id; UE_id = dlsch_ue_select[CC_id].list[j].UE_id;
#else #else
for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) { for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) {
#endif #endif
......
...@@ -2232,7 +2232,7 @@ void ulsch_scheduler_pre_ue_select( ...@@ -2232,7 +2232,7 @@ void ulsch_scheduler_pre_ue_select(
rnti = UE_RNTI(module_idP,ul_inactivity_id[CC_id][temp]); rnti = UE_RNTI(module_idP,ul_inactivity_id[CC_id][temp]);
if (CCE_allocation_infeasible(module_idP,CC_id,format_flag,subframeP,aggregation,rnti) == 1) { if (CCE_allocation_infeasible(module_idP,CC_id,format_flag,subframeP,aggregation,rnti) == 1) {
cc_id_flag[CC_id] = 1; cc_id_flag[CC_id] = 1;
return; continue;
} else { } else {
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE; hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti;
...@@ -2388,14 +2388,14 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP, ...@@ -2388,14 +2388,14 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
first_rb[CC_id] = first_rb[CC_id] + 3; first_rb[CC_id] = first_rb[CC_id] + 3;
UE_list->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 3; UE_list->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 3;
UE_list->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 2; UE_list->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 2;
UE_list->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = mcs; UE_list->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = 10;
} }
}else if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ue_priority == SCH_UL_INACTIVE ) { }else if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ue_priority == SCH_UL_INACTIVE ) {
// assigne RBS( 3 RBs) // assigne RBS( 3 RBs)
first_rb[CC_id] = first_rb[CC_id] + 3; first_rb[CC_id] = first_rb[CC_id] + 3;
UE_list->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 3; UE_list->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul = 3;
UE_list->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 2; UE_list->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = 2;
UE_list->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = mcs; UE_list->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = 10;
} }
} }
ue_num_temp--; ue_num_temp--;
......
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