Commit 2f685154 authored by Guy De Souza's avatar Guy De Souza

Merge branch 'nr_pdcch' into nr_pdsch

parents 645a0a61 a1ae155b
......@@ -1177,6 +1177,8 @@ set(PHY_SRC_COMMON
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_dl_mbsfn.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_ul_ref.c
${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
${OPENAIR1_DIR}/PHY/CODING/nr_segmentation.c
${OPENAIR1_DIR}/PHY/CODING/nr_compute_tbs.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
${OPENAIR1_DIR}/PHY/CODING/3gpplte_sse.c
......
......@@ -430,4 +430,20 @@ uint32_t crcbit (uint8_t * ,
int16_t reverseBits(int32_t ,int32_t);
void phy_viterbi_dot11(int8_t *,uint8_t *,uint16_t);
int32_t nr_segmentation(unsigned char *input_buffer,
unsigned char **output_buffers,
unsigned int B,
unsigned int *C,
unsigned int *Kplus,
unsigned int *Kminus,
unsigned int *Zout,
unsigned int *F);
uint32_t nr_compute_tbs(uint8_t mcs,
uint16_t nb_rb,
uint16_t nb_symb_sch,
uint8_t nb_re_dmrs,
uint16_t length_dmrs,
uint8_t Nl);
#endif
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* file: nr_compute_tbs.c
purpose: Compute NR TBS
author: Hongzhi WANG (TCL)
*/
#include "PHY/defs_nr_UE.h"
//#include "SCHED/extern.h"
#define INDEX_MAX_TBS_TABLE (93)
//Table 5.1.3.1-1
uint16_t Mcsindextable1[29][3] = {{2,120,0.2344},
{2,157,0.3066},
{2,193,0.3770},
{2,251,0.4902},
{2,308,0.6016},
{2,379,0.7402},
{2,449,0.8770},
{2,526,1.0273},
{2,602,1.1758},
{2,679,1.3262},
{4,340,1.3281},
{4,378,1.4766},
{4,434,1.6953},
{4,490,1.9141},
{4,553,2.1602},
{4,616,2.4063},
{4,658,2.5703},
{6,438,2.5664},
{6,466,2.7305},
{6,517,3.0293},
{6,567,3.3223},
{6,616,3.6094},
{6,666,3.9023},
{6,719,4.2129},
{6,772,4.5234},
{6,822,4.8164},
{6,873,5.1152},
{6,910,5.3320},
{6,948,5.5547}};
//Table 5.1.2.2-2
uint16_t Tbstable_nr[INDEX_MAX_TBS_TABLE] = {24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,160,168,176,184,192,208,224,240,256,272,288,304,320,336,352,368,384,408,432,456,480,504,528,552,576,608,640,672,704,736,768,808,848,888,928,984,1032,1064,1128,1160,1192,1224,1256,1288,1320,1352,1416,1480,1544,1608,1672,1736,1800,1864,1928,2024,2088,2152,2216,2280,2408,2472,2536,2600,2664,2728,2792,2856,2976,3104,3240,3368,3496,3624,3752,3824};
uint32_t nr_compute_tbs(uint8_t mcs,
uint16_t nb_rb,
uint16_t nb_symb_sch,
uint8_t nb_re_dmrs,
uint16_t length_dmrs,
uint8_t Nl)
{
uint16_t nbp_re, nb_re, nb_dmrs_prb, nb_rb_oh, Ninfo,Np_info,n,Qm,R,C;
uint32_t nr_tbs;
nb_rb_oh = 0; //set to 0 if not configured by higher layer
Qm = Mcsindextable1[mcs][0];
R = Mcsindextable1[mcs][1];
nb_dmrs_prb = nb_re_dmrs*length_dmrs;
nbp_re = 12 * nb_symb_sch - nb_dmrs_prb - nb_rb_oh;
nb_re = min(156, nbp_re) * nb_rb;
// Intermediate number of information bits
Ninfo = (nb_re * R * Qm * Nl)/1024;
//printf("Ninfo %d nbp_re %d nb_re %d Qm %d, R %d\n", Ninfo, nbp_re, nb_re, Qm, R);
if (Ninfo <=3824) {
n = max(3, floor(log2(Ninfo)) - 6);
Np_info = max(24, pow(n,2) * floor(Ninfo/pow(n,2)));
for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
if (Tbstable_nr[i] >= Np_info){
nr_tbs = Tbstable_nr[i];
break;
}
}
}
else {
n = floor(log2(Ninfo-24)) - 5;
Np_info = max(3840, pow(n,2) * round((Ninfo - 24)/pow(n,2)));
if (R <= 1024/4) {
C = ceil( (Np_info + 24)/3816 );
nr_tbs = 8 * C * ceil( (Np_info + 24)/(8*C) ) - 24;
}
else {
if (Np_info > 8424){
C = ceil( (Np_info + 24)/8424 );
nr_tbs = 8 * C * ceil( (Np_info + 24)/(8*C) ) - 24;
}
else
nr_tbs = 8 * ceil( (Np_info + 24)/8 ) - 24;
}
}
return nr_tbs;
}
......@@ -24,8 +24,8 @@
author: Hongzhi WANG (TCL)
date: 12.09.2017
*/
#include "PHY/defs.h"
#include "SCHED/extern.h"
#include "PHY/defs_nr_UE.h"
//#include "SCHED/extern.h"
//#define DEBUG_SEGMENTATION
......
......@@ -34,7 +34,7 @@
//#define DEBUG_PDCCH_DMRS
//#define DEBUG_DCI
//#define DEBUG_POLAR_PARAMS
//#define DEBUG_CHANNEL_CODING
#define PDCCH_TEST_POLAR_TEMP_FIX
extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
......@@ -163,11 +163,13 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
nfapi_nr_config_request_t config)
{
int16_t mod_dmrs[3][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration
uint8_t idx=0;
uint16_t a;
int k,l,k_prime,dci_idx, dmrs_idx;
nr_cce_t cce;
nr_reg_t reg;
nr_reg_t reg_mapping_list[NR_MAX_PDCCH_AGG_LEVEL*NR_NB_REG_PER_CCE];
/*First iteration: single DCI*/
NR_gNB_DCI_ALLOC_t dci_alloc = pdcch_vars.dci_alloc[0];
......@@ -203,9 +205,10 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
}
/// DCI payload processing
// CRC attachment + Scrambling + Channel coding + Rate matching
// CRC attachment + Scrambling + Channel coding + Rate matching
uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.rnti : 0;
uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? ((pdcch_params.scrambling_id)?pdcch_params.rnti:0) : 0;
uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
#ifdef PDCCH_TEST_POLAR_TEMP_FIX
t_nrPolar_paramsPtr currentPtr = NULL;//, polarParams = NULL;
nr_polar_init(&currentPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
......@@ -216,17 +219,21 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
#endif
polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, n_RNTI);
#ifdef DEBUG_POLAR_PARAMS
#ifdef DEBUG_CHANNEL_CODING
printf("DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1], dci_alloc.dci_pdu[2], dci_alloc.dci_pdu[3]);
printf("Encoded Payload: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
encoder_output[0], encoder_output[1], encoder_output[2], encoder_output[3]);
#endif
/// Scrambling
uint32_t scrambled_output[NR_MAX_DCI_SIZE_DWORD];
nr_pdcch_scrambling(encoder_output, encoded_length, Nid, n_RNTI, scrambled_output);
// QPSK modulation
int16_t mod_dci[NR_MAX_DCI_SIZE>>1];
for (int i=0; i<encoded_length>>1; i++) {
idx = (((encoder_output[i<<1]>>(i<<1))&1)<<1) ^ ((encoder_output[(i<<1)+1]>>((i<<1)+1))&1);
idx = ((((scrambled_output[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((scrambled_output[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
mod_dci[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
mod_dci[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_DCI
......@@ -243,40 +250,70 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size;
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
for (int cce_idx=0; cce_idx<dci_alloc.L; cce_idx++){
cce = dci_alloc.cce_list[cce_idx];
for (int reg_idx=0; reg_idx<NR_NB_REG_PER_CCE; reg_idx++) {
k = cset_start_sc + cce.reg_list[reg_idx].start_sc_idx;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + cce.reg_list[reg_idx].symb_idx;
dmrs_idx = (cce.reg_list[reg_idx].reg_idx/cset_nsymb)*3;
k_prime = 0;
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
k_prime++;
dmrs_idx++;
}
else { // DCI payload
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[dci_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(dci_idx<<1) + 1]) >> 15;
dci_idx++;
}
k++;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
}
}
/*Reorder REG list for a freq first mapping*/
uint8_t symb_idx[NR_MAX_CSET_DURATION] = {0,0,0};
uint8_t nb_regs = dci_alloc.L*NR_NB_REG_PER_CCE;
uint8_t regs_per_symb = nb_regs/cset_nsymb;
for (int cce_idx=0; cce_idx<dci_alloc.L; cce_idx++){
cce = dci_alloc.cce_list[cce_idx];
for (int reg_idx=0; reg_idx<NR_NB_REG_PER_CCE; reg_idx++) {
reg = cce.reg_list[reg_idx];
reg_mapping_list[reg.symb_idx*regs_per_symb + symb_idx[reg.symb_idx]++] = reg;
}
}
#ifdef DEBUG_DCI
printf("\n Ordered REG list:\n");
for (int i=0; i<nb_regs; i++)
printf("%d\t",reg_mapping_list[i].reg_idx );
printf("\n");
#endif
else { //NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS) {
/*in this case the DMRS are mapped on all the coreset*/
for (l=cset_start_symb; l<cset_start_symb+ cset_nsymb; l++) {
dmrs_idx = 0;
k = cset_start_sc + 1;
while (dmrs_idx<3*pdcch_params.n_rb) {
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
k+=4;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
dmrs_idx++;
}
}
}
/*Now mapping the encoded DCI based on newly constructed REG list
* and the DMRS for the precoder granularity same as REG bundle*/
for (int reg_idx=0; reg_idx<nb_regs; reg_idx++) {
reg = reg_mapping_list[reg_idx];
k = cset_start_sc + reg.start_sc_idx;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + reg.symb_idx;
dmrs_idx = (reg.reg_idx/cset_nsymb)*3;
k_prime = 0;
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
k_prime++;
dmrs_idx++;
}
}
else { // DCI payload
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[dci_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(dci_idx<<1) + 1]) >> 15;
dci_idx++;
}
k++;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
}
}
}
#ifdef DEBUG_DCI
......
......@@ -31,7 +31,7 @@
*/
#include "nr_dci.h"
//#define DEBUG_NFAPI_NR_RNTI_RA
void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m) {
......@@ -131,20 +131,6 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
case NFAPI_NR_RNTI_RA:
// Freq domain assignment
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
#ifdef DEBUG_NFAPI_NR_RNTI_RA
printf("frequency_domain_assignment = %05d = %#010x\n"
" time_domain_assignment = %05d = %#010x\n"
" vrb_to_prb_mapping = %05d = %#010x\n"
" MCS = %05d = %#010x\n"
" tb_scaling = %05d = %#010x\n"
" N_RB = %05d = %#010x\n"
" fsize = %05d = %#010x\n",
pdu_rel15->frequency_domain_assignment,pdu_rel15->frequency_domain_assignment,
pdu_rel15->time_domain_assignment,pdu_rel15->time_domain_assignment,
pdu_rel15->vrb_to_prb_mapping,pdu_rel15->vrb_to_prb_mapping,
pdu_rel15->mcs,pdu_rel15->mcs,pdu_rel15->tb_scaling,pdu_rel15->tb_scaling,
N_RB,N_RB,fsize,fsize);
#endif
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
// Time domain assignment
......@@ -180,50 +166,5 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
cfg->sch_config.physical_cell_id.value : dci_alloc->pdcch_params.shift_index;
nr_fill_cce_list(dci_alloc, n_shift, cand_idx);
LOG_I(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
/* if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_1_0) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_1_0;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
if (rel15->rnti_type == NFAPI_NR_RNTI_C
|| rel15->rnti_type == NFAPI_NR_RNTI_CS
|| rel15->rnti_type == NFAPI_NR_RNTI_new) {
} else if (rel15->rnti_type == NFAPI_NR_RNTI_P) {
} else if (rel15->rnti_type == NFAPI_NR_RNTI_SI) {
} else if (rel15->rnti_type == NFAPI_NR_RNTI_RA) {
} else if (rel15->rnti_type == NFAPI_NR_RNTI_TC) {
} else {
AssertFatal(1==0, "[nr_fill_dci_and_dlsch] Incorrect DCI Format(%d) and RNTI Type(%d) combination",rel15->dci_format, rel15->rnti_type);
}
} else if (rel15->dci_format == NFAPI_NR_UL_DCI_FORMAT_0_0) {
dci_alloc->format = NFAPI_NR_UL_DCI_FORMAT_0_0;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_ul ,cfg);
} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_1_1;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else if (rel15->dci_format == NFAPI_NR_UL_DCI_FORMAT_0_1) {
dci_alloc->format = NFAPI_NR_UL_DCI_FORMAT_0_1;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_ul ,cfg);
} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_0) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_0;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_1) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_1;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_2) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_2;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_3) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_3;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else {
AssertFatal(1==0, "[nr_fill_dci_and_dlsch] Incorrect DCI Format(%d)",rel15->dci_format);
}*/
}
......@@ -51,7 +51,7 @@
//#define NR_LTE_PDCCH_DCI_SWITCH
#define NR_PDCCH_DCI_RUN // activates new nr functions
//#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#define PDCCH_TEST_POLAR_TEMP_FIX
......@@ -550,11 +550,12 @@ void nr_pdcch_deinterleaving(NR_DL_FRAME_PARMS *frame_parms, uint16_t *z,
* if interleaved then do this: wbar table has bundles interleaved. We have to de-interleave then
* following procedure described in 38.211 Section 7.3.2.2:
*/
uint32_t bundle_id, bundle_interleaved, c=0 ,r=-1, k, l, i=0;
uint32_t coreset_C = (uint32_t)(coreset_nbr_rb / (coreset_interleaver_size_R*reg_bundle_size_L));
uint16_t *wptr;
wptr = &wtemp_rx[0];
z = &wtemp_rx[0];
int c=0 ,r=-1;
uint32_t bundle_id, bundle_interleaved, k, l, i=0;
uint32_t coreset_C = (uint32_t)(coreset_nbr_rb * coreset_time_dur/ (coreset_interleaver_size_R*reg_bundle_size_L));
//uint16_t *wptr;
//wptr = &wtemp_rx[0];
//z = &wtemp_rx[0];
bundle_id=0;
for (k=0 ; k<9*coreset_nbr_rb*coreset_time_dur; k++){
#ifdef NR_PDCCH_DCI_DEBUG
......@@ -571,7 +572,7 @@ void nr_pdcch_deinterleaving(NR_DL_FRAME_PARMS *frame_parms, uint16_t *z,
r++;
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t --> time to modify bundle_interleaved and bundle_id --> r=%d c=%d",r,c);
printf("\t --> time to modify bundle_interleaved and bundle_id --> r=%d c=%d\n",r,c);
#endif
bundle_id=c*coreset_interleaver_size_R+r;
bundle_interleaved=(r*coreset_C+c+n_shift)%(coreset_nbr_rb * coreset_time_dur/reg_bundle_size_L);
......@@ -579,15 +580,15 @@ void nr_pdcch_deinterleaving(NR_DL_FRAME_PARMS *frame_parms, uint16_t *z,
if (coreset_interleaved == 1){
//wptr[i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L]=wbar[i];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\n\t\t\t\t\t\t\t\t\t wptr[%d] <-> wbar[%d]",i,i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L);
printf("\t\t\t\t\t wptr[%d] = (%d,%d) <-> wbar[%d]",i, *(char*) &wbar[i], *(1 + (char*) &wbar[i]),i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L);
#endif
wptr[i]=wbar[i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L];
z[i]=wbar[i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t bundle_id = %d \t bundle_interleaved = %d (r=%d, c=%d)\n",bundle_id,bundle_interleaved,r,c);
#endif
i++;
} else {
wptr[i]=wbar[i];
z[i]=wbar[i];
i++;
}
//bundle_id=c*coreset_interleaver_size_R+r;
......@@ -759,11 +760,11 @@ int32_t pdcch_qpsk_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t nr_pdcch_llr(NR_DL_FRAME_PARMS *frame_parms, int32_t **rxdataF_comp,
char *pdcch_llr, uint8_t symbol,uint32_t coreset_nbr_rb) {
int16_t *rxF = (int16_t*) &rxdataF_comp[0][(symbol * frame_parms->N_RB_DL * 12)];
int16_t *rxF = (int16_t*) &rxdataF_comp[0][(symbol * coreset_nbr_rb * 9)];
int32_t i;
char *pdcch_llr8;
pdcch_llr8 = &pdcch_llr[2 * symbol * frame_parms->N_RB_DL * 12];
pdcch_llr8 = &pdcch_llr[2 * symbol * coreset_nbr_rb * 9];
if (!pdcch_llr8) {
printf("pdcch_qpsk_llr: llr is null, symbol %d\n", symbol);
......@@ -1157,15 +1158,15 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#endif
}
dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS)];
dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITHOUT_DMRS)];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0_ext = &dl_ch_estimates_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
aarx,symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS));
aarx,symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITHOUT_DMRS));
#endif
rxF_ext = &rxdataF_ext[aarx][symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS)];
rxF_ext = &rxdataF_ext[aarx][symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITHOUT_DMRS)];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> rxF_ext = &rxdataF_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
aarx,symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS));
aarx,symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITHOUT_DMRS));
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> (for symbol=%d, aarx=%d), symbol_mod=%d, nushiftmod3=%d \n",symbol,aarx,symbol_mod,nushiftmod3);
#endif
......@@ -1332,7 +1333,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#endif
dl_ch0_ext[j++] = dl_ch0[i];
//printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> ch %d => dl_ch0(%d,%d)\n", i, *(short *) &dl_ch0[i], *(1 + (short*) &dl_ch0[i]));
printf("\t-> ch %d => dl_ch0(%d,%d)\n", i, *(short *) &dl_ch0[i], *(1 + (short*) &dl_ch0[i]));
printf("\t-> dl_ch0[%d] => dl_ch0_ext[%d](%d,%d)\n", i,(j-1), *(short *) &dl_ch0[i], *(1 + (short*) &dl_ch0[i]));
} else {
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d) \t\t <==> DM-RS PDCCH, this is a pilot symbol\n",
......@@ -2105,9 +2106,9 @@ short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
// dl_ch128 = (__m128i *) &dl_ch_estimates_ext[(aatx << 1) + aarx][symbol * frame_parms->N_RB_DL * 12];
// rxdataF128 = (__m128i *) &rxdataF_ext[aarx][symbol * frame_parms->N_RB_DL * 12];
// rxdataF_comp128 = (__m128i *) &rxdataF_comp[(aatx << 1) + aarx][symbol * frame_parms->N_RB_DL * 12];
dl_ch128 = (__m128i *) &dl_ch_estimates_ext[(aatx << 1) + aarx][symbol * coreset_nbr_rb * 12];
rxdataF128 = (__m128i *) &rxdataF_ext[aarx][symbol * coreset_nbr_rb * 12];
rxdataF_comp128 = (__m128i *) &rxdataF_comp[(aatx << 1) + aarx][symbol * coreset_nbr_rb * 12];
dl_ch128 = (__m128i *) &dl_ch_estimates_ext[(aatx << 1) + aarx][symbol * coreset_nbr_rb * 9];
rxdataF128 = (__m128i *) &rxdataF_ext[aarx][symbol * coreset_nbr_rb * 9];
rxdataF_comp128 = (__m128i *) &rxdataF_comp[(aatx << 1) + aarx][symbol * coreset_nbr_rb * 9];
#elif defined(__arm__)
#endif
#ifdef NR_PDCCH_DCI_DEBUG
......@@ -2120,7 +2121,10 @@ short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
#endif
#if defined(__x86_64__) || defined(__i386__)
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_channel_compensation)-> rxdataF x dl_ch -> RB[%d] RE[%d]\n",rb,k);
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_channel_compensation)-> rxdataF_comp = rxdataF_ext(%d,%d) x dl_ch_ext(%d,%d) -> RB[%d] RE[%d]\n",
*(short *) &rxdataF_ext[(rb*9)+k],*(1 + (short*) &rxdataF_ext[(rb*9)+k]),
*(short *) &dl_ch_estimates_ext[(rb*9)+k],*(1 + (short*) &dl_ch_estimates_ext[(rb*9)+k]),
rb,k);
#endif
k++;
if (k%9 == 0) rb++;
......@@ -2815,7 +2819,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// For each BWP the number of CORESETs is limited to 3 (including initial CORESET Id=0 -> ControlResourceSetId (0..maxNrofControlReourceSets-1) (0..12-1)
//uint32_t n_BWP_start = 0;
//uint32_t n_rb_offset = 0;
uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset;
uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset+43; //to be removed 43
// start time position for CORESET
// parameter symbol_mon is a 14 bits bitmap indicating monitoring symbols within a slot
uint8_t start_symbol = 0;
......@@ -2823,11 +2827,12 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// at the moment we are considering that the PDCCH is always starting at symbol 0 of current slot
// the following code to initialize start_symbol must be activated once we implement PDCCH demapping on symbol not equal to 0 (considering symbol_mon)
for (int i=0; i < 14; i++) {
if (symbol_mon >> (13-i) != 0) {
if ((symbol_mon >> (i+1))&0x1 != 0) {
start_symbol = i;
i=14;
}
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> symbol_mon=(%d) and start_symbol=(%d)\n",symbol_mon,start_symbol);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%lld) n_rb_offset=(%d) coreset_time_dur=(%d) n_shift=(%d) reg_bundle_size_L=(%d) coreset_interleaver_size_R=(%d) \n",
......@@ -2904,6 +2909,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_extract_rbs_single(is_secondary_ue=%d) to remove DM-RS PDCCH\n",
is_secondary_ue);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n");
#endif
nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id],
......@@ -2930,6 +2936,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_channel_level(avgP=%d) => compute channel level based on ofdm symbol 0, pdcch_vars[eNB_id]->dl_ch_estimates_ext\n",avgP);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in pdcch_channel_level(dl_ch_estimates_ext -> dl_ch_estimates_ext)\n");
#endif
// compute channel level based on ofdm symbol 0
pdcch_channel_level(pdcch_vars[eNB_id]->dl_ch_estimates_ext,
......@@ -2951,6 +2958,7 @@ T(T_UE_PHY_PDCCH_ENERGY, T_INT(eNB_id), T_INT(0), T_INT(frame%1024), T_INT(nr_tt
#endif
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_channel_compensation(log2_maxh=%d)\n",log2_maxh);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_channel_compensation(rxdataF_ext x dl_ch_estimates_ext -> rxdataF_comp)\n");
#endif
// compute LLRs for ofdm symbol 0 only
nr_pdcch_channel_compensation(pdcch_vars[eNB_id]->rxdataF_ext,
......@@ -3058,6 +3066,7 @@ printf("\t### in nr_rx_pdcch() function we enter pdcch_channel_compensation(log2
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr \n",s);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_llr(rxdataF_comp -> llr)\n");
#endif
nr_pdcch_llr(frame_parms,
pdcch_vars[eNB_id]->rxdataF_comp,
......@@ -3107,6 +3116,11 @@ T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
coreset_nbr_rb);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_unscrambling()\n");
for (int i=0; i<(coreset_time_dur*coreset_nbr_rb*9); i++){
printf("\te_rx[%d]=(%d,%d)",i,*(char*) &pdcch_vars[eNB_id]->e_rx[i],*(1 + (char*) &pdcch_vars[eNB_id]->e_rx[i]));
if (i%10 == 0) printf("\n");
}
printf("\n");
#endif
nr_pdcch_unscrambling(pdcch_vars[eNB_id]->crnti,
frame_parms,
......@@ -3116,6 +3130,15 @@ T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
// get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
pdcch_DMRS_scrambling_id,
do_common);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we end nr_pdcch_unscrambling()\n");
for (int i=0; i<(coreset_time_dur*coreset_nbr_rb*9); i++){
printf("\te_rx[%d]=(%d,%d)",i,*(char*) &pdcch_vars[eNB_id]->e_rx[i],*(1 + (char*) &pdcch_vars[eNB_id]->e_rx[i]));
if (i%10 == 0) printf("\n");
}
printf("\n");
#endif
/*
printf("\t### in nr_rx_pdcch() function we enter pdcch_demapping()\n");
......@@ -3724,39 +3747,6 @@ uint8_t generate_dci_top_emul(PHY_VARS_eNB *phy_vars_eNB,
#endif
void dci_decoding(uint8_t DCI_LENGTH,
uint8_t aggregation_level,
t_nrPolar_paramsPtr currentPtr,
double *e,
uint8_t *decoded_output)
{
int8_t decoderState=0;
#ifdef DEBUG_DCI_DECODING
int32_t i;
#endif
if (aggregation_level>16) {
LOG_I(PHY," dci.c: dci_decoding FATAL, illegal aggregation_level %d\n",aggregation_level);
return;
}
#ifdef DEBUG_DCI_DECODING
LOG_I(PHY," Doing DCI decoding for %d bits, DCI_LENGTH %d,coded_bits %d, e %p\n",3*(DCI_LENGTH+16),DCI_LENGTH,coded_bits,e);
#endif
decoderState = polar_decoder(e,
decoded_output,
currentPtr,
8,
0);
}
static uint8_t dci_decoded_output[RX_NB_TH][(MAX_DCI_SIZE_BITS+64)/8];
/*uint16_t get_nCCE(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi)
......@@ -3946,10 +3936,11 @@ void nr_dci_decoding_procedure0(int s,
uint16_t crc, CCEind, nCCE[3];
uint32_t *CCEmap = NULL, CCEmap_mask = 0;
int L2 = (1 << L);
uint8_t L2 = (1 << L);
unsigned int Yk, nb_candidates = 0, i, m;
unsigned int CCEmap_cand;
double *polar_input = malloc (sizeof(double) * 108*L);
double *polar_input = malloc (sizeof(double) * 108*L2);
int8_t decoderState=0;
// A[p], p is the current active CORESET
uint16_t A[3]={39827,39829,39839};
......@@ -4037,6 +4028,9 @@ void nr_dci_decoding_procedure0(int s,
nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.srs_nrofCandidates;
} else {
nb_candidates = (L2 == 4) ? 4 : ((L2 == 8)? 2 : 1); // according to Table 10.1-1 (38.213 section 10.1)
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> we are in common searchSpace and nb_candidates=%d for L2=%d\n",nb_candidates,L2);
#endif
}
} else {
switch (L2) {
......@@ -4058,6 +4052,7 @@ void nr_dci_decoding_procedure0(int s,
default:
break;
}
// Find first available in ue specific search space
// according to procedure in Section 10.1 of 38.213
// compute Yk
......@@ -4148,19 +4143,31 @@ void nr_dci_decoding_procedure0(int s,
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we have to replace this part of the code by polar decoding\n");
#endif
for (int m=0; m < (nCCE[p]*6*9*2); m++)
// for (int m=0; m < (nCCE[p]*6*9*2); m++)
printf("polar intput: ");
for (int m=0; m < (L2*6*9*2); m++){
polar_input[m] = (pdcch_vars[eNB_id]->e_rx[CCEind * 54+m]>0) ? (1.0):(-1.0);
printf("\t polar_input[%d]=%lf <-> e_rx[%d]=%d\n",m,polar_input[m],(CCEind * 54+m),pdcch_vars[eNB_id]->e_rx[CCEind * 54+m]);
}
printf("\n");
#ifdef PDCCH_TEST_POLAR_TEMP_FIX
t_nrPolar_paramsPtr currentPtr = NULL;
nr_polar_init(&currentPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
nr_polar_init(&currentPtr, NR_POLAR_DCI_MESSAGE_TYPE, 41, 8);
#else
nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, sizeof_bits, L);
t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, sizeof_bits,L);
//#else
// nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, (uint16_t)sizeof_bits, L2);
// t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, (uint16_t)sizeof_bits,L2);
#endif
dci_decoding(sizeof_bits, L, currentPtr, polar_input, &dci_decoded_output[current_thread_id][0]);
decoderState = polar_decoder(polar_input,
&dci_decoded_output[current_thread_id][0],
currentPtr,
8,
0);
printf("decoderState %d\n", decoderState);
//dci_decoding(sizeof_bits, 2, currentPtr, polar_input, &dci_decoded_output[current_thread_id][0]);
/*
for (i=0;i<3+(sizeof_bits>>3);i++)
printf("dci_decoded_output[%d] => %x\n",i,dci_decoded_output[i]);
......@@ -5093,30 +5100,37 @@ uint8_t nr_dci_decoding_procedure(int s,
int p,
PHY_VARS_NR_UE *ue,
NR_DCI_ALLOC_t *dci_alloc,
int do_common,
NR_SEARCHSPACE_TYPE_t searchSpacetype,
int16_t eNB_id,
uint8_t nr_tti_rx,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
crc_scrambled_t *crc_scrambled,
format_found_t *format_found) {
// uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
crc_scrambled_t crc_scrambled_ = *crc_scrambled;
format_found_t format_found_ = *format_found;
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure) nr_tti_rx=%d and format_found=%d %d\n",nr_tti_rx,*format_found,format_found_);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure) nr_tti_rx=%d n_RB_ULBWP=%d n_RB_DLBWP=%d format_found=%d\n",
nr_tti_rx,n_RB_ULBWP,n_RB_DLBWP,*format_found);
#endif
int do_common = (int)searchSpacetype;
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS];
crc_scrambled_t crc_scrambled_ = *crc_scrambled;
format_found_t format_found_ = *format_found;
uint8_t dci_cnt = 0, old_dci_cnt = 0;
uint32_t CCEmap0 = 0, CCEmap1 = 0, CCEmap2 = 0;
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id];
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
t_nrPolar_paramsPtr *nrPolar_params = &ue->nrPolar_params;
uint8_t mi;// = get_mi(&ue->frame_parms, nr_tti_rx);
// we need to initialize this values as crc is going to be compared with them
uint16_t c_rnti=pdcch_vars[eNB_id]->crnti;
//uint16_t c_rnti=pdcch_vars[eNB_id]->crnti;
uint16_t c_rnti=pdcch_vars2->crnti; //to be removed FIXME!!!
printf("c_rnti=%d\n",c_rnti);
uint16_t cs_rnti,new_rnti,tc_rnti;
uint16_t p_rnti=P_RNTI;
uint16_t si_rnti=SI_RNTI;
......@@ -5150,9 +5164,8 @@ uint8_t nr_dci_decoding_procedure(int s,
*
*/
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id];
NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t css_dci_format = pdcch_vars2->searchSpace[s].searchSpaceType.common_dci_formats;
NR_UE_SEARCHSPACE_USS_DCI_FORMAT_t uss_dci_format = pdcch_vars2->searchSpace[s].searchSpaceType.ue_specific_dci_formats;
NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t css_dci_format = pdcch_vars2->searchSpace[s].searchSpaceType.common_dci_formats; //FIXME!!!
NR_UE_SEARCHSPACE_USS_DCI_FORMAT_t uss_dci_format = pdcch_vars2->searchSpace[s].searchSpaceType.ue_specific_dci_formats; //FIXME!!!
// The following initialization is only for test purposes. To be removed
// NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t
......@@ -5168,14 +5181,16 @@ uint8_t nr_dci_decoding_procedure(int s,
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> searSpaceType=%d\n",do_common);
if (do_common) {
if (do_common==0) {
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> css_dci_format=%d\n",css_dci_format);
} else {
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> uss_dci_format=%d\n",uss_dci_format);
}
#endif
// A set of PDCCH candidates for a UE to monitor is defined in terms of PDCCH search spaces
if (do_common) { // COMMON SearchSpaceType assigned to current SearchSpace/CORESET
if (do_common==0) { // COMMON SearchSpaceType assigned to current SearchSpace/CORESET
// Type0-PDCCH common search space for a DCI format with CRC scrambled by a SI-RNTI
// number of consecutive resource blocks and a number of consecutive symbols for
// the control resource set of the Type0-PDCCH common search space from
......@@ -5207,6 +5222,7 @@ uint8_t nr_dci_decoding_procedure(int s,
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
#if 0
// for aggregation level 4. The number of candidates (L2=4) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
......@@ -5225,6 +5241,7 @@ uint8_t nr_dci_decoding_procedure(int s,
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
#endif
// for aggregation level 8. The number of candidates (L2=8) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
......@@ -5243,6 +5260,7 @@ uint8_t nr_dci_decoding_procedure(int s,
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
#if 0
// for aggregation level 16. The number of candidates (L2=16) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
......@@ -5261,6 +5279,7 @@ uint8_t nr_dci_decoding_procedure(int s,
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
#endif
}
// Type3-PDCCH common search space for a DCI format with CRC scrambled by INT-RNTI, or SFI-RNTI,
......
......@@ -79,6 +79,7 @@
#define NR_MAX_NUM_BWP 4
#define NR_MAX_PDCCH_AGG_LEVEL 16
#define NR_MAX_CSET_DURATION 3
typedef enum {
NR_MU_0=0,
......@@ -126,7 +127,7 @@ typedef struct NR_BWP_PARMS {
typedef struct {
uint8_t reg_idx;
uint8_t start_sc_idx;
uint16_t start_sc_idx;
uint8_t symb_idx;
} nr_reg_t;
......
......@@ -54,7 +54,7 @@
#define DEBUG_PHY_PROC
#define NR_PDCCH_SCHED
//#define NR_PDCCH_SCHED_DEBUG
#define NR_PDCCH_SCHED_DEBUG
//#define NR_PUCCH_SCHED
//#define NR_PUCCH_SCHED_DEBUG
......@@ -3142,18 +3142,28 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
// Higher layers have updated the number of searchSpaces with are active in the current slot and this value is stored in variable nb_searchspace_total
int nb_searchspace_total = pdcch_vars2->nb_search_space;
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> there is a bug in FAPI to calculate nb_searchspace_total=%d\n",nb_searchspace_total);
#endif
if (nb_searchspace_total>1) nb_searchspace_total=1; // to be removed when fixing bug in FAPI
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> there is a bug in FAPI to calculate nb_searchspace_total so we set it to 1...\n");
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> the number of searchSpaces active in the current slot(%d) is %d) \n",
nr_tti_rx,nb_searchspace_total);
#endif
// p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space)
int nb_coreset_total = NR_NBR_CORESET_ACT_BWP;
unsigned int dci_cnt=0;
uint8_t dci_cnt=0;
// this table contains 56 (NBR_NR_DCI_FIELDS) elements for each dci field and format described in TS 38.212. Each element represents the size in bits for each dci field
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
//uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
// this is the UL bandwidth part. FIXME! To be defined where this value comes from
uint16_t n_RB_ULBWP = 106;
// this is the DL bandwidth part. FIXME! To be defined where this value comes from
uint16_t n_RB_DLBWP = 106;
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> n_RB_ULBWP=%d n_RB_DLBWP=%d\n",
n_RB_ULBWP,
n_RB_DLBWP);
#endif
// First we have to identify each searchSpace active at a time and do PDCCH monitoring corresponding to current searchSpace
// Up to 10 searchSpaces can be configured to UE (s<=10)
......@@ -3286,8 +3296,8 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
ue->high_speed_flag,
ue->is_secondary_ue);*/ //removed for nr_ue_pdcch_procedures
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_rx_pdcch(nb_coreset_active=%d, (symbol_within_slot_mon&0x3FFF)=%d, searchSpaceType=%d)\n",
nb_coreset_active,(symbol_within_slot_mon&0x3FFF),
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_rx_pdcch with eNB_id=%d (nb_coreset_active=%d, (symbol_within_slot_mon&0x3FFF)=%d, searchSpaceType=%d)\n",
eNB_id,nb_coreset_active,(symbol_within_slot_mon&0x3FFF),
searchSpaceType);
#endif
nr_rx_pdcch(ue,
......@@ -3337,57 +3347,42 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
*/ //removed for nr_ue_pdcch_procedures
crc_scrambled_t crc_scrambled;
format_found_t format_found=255;
#ifdef NR_PDCCH_SCHED_DEBUG
if (searchSpaceType == common) { // search all possible dci's for COMMON SEARCH SPACES according to the current SEARCHSPACE configuration
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_dci_decoding_procedure(searchSpaceType=%d, nb_searchspace_active=%d, nb_coreset_active=%d) -> dci_cnt=%d\n",
searchSpaceType,
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_dci_decoding_procedure with eNB_id=%d (n_RB_ULBWP=%d, n_RB_DLBWP=%d, searchSpaceType=%d, nb_searchspace_active=%d, nb_coreset_active=%d) -> dci_cnt=%d\n",
eNB_id,n_RB_ULBWP,n_RB_DLBWP,searchSpaceType,
nb_searchspace_active,
nb_coreset_active,
dci_cnt);
#endif
dci_cnt += nr_dci_decoding_procedure(nb_searchspace_active,
nb_coreset_active,
ue,
dci_alloc_rx[dci_cnt],
searchSpaceType, // if we're in PUSCH don't listen to common search space,
// later when we need paging or RA during connection, update this ...
eNB_id,
nr_tti_rx,
dci_fields_sizes,dci_fields_sizes_cnt,
n_RB_ULBWP,
n_RB_DLBWP,
&crc_scrambled,
&format_found);
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%d\n",dci_cnt);
#endif
}
if (searchSpaceType == ue_specific){// search all possible dci's for UE-SPECIFIC SEARCH SPACES according to the current SEARCHSPACE configuration
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_dci_decoding_procedure(searchSpaceType=%d, nb_searchspace_active=%d, nb_coreset_active=%d) -> dci_cnt=%d\n",
searchSpaceType,
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_dci_decoding_procedure with eNB_id=%d (n_RB_ULBWP=%d, n_RB_DLBWP=%d, searchSpaceType=%d, nb_searchspace_active=%d, nb_coreset_active=%d) -> dci_cnt=%d\n",
eNB_id,n_RB_ULBWP,n_RB_DLBWP,searchSpaceType,
nb_searchspace_active,
nb_coreset_active,
dci_cnt);
#endif
dci_cnt += nr_dci_decoding_procedure(nb_searchspace_active,
nb_coreset_active,
ue,
dci_alloc_rx[dci_cnt],
searchSpaceType, // if we're in PUSCH don't listen to common search space,
// later when we need paging or RA during connection, update this ...
eNB_id,
nr_tti_rx,
dci_fields_sizes,dci_fields_sizes_cnt,
n_RB_ULBWP,
n_RB_DLBWP,
&crc_scrambled,
&format_found);
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%d\n",dci_cnt);
#endif
}
#endif
nr_dci_decoding_procedure(nb_searchspace_active,
nb_coreset_active,
ue,
&dci_alloc_rx[dci_cnt],
searchSpaceType,
eNB_id,
nr_tti_rx,
dci_fields_sizes_cnt,
n_RB_ULBWP,
n_RB_DLBWP,
&crc_scrambled,
&format_found);
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%d\n",dci_cnt);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_OUT);
//LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d PHICH RX\n",ue->Mod_id,frame_rx,nr_tti_rx);
......@@ -3504,7 +3499,12 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
if ((dci_alloc_rx[i].format == format1_1)){ // This format not implemented at a first time. FIXME
}
NR_DCI_INFO_EXTRACTED_t nr_dci_info_extracted;
nr_generate_ue_ul_dlsch_params_from_dci(ue,
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_generate_ue_ul_dlsch_params_from_dci with eNB_id=%d dci_cnt=%d\n",
eNB_id,
dci_cnt);
#endif
nr_generate_ue_ul_dlsch_params_from_dci(ue,
eNB_id,
frame_rx,
nr_tti_rx,
......@@ -5448,6 +5448,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
#if 0
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
#if T_TRACER
......@@ -5459,9 +5460,9 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
#endif
// start timers
#ifdef UE_DEBUG_TRACE
//#ifdef UE_DEBUG_TRACE
LOG_I(PHY," ****** start RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
#endif
//#endif
#if UE_TIMING_TRACE
start_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
......@@ -5491,6 +5492,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
ue->Mod_id,frame_rx, nr_tti_rx);
#endif
if (ue->frame_parms.Ncp == 0) { // normal prefix
pilot1 = 4;
} else { // extended prefix
......@@ -5521,6 +5523,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
LOG_D(PHY," ------ slot 0 Processing: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
LOG_D(PHY," ------ --> FFT/ChannelEst/PDCCH slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
#endif
//nr_gold_pdcch(ue,0, 2);
/*
......@@ -5546,7 +5549,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
}*/
//ue_measurement_procedures(l-1,ue,proc,eNB_id,(nr_tti_rx<<1),abstraction_flag,mode);
if (do_pdcch_flag) {
//if (do_pdcch_flag) {
// if ((l==pilot1) || ((pmch_flag==1)&(l==l2))) {
// LOG_D(PHY,"[UE %d] Frame %d: Calling pdcch procedures (eNB %d)\n",ue->Mod_id,frame_rx,eNB_id);
......@@ -5561,7 +5564,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
// (ue->rx_pdcch_stats[ue->current_thread_id[nr_tti_rx]].p_time)/(cpuf*1000.0));
LOG_D(PHY,"num_pdcch_symbols %d\n",ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols);
// }
}
//}
// } // for l=1..l2
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment