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Commit 38dc0d87 authored by Guy De Souza's avatar Guy De Souza
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Merge branch 'nr_mib_fix' of https://gitlab.eurecom.fr/oai/openairinterface5g into nr_mib_fix

parents 31d9cf59 b16cab08
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Showing with 1677 additions and 2458 deletions
cmake_targets/CMakeLists.txt
View file @ 38dc0d87
......@@ -1357,6 +1357,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/TOOLS/time_meas.c
${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c
# ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_test.c
${PHY_POLARSRC}
${PHY_LDPCSRC}
)
......@@ -1602,7 +1603,14 @@ add_library(L2
${MAC_SRC}
${ENB_APP_SRC}
)
# ${OPENAIR2_DIR}/RRC/L2_INTERFACE/openair_rrc_L2_interface.c)
add_library(MAC_NR
${MAC_NR_SRC}
)
add_library(MAC_UE_NR
${MAC_NR_SRC_UE}
)
add_library(L2_NR
${L2_NR_SRC}
......@@ -2550,6 +2558,9 @@ target_link_libraries(ldpctest SIMU PHY PHY_NR m ${ATLAS_LIBRARIES})
add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c ${T_SOURCE})
target_link_libraries(nr_pbchsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_dlsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c ${T_SOURCE})
target_link_libraries(nr_dlsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
......
cmake_targets/build_oai
View file @ 38dc0d87
......@@ -516,10 +516,10 @@ function main() {
install_usrp_uhd_driver $UHD_IMAGES_DIR
fi
fi
if [ "$HW" == "OAI_ADRV9371_ZC706" ] ; then
echo_info "\nInstalling packages for ADRV9371_ZC706 support"
check_install_libiio_driver
fi
# if [ "$HW" == "OAI_ADRV9371_ZC706" ] ; then
# echo_info "\nInstalling packages for ADRV9371_ZC706 support"
# check_install_libiio_driver
# fi
if [ "$HW" == "OAI_BLADERF" ] ; then
echo_info "installing packages for BLADERF support"
check_install_bladerf_driver
......@@ -836,9 +836,18 @@ function main() {
echo_info "liboai_device.so is linked to EXMIMO device library"
elif [ "$HW" == "OAI_ADRV9371_ZC706" ] ; then
ln -sf $OPENAIR_DIR/targets/ARCH/ADRV9371_ZC706/slib/libadrv9371_zc706.so liboai_device.so
SYRIQ_KVER=$(uname -r)
SYRIQ_KMAJ=$(echo $SYRIQ_KVER | sed -e 's/^\([0-9][0-9]*\)\.[0-9][0-9]*\.[0-9][0-9]*.*/\1/')
SYRIQ_KMIN=$(echo $SYRIQ_KVER | sed -e 's/^[0-9][0-9]*\.\([0-9][0-9]*\)\.[0-9][0-9]*.*/\1/')
#echo $SYRIQ_KMAJ$SYRIQ_KMIN
if [ "$SYRIQ_KMAJ$SYRIQ_KMIN" == "319" ] || [ "$SYRIQ_KMAJ$SYRIQ_KMIN" == "410" ] || [ "$SYRIQ_KMAJ$SYRIQ_KMIN" == "415" ] ; then
# echo "Kernel $SYRIQ_KMAJ.$SYRIQ_KMIN detected"
ln -sf /usr/local/lib/syriq/libadrv9371zc706.so liboai_device.so
else
echo_error "== FAILED == Unexpected Kernel $SYRIQ_KMAJ.$SYRIQ_KMIN"
fi
echo_info "liboai_device.so is linked to ADRV9371_ZC706 device library for Kernel $SYRIQ_KMAJ.$SYRIQ_KMIN"
echo_info "liboai_device.so is linked to ADRV9371_ZC706 device library"
elif [ "$HW" == "OAI_USRP" ] ; then
compilations \
$build_dir oai_usrpdevif \
......
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @ 38dc0d87
......@@ -21,6 +21,7 @@
#include "stddef.h"
#include "platform_types.h"
#include "fapi_nr_ue_constants.h"
#include "PHY/impl_defs_nr.h"
/*
typedef unsigned int uint32_t;
......@@ -150,6 +151,10 @@ typedef struct {
typedef struct {
uint16_t rnti;
uint8_t dci_format;
// n_CCE index of first CCE for PDCCH reception
int n_CCE;
// N_CCE is L, or number of CCEs for DCI
int N_CCE;
fapi_nr_dci_pdu_rel15_t dci;
} fapi_nr_dci_indication_pdu_t;
......@@ -232,11 +237,92 @@ typedef struct {
uint16_t root_sequence_index;
uint16_t rsrp_threshold_ssb;
uint16_t rsrp_threshold_sul;
uint16_t prach_freq_offset;
} fapi_nr_ul_config_prach_pdu;
typedef struct {
pucch_format_nr_t format; /* format 0 1 2 3 4 */
uint8_t initialCyclicShift; /* x x */
uint8_t nrofSymbols; /* x x x x x */
uint8_t startingSymbolIndex; /* x x x x x */
uint8_t timeDomainOCC; /* x */
uint8_t nrofPRBs; /* x x */
uint16_t startingPRB; /* maxNrofPhysicalResourceBlocks = 275 */
uint8_t occ_length; /* x */
uint8_t occ_Index; /* x */
feature_status_t intraSlotFrequencyHopping;
uint16_t secondHopPRB;
/*
-- Enabling inter-slot frequency hopping when PUCCH Format 1, 3 or 4 is repeated over multiple slots.
-- The field is not applicable for format 2.
*/
feature_status_t interslotFrequencyHopping;
/*
-- Enabling 2 DMRS symbols per hop of a PUCCH Format 3 or 4 if both hops are more than X symbols when FH is enabled (X=4).
-- Enabling 4 DMRS sybmols for a PUCCH Format 3 or 4 with more than 2X+1 symbols when FH is disabled (X=4).
-- Corresponds to L1 parameter 'PUCCH-F3-F4-additional-DMRS' (see 38.213, section 9.2.1)
-- The field is not applicable for format 1 and 2.
*/
enable_feature_t additionalDMRS;
/*
-- Max coding rate to determine how to feedback UCI on PUCCH for format 2, 3 or 4
-- Corresponds to L1 parameter 'PUCCH-F2-maximum-coderate', 'PUCCH-F3-maximum-coderate' and 'PUCCH-F4-maximum-coderate'
-- (see 38.213, section 9.2.5)
-- The field is not applicable for format 1.
*/
PUCCH_MaxCodeRate_t maxCodeRate;
/*
-- Number of slots with the same PUCCH F1, F3 or F4. When the field is absent the UE applies the value n1.
-- Corresponds to L1 parameter 'PUCCH-F1-number-of-slots', 'PUCCH-F3-number-of-slots' and 'PUCCH-F4-number-of-slots'
-- (see 38.213, section 9.2.6)
-- The field is not applicable for format 2.
*/
uint8_t nrofSlots;
/*
-- Enabling pi/2 BPSK for UCI symbols instead of QPSK for PUCCH.
-- Corresponds to L1 parameter 'PUCCH-PF3-PF4-pi/2PBSK' (see 38.213, section 9.2.5)
-- The field is not applicable for format 1 and 2.
*/
feature_status_t pi2PBSK;
/*
-- Enabling simultaneous transmission of CSI and HARQ-ACK feedback with or without SR with PUCCH Format 2, 3 or 4
-- Corresponds to L1 parameter 'PUCCH-F2-Simultaneous-HARQ-ACK-CSI', 'PUCCH-F3-Simultaneous-HARQ-ACK-CSI' and
-- 'PUCCH-F4-Simultaneous-HARQ-ACK-CSI' (see 38.213, section 9.2.5)
-- When the field is absent the UE applies the value OFF
-- The field is not applicable for format 1.
*/
enable_feature_t simultaneousHARQ_ACK_CSI;
/*
-- Configuration of group- and sequence hopping for all the PUCCH formats 0, 1, 3 and 4. "neither" implies neither group
-- or sequence hopping is enabled. "enable" enables group hopping and disables sequence hopping. "disable"” disables group
-- hopping and enables sequence hopping. Corresponds to L1 parameter 'PUCCH-GroupHopping' (see 38.211, section 6.4.1.3)
pucch-GroupHopping ENUMERATED { neither, enable, disable },
*/
pucch_GroupHopping_t pucch_GroupHopping;
/*
-- Cell-Specific scrambling ID for group hoppping and sequence hopping if enabled.
-- Corresponds to L1 parameter 'HoppingID' (see 38.211, section 6.3.2.2)
hoppingId BIT STRING (SIZE (10)) OPTIONAL, -- Need R
*/
uint16_t hoppingId;
/*
-- Power control parameter P0 for PUCCH transmissions. Value in dBm. Only even values (step size 2) allowed.
-- Corresponds to L1 parameter 'p0-nominal-pucch' (see 38.213, section 7.2)
p0-nominal INTEGER (-202..24) OPTIONAL, -- Need R
*/
int8_t p0_nominal;
int8_t deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR];
uint8_t p0_PUCCH_Id; /* INTEGER (1..8) */
int8_t p0_PUCCH_Value;
// pathlossReferenceRSs SEQUENCE (SIZE (1..maxNrofPUCCH-PathlossReferenceRSs)) OF PUCCH-PathlossReferenceRS OPTIONAL, -- Need M
int8_t twoPUCCH_PC_AdjustmentStates;
} fapi_nr_ul_config_pucch_pdu;
typedef enum {pusch_freq_hopping_disabled = 0 , pusch_freq_hopping_enabled = 1}pusch_freq_hopping_t;
typedef struct{
uint8_t aperiodicSRS_ResourceTrigger;
......
oaienv
View file @ 38dc0d87
......@@ -18,5 +18,6 @@ alias oailte='cd $OPENAIR_TARGETS/RT/USER'
alias oais='cd $OPENAIR_TARGETS/SIMU/USER'
alias oaiex='cd $OPENAIR_TARGETS/SIMU/EXAMPLES'
export IIOD_REMOTE=192.168.121.32
#export IIOD_REMOTE=192.168.121.32
export IIOD_REMOTE=192.168.1.11
openair1/PHY/NR_TRANSPORT/nr_pbch.c
View file @ 38dc0d87
......@@ -22,6 +22,7 @@
/*! \file PHY/NR_TRANSPORT/nr_pbch.c
* \brief Top-level routines for generating the PBCH/BCH physical/transport channel V15.1 03/2018
* \author Guy De Souza
* \thanks Special Thanks to Son Dang for helpfull contributions and testing
* \date 2018
* \version 0.1
* \company Eurecom
......
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
View file @ 38dc0d87
......@@ -91,7 +91,7 @@ uint16_t nr_pbch_extract(int **rxdataF,
for (rb=0; rb<20; rb++) {
j=0;
if (symbol==1 || symbol==7) {
if (symbol==1 || symbol==3) {
for (i=0; i<12; i++) {
if ((i!=nushiftmod4) &&
(i!=(nushiftmod4+4)) &&
......@@ -147,7 +147,7 @@ uint16_t nr_pbch_extract(int **rxdataF,
for (rb=0; rb<20; rb++) {
j=0;
if (symbol==1 || symbol==7) {
if (symbol==1 || symbol==3) {
for (i=0; i<12; i++) {
if ((i!=nushiftmod4) &&
(i!=(nushiftmod4+4)) &&
......
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
View file @ 38dc0d87
This diff is collapsed.
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h
View file @ 38dc0d87
......@@ -82,6 +82,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
uint8_t timeDomainOCC,
uint8_t nr_bit);
void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
uint16_t crnti,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
......@@ -94,6 +95,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
uint16_t startingPRB,
uint8_t nr_bit);
void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint16_t crnti,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt,
......@@ -397,7 +399,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
*/
int16_t table_6_3_2_4_1_2_Wi_Re[8][7][7] = {
{{0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{32767,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{32767,32767,0,0,0,0,0}, {32767,-32767,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{32767,32767,32767,0,0,0,0}, {32767,-16384,-16384,0,0,0,0}, {32767,-16384,-16384,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{32767,32767,32767,32767,0,0,0}, {32767,-32767,32767,-32767,0,0,0}, {32767,32767,-32767,-32767,0,0,0}, {32767,-32767,-32767,32767,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
......
openair1/PHY/phy_vars.h
View file @ 38dc0d87
......@@ -59,9 +59,6 @@ unsigned short rev[2048],rev_times4[8192],rev_half[1024];
unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192];
char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
#include "SIMULATION/ETH_TRANSPORT/vars.h"
......
openair1/PHY/phy_vars_nr_ue.h
View file @ 38dc0d87
......@@ -55,9 +55,6 @@ unsigned short rev[2048],rev_times4[8192],rev_half[1024];
unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192];
char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
#include "SIMULATION/ETH_TRANSPORT/vars.h"
......
openair1/PHY/phy_vars_ue.h
View file @ 38dc0d87
......@@ -54,10 +54,6 @@ unsigned short rev[2048],rev_times4[8192],rev_half[1024];
unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192];
char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
#include "SIMULATION/ETH_TRANSPORT/vars.h"
......
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @ 38dc0d87
......@@ -37,6 +37,7 @@
//#include "PHY/phy_vars_nr_ue.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/impl_defs_nr.h"
extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
......@@ -51,10 +52,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
// PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
// PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
for(i=0; i<dl_config->number_pdus; ++i){
if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
......@@ -143,6 +148,52 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
}
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){
// pucch config pdu
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
uint8_t pucch_resource_id = 0; //FIXME!!!
uint8_t format = 1; // FIXME!!!
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal;
/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
}
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){
// prach config pdu
fapi_nr_ul_config_prach_pdu *prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
frame_parms.prach_config_common.rootSequenceIndex = prach_config_pdu->root_sequence_index;
frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = prach_config_pdu->prach_configuration_index;
frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = prach_config_pdu->zero_correlation_zone_config;
frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag = prach_config_pdu->restrictedset_config;
frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = prach_config_pdu->prach_freq_offset;
prach_resources->ra_PreambleIndex = prach_config_pdu->preamble_index;
}
}
}else{
......
openair1/SCHED_NR_UE/harq_nr.c
View file @ 38dc0d87
......@@ -373,7 +373,7 @@ void config_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int
{
NR_UE_DLSCH_t *dlsch;
//dlsch = (NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
dlsch = (NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
if (dlsch != NULL) {
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ 38dc0d87
......@@ -87,6 +87,8 @@ fifo_dump_emos_UE emos_dump_UE;
#define NS_PER_SLOT 500000
char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
extern double cpuf;
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
......@@ -3903,8 +3905,11 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
crc_scrambled_values,
ptr_nr_dci_info_extracted);//&nr_dci_info_extracted);
ue->dci_ind.dci_list[i].rnti = dci_alloc_rx[i].rnti;
ue->dci_ind.dci_list[i].dci_format = dci_alloc_rx[i].format;
ue->dci_ind.dci_list[i].rnti = dci_alloc_rx[i].rnti;
ue->dci_ind.dci_list[i].dci_format = dci_alloc_rx[i].format;
ue->dci_ind.dci_list[i].n_CCE = dci_alloc_rx[i].firstCCE;
ue->dci_ind.dci_list[i].N_CCE = (int)dci_alloc_rx[i].L;
ue->dci_ind.number_of_dcis = ue->dci_ind.number_of_dcis + 1;
memcpy(&ue->dci_ind.dci_list[i].dci, &nr_dci_info_extracted, sizeof(fapi_nr_dci_pdu_rel15_t) );
//printf(">>> example mcs=%d\n",nr_dci_info_extracted.mcs);
......@@ -6137,10 +6142,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
LOG_D(PHY," ------ end FFT/ChannelEst/PDCCH slot 1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
/*if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1))
if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1))
{
ue_pbch_procedures(eNB_id,ue,proc,abstraction_flag);
}*/
}
// do procedures for C-RNTI
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
......
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
View file @ 38dc0d87
......@@ -178,7 +178,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
int ri_status = 0;
int csi_status = 0;
int initial_pucch_id = NB_INITIAL_PUCCH_RESOURCE;;
int initial_pucch_id = NB_INITIAL_PUCCH_RESOURCE;
int pucch_resource_set = MAX_NB_OF_PUCCH_RESOURCE_SETS;
int pucch_resource_id = MAX_NB_OF_PUCCH_RESOURCES;
int pucch_resource_indicator = MAX_PUCCH_RESOURCE_INDICATOR;
......@@ -587,7 +587,9 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
}
case pucch_format2_nr:
{
nr_generate_pucch2(ue,ue->common_vars.txdataF,
nr_generate_pucch2(ue,
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
......@@ -603,7 +605,9 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
case pucch_format3_nr:
case pucch_format4_nr:
{
nr_generate_pucch3_4(ue,ue->common_vars.txdataF,
nr_generate_pucch3_4(ue,
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
format,
&ue->pucch_config_dedicated_nr[gNB_id],
......@@ -871,6 +875,10 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int uci_size
else {
/* see TS 38.213 9.2.1 PUCCH Resource Sets */
int delta_PRI = harq_status->pucch_resource_indicator;
// n_CCE can be obtained from ue->dci_ind.dci_list[i].n_CCE. FIXME!!!
// N_CCE can be obtained from ue->dci_ind.dci_list[i].N_CCE. FIXME!!!
//int n_CCE = ue->dci_ind.dci_list[0].n_CCE;
//int N_CCE = ue->dci_ind.dci_list[0].N_CCE;
int n_CCE_0 = harq_status->n_CCE;
int N_CCE_0 = harq_status->N_CCE;
if (N_CCE_0 == 0) {
......
openair1/SCHED_UE/phy_procedures_lte_ue.c
View file @ 38dc0d87
......@@ -71,6 +71,8 @@
#define NS_PER_SLOT 500000
char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
extern double cpuf;
void Msg1_transmitted(module_id_t module_idP,uint8_t CC_id,frame_t frameP, uint8_t eNB_id);
......
openair1/SIMULATION/NR_PHY/dlsim.c 0 → 100644
View file @ 38dc0d87
This diff is collapsed.
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pss_util_test.c
View file @ 38dc0d87
......@@ -70,7 +70,7 @@ static nfapi_config_request_t* config =&config_t;
/*************** FUNCTIONS ****************************************/
void phy_init_nr_top(NR_DL_FRAME_PARMS *frame_parms);
//void phy_init_nr_top(NR_DL_FRAME_PARMS *frame_parms);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_eNB, uint8_t abstraction_flag);
/*******************************************************************
......@@ -262,7 +262,7 @@ int init_test(unsigned char N_tx, unsigned char N_rx, unsigned char transmission
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + N_ID_2_NUMBER; /* set to unvalid value */
phy_init_nr_top(frame_parms);
//phy_init_nr_top(frame_parms);
if (init_nr_ue_signal(PHY_vars_UE, 1, 0) != 0)
{
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @ 38dc0d87
......@@ -64,6 +64,18 @@ int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_d
return nr_ue_process_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type);
}
// L2 Abstraction Layer
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len){
// return 0;
return nr_ue_process_dlsch( module_id,
cc_id,
gNB_index,
&dci_ind,
pduP,
pdu_len);
}
int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
......@@ -115,36 +127,6 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
// clean up scheduled_response structure
if(dl_info->rx_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][RX_IND]\n");
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
break;
case FAPI_NR_RX_PDU_TYPE_SIB:
ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.sibs_mask,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
break;
default:
break;
}
}
}
if(dl_info->dci_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][DCI_IND]\n");
......@@ -208,6 +190,40 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
}
}
if(dl_info->rx_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][RX_IND]\n");
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
break;
case FAPI_NR_RX_PDU_TYPE_SIB:
ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.sibs_mask,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
// ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
ret_mask |= (handle_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, &dl_info->dci_ind,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_DLSCH;
break;
default:
break;
}
}
}
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
View file @ 38dc0d87
......@@ -181,6 +181,8 @@ int8_t nr_ue_if_module_kill(uint32_t module_id);
\param dl_info including dci_ind and rx_request messages*/
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info);
// TODO check
/**\brief handle BCCH-BCH message from dl_indication
\param pduP pointer to bch pdu
......
targets/ARCH/ADRV9371_ZC706/Makefile deleted 100755 → 0
View file @ 31d9cf59
# Creates shared library
CC= gcc
CFLAGS+= -DADRV9371_ZC706 -DHWLAT -O0 -g3 -Wall -fmessage-length=0 -fPIC
DROOT= ./USERSPACE
DIR= $(DROOT)/LIB
IFLAGS+= -I$(DIR)/ \
-I$(DROOT)/libini/ \
-I../COMMON/ \
-I/usr/include/
LDFLAGS+= -L/usr/lib/x86/64-linux-gnu/ \
-lm -liio -ldl -lriffa
OUTDIR= ./slib
TARGET= libadrv9371_zc706.so
SRC= $(DIR)/adrv9371_dump.c \
$(DIR)/adrv9371_helper.c \
$(DIR)/adrv9371_self_test.c \
$(DIR)/adrv9371_zc706_lib.c \
$(DIR)/adrv9371_zc706_riffa_lib.c \
$(DIR)/adrv9371_zc706_stats.c \
$(DIR)/hw_init.c \
$(DROOT)/libini/libini.c
OBJ= $(OUTDIR)/adrv9371_dump.o \
$(OUTDIR)/adrv9371_helper.o \
$(OUTDIR)/adrv9371_self_test.o \
$(OUTDIR)/adrv9371_zc706_lib.o \
$(OUTDIR)/adrv9371_zc706_riffa_lib.o \
$(OUTDIR)/adrv9371_zc706_stats.o \
$(OUTDIR)/hw_init.o \
$(OUTDIR)/libini.o
all: lib
dir:
mkdir -p $(OUTDIR)
env:
set PATH=/usr/lib/:${PATH}
obj: dir env
$(CC) -c $(CFLAGS) $(IFLAGS) $(SRC)
mv *.o $(OUTDIR)
lib: dir obj
$(CC) -shared $(OBJ) -o $(OUTDIR)/$(TARGET) $(LDFLAGS)
# exec: env
# $(CC) $(CFLAGS) $(IFLAGS) main.c $(SRC) -o lib.exe $(LDFLAGS) -lpthread
.PHONY: clean
clean:
rm -f $(OUTDIR)/*.o $(OUTDIR)/*~
rm: clean
rm -f $(OUTDIR)/$(TARGET)
rmdir $(OUTDIR)
\ No newline at end of file
targets/ARCH/ADRV9371_ZC706/SYRTEM_IQ_QuickStart.readme 0 → 100755
View file @ 38dc0d87
/* ********** ********** ********** ********** ********** ********** ********** */
Requirements:
-------------
- Previous kernel module/libraries shall be uninstalled !!!
- cf. command line below "SYRTEM_IQ_uninstall_previous_SW.sh"
./SYRTEM_IQ_unload_previous_SW.sh
- You shall have SYRIQ1.4.6nr.tar.gz
- Ubuntu kernel version is restricted to:
- Kernel 4.15.0-20-lowlatency (Ubuntu 18.04)
- Kernel 4.10.0-42-lowlatency (Ubuntu 17.04)
- Kernel 3.19.0-61-lowlatency (Ubuntu 14.04)
- ADRV9371+ZC706 PCIe board shall be switched on
- PC shall be reboot once ADRV9371+ZC706 PCIe board is switched on
mkdir eur_oai_develop-nr
cd eur_oai_develop-nr
git clone https://gitlab.eurecom.fr/oai/openairinterface5g.git
cd openairinterface5g
git checkout 375-syrtem-sdr-platform
or
git checkout develop-nr (after merge request accepted)
./targets/ARCH/ADRV9371_ZC706/SYRTEM_IQ_uninstall_previous_SW.sh
-> Reading package lists... Done
-> Building dependency tree
-> Reading state information... Done
-> linux-headers-4.15.0-20-lowlatency is already the newest version (4.15.0-20.21).
-> 0 upgraded, 0 newly installed, 0 to remove and 327 not upgraded.
-> Previous SYRIQ is loaded!
-> previous SYRIQ is unloaded!
-> previous SYRIQ is uninstall!
-> Previous SYRIQ uninstallation is done
/* ********** ********** ********** ********** ********** ********** ********** */
UE:
---
configuration:
--------------
sudo apt update
sudo apt-get update
tar -xvzf SYRIQ1.4.6nr.tar.gz
./SYRIQplatformR1.4.6nr_install.sh
sudo reboot
sudo lspci -vv | grep Xilinx
sudo lspci -vv -s 02:00.0 | grep LnkSta
sudo lspci -vv -s 03:00.0 | grep LnkSta
sudo lspci -vv -s 02:00.0 | grep Interr
sudo lspci -vv -s 03:00.0 | grep Interr
sudo gedit /usr/local/etc/syriq/cpu-irq.sh
echo '1' > /proc/irq/49/smp_affinity_list
echo '5' > /proc/irq/48/smp_affinity_list
gedit oaienv
export IIOD_REMOTE=192.168.1.11
compilation:
------------
sudo cset shield --reset
cd eur_oai_develop-nr/openairinterface5g/
source oaienv
sudo -E ./cmake_targets/build_oai -c --nrUE -w ADRV9371_ZC706 -I
sudo -E ./cmake_targets/build_oai -c --nrUE -w ADRV9371_ZC706
run:
----
source oaienv
sudo -E /usr/local/etc/syriq/cpu-irq.sh
sudo -E cset shield -e ./targets/bin/nr-uesoftmodem.Rel15 -- --numerology 1 -r 106 -C 3510000000 --loop-memory --rf-config-file /usr/local/etc/syriq/ue.band22.tm1.PRB100.NR40.dat
/* ********** ********** ********** ********** ********** ********** ********** */
gNB:
----
configuration:
--------------
sudo apt update
sudo apt-get update
tar -xvzf SYRIQ1.4.6nr.tar.gz
./SYRIQplatformR1.4.6nr_install.sh
sudo reboot
sudo lspci -vv | grep Xilinx
sudo lspci -vv -s 02:00.0 | grep LnkSta
sudo lspci -vv -s 02:00.0 | grep Interr
sudo gedit /usr/local/etc/syriq/cpu-irq.sh
echo '1' > /proc/irq/46/smp_affinity_list
gedit oaienv
export IIOD_REMOTE=192.168.1.21
compilation:
------------
sudo cset shield --reset
cd eur_oai_develop-nr/openairinterface5g/
source oaienv
sudo -E ./cmake_targets/build_oai -c --gNB -w ADRV9371_ZC706 -I
sudo -E ./cmake_targets/build_oai -c --gNB -w ADRV9371_ZC706
run:
----
source oaienv
sudo -E /usr/local/etc/syriq/cpu-irq.sh
sudo -E cset shield -e ./targets/bin/nr-softmodem.Rel15 -- -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band22.tm1.106PRB.adrv9371zc706.conf --rf-config-file /usr/local/etc/syriq/gnb.band22.tm1.PRB100.NR40_hwgain15.dat
targets/ARCH/ADRV9371_ZC706/SYRTEM_IQ_uninstall_previous_SW.sh 0 → 100755
View file @ 38dc0d87
# Previous SYRIQ uninstall
#!/bin/sh
MODULE="riffa"
KERNEL_VERSION=$(uname -r)
RHR=/etc/redhat-release
sudo apt-get install -y --allow-unauthenticated linux-headers-`uname -r`
if lsmod | grep "$MODULE" &> /dev/null ; then
echo "Previous SYRIQ is loaded!"
sudo rmmod $MODULE
echo " -> previous SYRIQ is unloaded!"
sudo rm -f /usr/local/lib/libriffa.so*
sudo rm -f /usr/local/include/riffa.h
sudo rm -f /usr/local/include/riffa_driver.h
sudo rm -f /etc/ld.so.conf.d/riffa.conf
sudo rm -rf /lib/modules/$KERNEL_VERSION/kernel/drivers/riffa
sudo rm -f /etc/udev/rules.d/99-riffa.rules
sudo sed -i '/riffa/d' /etc/modules
sudo ldconfig
sudo depmod
echo " -> previous SYRIQ is uninstall!"
echo "Previous SYRIQ uninstallation is done"
exit 0
else
echo "Previous SYRIQ is not loaded!"
exit 1
fi
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/ADRV9371-W_test.ini deleted 100644 → 0
View file @ 31d9cf59
[IIO Oscilloscope]
plugin.DMM.detached=0
plugin.Debug.detached=0
plugin.AD9371 Advanced.detached=0
plugin.AD9371.detached=0
startup_version_check=0
test=1
[IIO Oscilloscope - Capture Window1]
fru_connect = 1
test.message = Please ensure:\n • 30.72 MHz -> REF_CLK_IN (0dBm)\n • Rx1 <-> Tx1\n • Rx2 <-> Tx2
domain=fft
sample_count=400
fft_size=16384
fft_avg=8
fft_pwr_offset=0.000000
graph_type=Lines
show_grid=1
enable_auto_scale=1
x_axis_min=-67.583626
x_axis_max=67.576126
y_axis_min=-130
y_axis_max=3
show_capture_options = 1
axi-ad9371-rx-obs-hpc.expanded=1
axi-ad9371-rx-obs-hpc.active=0
axi-ad9371-rx-obs-hpc.trigger_enabled=0
axi-ad9371-rx-obs-hpc.voltage0_i.enabled=0
axi-ad9371-rx-obs-hpc.voltage0_q.enabled=0
axi-ad9371-rx-hpc.expanded=1
axi-ad9371-rx-hpc.active=1
axi-ad9371-rx-hpc.voltage0_i.enabled=1
axi-ad9371-rx-hpc.voltage0_q.enabled=1
axi-ad9371-rx-hpc.voltage1_i.enabled=0
axi-ad9371-rx-hpc.voltage1_q.enabled=0
marker_type = Single Tone Markers
marker.0 = 9525
marker.1 = 8192
marker.2 = 10859
marker.3 = 12193
marker.4 = 13526
marker.5 = 14859
capture_started=0
[DMM]
device_list = ad7291 0
device_list = ad9371-phy 0
device_list = xadc 0
running = No
# temp between 20C and 55C (in 0.25C units)
test.ad7291.in_temp0_raw.int = 80 220
# See the production testing wiki docs [1] for how these values are calculated.
# [1]: (https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/testing#voltage)
# scale = 0.610351562
# All nominal voltages +/- 2.5%
# 0 INPUT_VOLTAGE 12V - V(Drop Diode) 56/10
test.ad7291.in_voltage0_raw.int = 2710 2850
# 1 VOUT2_1V3_DIG 1
test.ad7291.in_voltage1_raw.int = 2077 2183
# 2 VDD_IF 10/10
test.ad7291.in_voltage2_raw.int = 1997 2099
# 3 VOUT3_3V3 10/10
test.ad7291.in_voltage3_raw.int = 2636 2770
# 5 VOUT4_1V8 1
test.ad7291.in_voltage5_raw.int = 2875 3023
# 7 VOUT1_1V3_ANLG 1
test.ad7291.in_voltage7_raw.int = 2077 2183
# Test AD9528 lock status - Requires 30.720 MHz reference clock!
test.ad9528-1.pll1_reference_clk_a_present.int = 1 1
test.ad9528-1.pll1_locked.int = 1 1
test.ad9528-1.pll2_locked.int = 1 1
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = INTERNALCALS
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2500000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2600000000
ad9371-phy.out_voltage1_hardwaregain = -10.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 1
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_gain_control_mode = automatic
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = automatic
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2600000000
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 1
ad9371-phy.out_voltage0_hardwaregain = -10.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.ensm_mode = radio_on
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 10001402
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1001265
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 10001402
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 10001402
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 40001860
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1001265
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 10001402
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 40001860
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
dds_mode_tx1 = 0
dds_mode_tx2 = 0
SYNC_RELOAD = 1
# test receiver at 1GHz to 5 GHz
# SEQ FIRST INCREMENT LAST
<SEQ> i 1000000000 5000000000 5000000000
[IIO Oscilloscope - Capture Window1]
# wait for device to settle
marker_type = Peak Markers
capture_started = 0
cycle = 1000
axi-ad9371-rx-hpc.voltage0_i.enabled=1
axi-ad9371-rx-hpc.voltage0_q.enabled=1
axi-ad9371-rx-hpc.voltage1_i.enabled=0
axi-ad9371-rx-hpc.voltage1_q.enabled=0
cycle = 1000
[AD9371]
ad9371-phy.out_altvoltage1_TX_LO_frequency = <i>
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = {{<i>} + {100000000}}
ad9371-phy.out_altvoltage0_RX_LO_frequency = {{<i>} + {100000000}}
dds_mode_tx1 = 0
dds_mode_tx2 = 0
SYNC_RELOAD = 1
[IIO Oscilloscope - Capture Window1]
# wait for device to settle
capture_started = 1
cycle = 3000
[AD9371]
# channels should be off, so RSSI should be low
test.ad9371-phy.in_voltage0_rssi.int = 44 45
test.ad9371-phy.in_voltage1_rssi.int = 44 45
# and gain is high
test.ad9371-phy.in_voltage0_hardwaregain.double = 30.0 31.0
test.ad9371-phy.in_voltage0_hardwaregain.double = 30.0 31.0
# set Tx and Rx to be the same
ad9371-phy.out_altvoltage0_RX_LO_frequency = <i>
dds_mode_tx1 = 1
dds_mode_tx2 = 1
SYNC_RELOAD = 1
[IIO Oscilloscope - Capture Window1]
# wait for device to settle
marker_type = Single Tone Markers
cycle = 3000
[AD9371]
ad9371-phy.out_voltage0_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage1_hardwaregain = 0.000000 dB
# channels should be on, so RSSI should be high
test.ad9371-phy.in_voltage0_rssi.int = 3 12
test.ad9371-phy.in_voltage1_rssi.int = 3 12
# and gain is low
test.ad9371-phy.in_voltage0_hardwaregain.double = 15.0 29.0
test.ad9371-phy.in_voltage0_hardwaregain.double = 15.0 29.0
[IIO Oscilloscope - Capture Window1]
cycle = 1000
capture_started = 1
cycle = 3000
save_png = ADRV9371_rx1_<i>.png
save_markers = markers.log
#look at the markers - Fundamental
test.marker.0 = -12.0 -4.0
# DC
test.marker.1 = -100.0 -60.0
# 2st Harmonic
test.marker.2 = -110.0 -75.0
# 3nd Harmonic
test.marker.3 = -110.0 -75.0
# 4th Harmonic
test.marker.4 = -110.0 -75.0
# 4th Harmonic
test.marker.5 = -110.0 -65.0
capture_started = 0
cycle = 1000
axi-ad9371-rx-hpc.voltage0_i.enabled=0
axi-ad9371-rx-hpc.voltage0_q.enabled=0
axi-ad9371-rx-hpc.voltage1_i.enabled=1
axi-ad9371-rx-hpc.voltage1_q.enabled=1
cycle = 1000
capture_started = 1
cycle = 3000
save_png = ADRV9371_rx2_<i>.png
save_markers = markers.log
#look at the markers - Fundamental
test.marker.0 = -12.0 -4.0
# DC
test.marker.1 = -100.0 -60.0
# 2st Harmonic
test.marker.2 = -110.0 -75.0
# 3nd Harmonic
test.marker.3 = -110.0 -75.0
# 4th Harmonic
test.marker.4 = -110.0 -75.0
# 4th Harmonic
test.marker.5 = -110.0 -65.0
</SEQ>
[IIO Oscilloscope - Capture Window1]
capture_started = 0
test.message = Please ensure:\n • ORX1 <-> Tx1\n • ORX22 <-> Tx2
axi-ad9371-rx-hpc.expanded=1
axi-ad9371-rx-hpc.active=0
axi-ad9371-rx-hpc.voltage0_i.enabled=0
axi-ad9371-rx-hpc.voltage0_q.enabled=0
axi-ad9371-rx-hpc.voltage1_i.enabled=0
axi-ad9371-rx-hpc.voltage1_q.enabled=0
axi-ad9371-rx-obs-hpc.expanded=1
axi-ad9371-rx-obs-hpc.active=1
axi-ad9371-rx-obs-hpc.voltage0_i.enabled=1
axi-ad9371-rx-obs-hpc.voltage0_q.enabled=1
cycle = 1000
# test observer path at 1GHz to 5 GHz
# SEQ FIRST INCREMENT LAST
<SEQ> i 1000000000 1000000000 5000000000
[AD9371]
# set Tx and Rx to be the same
ad9371-phy.out_altvoltage1_TX_LO_frequency = <i>
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = {{<i>} + {1000000}}
ad9371-phy.out_altvoltage0_RX_LO_frequency = <i>
dds_mode_tx1 = 1
dds_mode_tx2 = 1
ad9371-phy.out_voltage0_hardwaregain = -10.000000 dB
ad9371-phy.out_voltage1_hardwaregain = -10.000000 dB
ad9371-phy.in_voltage2_rf_port_select = ORX1_TX_LO
ad9371-phy.in_voltage2_gain_control_mode = manual
ad9371-phy.in_voltage2_hardwaregain = 18.000000 dB
[IIO Oscilloscope - Capture Window1]
capture_started = 1
cycle = 3000
save_png = ADRV9371_ob1_<i>.png
save_markers = markers.log
#look at the markers - Fundamental
test.marker.0 = -15.0 -5.0
# DC
test.marker.1 = -100.0 -75.0
# 2st Harmonic
test.marker.2 = -110.0 -75.0
# 3nd Harmonic
test.marker.3 = -110.0 -75.0
# 4th Harmonic
test.marker.4 = -110.0 -75.0
# 4th Harmonic
test.marker.5 = -110.0 -65.0
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = ORX2_TX_LO
[IIO Oscilloscope - Capture Window1]
cycle = 1000
capture_started = 1
cycle = 3000
save_png = ADRV9371_ob2_<i>.png
save_markers = markers.log
#look at the markers - Fundamental
test.marker.0 = -15.0 -4.0
# DC
test.marker.1 = -100.0 -75.0
# 2st Harmonic
test.marker.2 = -110.0 -75.0
# 3nd Harmonic
test.marker.3 = -110.0 -75.0
# 4th Harmonic
test.marker.4 = -110.0 -75.0
# 4th Harmonic
test.marker.5 = -110.0 -65.0
</SEQ>
[IIO Oscilloscope - Capture Window1]
test.message = All tests passed - Ship it
quit = 1
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/gnb.band7.tm1.PRB100.NR40.adrv9371-zc706_HWgain15dB.ini deleted 100644 → 0
View file @ 31d9cf59
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2680000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2560000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = manual
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 15.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 15.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = manual
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2560000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profileNR40MHz.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
# NO_DEBUG=0; DEBUG=1
debug_mode = 0
# 20MHz 40MHz 80MHz=1; 10MHz=2; 5MHz=4
interpolation_decimation_factor = 1
# is taken into account only if "ad9371-phy.in_voltage0_gain_control_mode = manual"
rx_gain_offset = 46
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/gnb.band7.tm1.PRB100.NR80.adrv9371-zc706_HWgain15dB.ini deleted 100644 → 0
View file @ 31d9cf59
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2680000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2560000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = manual
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 15.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 15.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = manual
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2560000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profileNR80MHz.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
# NO_DEBUG=0; DEBUG=1
debug_mode = 0
# 20MHz 40MHz 80MHz=1; 10MHz=2; 5MHz=4
interpolation_decimation_factor = 1
# is taken into account only if "ad9371-phy.in_voltage0_gain_control_mode = manual"
rx_gain_offset = 46
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/gnb.band7.tm1.PRB100.adrv9371-zc706_HWgain15dB.ini deleted 100644 → 0
View file @ 31d9cf59
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2680000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2560000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = manual
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 15.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 15.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = manual
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2560000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = ./targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profile20MHz.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
# NO_DEBUG=0; DEBUG=1
debug_mode = 0
# 20MHz 40MHz 80MHz=1; 10MHz=2; 5MHz=4
interpolation_decimation_factor = 1
# is taken into account only if "ad9371-phy.in_voltage0_gain_control_mode = manual"
rx_gain_offset = 46
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profile1-osc.ini deleted 100644 → 0
View file @ 31d9cf59
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = -10.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = -10.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2685000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2565000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = automatic
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = automatic
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2565000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profile_rx30_Tx60_syr.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
debug_mode = 0
interpolation_decimation_factor = 2
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profile20MHz.txt deleted 100644 → 0
View file @ 31d9cf59
<profile AD9371 version=0 name=Rx 20, IQrate 30.720>
<clocks>
<deviceClock_kHz=122880>
<clkPllVcoFreq_kHz=9830400>
<clkPllVcoDiv=2>
<clkPllHsDiv=4>
</clocks>
<rx>
<adcDiv=1>
<rxFirDecimation=4>
<rxDec5Decimation=5>
<enHighRejDec5=1>
<rhb1Decimation=2>
<iqRate_kHz=30720>
<rfBandwidth_Hz=20000000>
<rxBbf3dBCorner_kHz=20000>
<filter FIR gain=-6 num=72>
0
2
4
3
-4
-14
-21
-12
17
56
73
39
-53
-159
-198
-101
129
377
457
229
-274
-793
-951
-482
527
1564
1899
1011
-978
-3154
-4109
-2611
1669
7795
13807
17524
17524
13807
7795
1669
-2611
-4109
-3154
-978
1011
1899
1564
527
-482
-951
-793
-274
229
457
377
129
-101
-198
-159
-53
39
73
56
17
-12
-21
-14
-4
3
4
2
0
</filter>
<adc-profile num=16>
599
357
201
98
1280
112
1505
53
1331
21
820
40
48
40
23
191
</adc-profile>
</rx>
<obs>
<adcDiv=1>
<rxFirDecimation=2>
<rxDec5Decimation=5>
<enHighRejDec5=1>
<rhb1Decimation=2>
<iqRate_kHz=61440>
<rfBandwidth_Hz=50000000>
<rxBbf3dBCorner_kHz=25000>
<filter FIR gain=0 num=72>
0
-1
1
2
-2
-6
6
12
-13
-24
25
43
-45
-73
77
118
-124
-183
193
274
-289
-402
423
579
-607
-826
866
1187
-1244
-1759
1842
2818
-2970
-5815
4337
18436
18436
4337
-5815
-2970
2818
1842
-1759
-1244
1187
866
-826
-607
579
423
-402
-289
274
193
-183
-124
118
77
-73
-45
43
25
-24
-13
12
6
-6
-2
2
1
-1
0
</filter>
<adc-profile num=16>
596
358
201
98
1280
134
1509
64
1329
25
818
39
48
40
23
190
</adc-profile>
<lpbk-adc-profile num=16>
599
357
201
98
1280
112
1505
53
1331
21
820
40
48
40
23
191
</lpbk-adc-profile>
</obs>
<tx>
<dacDiv=2.5>
<txFirInterpolation=2>
<thb1Interpolation=2>
<thb2Interpolation=2>
<txInputHbInterpolation=1>
<iqRate_kHz=61440>
<primarySigBandwidth_Hz=20000000>
<rfBandwidth_Hz=50000000>
<txDac3dBCorner_kHz=92000>
<txBbf3dBCorner_kHz=25000>
<filter FIR gain=0 num=32>
-118
-122
242
240
-429
-499
730
900
-1154
-1615
1742
2957
-2322
-5354
3885
17211
17211
3885
-5354
-2322
2957
1742
-1615
-1154
900
730
-499
-429
240
242
-122
-118
</filter>
</tx>
</profile>
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profileNR40MHz.txt deleted 100644 → 0
View file @ 31d9cf59
<profile AD9371 version=0 name=Rx 40, IQrate 61.440>
<clocks>
<deviceClock_kHz=122880>
<clkPllVcoFreq_kHz=9830400>
<clkPllVcoDiv=2>
<clkPllHsDiv=4>
</clocks>
<rx>
<adcDiv=1>
<rxFirDecimation=2>
<rxDec5Decimation=5>
<enHighRejDec5=1>
<rhb1Decimation=2>
<iqRate_kHz=61440>
<rfBandwidth_Hz=40000000>
<rxBbf3dBCorner_kHz=40000>
<filter FIR gain=-6 num=72>
2
0
-6
-7
8
20
0
-39
-31
46
86
-12
-149
-88
168
253
-73
-424
-188
478
596
-265
-1015
-326
1184
1262
-778
-2301
-506
2949
2877
-2404
-6653
-1392
13380
26614
26614
13380
-1392
-6653
-2404
2877
2949
-506
-2301
-778
1262
1184
-326
-1015
-265
596
478
-188
-424
-73
253
168
-88
-149
-12
86
46
-31
-39
0
20
8
-7
-6
0
2
</filter>
<adc-profile num=16>
599
357
201
98
1280
112
1505
53
1331
21
820
40
48
40
23
191
</adc-profile>
</rx>
<obs>
<adcDiv=1>
<rxFirDecimation=2>
<rxDec5Decimation=5>
<enHighRejDec5=1>
<rhb1Decimation=1>
<iqRate_kHz=122880>
<rfBandwidth_Hz=80000000>
<rxBbf3dBCorner_kHz=40000>
<filter FIR gain=0 num=48>
1
-1
-1
5
1
-15
7
40
-34
-94
102
202
-242
-400
500
752
-943
-1370
1711
2555
-3333
-6499
4207
19532
19532
4207
-6499
-3333
2555
1711
-1370
-943
752
500
-400
-242
202
102
-94
-34
40
7
-15
1
5
-1
-1
1
</filter>
<adc-profile num=16>
563
372
201
98
1280
328
1550
171
1317
66
804
33
48
39
23
189
</adc-profile>
<lpbk-adc-profile num=16>
599
357
201
98
1280
112
1505
53
1331
21
820
40
48
40
23
191
</lpbk-adc-profile>
</obs>
<tx>
<dacDiv=2.5>
<txFirInterpolation=1>
<thb1Interpolation=2>
<thb2Interpolation=2>
<txInputHbInterpolation=1>
<iqRate_kHz=122880>
<primarySigBandwidth_Hz=40000000>
<rfBandwidth_Hz=40000000>
<txDac3dBCorner_kHz=92000>
<txBbf3dBCorner_kHz=20000>
<filter FIR gain=6 num=16>
-5
425
278
34
-477
-1123
-1664
21975
-1664
-1123
-477
34
278
425
-5
0
</filter>
</tx>
</profile>
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profileNR80MHz.txt deleted 100644 → 0
View file @ 31d9cf59
<profile AD9371 version=0 name=Rx 80, IQrate 122.880>
<clocks>
<deviceClock_kHz=122880>
<clkPllVcoFreq_kHz=9830400>
<clkPllVcoDiv=2>
<clkPllHsDiv=4>
</clocks>
<rx>
<adcDiv=1>
<rxFirDecimation=2>
<rxDec5Decimation=5>
<enHighRejDec5=1>
<rhb1Decimation=1>
<iqRate_kHz=122880>
<rfBandwidth_Hz=80000000>
<rxBbf3dBCorner_kHz=80000>
<filter FIR gain=-6 num=48>
1
-1
-1
3
-2
-11
17
33
-64
-83
175
193
-399
-414
801
831
-1477
-1589
2632
3042
-5102
-7664
9765
32678
32678
9765
-7664
-5102
3042
2632
-1589
-1477
831
801
-414
-399
193
175
-83
-64
33
17
-11
-2
3
-1
-1
1
</filter>
<adc-profile num=16>
563
372
201
98
1280
328
1550
171
1317
66
804
33
48
39
23
189
</adc-profile>
</rx>
<obs>
<adcDiv=1>
<rxFirDecimation=1>
<rxDec5Decimation=5>
<enHighRejDec5=1>
<rhb1Decimation=1>
<iqRate_kHz=245760>
<rfBandwidth_Hz=160000000>
<rxBbf3dBCorner_kHz=80000>
<filter FIR gain=0 num=24>
-62
147
-188
22
500
-1359
2233
-2368
656
2432
-9845
24506
24506
-9845
2432
656
-2368
2233
-1359
500
22
-188
147
-62
</filter>
<adc-profile num=16>
491
375
201
98
1280
514
1728
570
1455
443
882
27
48
39
25
205
</adc-profile>
<lpbk-adc-profile num=16>
563
372
201
98
1280
328
1550
171
1317
66
804
33
48
39
23
189
</lpbk-adc-profile>
</obs>
<tx>
<dacDiv=2.5>
<txFirInterpolation=1>
<thb1Interpolation=2>
<thb2Interpolation=1>
<txInputHbInterpolation=1>
<iqRate_kHz=245760>
<primarySigBandwidth_Hz=80000000>
<rfBandwidth_Hz=80000000>
<txDac3dBCorner_kHz=92000>
<txBbf3dBCorner_kHz=40000>
<filter FIR gain=6 num=16>
-9
505
324
24
-598
-1381
-2036
23360
-2036
-1381
-598
24
324
505
-9
0
</filter>
</tx>
</profile>
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profile_rx30_Tx60_syr.txt deleted 100644 → 0
View file @ 31d9cf59
<profile AD9371 version=0 name=Rx 20, IQrate 30.720>
<clocks>
<deviceClock_kHz=122880>
<clkPllVcoFreq_kHz=9830400>
<clkPllVcoDiv=2>
<clkPllHsDiv=4>
</clocks>
<rx>
<adcDiv=1>
<rxFirDecimation=4>
<rxDec5Decimation=5>
<enHighRejDec5=1>
<rhb1Decimation=2>
<iqRate_kHz=30720>
<rfBandwidth_Hz=20000000>
<rxBbf3dBCorner_kHz=20000>
<filter FIR gain=-6 num=72>
0
2
4
3
-4
-14
-21
-12
17
56
73
39
-53
-159
-198
-101
129
377
457
229
-274
-793
-951
-482
527
1564
1899
1011
-978
-3154
-4109
-2611
1669
7795
13807
17524
17524
13807
7795
1669
-2611
-4109
-3154
-978
1011
1899
1564
527
-482
-951
-793
-274
229
457
377
129
-101
-198
-159
-53
39
73
56
17
-12
-21
-14
-4
3
4
2
0
</filter>
<adc-profile num=16>
599
357
201
98
1280
112
1505
53
1331
21
820
40
48
40
23
191
</adc-profile>
</rx>
<obs>
<adcDiv=1>
<rxFirDecimation=2>
<rxDec5Decimation=5>
<enHighRejDec5=1>
<rhb1Decimation=2>
<iqRate_kHz=61440>
<rfBandwidth_Hz=50000000>
<rxBbf3dBCorner_kHz=25000>
<filter FIR gain=0 num=72>
0
-1
1
2
-2
-6
6
12
-13
-24
25
43
-45
-73
77
118
-124
-183
193
274
-289
-402
423
579
-607
-826
866
1187
-1244
-1759
1842
2818
-2970
-5815
4337
18436
18436
4337
-5815
-2970
2818
1842
-1759
-1244
1187
866
-826
-607
579
423
-402
-289
274
193
-183
-124
118
77
-73
-45
43
25
-24
-13
12
6
-6
-2
2
1
-1
0
</filter>
<adc-profile num=16>
596
358
201
98
1280
134
1509
64
1329
25
818
39
48
40
23
190
</adc-profile>
<lpbk-adc-profile num=16>
599
357
201
98
1280
112
1505
53
1331
21
820
40
48
40
23
191
</lpbk-adc-profile>
</obs>
<tx>
<dacDiv=2.5>
<txFirInterpolation=2>
<thb1Interpolation=2>
<thb2Interpolation=2>
<txInputHbInterpolation=1>
<iqRate_kHz=61440>
<primarySigBandwidth_Hz=20000000>
<rfBandwidth_Hz=50000000>
<txDac3dBCorner_kHz=92000>
<txBbf3dBCorner_kHz=25000>
<filter FIR gain=0 num=32>
-118
-122
242
240
-429
-499
730
900
-1154
-1615
1742
2957
-2322
-5354
3885
17211
17211
3885
-5354
-2322
2957
1742
-1615
-1154
900
730
-499
-429
240
242
-122
-118
</filter>
</tx>
</profile>
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/ue.band7.tm1.PRB100.NR40.adrv9371-zc706.ini deleted 100644 → 0
View file @ 31d9cf59
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2560000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2680000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = manual
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = manual
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2680000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profileNR40MHz.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
# NO_DEBUG=0; DEBUG=1
debug_mode = 0
# 20MHz 40MHz 80MHz=1; 10MHz=2; 5MHz=4
interpolation_decimation_factor = 1
# is taken into account only if "ad9371-phy.in_voltage0_gain_control_mode = manual"
rx_gain_offset = 43
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/ue.band7.tm1.PRB100.NR80.adrv9371-zc706.ini deleted 100644 → 0
View file @ 31d9cf59
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2560000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2680000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = manual
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = manual
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2680000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profileNR80MHz.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
# NO_DEBUG=0; DEBUG=1
debug_mode = 0
# 20MHz 40MHz 80MHz=1; 10MHz=2; 5MHz=4
interpolation_decimation_factor = 1
# is taken into account only if "ad9371-phy.in_voltage0_gain_control_mode = manual"
rx_gain_offset = 53
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/ue.band7.tm1.PRB100.adrv9371-zc706.ini deleted 100644 → 0
View file @ 31d9cf59
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2560000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2680000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = manual
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 25.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 25.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = manual
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2680000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profile20MHz.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
# NO_DEBUG=0; DEBUG=1
debug_mode = 0
# 20MHz 40MHz 80MHz=1; 10MHz=2; 5MHz=4
interpolation_decimation_factor = 1
# is taken into account only if "ad9371-phy.in_voltage0_gain_control_mode = manual"
rx_gain_offset = 69
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/ue.band7.tm1.PRB100.adrv9371-zc706_HWgain15dB.ini deleted 100644 → 0
View file @ 31d9cf59
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = 0.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2560000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2680000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = manual
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 15.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 15.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = manual
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2680000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profile20MHz.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
# NO_DEBUG=0; DEBUG=1
debug_mode = 0
# 20MHz 40MHz 80MHz=1; 10MHz=2; 5MHz=4
interpolation_decimation_factor = 1
# is taken into account only if "ad9371-phy.in_voltage0_gain_control_mode = manual"
rx_gain_offset = 30
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/ue.band7.tm1.PRB25.adrv9371-zc706.ini deleted 100644 → 0
View file @ 31d9cf59
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = -10.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = -10.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2535000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2655000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = automatic
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = automatic
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2655000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profile_rx30_Tx60_syr.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
debug_mode = 0
interpolation_decimation_factor = 4
targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/ue.band7.tm1.PRB50.adrv9371-zc706.ini deleted 100644 → 0
View file @ 31d9cf59
[AD9371]
ad9371-phy.in_voltage2_rf_port_select = OFF
ad9371-phy.in_voltage2_hardwaregain = -156.000000 dB
ad9371-phy.in_voltage2_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_voltage0_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage0_hardwaregain = -10.000000 dB
ad9371-phy.out_voltage0_quadrature_tracking_en = 1
ad9371-phy.out_voltage1_hardwaregain = -10.000000 dB
ad9371-phy.out_voltage1_lo_leakage_tracking_en = 0
ad9371-phy.out_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage1_TX_LO_frequency = 2535000000
ad9371-phy.out_altvoltage2_RX_SN_LO_frequency = 2655000000
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage0_gain_control_mode = automatic
ad9371-phy.in_voltage0_quadrature_tracking_en = 1
ad9371-phy.in_voltage0_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage0_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.in_voltage1_quadrature_tracking_en = 1
ad9371-phy.in_voltage1_hardwaregain = 30.000000 dB
ad9371-phy.in_voltage1_temp_comp_gain = 0.00 dB
ad9371-phy.in_voltage1_gain_control_mode = automatic
ad9371-phy.in_voltage_rf_port_select_available = OFF INTERNALCALS OBS_SNIFFER SN_A SN_B SN_C ORX1_TX_LO ORX2_TX_LO ORX1_SN_LO ORX2_SN_LO
ad9371-phy.out_altvoltage0_RX_LO_frequency = 2655000000
ad9371-phy.calibrate_rx_qec_en = 0
ad9371-phy.calibrate_tx_lol_en = 0
ad9371-phy.calibrate_vswr_en = 0
ad9371-phy.calibrate_tx_qec_en = 0
ad9371-phy.calibrate_clgc_en = 0
ad9371-phy.ensm_mode = radio_on
ad9371-phy.calibrate_tx_lol_ext_en = 0
ad9371-phy.calibrate_dpd_en = 0
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage0_TX1_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage5_TX2_I_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage4_TX2_I_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_frequency = 7999809
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage6_TX2_Q_F1_scale = 0.251160
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage3_TX1_Q_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_phase = 0
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_scale = 0.000000
axi-ad9371-tx-hpc.out_altvoltage7_TX2_Q_F2_frequency = 1000327
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_raw = 1
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_phase = 0
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_scale = 0.501160
axi-ad9371-tx-hpc.out_altvoltage2_TX1_Q_F1_frequency = 1999718
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_frequency = 19998117
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_raw = 1
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_phase = 90000
axi-ad9371-tx-hpc.out_altvoltage1_TX1_I_F2_scale = 0.000000
load_myk_profile_file = /targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/profile_rx30_Tx60_syr.txt
dds_mode_tx1 = 1
dds_mode_tx2 = 1
dac_buf_filename = /usr/local/lib/osc/waveforms/LTE20.mat
tx_channel_0 = 1
tx_channel_1 = 1
tx_channel_2 = 0
tx_channel_3 = 0
global_settings_show = 1
tx_show = 1
rx_show = 1
obs_show = 1
fpga_show = 1
[ADRV9371_ZC706]
debug_mode = 0
interpolation_decimation_factor = 2
targets/ARCH/ADRV9371_ZC706/readme.txt deleted 100644 → 0
View file @ 31d9cf59
Common command line:
--------------------
cd /openairinterface5g/
source oaienv
HWLAT application:
------------------
./cmake_targets/build_oai -c -C -w ADRV9371_ZC706 --HWLAT
./cmake_targets/lte-hwlat/build/lte-hwlat
LTE-SOFTMODEM application:
--------------------------
./cmake_targets/build_oai -c --eNB --UE --noS1 -w ADRV9371_ZC706
sudo su
source oaienv
source ./targets/bin/init_nas_nos1 UE
./cmake_targets/lte_noS1_build_oai/build/lte-softmodem-nos1 -U -C 2680000000 -r100 --ue-scan-carrier --ue-txgain 0 --ue-rxgain 5 -S -A 6 --ue-max-power -25 --phy-test -g 7 --rf-config-file ./targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/ue.band7.tm1.PRB100.adrv9371-zc706_HWgain15dB.ini
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
View file @ 38dc0d87
......@@ -264,11 +264,10 @@ THREAD_STRUCT = (
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
worker_config = "WORKER_DISABLE";
}
);
NETWORK_CONTROLLER :
{
FLEXRAN_ENABLED = "no";
......
targets/RT/USER/lte-hwlat.c
View file @ 38dc0d87
......@@ -57,9 +57,9 @@
#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/proto.h"
#define RIFFA_CHANNEL_TESTER 0
#define RIFFA_CHANNEL_TESTER2 0
#define RIFFA_CHANNEL_DATA1 1
#define SYRIQ_CHANNEL_TESTER 0
#define SYRIQ_CHANNEL_TESTER2 0
#define SYRIQ_CHANNEL_DATA1 1
volatile int oai_exit = 0;
......@@ -346,7 +346,7 @@ int main(void)
int c = 0;
int numIter = 0;
int fpga_loop = 0;
#if RIFFA_CHANNEL_DATA1
#if SYRIQ_CHANNEL_DATA1
uint64_t first_ts = 0;
uint8_t is_first_ts = 0;
uint64_t trx_read_cnt = 0;
......@@ -383,7 +383,7 @@ int main(void)
#endif
const char *openair_dir = getenv("OPENAIR_DIR");
const char *ini_file = "/targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/ue.band7.tm1.PRB100.adrv9371-zc706_HWgain15dB.ini";
const char *ini_file = "/usr/local/etc/syriq/ue.band7.tm1.PRB100.NR20.dat";
int readBlockSize;
void* rxp[nb_antennas_rx];
......@@ -726,9 +726,9 @@ int main(void)
//#endif
/* ********** ********** */
/* RIFFA_CHANNEL_DATA1 */
/* SYRIQ_CHANNEL_DATA1 */
/* ********** ********** */
#if RIFFA_CHANNEL_DATA1
#if SYRIQ_CHANNEL_DATA1
// rf_device.trx_get_stats_func( &rf_device );
......@@ -766,12 +766,12 @@ int main(void)
// break;
// }
// }
printf("RIFFA CHANNEL DATA1 done !!!\n");
printf("SYRIQ CHANNEL DATA1 done !!!\n");
sleep(1);
return(0);
#endif
/* ********** ********** */
/* RIFFA_CHANNEL_DATA1 */
/* SYRIQ_CHANNEL_DATA1 */
/* ********** ********** */
......@@ -809,9 +809,9 @@ int main(void)
if (ret > 0)
{
/* ********** ********** */
/* RIFFA_CHANNEL_TESTER */
/* SYRIQ_CHANNEL_TESTER */
/* ********** ********** */
#if RIFFA_CHANNEL_TESTER
#if SYRIQ_CHANNEL_TESTER
failure = 0;
for (i = 0; i < ret; i++)
{
......@@ -843,9 +843,9 @@ int main(void)
}
#endif
/* ********** ********** */
/* RIFFA_CHANNEL_TESTER2*/
/* SYRIQ_CHANNEL_TESTER2*/
/* ********** ********** */
#if RIFFA_CHANNEL_TESTER2
#if SYRIQ_CHANNEL_TESTER2
// printf("* ret=%d timestamp=%ld (%ld)\n", ret, timestamp, (timestamp%307200));
failure = 0;
for (i = 0; i < ret; i++)
......
targets/RT/USER/nr-softmodem.c
View file @ 38dc0d87
......@@ -164,7 +164,7 @@ double bw = 10.0e6;
static int tx_max_power[MAX_NUM_CCs]; /* = {0,0}*/;
char rf_config_file[1024]="./targets/ARCH/ADRV9371_ZC706/USERSPACE/PROFILES/gnb.band7.tm1.PRB100.NR40.adrv9371-zc706_HWgain15dB.ini";
char rf_config_file[1024]="/usr/local/etc/syriq/ue.band7.tm1.PRB100.NR40.dat";
int chain_offset=0;
int phy_test = 0;
......
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