updated dci_pdu_rel15_t

moved nr_dci_size out of scheduler_phytest

openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c

@@ -596,8 +596,7 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup,
 
     case NR_DL_DCI_FORMAT_1_1:
       // Format identifier
-      dci_pdu->format_indicator.nbits=1;
-      size = dci_pdu->format_indicator.nbits;
+      size = 1;
       // Carrier indicator
       if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->crossCarrierSchedulingConfig != NULL) {
         dci_pdu->carrier_indicator.nbits=3;
@@ -651,32 +650,23 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup,
       dci_pdu->zp_csi_rs_trigger.nbits = (int)ceil(log2(nZP+1));
       size += dci_pdu->zp_csi_rs_trigger.nbits;
       // TB1- MCS 5, NDI 1, RV 2
-      dci_pdu->mcs[0].nbits = 5;
-      dci_pdu->ndi[0].nbits = 1;
-      dci_pdu->rv[0].nbits = 2;
-      size += (dci_pdu->mcs[0].nbits + dci_pdu->ndi[0].nbits + dci_pdu->rv[0].nbits);
+      size += 8;
       // TB2
       long *maxCWperDCI = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI;
-      if ((maxCWperDCI != NULL) && (maxCWperDCI == 2)) {
-        dci_pdu->mcs[1].nbits = 5;
-        dci_pdu->ndi[1].nbits = 1;
-        dci_pdu->rv[1].nbits = 2;
-        size += (dci_pdu->mcs[1].nbits + dci_pdu->ndi[1].nbits + dci_pdu->rv[1].nbits);
+      if ((maxCWperDCI != NULL) && (*maxCWperDCI == 2)) {
+        size += 8;
       }
       // HARQ PID
-      dci_pdu->harq_pid.nbits = 4;
-      size += dci_pdu->harq_pid.nbits;
+      size += 4;
       // DAI
       if (secondaryCellGroup->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook == 1) { // at this point the UE has multiple serving cells
-        dci_pdu->dai.nbits = 4;
-        size += dci_pdu->dai.nbits;
+        dci_pdu->dai[0].nbits = 4;
+        size += dci_pdu->dai[0].nbits;
       }
       // TPC PUCCH
-      dci_pdu->tpc.nbits = 2;
-      size += dci_pdu->tpc.nbits;
+      size += 2;
       // PUCCH resource indicator
-      dci_pdu->pucch_resource_indicator.nbits = 3;
-      size += dci_pdu->pucch_resource_indicator.nbits;
+      size += 3;
       // PDSCH to HARQ timing indicator
       uint8_t I = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.count;
       dci_pdu->pdsch_to_harq_feedback_timing_indicator.nbits = (int)ceil(log2(I));
@@ -710,8 +700,7 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup,
         size += dci_pdu->cbgfi.nbits;
       }
       // DMRS sequence init
-      dci_pdu->dmrs_sequence_initialization.nbits = 1;
-      size += dci_pdu->dmrs_sequence_initialization.nbits; 
+      size += 1;
       break;
 
     case NR_DL_DCI_FORMAT_2_0:

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c

@@ -343,17 +343,17 @@ int configure_fapi_dl_pdu(int Mod_idP,
 										   NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275));
   dci_pdu_rel15[0].time_domain_assignment.val = time_domain_assignment; // row index used here instead of SLIV;
   dci_pdu_rel15[0].vrb_to_prb_mapping.val = 1;
-  dci_pdu_rel15[0].mcs[0].val = pdsch_pdu_rel15->mcsIndex[0];
-  dci_pdu_rel15[0].tb_scaling.val = 1;
-  
-  dci_pdu_rel15[0].ra_preamble_index.val = 25;
-  dci_pdu_rel15[0].format_indicator.val = 1;
-  dci_pdu_rel15[0].ndi[0].val = 1;
-  dci_pdu_rel15[0].rv[0].val = 0;
-  dci_pdu_rel15[0].harq_pid.val = 0;
-  dci_pdu_rel15[0].dai.val = 2;
-  dci_pdu_rel15[0].tpc.val = 2;
-  dci_pdu_rel15[0].pucch_resource_indicator.val = 7;
+  dci_pdu_rel15[0].mcs = pdsch_pdu_rel15->mcsIndex[0];
+  dci_pdu_rel15[0].tb_scaling = 1;
+  
+  dci_pdu_rel15[0].ra_preamble_index = 25;
+  dci_pdu_rel15[0].format_indicator = 1;
+  dci_pdu_rel15[0].ndi = 1;
+  dci_pdu_rel15[0].rv = 0;
+  dci_pdu_rel15[0].harq_pid = 0;
+  dci_pdu_rel15[0].dai[0].val = 2;
+  dci_pdu_rel15[0].tpc = 2;
+  dci_pdu_rel15[0].pucch_resource_indicator = 7;
   dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator.val = 7;
   
   LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
@@ -363,10 +363,10 @@ int configure_fapi_dl_pdu(int Mod_idP,
 	NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275),
 	dci_pdu_rel15[0].time_domain_assignment.val,
 	dci_pdu_rel15[0].vrb_to_prb_mapping.val,
-	dci_pdu_rel15[0].mcs[0].val,
-	dci_pdu_rel15[0].tb_scaling.val,
-	dci_pdu_rel15[0].ndi[0].val, 
-	dci_pdu_rel15[0].rv[0].val);
+	dci_pdu_rel15[0].mcs,
+	dci_pdu_rel15[0].tb_scaling,
+	dci_pdu_rel15[0].ndi, 
+	dci_pdu_rel15[0].rv);
     
   nr_configure_pdcch(pdcch_pdu_rel15,
 		     1, // ue-specific
@@ -386,8 +386,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
   dci_formats[0]  = NR_DL_DCI_FORMAT_1_0;
   rnti_types[0]   = NR_RNTI_C;
 
-  pdcch_pdu_rel15->PayloadSizeBits[0]=nr_dci_size(secondaryCellGroup,&dci_pdu_rel15[0],dci_formats[0],rnti_types[0],pdcch_pdu_rel15->BWPSize);
-  fill_dci_pdu_rel15(pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types);
+  fill_dci_pdu_rel15(secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types);
 
   LOG_D(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d\n \
 	                      coreset params: FreqDomainResource %llx, start_symbol %d  n_symb %d\n",
@@ -425,23 +424,23 @@ void config_uldci(NR_BWP_Uplink_t *ubwp,nfapi_nr_pusch_pdu_t *pusch_pdu,nfapi_nr
 
   dci_pdu_rel15->time_domain_assignment.val = 2; // row index used here instead of SLIV;
   dci_pdu_rel15->frequency_hopping_flag.val = 0;
-  dci_pdu_rel15->mcs[0].val = 9;
+  dci_pdu_rel15->mcs = 9;
   
-  dci_pdu_rel15->format_indicator.val = 0;
-  dci_pdu_rel15->ndi[0].val = 1;
-  dci_pdu_rel15->rv[0].val = 0;
-  dci_pdu_rel15->harq_pid.val = 0;
-  dci_pdu_rel15->tpc.val = 2;
+  dci_pdu_rel15->format_indicator = 0;
+  dci_pdu_rel15->ndi = 1;
+  dci_pdu_rel15->rv = 0;
+  dci_pdu_rel15->harq_pid = 0;
+  dci_pdu_rel15->tpc = 2;
   
   LOG_D(MAC, "[gNB scheduler phytest] ULDCI type 0 payload: PDCCH CCEIndex %d, freq_alloc %d, time_alloc %d, freq_hop_flag %d, mcs %d tpc %d ndi %d rv %d\n",
 	pdcch_pdu_rel15->CceIndex[pdcch_pdu_rel15->numDlDci],
 	dci_pdu_rel15->frequency_domain_assignment.val,
 	dci_pdu_rel15->time_domain_assignment.val,
 	dci_pdu_rel15->frequency_hopping_flag.val,
-	dci_pdu_rel15->mcs[0].val,
-	dci_pdu_rel15->tpc.val,
-	dci_pdu_rel15->ndi[0].val, 
-	dci_pdu_rel15->rv[0].val);
+	dci_pdu_rel15->mcs,
+	dci_pdu_rel15->tpc,
+	dci_pdu_rel15->ndi, 
+	dci_pdu_rel15->rv);
   
   dci_formats[pdcch_pdu_rel15->numDlDci] = NR_UL_DCI_FORMAT_0_0;
   rnti_types[pdcch_pdu_rel15->numDlDci]  = NR_RNTI_C;
@@ -832,8 +831,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
 
   config_uldci(ubwp,pusch_pdu,pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, rnti_types);
   
-  pdcch_pdu_rel15->PayloadSizeBits[0]=nr_dci_size(secondaryCellGroup,&dci_pdu_rel15[0],dci_formats[0],rnti_types[0],pdcch_pdu_rel15->BWPSize);
-  fill_dci_pdu_rel15(pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types);
+  fill_dci_pdu_rel15(secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types);
   
 }
 

openair2/LAYER2/NR_MAC_gNB/mac_proto.h

@@ -130,7 +130,8 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
                         NR_ServingCellConfigCommon_t *scc,
                         NR_BWP_Downlink_t *bwp);
 
-void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
+void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup,
+                        nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
                         dci_pdu_rel15_t *dci_pdu_rel15,
                         int *dci_formats,
                         int *rnti_types);

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -260,62 +260,59 @@ typedef struct {
 typedef struct {
 
 
-dci_field_t format_indicator; //1 bit
-dci_field_t frequency_domain_assignment; //up to 16 bits
-dci_field_t time_domain_assignment; // 4 bits
-dci_field_t frequency_hopping_flag; //1 bit
- 
-dci_field_t ra_preamble_index; //6 bits
-dci_field_t ss_pbch_index; //6 bits
-dci_field_t prach_mask_index; //4 bits
- 
-dci_field_t vrb_to_prb_mapping; //0 or 1 bit
-dci_field_t mcs[2]; //5 bits
-dci_field_t ndi[2]; //1 bit
-dci_field_t rv[2]; //2 bits
-dci_field_t harq_pid; //4 bits
-dci_field_t dai; //0, 2 or 4 bits
-dci_field_t dai1; //1 or 2 bits
-dci_field_t dai2; //0 or 2 bits
-dci_field_t tpc; //2 bits
-dci_field_t pucch_resource_indicator; //3 bits
-dci_field_t pdsch_to_harq_feedback_timing_indicator; //0, 1, 2 or 3 bits
- 
-dci_field_t short_messages_indicator; //2 bits
-dci_field_t short_messages; //8 bits
-dci_field_t tb_scaling; //2 bits
- 
-dci_field_t carrier_indicator; //0 or 3 bits
-dci_field_t bwp_indicator; //0, 1 or 2 bits
-dci_field_t prb_bundling_size_indicator; //0 or 1 bits
-dci_field_t rate_matching_indicator; //0, 1 or 2 bits
-dci_field_t zp_csi_rs_trigger; //0, 1 or 2 bits
-dci_field_t transmission_configuration_indication; //0 or 3 bits
-dci_field_t srs_request; //2 bits
-dci_field_t cbgti; //CBG Transmission Information: 0, 2, 4, 6 or 8 bits
-dci_field_t cbgfi; //CBG Flushing Out Information: 0 or 1 bit
-dci_field_t dmrs_sequence_initialization; //0 or 1 bit
- 
-dci_field_t srs_resource_indicator;
-dci_field_t precoding_information;
-dci_field_t csi_request;
-dci_field_t ptrs_dmrs_association;
-dci_field_t beta_offset_indicator; //0 or 2 bits
- 
-dci_field_t slot_format_indicator_count;
-dci_field_t *slot_format_indicators;
- 
-dci_field_t pre_emption_indication_count;
-dci_field_t *pre_emption_indications; //14 bit
- 
-dci_field_t block_number_count;
-dci_field_t *block_numbers;
- 
-dci_field_t ul_sul_indicator; //0 or 1 bit
-dci_field_t antenna_ports;
+uint8_t     format_indicator; //1 bit
+uint8_t     ra_preamble_index; //6 bits
+uint8_t     ss_pbch_index; //6 bits
+uint8_t     prach_mask_index; //4 bits
+uint8_t     mcs; //5 bits
+uint8_t     ndi; //1 bit
+uint8_t     rv; //2 bits
+uint8_t     harq_pid; //4 bits
+uint8_t     tpc; //2 bits
+uint8_t     short_messages_indicator; //2 bits
+uint8_t     short_messages; //8 bits
+uint8_t     tb_scaling; //2 bits
+uint8_t     pucch_resource_indicator; //3 bits
+uint8_t     dmrs_sequence_initialization; //1 bit
+uint8_t     system_info_indicator; //1 bit
+
+uint8_t     slot_format_indicator_count;
+uint8_t     *slot_format_indicators;
+ 
+uint8_t     pre_emption_indication_count;
+uint16_t    *pre_emption_indications; //14 bit each
  
+uint8_t     block_number_count;
+uint8_t     *block_numbers;
+uint8_t     padding;
+
+dci_field_t mcs2; //variable
+dci_field_t ndi2; //variable
+dci_field_t rv2; //variable
+dci_field_t frequency_domain_assignment; //variable
+dci_field_t time_domain_assignment; //variable
+dci_field_t frequency_hopping_flag; //variable
+dci_field_t vrb_to_prb_mapping; //variable
+dci_field_t dai[2]; //variable
+dci_field_t pdsch_to_harq_feedback_timing_indicator; //variable
+dci_field_t carrier_indicator; //variable
+dci_field_t bwp_indicator; //variable
+dci_field_t prb_bundling_size_indicator; //variable
+dci_field_t rate_matching_indicator; //variable
+dci_field_t zp_csi_rs_trigger; //variable
+dci_field_t transmission_configuration_indication; //variable
+dci_field_t srs_request; //variable
+dci_field_t cbgti; //variable
+dci_field_t cbgfi; //variable
+dci_field_t srs_resource_indicator; //variable
+dci_field_t precoding_information; //variable
+dci_field_t csi_request; //variable
+dci_field_t ptrs_dmrs_association; //variable
+dci_field_t beta_offset_indicator; //variable
+dci_field_t cloded_loop_indicator; //variable
+dci_field_t ul_sul_indicator; //variable
+dci_field_t antenna_ports; //variable
 dci_field_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16 bits
-dci_field_t padding;
 
 } dci_pdu_rel15_t;