Commit a78aaa45 authored by Robert Schmidt's avatar Robert Schmidt

fix slicing capability in ulsch scheduler

parent 8877b18a
...@@ -692,7 +692,7 @@ typedef struct { ...@@ -692,7 +692,7 @@ typedef struct {
uint16_t cshift[8]; // num_max_harq uint16_t cshift[8]; // num_max_harq
/// Number of Allocated RBs by the ulsch preprocessor /// Number of Allocated RBs by the ulsch preprocessor
uint8_t pre_allocated_nb_rb_ul; uint8_t pre_allocated_nb_rb_ul[MAX_NUM_SLICES];
/// index of Allocated RBs by the ulsch preprocessor /// index of Allocated RBs by the ulsch preprocessor
int8_t pre_allocated_rb_table_index_ul; int8_t pre_allocated_rb_table_index_ul;
...@@ -804,6 +804,7 @@ typedef struct { ...@@ -804,6 +804,7 @@ typedef struct {
uint8_t mac_ContentionResolutionTimer; uint8_t mac_ContentionResolutionTimer;
uint16_t max_rbs_allowed_slice[MAX_NUM_CCs][MAX_NUM_SLICES]; uint16_t max_rbs_allowed_slice[MAX_NUM_CCs][MAX_NUM_SLICES];
uint16_t max_rbs_allowed_slice_uplink[MAX_NUM_CCs][MAX_NUM_SLICES];
uint8_t max_mcs[MAX_NUM_LCID]; uint8_t max_mcs[MAX_NUM_LCID];
......
...@@ -850,7 +850,7 @@ set_msg3_subframe(module_id_t mod_id, ...@@ -850,7 +850,7 @@ set_msg3_subframe(module_id_t mod_id,
int subframe, int rnti, int Msg3_frame, int subframe, int rnti, int Msg3_frame,
int Msg3_subframe) int Msg3_subframe)
{ {
eNB_MAC_INST *mac = RC.mac[Mod_id]; eNB_MAC_INST *mac = RC.mac[mod_id];
int i; int i;
for (i = 0; i < NB_RA_PROC_MAX; i++) { for (i = 0; i < NB_RA_PROC_MAX; i++) {
if (mac->common_channels[CC_id].ra[i].state != IDLE && if (mac->common_channels[CC_id].ra[i].state != IDLE &&
...@@ -1069,7 +1069,6 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP, ...@@ -1069,7 +1069,6 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
} }
// Run each enabled slice-specific schedulers one by one // Run each enabled slice-specific schedulers one by one
/* TODO Navid What is the right call for this message? */
slice_sched_ul[i](module_idP, i, frameP, subframeP, sched_subframe, first_rb); slice_sched_ul[i](module_idP, i, frameP, subframeP, sched_subframe, first_rb);
} }
...@@ -1296,10 +1295,9 @@ schedule_ulsch_rnti(module_id_t module_idP, ...@@ -1296,10 +1295,9 @@ schedule_ulsch_rnti(module_id_t module_idP,
normalized_rx_power = normalized_rx_power; normalized_rx_power = normalized_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power = target_rx_power; UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power = target_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1 = UE_template->pre_assigned_mcs_ul; UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1 = UE_template->pre_assigned_mcs_ul;
UE_template->mcs_UL[harq_pid] = UE_template->pre_assigned_mcs_ul; //cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS UE_template->mcs_UL[harq_pid] = cmin(UE_template->pre_assigned_mcs_ul, slice_maxmcs_uplink[slice_id]);//cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
if (UE_template->pre_allocated_rb_table_index_ul >= 0) { if (UE_template->pre_allocated_rb_table_index_ul >= 0) {
rb_table_index = rb_table_index = UE_template->pre_allocated_rb_table_index_ul;
UE_template->pre_allocated_rb_table_index_ul;
} else { } else {
UE_template->mcs_UL[harq_pid] = 10; //cmin (10, openair_daq_vars.target_ue_ul_mcs); UE_template->mcs_UL[harq_pid] = 10; //cmin (10, openair_daq_vars.target_ue_ul_mcs);
rb_table_index = 5; // for PHR rb_table_index = 5; // for PHR
...@@ -1309,8 +1307,7 @@ schedule_ulsch_rnti(module_id_t module_idP, ...@@ -1309,8 +1307,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
// buffer_occupancy = UE_template->ul_total_buffer; // buffer_occupancy = UE_template->ul_total_buffer;
while (((rb_table[rb_table_index] > while (((rb_table[rb_table_index] > (N_RB_UL - 1 - first_rb[CC_id]))
(N_RB_UL - 1 - first_rb[CC_id]))
|| (rb_table[rb_table_index] > 45)) || (rb_table[rb_table_index] > 45))
&& (rb_table_index > 0)) { && (rb_table_index > 0)) {
rb_table_index--; rb_table_index--;
......
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