Control1 reg : PC -> endpoint, Control2 : endpoint -> PC

git-svn-id: http://svn.eurecom.fr/openair4G/trunk@4055 818b1a75-f10b-46b9-bf7c-635c3b92a50f

targets/ARCH/EXMIMO/DRIVER/eurecom/exmimo_fw.c

@@ -246,9 +246,6 @@ int exmimo_firmware_init(int card)
     iowrite32( pphys_exmimo_pci_phys[card], (bar[card]+PCIE_PCIBASEL) );  // lower 32bit of address
     iowrite32( 0, (bar[card]+PCIE_PCIBASEH) );                            // higher 32bit of address
     
-    if ( exmimo_pci_kvirt[card].exmimo_id_ptr->board_swrev == BOARD_SWREV_CMDREGISTERS )
-        iowrite32( EXMIMO_CONTROL2_COOKIE, bar[card]+PCIE_CONTROL2 );
-
     //printk("exmimo_firmware_init(): initializing Leon (EXMIMO_PCIE_INIT)...\n");
     exmimo_send_pccmd(card, EXMIMO_PCIE_INIT);
     
@@ -309,15 +306,6 @@ int exmimo_send_pccmd(int card_id, unsigned int cmd)
     //    printk("Readback of control0 %x\n",ioread32(bar[0]+PCIE_CONTROL0));
     
     // workaround for ExMIMO1: no command ack -> sleep
-    if ( exmimo_pci_kvirt[card_id].exmimo_id_ptr->board_swrev == BOARD_SWREV_LEGACY ) {
-        switch(cmd) {  // currently, exmimo1 implements no command ack in bootloader -> sleep
-            case EXMIMO_PCIE_INIT : msleep(1000); break;
-            case EXMIMO_GET_FRAME : /* no sleep - wait for GET_FRAME_DONE*/ ; break;
-            case EXMIMO_START_RT_ACQUISITION : /* no sleep */ ; break;
-            default: msleep(500); break;
-        }
-    }
-    else {
         while (cnt<100 && ( ioread32(bar[card_id]+PCIE_CONTROL1) != EXMIMO_NOP )) {
             //printk("ctrl0: %08x, ctrl1: %08x, ctrl2: %08x, status: %08x\n", ioread32(bar[card_id]+PCIE_CONTROL0), ioread32(bar[card_id]+PCIE_CONTROL1), ioread32(bar[card_id]+PCIE_CONTROL2), ioread32(bar[card_id]+PCIE_STATUS));
             msleep(100);
@@ -325,7 +313,7 @@ int exmimo_send_pccmd(int card_id, unsigned int cmd)
         }
         if (cnt==100)
             printk("exmimo_send_pccmd error: Timeout: no EXMIMO_NOP received within 10sec for card%d, pccmd=%x\n", card_id, cmd);
-    }
+    
     //printk("Ctrl0: %08x, ctrl1: %08x, ctrl2: %08x, status: %08x\n", ioread32(bar[card_id]+PCIE_CONTROL0), ioread32(bar[card_id]+PCIE_CONTROL1), ioread32(bar[card_id]+PCIE_CONTROL2), ioread32(bar[card_id]+PCIE_STATUS));
     return(0);
 }

targets/ARCH/EXMIMO/DRIVER/eurecom/fileops.c

@@ -381,7 +381,7 @@ int openair_device_ioctl(struct inode *inode,struct file *filp, unsigned int cmd
                 fw_block[1] = update_firmware_stack_pointer;
       
                 exmimo_send_pccmd(c, EXMIMO_FW_START_EXEC);
-                
+                msleep(10); 
                 exmimo_firmware_init(c);
             }
             break;

targets/ARCH/EXMIMO/DRIVER/eurecom/irq.c

@@ -35,7 +35,7 @@ irqreturn_t openair_irq_handler(int irq, void *cookie)
     unsigned int irqval;
     unsigned int irqcmd = EXMIMO_NOP;
     unsigned long card_id; // = (unsigned long) cookie;
-    unsigned int pcie_control = PCIE_CONTROL1;
+    unsigned int pcie_control = PCIE_CONTROL2;
 
     // check interrupt status register
     //pci_read_config_word(pdev[0],6 , &irqval);
@@ -45,11 +45,6 @@ irqreturn_t openair_irq_handler(int irq, void *cookie)
         if ( pdev[card_id] == cookie )
             break;
 
-    if (exmimo_pci_kvirt[card_id].exmimo_id_ptr->board_swrev == BOARD_SWREV_LEGACY)
-        pcie_control = PCIE_CONTROL1;
-    else if (exmimo_pci_kvirt[card_id].exmimo_id_ptr->board_swrev == BOARD_SWREV_CMDREGISTERS)
-        pcie_control = PCIE_CONTROL2;
-
     //printk("irq hndl called: card_id=%i, irqval=%i\n", card_id, irqval);
 
     // get AHBPCIE interrupt line (bit 7) to determine if IRQ was for us from ExMIMO card, or from a different device
@@ -60,51 +55,31 @@ irqreturn_t openair_irq_handler(int irq, void *cookie)
     //printk("IRQ handler: ctrl0: %08x, ctrl1: %08x, ctrl2: %08x, status: %08x\n", irqval, ioread32(bar[card_id]+PCIE_CONTROL1), ioread32(bar[card_id]+PCIE_CONTROL2), ioread32(bar[card_id]+PCIE_STATUS));
     
     if ( (irqval & 0x80) == 0 )  {  // CTRL0.bit7 is no set -> IRQ is not from ExMIMO i.e. not for us 
-        if ( irqcmd != EXMIMO_NOP ) {
-            static int hide_warning=0;
-            if (hide_warning == 0) {
-                printk("EXMIMO: Warning: unclear source of IRQ: CTL0.bit7 not set, but cmd!=EXMIMO_NOP. Will now execute irqcmd (card %lu, cmd 0x%X). Will hide all future warnings!\n", card_id, irqcmd);
-                hide_warning = 1;
-            }
-        }
-        else
             return IRQ_NONE;
     }
-    if (exmimo_pci_kvirt[card_id].exmimo_id_ptr->board_swrev == BOARD_SWREV_LEGACY) {
-        // clear PCIE interrupt bit (bit 7 of register 0x0)
-        if ( (irqval&0x80) != 0)
-            iowrite32(irqval&0xffffff7f,bar[card_id]+PCIE_CONTROL0);
-    }
+    else
+    {
 
     if (irqcmd == GET_FRAME_DONE)
     {
         get_frame_done = 1;
     }
-    else if (irqcmd == PCI_PRINTK)
-    {
-        // TODO: copy printk_buffer into FIFO to allow several consecutive printks and ACK pcie_printk
-        //iowrite32(EXMIMO_NOP, bar[card_id]+pcie_control);
-    }
     
     openair_tasklet.data = card_id;
     tasklet_schedule(&openair_tasklet);
     openair_bh_cnt++;
 
     return IRQ_HANDLED;
+    }
 }
 
 void openair_do_tasklet (unsigned long card_id)
 {
     int save_irq_cnt = openair_bh_cnt;
     unsigned int irqcmd;
-    unsigned int pcie_control = PCIE_CONTROL1;
+    unsigned int pcie_control = PCIE_CONTROL2;
     openair_bh_cnt = 0;
     
-    if (exmimo_pci_kvirt[card_id].exmimo_id_ptr->board_swrev == BOARD_SWREV_LEGACY)
-        pcie_control = PCIE_CONTROL1;
-    else if (exmimo_pci_kvirt[card_id].exmimo_id_ptr->board_swrev == BOARD_SWREV_CMDREGISTERS)
-        pcie_control = PCIE_CONTROL2;
-        
     irqcmd = ioread32(bar[card_id]+pcie_control);
     
     if (save_irq_cnt > 1)
@@ -143,7 +118,7 @@ void pcie_printk(int card_id)
     //printk("In pci_fifo_printk : buffer %p, len %d: \n",buffer,len);
     printk("[LEON card%d]: ", card_id);
 
-    if (len<256)
+    if (len<1024)
     {
         if ( (len&3) >0 )
             off=1;

targets/ARCH/EXMIMO/DRIVER/eurecom/module_main.c

@@ -189,7 +189,7 @@ static int __init openair_init_module( void )
             openair_cleanup();
             return -EIO;
         }
-        iowrite32((1<<8) | (1<<9) | (1<<10), bar[card] +PCIE_CONTROL0 ); // bit8=AHBPCIE_CTL0_SOFTRESET, but what is bit9 and bit10?
+        iowrite32((1<<8), bar[card] +PCIE_CONTROL0 ); // bit8=AHBPCIE_CTL0_SOFTRESET, but what is bit9 and bit10?
         udelay(1000);
         readback = ioread32( bar[card] +PCIE_CONTROL0);
         printk("CONTROL0 readback %x\n",readback);