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OpenXG-RAN
Commit fa03cace authored by Guy De Souza's avatar Guy De Souza
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Compiling version

parent 3ac9bd32
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Showing with 24 additions and 24 deletions
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
View file @ fa03cace
......@@ -238,7 +238,7 @@ typedef enum {
NFAPI_NR_DL_DCI_FORMAT_2_2,
NFAPI_NR_DL_DCI_FORMAT_2_3,
NFAPI_NR_UL_DCI_FORMAT_0_0,
NFAPI_NR_UL_DCI_FORMAT_1_0
NFAPI_NR_UL_DCI_FORMAT_0_1
} nfapi_nr_dci_format_e;
typedef enum {
......
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @ fa03cace
......@@ -37,8 +37,8 @@
extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
uint8_t nr_get_dci_size(nr_dci_format_e format,
nr_rnti_type_e rnti_type,
uint8_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
NR_BWP_PARMS* bwp,
nfapi_nr_config_request_t* config)
{
......@@ -47,7 +47,7 @@ uint8_t nr_get_dci_size(nr_dci_format_e format,
switch(format) {
/*Only sizes for 0_0 and 1_0 are correct at the moment*/
case nr_dci_format_0_0:
case NFAPI_NR_UL_DCI_FORMAT_0_0:
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size += 20;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
......@@ -55,7 +55,7 @@ uint8_t nr_get_dci_size(nr_dci_format_e format,
// Padding
break;
case nr_dci_format_0_1:
case NFAPI_NR_UL_DCI_FORMAT_0_1:
/// fixed: Format identifier 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2, SRS request 2 --17
size += 17;
// Carrier indicator
......@@ -77,14 +77,14 @@ uint8_t nr_get_dci_size(nr_dci_format_e format,
// DMRS sequence init
break;
case nr_dci_format_1_0:
case NFAPI_NR_DL_DCI_FORMAT_1_0:
/// fixed: Format identifier 1, VRB2PRB 1, MCS 5, NDI 1, RV 2, HARQ PID 4, DAI 2, PUCCH TPC 2, PUCCH RInd 3, PDSCH to HARQ TInd 3 --24
size += 24;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment
// Time domain assignment
break;
case nr_dci_format_1_1:
case NFAPI_NR_DL_DCI_FORMAT_1_1:
// Carrier indicator
size += 1; // Format identifier
// BWP Indicator
......@@ -111,16 +111,16 @@ uint8_t nr_get_dci_size(nr_dci_format_e format,
break;
case nr_dci_format_2_0:
case NFAPI_NR_DL_DCI_FORMAT_2_0:
break;
case nr_dci_format_2_1:
case NFAPI_NR_DL_DCI_FORMAT_2_1:
break;
case nr_dci_format_2_2:
case NFAPI_NR_DL_DCI_FORMAT_2_2:
break;
case nr_dci_format_2_3:
case NFAPI_NR_DL_DCI_FORMAT_2_3:
break;
default:
......@@ -137,8 +137,8 @@ void nr_pdcch_scrambling(NR_gNB_DCI_ALLOC_t dci_alloc,
uint8_t reset;
uint32_t x1, x2, s=0;
uint32_t Nid = (dci_alloc.ss_type == nr_pdcch_uss_type)? pdcch_vars.dmrs_scrambling_id : config.sch_config.physical_cell_id.value;
uint32_t n_RNTI = (dci_alloc.ss_type == nr_pdcch_uss_type)? dci_alloc.rnti : 0;
uint32_t Nid = (dci_alloc.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_vars.dmrs_scrambling_id : config.sch_config.physical_cell_id.value;
uint32_t n_RNTI = (dci_alloc.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? dci_alloc.rnti : 0;
uint32_t *in = dci_alloc.dci_pdu;
reset = 1;
......
openair1/PHY/NR_TRANSPORT/nr_dci.h
View file @ fa03cace
......@@ -85,8 +85,8 @@ typedef struct {
typedef unsigned __int128 uint128_t;
uint8_t nr_get_dci_size(nr_dci_format_e format,
nr_rnti_type_e rnti_type,
uint8_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
NR_BWP_PARMS* bwp,
nfapi_nr_config_request_t* config);
......
openair1/PHY/defs_gNB.h
View file @ fa03cace
......@@ -50,8 +50,12 @@ typedef struct {
uint8_t size;
/// Aggregation level
uint8_t L;
/// rnti
uint16_t rnti;
/// rnti type
nfapi_nr_rnti_type_e rnti;
nfapi_nr_rnti_type_e rnti_type;
/// search space type
nfapi_nr_search_space_type_e search_space_type;
/// Format
nfapi_nr_dci_format_e format;
/// DCI pdu
......
openair1/SCHED_NR/fapi_nr_l1.c
View file @ fa03cace
......@@ -61,12 +61,12 @@ void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB,
{
int idx = subframe&1;
NR_gNB_PDCCH *pdcch_vars = &gNB->pdcch_vars[idx];
nfapi_nr_dl_config_dci_dl_pdu *pdu = &dl_config_pdu->dci_dl_pdu;
nfapi_nr_dl_config_dci_pdu_rel15_t *pdu = &dl_config_pdu->dci_dl_pdu_rel15;
LOG_D(PHY,"Frame %d, Subframe %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,subframe, pdcch_vars->num_dci, proc->subframe_tx, idx, pdcch_vars->num_dci);
// copy dci configuration into gNB structure
nr_fill_dci_and_dlsch(eNB,frame,subframe,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],pdu);
//nr_fill_dci_and_dlsch(eNB,frame,subframe,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],pdu);
LOG_D(PHY,"Frame %d, Subframe %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->subframe_tx, pdcch_vars->num_dci, proc->subframe_tx, idx, pdcch_vars->num_dci);
}
......
targets/RT/USER/nr-gnb.c
View file @ fa03cace
......@@ -181,21 +181,17 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam
gNB->UL_INFO.rach_ind.rach_indication_body.number_of_preambles ||
gNB->UL_INFO.cqi_ind.number_of_cqis
) {
LOG_D(PHY, "UL_info[rx_ind:%05d:%d harqs:%05d:%d crcs:%05d:%d preambles:%05d:%d cqis:%d] RX:%04d%d TX:%04d%d num_pdcch_symbols:%d\n",
LOG_D(PHY, "UL_info[rx_ind:%05d:%d harqs:%05d:%d crcs:%05d:%d preambles:%05d:%d cqis:%d] RX:%04d%d TX:%04d%d \n",
NFAPI_SFNSF2DEC(gNB->UL_INFO.rx_ind.sfn_sf), gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus,
NFAPI_SFNSF2DEC(gNB->UL_INFO.harq_ind.sfn_sf), gNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs,
NFAPI_SFNSF2DEC(gNB->UL_INFO.crc_ind.sfn_sf), gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs,
NFAPI_SFNSF2DEC(gNB->UL_INFO.rach_ind.sfn_sf), gNB->UL_INFO.rach_ind.rach_indication_body.number_of_preambles,
gNB->UL_INFO.cqi_ind.number_of_cqis,
proc->frame_rx, proc->subframe_rx,
proc->frame_tx, proc->subframe_tx, gNB->pdcch_vars[proc->subframe_tx&1].num_pdcch_symbols);
proc->frame_tx, proc->subframe_tx);
}
}
if (nfapi_mode == 1 && gNB->pdcch_vars[proc->subframe_tx&1].num_pdcch_symbols == 0) {
LOG_E(PHY, "gNB->pdcch_vars[proc->subframe_tx&1].num_pdcch_symbols == 0");
return 0;
}
/// NR disabling
// ****************************************
......
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