- 09 Feb, 2021 2 commits
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Parminder Singh authored
- Enabled slot 1 and 2 for DLSCH - Enabled slot 6,7,8,9,16,17,18,19 fir ULSCH
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Thomas Schlichter authored
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- 08 Feb, 2021 1 commit
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Robert Schmidt authored
This reverts commit 71e297de.
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- 07 Feb, 2021 37 commits
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Robert Schmidt authored
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Robert Schmidt authored
As the precedent commit, this commit deals with the realtime problems that we currently have on the CI bench. For DL HARQ feedback, nFAPI does not give us the HARQ process ID. Instead, we have to figure this out "from timing", i.e., if we trigger PUCCH reception, we will get a message with HARQ if we instructed the PHY to do so. If we have real-time problems, it seems (I cannot verify: don't have real time problems) that we do not get the nFAPI message with HARQ feedback. Thus, we need to skip the HARQ processes that should have been processed in the past, which happens in this commit.
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Robert Schmidt authored
At the time of this commit, the CI has realtime issues. This can mean that the HARQ result is delivered in a delayed fashion. Before this commit, we were asserting on whether the slot corresponds to the HARQ process's expected feedback slot, but a particular feedback might be delayed under realtime issues, and we actually don't care about the timing since we get the HARQ process ID. Instead, we loop through the HARQ processes for which we wait for a feedback in the beginning until we have the right process (which did not seem to cause a problem till now, but who knows.
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Robert Schmidt authored
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Robert Schmidt authored
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Robert Schmidt authored
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Robert Schmidt authored
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Robert Schmidt authored
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
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Robert Schmidt authored
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Robert Schmidt authored
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Robert Schmidt authored
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ChiehChun authored
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ChiehChun authored
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Robert Schmidt authored
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ChiehChun authored
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ChiehChun authored
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Robert Schmidt authored
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
- To check the current slot is the scheduled slot(UL slot - K2) and only execute the post processor in scheduled slot.
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
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Robert Schmidt authored
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
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ChiehChun authored
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