Commit 0c6b5101 authored by Francesco Mani's avatar Francesco Mani

merge between FR2 and RRC branches

parent 18d717ea
...@@ -1098,6 +1098,13 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) { ...@@ -1098,6 +1098,13 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) {
} else { } else {
AssertFatal(0==1,"N_RB %d not yet supported for numerology %d\n",N_RB,mu); AssertFatal(0==1,"N_RB %d not yet supported for numerology %d\n",N_RB,mu);
} }
} else if (mu == NR_MU_3) {
if (N_RB == 66) {
cfg->sample_rate = 122.88e6;
cfg->samples_per_frame = 1228800;
cfg->tx_bw = 100e6;
cfg->rx_bw = 100e6;
}
} else { } else {
AssertFatal(0 == 1,"Numerology %d not supported for the moment\n",mu); AssertFatal(0 == 1,"Numerology %d not supported for the moment\n",mu);
} }
......
...@@ -127,7 +127,7 @@ extern pthread_mutex_t sync_mutex; ...@@ -127,7 +127,7 @@ extern pthread_mutex_t sync_mutex;
extern int sync_var; extern int sync_var;
extern uint32_t downlink_frequency[MAX_NUM_CCs][4]; extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4]; extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
extern int rx_input_level_dBm; extern int rx_input_level_dBm;
......
...@@ -113,7 +113,7 @@ int single_thread_flag=1; ...@@ -113,7 +113,7 @@ int single_thread_flag=1;
static int8_t threequarter_fs=0; static int8_t threequarter_fs=0;
uint32_t downlink_frequency[MAX_NUM_CCs][4]; uint64_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4]; int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
//Temp fix for inexisting NR upper layer //Temp fix for inexisting NR upper layer
......
...@@ -170,7 +170,6 @@ static void UE_synch(void *arg) { ...@@ -170,7 +170,6 @@ static void UE_synch(void *arg) {
UE->is_synchronized = 0; UE->is_synchronized = 0;
if (UE->UE_scan == 0) { if (UE->UE_scan == 0) {
LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu64", UL %"PRIu64" (oai_exit %d, rx_num_channels %d)\n", LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu64", UL %"PRIu64" (oai_exit %d, rx_num_channels %d)\n",
UE->frame_parms.dl_CarrierFreq, UE->frame_parms.ul_CarrierFreq, UE->frame_parms.dl_CarrierFreq, UE->frame_parms.ul_CarrierFreq,
oai_exit, openair0_cfg[0].rx_num_channels); oai_exit, openair0_cfg[0].rx_num_channels);
...@@ -292,6 +291,12 @@ static void UE_synch(void *arg) { ...@@ -292,6 +291,12 @@ static void UE_synch(void *arg) {
openair0_cfg[UE->rf_map.card].tx_bw=10.0e6; openair0_cfg[UE->rf_map.card].tx_bw=10.0e6;
// openair0_cfg[0].rx_gain[0] -= 0; // openair0_cfg[0].rx_gain[0] -= 0;
break; break;
case 66:
openair0_cfg[UE->rf_map.card].sample_rate=122.88e6;
openair0_cfg[UE->rf_map.card].rx_bw=100.e6;
openair0_cfg[UE->rf_map.card].tx_bw=100.e6;
break;
} }
if (UE->mode != loop_through_memory) { if (UE->mode != loop_through_memory) {
...@@ -610,7 +615,6 @@ void *UE_thread(void *arg) { ...@@ -610,7 +615,6 @@ void *UE_thread(void *arg) {
openair0_timestamp timestamp; openair0_timestamp timestamp;
void *rxp[NB_ANTENNAS_RX], *txp[NB_ANTENNAS_TX]; void *rxp[NB_ANTENNAS_RX], *txp[NB_ANTENNAS_TX];
int start_rx_stream = 0; int start_rx_stream = 0;
const uint16_t table_sf_slot[20] = {0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8,8,9,9};
AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), ""); AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), "");
UE->rfdevice.host_type = RAU_HOST; UE->rfdevice.host_type = RAU_HOST;
AssertFatal(UE->rfdevice.trx_start_func(&UE->rfdevice) == 0, "Could not start the device\n"); AssertFatal(UE->rfdevice.trx_start_func(&UE->rfdevice) == 0, "Could not start the device\n");
...@@ -696,7 +700,7 @@ void *UE_thread(void *arg) { ...@@ -696,7 +700,7 @@ void *UE_thread(void *arg) {
curMsg->UE->current_thread_id[slot_nr] = thread_idx; curMsg->UE->current_thread_id[slot_nr] = thread_idx;
curMsg->proc.CC_id = 0; curMsg->proc.CC_id = 0;
curMsg->proc.nr_tti_rx= slot_nr; curMsg->proc.nr_tti_rx= slot_nr;
curMsg->proc.subframe_rx=table_sf_slot[slot_nr]; curMsg->proc.subframe_rx=slot_nr/(nb_slot_frame/10);
curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame; curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx; curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx;
curMsg->proc.frame_rx = ((absolute_slot/nb_slot_frame)+UE->frame_gap) % MAX_FRAME_NUMBER; curMsg->proc.frame_rx = ((absolute_slot/nb_slot_frame)+UE->frame_gap) % MAX_FRAME_NUMBER;
......
...@@ -122,7 +122,7 @@ static double snr_dB=20; ...@@ -122,7 +122,7 @@ static double snr_dB=20;
int threequarter_fs=0; int threequarter_fs=0;
uint32_t downlink_frequency[MAX_NUM_CCs][4]; uint64_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4]; int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
...@@ -518,7 +518,15 @@ void init_openair0(void) { ...@@ -518,7 +518,15 @@ void init_openair0(void) {
openair0_cfg[card].configFilename = NULL; openair0_cfg[card].configFilename = NULL;
openair0_cfg[card].threequarter_fs = frame_parms[0]->threequarter_fs; openair0_cfg[card].threequarter_fs = frame_parms[0]->threequarter_fs;
if(frame_parms[0]->N_RB_DL == 217) { if(frame_parms[0]->N_RB_DL == 66) {
if (numerology==3) {
openair0_cfg[card].sample_rate=122.88e6;
openair0_cfg[card].samples_per_frame = 1228800;
} else {
LOG_E(PHY,"Unsupported numerology! FR2 supports only 120KHz SCS for now.\n");
exit(-1);
}
}else if(frame_parms[0]->N_RB_DL == 217) {
if (numerology==1) { if (numerology==1) {
if (frame_parms[0]->threequarter_fs) { if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=92.16e6; openair0_cfg[card].sample_rate=92.16e6;
......
...@@ -69,7 +69,7 @@ ...@@ -69,7 +69,7 @@
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \ {"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \ {"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \ {"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \ {"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT64, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \ {"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:&do_forms, defintval:0, TYPE_INT, 0}, \ {"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:&do_forms, defintval:0, TYPE_INT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, iptr:&threequarter_fs, defintval:0, TYPE_INT, 0}, \ {"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, iptr:&threequarter_fs, defintval:0, TYPE_INT, 0}, \
...@@ -79,7 +79,7 @@ ...@@ -79,7 +79,7 @@
{"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \ {"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \ {"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&vcdflag, defintval:0, TYPE_INT, 0}, \ {"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&vcdflag, defintval:0, TYPE_INT, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, iptr:&numerology, defintval:0, TYPE_INT, 0}, \ {"numerology" , CONFIG_HLP_NUMEROLOGY, 0, iptr:&numerology, defintval:0, TYPE_INT, 0}, \
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&emulate_rf, defintval:0, TYPE_INT, 0}, \ {"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&emulate_rf, defintval:0, TYPE_INT, 0}, \
{"parallel-config", CONFIG_HLP_PARALLEL_CMD,0, strptr:(char **)&parallel_config, defstrval:NULL, TYPE_STRING, 0}, \ {"parallel-config", CONFIG_HLP_PARALLEL_CMD,0, strptr:(char **)&parallel_config, defstrval:NULL, TYPE_STRING, 0}, \
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:(char **)&worker_config, defstrval:NULL, TYPE_STRING, 0}, \ {"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:(char **)&worker_config, defstrval:NULL, TYPE_STRING, 0}, \
......
...@@ -979,14 +979,14 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, ...@@ -979,14 +979,14 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config,
config->subframe_config.numerology_index_mu.value =1; config->subframe_config.numerology_index_mu.value =1;
config->subframe_config.duplex_mode.value = 1; //FDD config->subframe_config.duplex_mode.value = 1; //FDD
config->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL config->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config->rf_config.dl_carrier_bandwidth.value = 106; config->rf_config.dl_carrier_bandwidth.value = 100;
config->rf_config.ul_carrier_bandwidth.value = 106; config->rf_config.ul_carrier_bandwidth.value = 100;
config->sch_config.physical_cell_id.value = 0; config->sch_config.physical_cell_id.value = 0;
frame_parms->frame_type = FDD; frame_parms->frame_type = FDD;
//frame_parms[CC_id]->tdd_config_S = 0; //frame_parms[CC_id]->tdd_config_S = 0;
frame_parms->N_RB_DL = 100; frame_parms->N_RB_DL = 106;
frame_parms->N_RB_UL = 100; frame_parms->N_RB_UL = 106;
frame_parms->Ncp = NORMAL; frame_parms->Ncp = NORMAL;
//frame_parms[CC_id]->Ncp_UL = NORMAL; //frame_parms[CC_id]->Ncp_UL = NORMAL;
frame_parms->Nid_cell = 0; frame_parms->Nid_cell = 0;
......
...@@ -191,9 +191,16 @@ void set_scs_parameters (NR_DL_FRAME_PARMS *fp, int mu) ...@@ -191,9 +191,16 @@ void set_scs_parameters (NR_DL_FRAME_PARMS *fp, int mu)
break; break;
case NR_MU_3: case NR_MU_3:
switch(N_RB_DL){
case 66:
fp->ofdm_symbol_size = 1024;
fp->first_carrier_offset = 628; //1024 - ( (66*12) / 2 )
fp->nb_prefix_samples0 = 88;
fp->nb_prefix_samples = 72;
fp->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_3]; fp->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_3];
fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_3]; fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_3];
fp->ssb_type = nr_ssb_type_D; fp->ssb_type = nr_ssb_type_D;
}
break; break;
case NR_MU_4: case NR_MU_4:
......
...@@ -117,8 +117,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -117,8 +117,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
return(-1); return(-1);
}*/ }*/
if (Ns<0 || Ns>=20) { if (Ns<0 || Ns>=(frame_parms->slots_per_frame-1)) {
printf("slot_fep: Ns must be between 0 and 19\n"); printf("slot_fep: Ns must be between 0 and %d\n",frame_parms->slots_per_frame-1);
return(-1); return(-1);
} }
......
...@@ -86,7 +86,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) { ...@@ -86,7 +86,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
if ((slot==8) || (slot==9) || (slot==18) || (slot==19) || (slot==28) || (slot==29)) if ((slot==8) || (slot==9) || (slot==18) || (slot==19) || (slot==28) || (slot==29))
gNB->skipped_slots = gNB->skipped_slots + 1; gNB->skipped_slots = gNB->skipped_slots + 1;
else { else {
if(rel_slot<slots_per_hf && rel_slot>=0) { if(rel_slot<38 && rel_slot>=0) { // there is no SSB beyond slot 37
for (int i=0; i<2; i++) { // max two SSB per frame for (int i=0; i<2; i++) { // max two SSB per frame
ssb_index = i + ((rel_slot - gNB->skipped_slots)<<1); // computing the ssb_index ssb_index = i + ((rel_slot - gNB->skipped_slots)<<1); // computing the ssb_index
...@@ -294,6 +294,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_ ...@@ -294,6 +294,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_
case 106: timing_advance_update /= 16; break; case 106: timing_advance_update /= 16; break;
case 217: timing_advance_update /= 32; break; case 217: timing_advance_update /= 32; break;
case 273: timing_advance_update /= 32; break; case 273: timing_advance_update /= 32; break;
case 66: timing_advance_update /= 12; break;
default: abort(); default: abort();
} }
......
...@@ -128,7 +128,7 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue, ...@@ -128,7 +128,7 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
*/ */
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) #if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
extern uint32_t downlink_frequency[MAX_NUM_CCs][4]; extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
#endif #endif
......
...@@ -78,7 +78,7 @@ extern double cpuf; ...@@ -78,7 +78,7 @@ extern double cpuf;
void Msg1_transmitted(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t eNB_id); void Msg1_transmitted(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t eNB_id);
void Msg3_transmitted(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t eNB_id); void Msg3_transmitted(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t eNB_id);
extern uint32_t downlink_frequency[MAX_NUM_CCs][4]; extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
void get_dumpparam(PHY_VARS_UE *ue, void get_dumpparam(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc, UE_rxtx_proc_t *proc,
......
...@@ -202,7 +202,6 @@ int main(int argc, char **argv) ...@@ -202,7 +202,6 @@ int main(int argc, char **argv)
int N_RB_DL=106,mu=1; int N_RB_DL=106,mu=1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t dlsch_config; nfapi_nr_dl_tti_pdsch_pdu_rel15_t dlsch_config;
//unsigned char frame_type = 0; //unsigned char frame_type = 0;
int frame=0,slot=1; int frame=0,slot=1;
...@@ -381,6 +380,7 @@ int main(int argc, char **argv) ...@@ -381,6 +380,7 @@ int main(int argc, char **argv)
case 'I': case 'I':
run_initial_sync=1; run_initial_sync=1;
target_error_rate=0.1; target_error_rate=0.1;
slot = 0;
break; break;
case 'L': case 'L':
...@@ -546,6 +546,10 @@ int main(int argc, char **argv) ...@@ -546,6 +546,10 @@ int main(int argc, char **argv)
fs = 61.44e6; fs = 61.44e6;
bw = 40e6; bw = 40e6;
} }
else if (mu == 3 && N_RB_DL == 66) {
fs = 122.88e6;
bw = 100e6;
}
else AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL); else AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL);
gNB2UE = new_channel_desc_scm(n_tx, gNB2UE = new_channel_desc_scm(n_tx,
...@@ -620,7 +624,6 @@ int main(int argc, char **argv) ...@@ -620,7 +624,6 @@ int main(int argc, char **argv)
nr_gold_pdcch(UE,0,2); nr_gold_pdcch(UE,0,2);
nr_l2_init_ue(NULL); nr_l2_init_ue(NULL);
UE_mac = get_mac_inst(0); UE_mac = get_mac_inst(0);
...@@ -653,7 +656,6 @@ int main(int argc, char **argv) ...@@ -653,7 +656,6 @@ int main(int argc, char **argv)
if (rbStart_set==0) dlsch_config.rbStart=0; if (rbStart_set==0) dlsch_config.rbStart=0;
//Configure UE //Configure UE
rrc.carrier.MIB = (uint8_t*) malloc(4); rrc.carrier.MIB = (uint8_t*) malloc(4);
rrc.carrier.sizeof_MIB = do_MIB_NR(&rrc,0); rrc.carrier.sizeof_MIB = do_MIB_NR(&rrc,0);
......
...@@ -79,7 +79,7 @@ ...@@ -79,7 +79,7 @@
extern uint16_t sf_ahead; extern uint16_t sf_ahead;
extern int config_check_band_frequencies(int ind, int16_t band, uint32_t downlink_frequency, extern int config_check_band_frequencies(int ind, int16_t band, uint64_t downlink_frequency,
int32_t uplink_frequency_offset, uint32_t frame_type); int32_t uplink_frequency_offset, uint32_t frame_type);
void prepare_scc(NR_ServingCellConfigCommon_t *scc) { void prepare_scc(NR_ServingCellConfigCommon_t *scc) {
...@@ -646,7 +646,6 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { ...@@ -646,7 +646,6 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
// Parse optional physical parameters // Parse optional physical parameters
sprintf(gnbpath,"%s.[%i]",GNB_CONFIG_STRING_GNB_LIST,k), sprintf(gnbpath,"%s.[%i]",GNB_CONFIG_STRING_GNB_LIST,k),
printf("SSB SCO %d\n",ssb_SubcarrierOffset); printf("SSB SCO %d\n",ssb_SubcarrierOffset);
NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = ssb_SubcarrierOffset; NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = ssb_SubcarrierOffset;
printf("pdsch_AntennaPorts %d\n",pdsch_AntennaPorts); printf("pdsch_AntennaPorts %d\n",pdsch_AntennaPorts);
......
...@@ -230,7 +230,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm ...@@ -230,7 +230,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
} }
break; break;
default: default:
AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", scc->ssb_PositionsInBurst->present); AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", scc->ssb_PositionsInBurst->present)
} }
cfg->ssb_table.ssb_mask_list[0].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG; cfg->ssb_table.ssb_mask_list[0].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG;
cfg->num_tlv++; cfg->num_tlv++;
......
...@@ -42,6 +42,7 @@ void config_common(int Mod_idP, ...@@ -42,6 +42,7 @@ void config_common(int Mod_idP,
int pdsch_AntennaPorts, int pdsch_AntennaPorts,
NR_ServingCellConfigCommon_t *scc NR_ServingCellConfigCommon_t *scc
); );
int rrc_mac_config_req_gNB(module_id_t Mod_idP, int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int ssb_SubcarrierOffset, int ssb_SubcarrierOffset,
int pdsch_AntennaPorts, int pdsch_AntennaPorts,
......
...@@ -64,7 +64,8 @@ nr_bandentry_t nr_bandtable[] = { ...@@ -64,7 +64,8 @@ nr_bandentry_t nr_bandtable[] = {
{82, 832000, 862000, 000, 000, 20, 166400}, {82, 832000, 862000, 000, 000, 20, 166400},
{83, 703000, 748000, 000, 000, 20, 140600}, {83, 703000, 748000, 000, 000, 20, 140600},
{84, 1920000, 1980000, 000, 000, 20, 384000}, {84, 1920000, 1980000, 000, 000, 20, 384000},
{86, 1710000, 1785000, 000, 000, 20, 342000} {86, 1710000, 1785000, 000, 000, 20, 342000},
{257, 26500000, 29500000,26500000,29500000, 1, 2054167}
}; };
#define NR_BANDTABLE_SIZE (sizeof(nr_bandtable)/sizeof(nr_bandentry_t)) #define NR_BANDTABLE_SIZE (sizeof(nr_bandtable)/sizeof(nr_bandentry_t))
...@@ -234,8 +235,8 @@ uint32_t to_nrarfcn(int nr_bandP, ...@@ -234,8 +235,8 @@ uint32_t to_nrarfcn(int nr_bandP,
int i; int i;
LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw); LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
AssertFatal(nr_bandP < 86, "nr_band %d > 86\n", nr_bandP); AssertFatal(nr_bandP < 258, "nr_band %d > 257\n", nr_bandP);
for (i = 0; i < 30 && nr_bandtable[i].band != nr_bandP; i++); for (i = 0; i < 33 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min, AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min,
"Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n", "Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n",
...@@ -267,8 +268,8 @@ uint64_t from_nrarfcn(int nr_bandP, ...@@ -267,8 +268,8 @@ uint64_t from_nrarfcn(int nr_bandP,
if (nr_bandP < 77 || nr_bandP > 79) deltaFglobal = 5; if (nr_bandP < 77 || nr_bandP > 79) deltaFglobal = 5;
else deltaFglobal = 15; else deltaFglobal = 15;
AssertFatal(nr_bandP < 87, "nr_band %d > 86\n", nr_bandP); AssertFatal(nr_bandP < 258, "nr_band %d > 257\n", nr_bandP);
for (i = 0; i < 31 && nr_bandtable[i].band != nr_bandP; i++); for (i = 0; i < 33 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL); AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL);
LOG_I(PHY,"Computing dl_frequency (pointA %llu => %llu (dlmin %llu, nr_bandtable[%d].N_OFFs_DL %llu))\n", LOG_I(PHY,"Computing dl_frequency (pointA %llu => %llu (dlmin %llu, nr_bandtable[%d].N_OFFs_DL %llu))\n",
......
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({mcc = 208; mnc = 93; mnc_length = 2;});
tr_s_preference = "local_mac"
////////// Physical parameters:
component_carriers = (
{
node_function = "3GPP_gNODEB";
node_timing = "synch_to_ext_device";
node_synch_ref = 0;
frame_type = "TDD";
DL_prefix_type = "NORMAL";
UL_prefix_type = "NORMAL";
eutra_band = 78;
downlink_frequency = 3510000000L;
uplink_frequency_offset = -120000000;
Nid_cell = 0;
N_RB_DL = 66;
nb_antenna_ports = 1;
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 125;
MIB_subCarrierSpacingCommon = 30;
MIB_ssb_SubcarrierOffset = 0;
MIB_dmrs_TypeA_Position = 2;
pdcch_ConfigSIB1 = 0;
SIB1_frequencyOffsetSSB = "khz5";
SIB1_ssb_PeriodicityServingCell = 20;
SIB1_ss_PBCH_BlockPower = -60;
absoluteFrequencySSB = 0;
DL_FreqBandIndicatorNR = 15;
DL_absoluteFrequencyPointA = 15;
DL_offsetToCarrier = 15;
DL_SCS_SubcarrierSpacing = "kHz120";
DL_SCS_SpecificCarrier_k0 = 0;
DL_carrierBandwidth = 15;
DL_locationAndBandwidth = 15;
DL_BWP_SubcarrierSpacing = "kHz120";
DL_BWP_prefix_type = "NORMAL";
UL_FreqBandIndicatorNR = 15;
UL_absoluteFrequencyPointA = 13;
UL_additionalSpectrumEmission = 3;
UL_p_Max = -1;
UL_frequencyShift7p5khz = "TRUE";
UL_offsetToCarrier = 10;
UL_SCS_SubcarrierSpacing = "kHz120";
UL_SCS_SpecificCarrier_k0 = 0;
UL_carrierBandwidth = 15;
UL_locationAndBandwidth = 15;
UL_BWP_SubcarrierSpacing = "kHz120";
UL_BWP_prefix_type = "NORMAL";
UL_timeAlignmentTimerCommon = "infinity";
ServingCellConfigCommon_n_TimingAdvanceOffset = "n0"
ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0x01;
ServingCellConfigCommon_ssb_periodicityServingCell = 10;
ServingCellConfigCommon_dmrs_TypeA_Position = 2;
NIA_SubcarrierSpacing = "kHz15";
ServingCellConfigCommon_ss_PBCH_BlockPower = -60;
referenceSubcarrierSpacing = "kHz15";
dl_UL_TransmissionPeriodicity = "ms0p5";
nrofDownlinkSlots = 10;
nrofDownlinkSymbols = 10;
nrofUplinkSlots = 10;
nrofUplinkSymbols = 10;
rach_totalNumberOfRA_Preambles = 63;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_choice = "oneEighth";
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneEighth = 4;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneFourth = 8;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneHalf = 16;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_one = 24;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_two = 32;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_four = 8;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_eight = 4;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_sixteen = 2;
rach_groupBconfigured = "ENABLE";
rach_ra_Msg3SizeGroupA = 56;
rach_messagePowerOffsetGroupB = "dB0";
rach_numberOfRA_PreamblesGroupA = 32;
rach_ra_ContentionResolutionTimer = 8;
rsrp_ThresholdSSB = 64;
rsrp_ThresholdSSB_SUL = 64;
prach_RootSequenceIndex_choice = "l839";
prach_RootSequenceIndex_l839 = 0;
prach_RootSequenceIndex_l139 = 0;
prach_msg1_SubcarrierSpacing = "kHz120";
restrictedSetConfig = "unrestrictedSet";
msg3_transformPrecoding = "ENABLE";
prach_ConfigurationIndex = 10;
prach_msg1_FDM = "one";
prach_msg1_FrequencyStart = 10;
zeroCorrelationZoneConfig = 10;
preambleReceivedTargetPower = -150;
preambleTransMax = 6;
powerRampingStep = "dB0";
ra_ResponseWindow = 8;
groupHoppingEnabledTransformPrecoding = "ENABLE";
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = 0;
PUSCH_TimeDomainResourceAllocation_k2 = 0;
PUSCH_TimeDomainResourceAllocation_mappingType = "typeA";
PUSCH_TimeDomainResourceAllocation_startSymbolAndLength = 0;
pucch_ResourceCommon = 0;
pucch_GroupHopping = "neither";
hoppingId = 0;
p0_nominal = -30;
PDSCH_TimeDomainResourceAllocation_k0 = 2;
PDSCH_TimeDomainResourceAllocation_mappingType = "typeA";
PDSCH_TimeDomainResourceAllocation_startSymbolAndLength = 0;
rateMatchPatternId = 0;
RateMatchPattern_patternType = "bitmaps";
symbolsInResourceBlock = "oneSlot";
periodicityAndPattern = 2;
RateMatchPattern_controlResourceSet = 5;
RateMatchPattern_subcarrierSpacing = "kHz120";
RateMatchPattern_mode = "dynamic";
controlResourceSetZero = 0;
searchSpaceZero = 0;
searchSpaceSIB1 = 10;
searchSpaceOtherSystemInformation = 10;
pagingSearchSpace = 10;
ra_SearchSpace = 10;
PDCCH_common_controlResourceSetId = 5;
PDCCH_common_ControlResourceSet_duration = 2;
PDCCH_cce_REG_MappingType = "nonInterleaved";
PDCCH_reg_BundleSize = 3;
PDCCH_interleaverSize = 3;
PDCCH_shiftIndex = 10;
PDCCH_precoderGranularity = "sameAsREG-bundle";
PDCCH_TCI_StateId = 32;
tci_PresentInDCI = "ENABLE";
PDCCH_DMRS_ScramblingID = 0;
SearchSpaceId = 10;
commonSearchSpaces_controlResourceSetId = 5;
SearchSpace_monitoringSlotPeriodicityAndOffset_choice = "sl1";
SearchSpace_monitoringSlotPeriodicityAndOffset_value = 0;
SearchSpace_duration = 2;
SearchSpace_nrofCandidates_aggregationLevel1 = 0;
SearchSpace_nrofCandidates_aggregationLevel2 = 0;
SearchSpace_nrofCandidates_aggregationLevel4 = 0;
SearchSpace_nrofCandidates_aggregationLevel8 = 0;
SearchSpace_nrofCandidates_aggregationLevel16 = 0;
SearchSpace_searchSpaceType = "common";
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel1 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel2 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel4 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel8 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel16 = 1;
Common_dci_Format2_3_monitoringPeriodicity = 1;
Common_dci_Format2_3_nrofPDCCH_Candidates = 1;
ue_Specific__dci_Formats = "formats0-0-And-1-0";
RateMatchPatternLTE_CRS_carrierFreqDL = 6;
RateMatchPatternLTE_CRS_carrierBandwidthDL = 6;
RateMatchPatternLTE_CRS_nrofCRS_Ports = 1;
RateMatchPatternLTE_CRS_v_Shift = 0;
RateMatchPatternLTE_CRS_radioframeAllocationPeriod = 1;
RateMatchPatternLTE_CRS_radioframeAllocationOffset = 0;
RateMatchPatternLTE_CRS_subframeAllocation_choice = "oneFrame";
}
);
srb1_parameters :
{
# timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500]
timer_poll_retransmit = 80;
# timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200]
timer_reordering = 35;
# timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500]
timer_status_prohibit = 0;
# poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)]
poll_pdu = 4;
# poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)]
poll_byte = 99999;
# max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32]
max_retx_threshold = 4;
}
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_S1_MME = "eth0";
GNB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
GNB_INTERFACE_NAME_FOR_S1U = "eth0";
GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1;
nb_rx = 1;
att_tx = 0;
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "addr=192.168.20.2";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
NETWORK_CONTROLLER :
{
FLEXRAN_ENABLED = "no";
FLEXRAN_INTERFACE_NAME = "lo";
FLEXRAN_IPV4_ADDRESS = "127.0.0.1";
FLEXRAN_PORT = 2210;
FLEXRAN_CACHE = "/mnt/oai_agent_cache";
FLEXRAN_AWAIT_RECONF = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
...@@ -264,7 +264,7 @@ extern pthread_cond_t sync_cond; ...@@ -264,7 +264,7 @@ extern pthread_cond_t sync_cond;
extern pthread_mutex_t sync_mutex; extern pthread_mutex_t sync_mutex;
extern int sync_var; extern int sync_var;
extern uint32_t downlink_frequency[MAX_NUM_CCs][4]; extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4]; extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
extern int rx_input_level_dBm; extern int rx_input_level_dBm;
......
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