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canghaiwuhen
OpenXG-RAN
Commits
17312d68
Commit
17312d68
authored
Nov 13, 2020
by
rmagueta
Browse files
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Plain Diff
Minor fixes on used BWP.
parent
1daaa7c6
Changes
11
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Showing
11 changed files
with
109 additions
and
40 deletions
+109
-40
ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf
ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf
+1
-1
openair1/PHY/NR_TRANSPORT/nr_dci.c
openair1/PHY/NR_TRANSPORT/nr_dci.c
+5
-2
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+6
-1
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+1
-1
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
+7
-4
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+3
-1
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+3
-8
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+4
-2
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+5
-1
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+36
-13
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+38
-6
No files found.
ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf
View file @
17312d68
...
@@ -53,7 +53,7 @@ gNBs =
...
@@ -53,7 +53,7 @@ gNBs =
#initialDownlinkBWP
#initialDownlinkBWP
#genericParameters
#genericParameters
# this is RBstart=41,L=24 (275*(L-1))+RBstart
# this is RBstart=41,L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth
=
12956
;
#12925;
initialDLBWPlocationAndBandwidth
=
12956
;
#12925;
12956 28875
# subcarrierSpacing
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing
=
1
;
initialDLBWPsubcarrierSpacing
=
1
;
...
...
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @
17312d68
...
@@ -87,10 +87,13 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
...
@@ -87,10 +87,13 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
get_coreset_rballoc
(
pdcch_pdu_rel15
->
FreqDomainResource
,
&
n_rb
,
&
rb_offset
);
get_coreset_rballoc
(
pdcch_pdu_rel15
->
FreqDomainResource
,
&
n_rb
,
&
rb_offset
);
cset_start_sc
=
frame_parms
.
first_carrier_offset
+
rb_offset
*
NR_NB_SC_PER_RB
;
cset_start_sc
=
frame_parms
.
first_carrier_offset
+
rb_offset
*
NR_NB_SC_PER_RB
;
if
(
pdcch_pdu_rel15
->
CoreSetType
==
NFAPI_NR_CSET_CONFIG_MIB_SIB1
)
{
if
(
pdcch_pdu_rel15
->
CoreSetType
==
NFAPI_NR_CSET_CONFIG_MIB_SIB1
)
{
int
cset_offset_sc
=
(
frame_parms
.
ssb_start_subcarrier
/
NR_NB_SC_PER_RB
-
RC
.
nrmac
[
gNB
->
Mod_id
]
->
type0_PDCCH_CSS_config
.
rb_offset
)
*
NR_NB_SC_PER_RB
;
cset_start_sc
=
cset_start_sc
+
RC
.
nrmac
[
gNB
->
Mod_id
]
->
type0_PDCCH_CSS_config
.
cset_start_rb
*
NR_NB_SC_PER_RB
;
cset_start_sc
=
cset_start_sc
+
cset_offset_sc
;
}
}
printf
(
"==== cset_start_sc = %i
\n
"
,
cset_start_sc
);
printf
(
"==== frame_parms.first_carrier_offset = %i
\n
"
,
frame_parms
.
first_carrier_offset
);
printf
(
"==== rb_offset = %i
\n
"
,
rb_offset
);
printf
(
"==== RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb = %i
\n
"
,
RC
.
nrmac
[
gNB
->
Mod_id
]
->
type0_PDCCH_CSS_config
.
cset_start_rb
);
for
(
int
d
=
0
;
d
<
pdcch_pdu_rel15
->
numDlDci
;
d
++
)
{
for
(
int
d
=
0
;
d
<
pdcch_pdu_rel15
->
numDlDci
;
d
++
)
{
/*The coreset is initialised
/*The coreset is initialised
...
...
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
View file @
17312d68
...
@@ -269,7 +269,12 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
...
@@ -269,7 +269,12 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
/// Resource mapping
/// Resource mapping
// Non interleaved VRB to PRB mapping
// Non interleaved VRB to PRB mapping
uint16_t
start_sc
=
frame_parms
->
first_carrier_offset
+
rel15
->
rbStart
*
NR_NB_SC_PER_RB
;
uint16_t
start_sc
=
frame_parms
->
first_carrier_offset
+
(
rel15
->
rbStart
+
rel15
->
BWPStart
)
*
NR_NB_SC_PER_RB
;
printf
(
">>>> start_sc = %i
\n
"
,
start_sc
);
if
(
start_sc
>=
frame_parms
->
ofdm_symbol_size
)
if
(
start_sc
>=
frame_parms
->
ofdm_symbol_size
)
start_sc
-=
frame_parms
->
ofdm_symbol_size
;
start_sc
-=
frame_parms
->
ofdm_symbol_size
;
...
...
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
View file @
17312d68
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
View file @
17312d68
...
@@ -385,8 +385,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
...
@@ -385,8 +385,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
ue
->
high_speed_flag
,
ue
->
high_speed_flag
,
frame_parms
);
frame_parms
);
printf
(
"QQQQQQQQQQQQQQ
\n
"
);
}
/*else if(beamforming_mode>7) {
}
/*else if(beamforming_mode>7) {
LOG_W(PHY,"dlsch_demodulation: beamforming mode not supported yet.\n");
LOG_W(PHY,"dlsch_demodulation: beamforming mode not supported yet.\n");
}*/
}*/
...
@@ -2382,6 +2380,11 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
...
@@ -2382,6 +2380,11 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
k
=
frame_parms
->
first_carrier_offset
+
NR_NB_SC_PER_RB
*
start_rb
;
k
=
frame_parms
->
first_carrier_offset
+
NR_NB_SC_PER_RB
*
start_rb
;
printf
(
"k = %i
\n
"
,
k
);
printf
(
"frame_parms->first_carrier_offset = %i
\n
"
,
frame_parms
->
first_carrier_offset
);
printf
(
"nr_dlsch_extract_rbs_single: start_rb = %i
\n
"
,
start_rb
);
//getchar();
if
(
high_speed_flag
==
1
)
if
(
high_speed_flag
==
1
)
dl_ch0
=
&
dl_ch_estimates
[
aarx
][(
2
*
(
frame_parms
->
ofdm_symbol_size
))];
dl_ch0
=
&
dl_ch_estimates
[
aarx
][(
2
*
(
frame_parms
->
ofdm_symbol_size
))];
else
else
...
@@ -2390,12 +2393,12 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
...
@@ -2390,12 +2393,12 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
dl_ch0_ext
=
&
dl_ch_estimates_ext
[
aarx
][
symbol
*
(
nb_rb_pdsch
*
12
)];
dl_ch0_ext
=
&
dl_ch_estimates_ext
[
aarx
][
symbol
*
(
nb_rb_pdsch
*
12
)];
rxF_ext
=
&
rxdataF_ext
[
aarx
][
symbol
*
(
nb_rb_pdsch
*
12
)];
rxF_ext
=
&
rxdataF_ext
[
aarx
][
symbol
*
(
nb_rb_pdsch
*
12
)];
rxF
=
&
rxdataF
[
aarx
][(
k
+
(
symbol
*
(
frame_parms
->
ofdm_symbol_size
)))
+
31
*
12
];
rxF
=
&
rxdataF
[
aarx
][(
k
+
(
symbol
*
(
frame_parms
->
ofdm_symbol_size
)))];
for
(
rb
=
0
;
rb
<
nb_rb_pdsch
;
rb
++
)
{
for
(
rb
=
0
;
rb
<
nb_rb_pdsch
;
rb
++
)
{
if
(
k
>
frame_parms
->
ofdm_symbol_size
)
{
if
(
k
>
frame_parms
->
ofdm_symbol_size
)
{
k
=
k
-
frame_parms
->
ofdm_symbol_size
;
k
=
k
-
frame_parms
->
ofdm_symbol_size
;
rxF
=
&
rxdataF
[
aarx
][(
k
+
(
symbol
*
(
frame_parms
->
ofdm_symbol_size
)))
+
31
*
12
];
rxF
=
&
rxdataF
[
aarx
][(
k
+
(
symbol
*
(
frame_parms
->
ofdm_symbol_size
)))];
}
}
if
(
pilots
==
0
)
{
if
(
pilots
==
0
)
{
memcpy
((
void
*
)
rxF_ext
,(
void
*
)
rxF
,
12
*
sizeof
(
*
rxF_ext
));
memcpy
((
void
*
)
rxF_ext
,(
void
*
)
rxF
,
12
*
sizeof
(
*
rxF_ext
));
...
...
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
17312d68
...
@@ -737,9 +737,11 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
...
@@ -737,9 +737,11 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
pdsch_nb_rb
);
pdsch_nb_rb
);
printf
(
"===== Total = %i
\n
"
,
ue
->
frame_parms
.
first_carrier_offset
+
(
BWPStart
+
pdsch_start_rb
)
*
12
);
printf
(
"===== ue->frame_parms.first_carrier_offset = %i
\n
"
,
ue
->
frame_parms
.
first_carrier_offset
);
printf
(
"===== BWPStart = %i
\n
"
,
BWPStart
);
printf
(
"===== BWPStart = %i
\n
"
,
BWPStart
);
printf
(
"===== pdsch_start_rb = %i
\n
"
,
pdsch_start_rb
);
printf
(
"===== pdsch_start_rb = %i
\n
"
,
pdsch_start_rb
);
printf
(
"===== pdsch_nb_rb = %i
\n
"
,
pdsch_nb_rb
);
//getchar();
//getchar();
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @
17312d68
...
@@ -2879,7 +2879,8 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC
...
@@ -2879,7 +2879,8 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC
NR_MIB_t
*
mib
,
NR_MIB_t
*
mib
,
uint8_t
extra_bits
,
uint8_t
extra_bits
,
uint32_t
ssb_length
,
uint32_t
ssb_length
,
uint32_t
ssb_index
)
{
uint32_t
ssb_index
,
uint32_t
ssb_offset_point_a
)
{
// deafult for testing
// deafult for testing
subcarrier_spacing_t
scs_ssb
=
scs_30kHz
;
subcarrier_spacing_t
scs_ssb
=
scs_30kHz
;
...
@@ -3234,13 +3235,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC
...
@@ -3234,13 +3235,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC
AssertFatal
(
type0_PDCCH_CSS_config
->
n_c
!=
UINT_MAX
,
""
);
AssertFatal
(
type0_PDCCH_CSS_config
->
n_c
!=
UINT_MAX
,
""
);
type0_PDCCH_CSS_config
->
n_0
=
((
uint32_t
)(
big_o
*
pow
(
2
,
scs_pdcch
))
+
(
uint32_t
)(
type0_PDCCH_CSS_config
->
ssb_index
*
big_m
))
%
num_slot_per_frame
;
type0_PDCCH_CSS_config
->
n_0
=
((
uint32_t
)(
big_o
*
pow
(
2
,
scs_pdcch
))
+
(
uint32_t
)(
type0_PDCCH_CSS_config
->
ssb_index
*
big_m
))
%
num_slot_per_frame
;
type0_PDCCH_CSS_config
->
cset_start_rb
=
ssb_offset_point_a
-
type0_PDCCH_CSS_config
->
rb_offset
;
/*printf("\nbig_o = %f\n", big_o);
printf("scs_pdcch = %u\n", scs_pdcch);
printf("ssb_index = %u\n", type0_PDCCH_CSS_config->ssb_index);
printf("big_m = %f\n", big_m);
printf("num_slot_per_frame = %u\n", num_slot_per_frame);*/
return
0
;
return
0
;
}
}
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
View file @
17312d68
...
@@ -146,7 +146,7 @@ typedef enum {
...
@@ -146,7 +146,7 @@ typedef enum {
typedef
struct
Type0_PDCCH_CSS_config_s
{
typedef
struct
Type0_PDCCH_CSS_config_s
{
int32_t
num_rbs
;
int32_t
num_rbs
;
int32_t
num_symbols
;
int32_t
num_symbols
;
int32_t
rb_offset
;
int32_t
rb_offset
;
// Offset from SSB RB0
uint32_t
type0_pdcch_ss_mux_pattern
;
uint32_t
type0_pdcch_ss_mux_pattern
;
uint16_t
frame
;
uint16_t
frame
;
SFN_C_TYPE
sfn_c
;
SFN_C_TYPE
sfn_c
;
...
@@ -157,6 +157,7 @@ typedef struct Type0_PDCCH_CSS_config_s {
...
@@ -157,6 +157,7 @@ typedef struct Type0_PDCCH_CSS_config_s {
uint32_t
search_space_duration
;
uint32_t
search_space_duration
;
uint32_t
ssb_length
;
uint32_t
ssb_length
;
uint32_t
ssb_index
;
uint32_t
ssb_index
;
uint32_t
cset_start_rb
;
}
NR_Type0_PDCCH_CSS_config_t
;
}
NR_Type0_PDCCH_CSS_config_t
;
uint16_t
config_bandwidth
(
int
mu
,
int
nb_rb
,
int
nr_band
);
uint16_t
config_bandwidth
(
int
mu
,
int
nb_rb
,
int
nr_band
);
...
@@ -245,7 +246,8 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC
...
@@ -245,7 +246,8 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC
NR_MIB_t
*
mib
,
NR_MIB_t
*
mib
,
uint8_t
extra_bits
,
uint8_t
extra_bits
,
uint32_t
ssb_length
,
uint32_t
ssb_length
,
uint32_t
ssb_index
);
uint32_t
ssb_index
,
uint32_t
ssb_offset_point_a
);
int16_t
get_N_RA_RB
(
int
delta_f_RA_PRACH
,
int
delta_f_PUSCH
);
int16_t
get_N_RA_RB
(
int
delta_f_RA_PRACH
,
int
delta_f_PUSCH
);
#endif
#endif
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @
17312d68
...
@@ -171,8 +171,12 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
...
@@ -171,8 +171,12 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15
->
rnti
=
0xFFFF
;
// SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
rel15
->
rnti
=
0xFFFF
;
// SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
//rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
//rel15->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15
->
BWPSize
=
mac
->
type0_PDCCH_CSS_config
.
num_rbs
;
rel15
->
BWPSize
=
mac
->
type0_PDCCH_CSS_config
.
num_rbs
;
rel15
->
BWPStart
=
mac
->
phy_config
.
config_req
.
ssb_table
.
ssb_offset_point_a
-
mac
->
type0_PDCCH_CSS_config
.
rb_offset
;
rel15
->
BWPStart
=
mac
->
type0_PDCCH_CSS_config
.
cset_start_rb
;
rel15
->
SubcarrierSpacing
=
mac
->
mib
->
subCarrierSpacingCommon
;
rel15
->
SubcarrierSpacing
=
mac
->
mib
->
subCarrierSpacingCommon
;
for
(
int
i
=
0
;
i
<
rel15
->
num_dci_options
;
i
++
)
{
for
(
int
i
=
0
;
i
<
rel15
->
num_dci_options
;
i
++
)
{
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
17312d68
...
@@ -1000,7 +1000,8 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
...
@@ -1000,7 +1000,8 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
LOG_I
(
MAC
,
"ssb index(extra bits): %d
\n
"
,
(
int
)
ssb_index
);
LOG_I
(
MAC
,
"ssb index(extra bits): %d
\n
"
,
(
int
)
ssb_index
);
#endif
#endif
get_type0_PDCCH_CSS_config_parameters
(
&
mac
->
type0_PDCCH_CSS_config
,
mac
->
mib
,
extra_bits
,
ssb_length
,
ssb_index
);
get_type0_PDCCH_CSS_config_parameters
(
&
mac
->
type0_PDCCH_CSS_config
,
mac
->
mib
,
extra_bits
,
ssb_length
,
ssb_index
,
mac
->
phy_config
.
config_req
.
ssb_table
.
ssb_offset_point_a
);
ssb_index
=
mac
->
type0_PDCCH_CSS_config
.
ssb_index
;
// TODO: ssb_index should obtain from L1 in case Lssb != 64
ssb_index
=
mac
->
type0_PDCCH_CSS_config
.
ssb_index
;
// TODO: ssb_index should obtain from L1 in case Lssb != 64
mac
->
type0_pdcch_ss_mux_pattern
=
mac
->
type0_PDCCH_CSS_config
.
type0_pdcch_ss_mux_pattern
;
mac
->
type0_pdcch_ss_mux_pattern
=
mac
->
type0_PDCCH_CSS_config
.
type0_pdcch_ss_mux_pattern
;
...
@@ -1122,6 +1123,27 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
...
@@ -1122,6 +1123,27 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
}
}
*/
*/
}
}
fapi_nr_dl_config_dci_dl_pdu_rel15_t
dci_config_rel15
=
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
dci_config_pdu
.
dci_config_rel15
;
printf
(
"
\n
===================================================
\n
"
);
LOG_I
(
MAC
,
"rnti: %i
\n
"
,
dci_config_rel15
.
rnti
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->BWPSize: %i
\n
"
,
dci_config_rel15
.
BWPSize
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->BWPStart: %i
\n
"
,
dci_config_rel15
.
BWPStart
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->SubcarrierSpacing: %i
\n
"
,
dci_config_rel15
.
SubcarrierSpacing
);
//LOG_I(MAC,"pdcch_pdu_rel15->CyclicPrefix: %i\n", dci_config_rel15.coreset.CyclicPrefix);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->StartSymbolIndex: %i
\n
"
,
dci_config_rel15
.
coreset
.
StartSymbolIndex
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->DurationSymbols: %i
\n
"
,
dci_config_rel15
.
coreset
.
duration
);
for
(
int
n
=
0
;
n
<
6
;
n
++
)
LOG_I
(
MAC
,
"pdcch_pdu_rel15->FreqDomainResource[%i]: %x
\n
"
,
n
,
dci_config_rel15
.
coreset
.
frequency_domain_resource
[
n
]);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->CceRegMappingType: %i
\n
"
,
dci_config_rel15
.
coreset
.
CceRegMappingType
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->RegBundleSize: %i
\n
"
,
dci_config_rel15
.
coreset
.
RegBundleSize
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->InterleaverSize: %i
\n
"
,
dci_config_rel15
.
coreset
.
InterleaverSize
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->CoreSetType: %i
\n
"
,
dci_config_rel15
.
coreset
.
CoreSetType
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->ShiftIndex: %i
\n
"
,
dci_config_rel15
.
coreset
.
ShiftIndex
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->precoderGranularity: %i
\n
"
,
dci_config_rel15
.
coreset
.
precoder_granularity
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->numDlDci: %i
\n
"
,
dl_config
->
number_pdus
);
printf
(
"
\n
===================================================
\n
"
);
}
else
if
(
ul_info
)
{
}
else
if
(
ul_info
)
{
if
(
get_softmodem_params
()
->
phy_test
&&
ul_info
->
slot_tx
==
8
)
{
// ULSCH is handled only in phy-test mode (consistently with OAI gNB)
if
(
get_softmodem_params
()
->
phy_test
&&
ul_info
->
slot_tx
==
8
)
{
// ULSCH is handled only in phy-test mode (consistently with OAI gNB)
...
@@ -2702,6 +2724,13 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
...
@@ -2702,6 +2724,13 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
SLIV2SL
(
startSymbolAndLength
,
&
S
,
&
L
);
SLIV2SL
(
startSymbolAndLength
,
&
S
,
&
L
);
dlsch_config_pdu
->
start_symbol
=
S
;
dlsch_config_pdu
->
start_symbol
=
S
;
dlsch_config_pdu
->
number_symbols
=
L
;
dlsch_config_pdu
->
number_symbols
=
L
;
printf
(
"SLIV = %i
\n
"
,
startSymbolAndLength
);
printf
(
"dlsch_config_pdu->start_symbol = %i
\n
"
,
dlsch_config_pdu
->
start_symbol
);
printf
(
"dlsch_config_pdu->number_symbols = %i
\n
"
,
dlsch_config_pdu
->
number_symbols
);
}
}
else
{
// Default configuration from tables
else
{
// Default configuration from tables
// k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
// k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
...
@@ -3227,23 +3256,17 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
...
@@ -3227,23 +3256,17 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
*/
*/
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
dlsch_config_pdu
.
rnti
=
rnti
;
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
dlsch_config_pdu
.
rnti
=
rnti
;
//fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_pdu_1_0 = dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
fapi_nr_dl_config_dlsch_pdu_rel15_t
*
dlsch_config_pdu_1_0
=
&
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
dlsch_config_pdu
.
dlsch_config_rel15
;
/*dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
fapi_nr_dl_config_dlsch_pdu_rel15_t
*
dlsch_config_pdu_1_0
=
&
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
dlsch_config_pdu
.
dlsch_config_rel15
;
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;*/
dlsch_config_pdu_1_0
->
BWPSize
=
mac
->
type0_PDCCH_CSS_config
.
num_rbs
;
dlsch_config_pdu_1_0
->
BWPSize
=
mac
->
type0_PDCCH_CSS_config
.
num_rbs
;
dlsch_config_pdu_1_0
->
BWPStart
=
mac
->
phy_config
.
config_req
.
ssb_table
.
ssb_offset_point_a
-
mac
->
type0_PDCCH_CSS_config
.
rb_offset
;
dlsch_config_pdu_1_0
->
BWPStart
=
mac
->
type0_PDCCH_CSS_config
.
cset_start_rb
;
dlsch_config_pdu_1_0
->
SubcarrierSpacing
=
mac
->
mib
->
subCarrierSpacingCommon
;
dlsch_config_pdu_1_0
->
SubcarrierSpacing
=
mac
->
mib
->
subCarrierSpacingCommon
;
/* IDENTIFIER_DCI_FORMATS */
/* IDENTIFIER_DCI_FORMATS */
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
nr_ue_process_dci_freq_dom_resource_assignment
(
NULL
,
dlsch_config_pdu_1_0
,
0
,
n_RB_DLBWP
,
dci
->
frequency_domain_assignment
.
val
);
// TODO: Check if dlsch_config_pdu_1_0->BWPSize is correct
nr_ue_process_dci_freq_dom_resource_assignment
(
NULL
,
dlsch_config_pdu_1_0
,
0
,
dlsch_config_pdu_1_0
->
BWPSize
,
dci
->
frequency_domain_assignment
.
val
);
printf
(
"==== dlsch_config_pdu_1_0,dci->time_domain_assignment.val = %i
\n
"
,
dci
->
time_domain_assignment
.
val
);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
/* TIME_DOM_RESOURCE_ASSIGNMENT */
if
(
nr_ue_process_dci_time_dom_resource_assignment
(
mac
,
NULL
,
dlsch_config_pdu_1_0
,
dci
->
time_domain_assignment
.
val
)
<
0
)
if
(
nr_ue_process_dci_time_dom_resource_assignment
(
mac
,
NULL
,
dlsch_config_pdu_1_0
,
dci
->
time_domain_assignment
.
val
)
<
0
)
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
View file @
17312d68
...
@@ -164,7 +164,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
...
@@ -164,7 +164,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
gNB_xtra_byte
|=
((
gNB
->
pbch
.
pbch_a
>>
(
31
-
i
))
&
1
)
<<
(
7
-
i
);
gNB_xtra_byte
|=
((
gNB
->
pbch
.
pbch_a
>>
(
31
-
i
))
&
1
)
<<
(
7
-
i
);
}
}
get_type0_PDCCH_CSS_config_parameters
(
&
gNB_mac
->
type0_PDCCH_CSS_config
,
mib
,
gNB_xtra_byte
,
frame_parms
->
Lmax
,
get_type0_PDCCH_CSS_config_parameters
(
&
gNB_mac
->
type0_PDCCH_CSS_config
,
mib
,
gNB_xtra_byte
,
frame_parms
->
Lmax
,
frame_parms
->
ssb_index
);
frame_parms
->
ssb_index
,
frame_parms
->
ssb_start_subcarrier
/
NR_NB_SC_PER_RB
);
}
}
void
schedule_control_sib1
(
module_id_t
module_id
,
void
schedule_control_sib1
(
module_id_t
module_id
,
...
@@ -229,6 +229,7 @@ void schedule_control_sib1(module_id_t module_id,
...
@@ -229,6 +229,7 @@ void schedule_control_sib1(module_id_t module_id,
// Calculate number of symbols
// Calculate number of symbols
struct
NR_PDSCH_TimeDomainResourceAllocationList
*
tdaList
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
;
struct
NR_PDSCH_TimeDomainResourceAllocationList
*
tdaList
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
;
//tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength = 53;
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
gNB_mac
->
sched_ctrlCommon
->
time_domain_allocation
]
->
startSymbolAndLength
;
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
gNB_mac
->
sched_ctrlCommon
->
time_domain_allocation
]
->
startSymbolAndLength
;
int
startSymbolIndex
,
nrOfSymbols
;
int
startSymbolIndex
,
nrOfSymbols
;
SLIV2SL
(
startSymbolAndLength
,
&
startSymbolIndex
,
&
nrOfSymbols
);
SLIV2SL
(
startSymbolAndLength
,
&
startSymbolIndex
,
&
nrOfSymbols
);
...
@@ -245,11 +246,14 @@ void schedule_control_sib1(module_id_t module_id,
...
@@ -245,11 +246,14 @@ void schedule_control_sib1(module_id_t module_id,
rbSize
,
nrOfSymbols
,
N_PRB_DMRS
,
0
,
0
,
1
)
>>
3
;
rbSize
,
nrOfSymbols
,
N_PRB_DMRS
,
0
,
0
,
1
)
>>
3
;
}
while
(
rbStart
+
rbSize
<
bwpSize
&&
!
vrb_map
[
rbStart
+
rbSize
]
&&
TBS
<
gNB_mac
->
sched_ctrlCommon
->
num_total_bytes
);
}
while
(
rbStart
+
rbSize
<
bwpSize
&&
!
vrb_map
[
rbStart
+
rbSize
]
&&
TBS
<
gNB_mac
->
sched_ctrlCommon
->
num_total_bytes
);
gNB_mac
->
sched_ctrlCommon
->
rbSize
=
rbSize
;
gNB_mac
->
sched_ctrlCommon
->
rbSize
=
rbSize
;
gNB_mac
->
sched_ctrlCommon
->
rbStart
=
rbStart
;
if
(
rbStart
>=
gNB_mac
->
type0_PDCCH_CSS_config
.
cset_start_rb
)
{
gNB_mac
->
sched_ctrlCommon
->
rbStart
=
rbStart
-
gNB_mac
->
type0_PDCCH_CSS_config
.
cset_start_rb
;
}
// Mark the corresponding RBs as used
// Mark the corresponding RBs as used
for
(
int
rb
=
0
;
rb
<
gNB_mac
->
sched_ctrlCommon
->
rbSize
;
rb
++
)
{
for
(
int
rb
=
0
;
rb
<
gNB_mac
->
sched_ctrlCommon
->
rbSize
;
rb
++
)
{
vrb_map
[
rb
+
gNB_mac
->
sched_ctrlCommon
->
rbStart
]
=
1
;
vrb_map
[
rb
+
rbStart
]
=
1
;
}
}
}
}
...
@@ -303,7 +307,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
...
@@ -303,7 +307,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15
->
dataScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
dataScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
nrOfLayers
=
1
;
pdsch_pdu_rel15
->
nrOfLayers
=
1
;
pdsch_pdu_rel15
->
transmissionScheme
=
0
;
pdsch_pdu_rel15
->
transmissionScheme
=
0
;
pdsch_pdu_rel15
->
refPoint
=
0
;
// Point A
pdsch_pdu_rel15
->
refPoint
=
0
;
// Point A
FIXME 1
pdsch_pdu_rel15
->
dmrsConfigType
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
==
NULL
?
0
:
1
;
pdsch_pdu_rel15
->
dmrsConfigType
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
==
NULL
?
0
:
1
;
pdsch_pdu_rel15
->
dlDmrsScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
dlDmrsScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
SCID
=
0
;
pdsch_pdu_rel15
->
SCID
=
0
;
...
@@ -312,7 +316,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
...
@@ -312,7 +316,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15
->
resourceAlloc
=
1
;
pdsch_pdu_rel15
->
resourceAlloc
=
1
;
pdsch_pdu_rel15
->
rbStart
=
gNB_mac
->
sched_ctrlCommon
->
rbStart
;
pdsch_pdu_rel15
->
rbStart
=
gNB_mac
->
sched_ctrlCommon
->
rbStart
;
pdsch_pdu_rel15
->
rbSize
=
gNB_mac
->
sched_ctrlCommon
->
rbSize
;
pdsch_pdu_rel15
->
rbSize
=
gNB_mac
->
sched_ctrlCommon
->
rbSize
;
pdsch_pdu_rel15
->
VRBtoPRBMapping
=
0
;
pdsch_pdu_rel15
->
VRBtoPRBMapping
=
1
;
// FIXME 0
pdsch_pdu_rel15
->
qamModOrder
[
0
]
=
nr_get_Qm_dl
(
gNB_mac
->
sched_ctrlCommon
->
mcs
,
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
);
pdsch_pdu_rel15
->
qamModOrder
[
0
]
=
nr_get_Qm_dl
(
gNB_mac
->
sched_ctrlCommon
->
mcs
,
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
);
pdsch_pdu_rel15
->
TBSize
[
0
]
=
TBS
;
pdsch_pdu_rel15
->
TBSize
[
0
]
=
TBS
;
pdsch_pdu_rel15
->
mcsTable
[
0
]
=
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
;
pdsch_pdu_rel15
->
mcsTable
[
0
]
=
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
;
...
@@ -321,6 +325,10 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
...
@@ -321,6 +325,10 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
scc
->
dmrs_TypeA_Position
,
pdsch_pdu_rel15
->
NrOfSymbols
);
pdsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
scc
->
dmrs_TypeA_Position
,
pdsch_pdu_rel15
->
NrOfSymbols
);
printf
(
"oooo scc->dmrs_TypeA_Position = %li
\n
"
,
scc
->
dmrs_TypeA_Position
);
dci_pdu_rel15_t
dci_pdu_rel15
[
MAX_DCI_CORESET
];
dci_pdu_rel15_t
dci_pdu_rel15
[
MAX_DCI_CORESET
];
memset
(
dci_pdu_rel15
,
0
,
sizeof
(
dci_pdu_rel15_t
)
*
MAX_DCI_CORESET
);
memset
(
dci_pdu_rel15
,
0
,
sizeof
(
dci_pdu_rel15_t
)
*
MAX_DCI_CORESET
);
...
@@ -332,10 +340,11 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
...
@@ -332,10 +340,11 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15
->
rbStart
,
pdsch_pdu_rel15
->
rbStart
,
NRRIV2BW
(
bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
));
NRRIV2BW
(
bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
));
printf
(
"==== pdsch_pdu_rel15->rbSize = %i
\n
"
,
pdsch_pdu_rel15
->
rbSize
);
printf
(
"==== pdsch_pdu_rel15->rbSize = %i
\n
"
,
pdsch_pdu_rel15
->
rbSize
);
printf
(
"==== pdsch_pdu_rel15->rbStart = %i
\n
"
,
pdsch_pdu_rel15
->
rbStart
);
printf
(
"==== pdsch_pdu_rel15->rbStart = %i
\n
"
,
pdsch_pdu_rel15
->
rbStart
);
printf
(
"==== BW = %i
\n
"
,
NRRIV2BW
(
bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
));
printf
(
"==== BW = %i
\n
"
,
NRRIV2BW
(
bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
));
printf
(
"==== RIV = %i
\n
"
,
dci_pdu_rel15
[
0
].
frequency_domain_assignment
.
val
);
dci_pdu_rel15
[
0
].
time_domain_assignment
.
val
=
gNB_mac
->
sched_ctrlCommon
->
time_domain_allocation
;
dci_pdu_rel15
[
0
].
time_domain_assignment
.
val
=
gNB_mac
->
sched_ctrlCommon
->
time_domain_allocation
;
...
@@ -369,6 +378,24 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
...
@@ -369,6 +378,24 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
fill_dci_pdu_rel15
(
scc
,
secondaryCellGroup
,
pdcch_pdu_rel15
,
dci_pdu_rel15
,
dci_formats
,
rnti_types
,
pdsch_pdu_rel15
->
BWPSize
,
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Id
);
fill_dci_pdu_rel15
(
scc
,
secondaryCellGroup
,
pdcch_pdu_rel15
,
dci_pdu_rel15
,
dci_formats
,
rnti_types
,
pdsch_pdu_rel15
->
BWPSize
,
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Id
);
dl_req
->
nPDUs
+=
2
;
dl_req
->
nPDUs
+=
2
;
printf
(
"
\n
===================================================
\n
"
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->BWPSize: %i
\n
"
,
pdcch_pdu_rel15
->
BWPSize
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->BWPStart: %i
\n
"
,
pdcch_pdu_rel15
->
BWPStart
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->SubcarrierSpacing: %i
\n
"
,
pdcch_pdu_rel15
->
SubcarrierSpacing
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->CyclicPrefix: %i
\n
"
,
pdcch_pdu_rel15
->
CyclicPrefix
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->StartSymbolIndex: %i
\n
"
,
pdcch_pdu_rel15
->
StartSymbolIndex
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->DurationSymbols: %i
\n
"
,
pdcch_pdu_rel15
->
DurationSymbols
);
for
(
int
n
=
0
;
n
<
6
;
n
++
)
LOG_I
(
MAC
,
"pdcch_pdu_rel15->FreqDomainResource[%i]: %x
\n
"
,
n
,
pdcch_pdu_rel15
->
FreqDomainResource
[
n
]);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->CceRegMappingType: %i
\n
"
,
pdcch_pdu_rel15
->
CceRegMappingType
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->RegBundleSize: %i
\n
"
,
pdcch_pdu_rel15
->
RegBundleSize
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->InterleaverSize: %i
\n
"
,
pdcch_pdu_rel15
->
InterleaverSize
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->CoreSetType: %i
\n
"
,
pdcch_pdu_rel15
->
CoreSetType
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->ShiftIndex: %i
\n
"
,
pdcch_pdu_rel15
->
ShiftIndex
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->precoderGranularity: %i
\n
"
,
pdcch_pdu_rel15
->
precoderGranularity
);
LOG_I
(
MAC
,
"pdcch_pdu_rel15->numDlDci: %i
\n
"
,
pdcch_pdu_rel15
->
numDlDci
);
printf
(
"
\n
===================================================
\n
"
);
}
}
void
schedule_nr_sib1
(
module_id_t
module_idP
,
frame_t
frameP
,
sub_frame_t
slotP
)
{
void
schedule_nr_sib1
(
module_id_t
module_idP
,
frame_t
frameP
,
sub_frame_t
slotP
)
{
...
@@ -401,9 +428,14 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
...
@@ -401,9 +428,14 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
// Calculate number of symbols
// Calculate number of symbols
int
startSymbolIndex
,
nrOfSymbols
;
int
startSymbolIndex
,
nrOfSymbols
;
struct
NR_PDSCH_TimeDomainResourceAllocationList
*
tdaList
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
;
struct
NR_PDSCH_TimeDomainResourceAllocationList
*
tdaList
=
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
;
//tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength = 53;
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
gNB_mac
->
sched_ctrlCommon
->
time_domain_allocation
]
->
startSymbolAndLength
;
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
gNB_mac
->
sched_ctrlCommon
->
time_domain_allocation
]
->
startSymbolAndLength
;
SLIV2SL
(
startSymbolAndLength
,
&
startSymbolIndex
,
&
nrOfSymbols
);
SLIV2SL
(
startSymbolAndLength
,
&
startSymbolIndex
,
&
nrOfSymbols
);
printf
(
"oooo SLIV = %i
\n
"
,
startSymbolAndLength
);
printf
(
"oooo startSymbolIndex = %i
\n
"
,
startSymbolIndex
);
printf
(
"oooo nrOfSymbols = %i
\n
"
,
nrOfSymbols
);
//startSymbolIndex = 3;
//startSymbolIndex = 3;
//nrOfSymbols = 12;
//nrOfSymbols = 12;
...
...
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