Commit 2177e83c authored by rmagueta's avatar rmagueta

Coreset0 / SIB1 configured using the computed BWP considering the 3GPP.

parent 461406ab
...@@ -53,7 +53,7 @@ gNBs = ...@@ -53,7 +53,7 @@ gNBs =
#initialDownlinkBWP #initialDownlinkBWP
#genericParameters #genericParameters
# this is RBstart=41,L=24 (275*(L-1))+RBstart # this is RBstart=41,L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 12956; #12925; 12956 28875 6366 initialDLBWPlocationAndBandwidth = 28875; # 6366 12925 12956 28875
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1; initialDLBWPsubcarrierSpacing = 1;
...@@ -66,13 +66,13 @@ gNBs = ...@@ -66,13 +66,13 @@ gNBs =
#initialULBWPmappingType #initialULBWPmappingType
#0=typeA,1=typeB #0=typeA,1=typeB
initialDLBWPmappingType_0 = 0; initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13 #this is SS=2,L=12
initialDLBWPstartSymbolAndLength_0 = 40; initialDLBWPstartSymbolAndLength_0 = 53;
initialDLBWPk0_1 = 0; initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0; initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12 #this is SS=1,L=13
initialDLBWPstartSymbolAndLength_1 = 53; initialDLBWPstartSymbolAndLength_1 = 40;
initialDLBWPk0_2 = 0; initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0; initialDLBWPmappingType_2 = 0;
......
...@@ -88,18 +88,9 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, ...@@ -88,18 +88,9 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset); get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB; cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB;
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) { if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) {
// cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB; cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB;
gNB_MAC_INST *gNB_mac = RC.nrmac[gNB->Mod_id];
int BWPStart = NRRIV2PRBOFFSET(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
cset_start_sc = cset_start_sc + BWPStart*NR_NB_SC_PER_RB;
} }
printf("==== cset_start_sc = %i\n", cset_start_sc);
printf("==== frame_parms.first_carrier_offset = %i\n", frame_parms.first_carrier_offset);
printf("==== rb_offset = %i\n", rb_offset);
printf("==== RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb = %i\n", RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb);
for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) { for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
/*The coreset is initialised /*The coreset is initialised
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0 * in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
......
...@@ -272,12 +272,6 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB, ...@@ -272,12 +272,6 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart+rel15->BWPStart)*NR_NB_SC_PER_RB; uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart+rel15->BWPStart)*NR_NB_SC_PER_RB;
printf("nr_dlsch: rel15->BWPStart = %i\n", rel15->BWPStart);
printf("nr_dlsch: rel15->rbStart = %i\n", rel15->rbStart);
printf("nr_dlsch: frame_parms->first_carrier_offset = %i\n", frame_parms->first_carrier_offset);
printf("nr_dlsch: start_sc = %i\n", start_sc);
if (start_sc >= frame_parms->ofdm_symbol_size) if (start_sc >= frame_parms->ofdm_symbol_size)
start_sc -= frame_parms->ofdm_symbol_size; start_sc -= frame_parms->ofdm_symbol_size;
......
...@@ -605,8 +605,6 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -605,8 +605,6 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
ret = 1 + dlsch->max_ldpc_iterations; ret = 1 + dlsch->max_ldpc_iterations;
} }
getchar();
nb_total_decod++; nb_total_decod++;
if (no_iteration_ldpc > dlsch->max_ldpc_iterations){ if (no_iteration_ldpc > dlsch->max_ldpc_iterations){
nb_error_decod++; nb_error_decod++;
......
This diff is collapsed.
...@@ -443,10 +443,9 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){ ...@@ -443,10 +443,9 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){
mac->coreset0->frequencyDomainResources.size = 6; mac->coreset0->frequencyDomainResources.size = 6;
mac->coreset0->frequencyDomainResources.bits_unused = 3; mac->coreset0->frequencyDomainResources.bits_unused = 3;
mac->coreset0->duration = 1; mac->coreset0->duration = 1;
//mac->coreset0->cce_REG_MappingType.present = NR_ControlResourceSet__cce_REG_MappingType_PR_nonInterleaved; // FIXME: Interleaved
mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved)); mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved));
mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2; mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = 0; //scc->physCellId; mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = 0; // FIXME: mac->scc->physCellId;
mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle; mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
if(mac->coreset0->tci_StatesPDCCH_ToAddList == NULL) mac->coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*mac->coreset0->tci_StatesPDCCH_ToAddList)); if(mac->coreset0->tci_StatesPDCCH_ToAddList == NULL) mac->coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*mac->coreset0->tci_StatesPDCCH_ToAddList));
NR_TCI_StateId_t *tci[8]; NR_TCI_StateId_t *tci[8];
......
...@@ -170,24 +170,10 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -170,24 +170,10 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = 0xFFFF; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values rel15->rnti = 0xFFFF; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
rel15->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
//rel15->BWPSize = NRRIV2BW(bwp_Common->genericParameters.locationAndBandwidth, 275);
//rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275);
//rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
//rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
//rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
//rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
printf("nr_ue_dci_configuration: rnti = %i\n", rel15->rnti);
printf("nr_ue_dci_configuration: BWPSize = %i\n", rel15->BWPSize);
printf("nr_ue_dci_configuration: BWPStart = %i\n", rel15->BWPStart);
printf("nr_ue_dci_configuration: SubcarrierSpacing = %i\n", rel15->SubcarrierSpacing);
for (int i = 0; i < rel15->num_dci_options; i++) { for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->dci_length_options[i] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0); rel15->dci_length_options[i] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0);
} }
......
...@@ -2712,9 +2712,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, ...@@ -2712,9 +2712,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
dlsch_config_pdu->start_symbol=S; dlsch_config_pdu->start_symbol=S;
dlsch_config_pdu->number_symbols=L; dlsch_config_pdu->number_symbols=L;
LOG_D(MAC,"SLIV = %i\n", startSymbolAndLength); LOG_I(MAC,"SLIV = %i\n", startSymbolAndLength);
LOG_D(MAC,"start_symbol = %i\n", dlsch_config_pdu->start_symbol); LOG_I(MAC,"start_symbol = %i\n", dlsch_config_pdu->start_symbol);
LOG_D(MAC,"number_symbols = %i\n", dlsch_config_pdu->number_symbols); LOG_I(MAC,"number_symbols = %i\n", dlsch_config_pdu->number_symbols);
} }
else {// Default configuration from tables else {// Default configuration from tables
...@@ -3247,28 +3247,28 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc ...@@ -3247,28 +3247,28 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
NR_ServingCellConfigCommon_t *scc = mac->scc; NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP; NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP;
if (mac->RA_window_cnt >= 0 && rnti == mac->ra_rnti){
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH;
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
}
//dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); else if(rnti == SI_RNTI) {
//dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH;
//dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
//dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs; dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
//dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb; }
//dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; else {
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
printf("nr_ue_procedures: rnti = %i\n", rnti); dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
printf("nr_ue_procedures: BWPSize = %i\n", dlsch_config_pdu_1_0->BWPSize); dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
printf("nr_ue_procedures: BWPStart = %i\n", dlsch_config_pdu_1_0->BWPStart); dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
printf("nr_ue_procedures: SubcarrierSpacing = %i\n", dlsch_config_pdu_1_0->SubcarrierSpacing); }
/* IDENTIFIER_DCI_FORMATS */ /* IDENTIFIER_DCI_FORMATS */
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
// TODO: Check if dlsch_config_pdu_1_0->BWPSize is correct
nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,dlsch_config_pdu_1_0->BWPSize,dci->frequency_domain_assignment.val); nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,dlsch_config_pdu_1_0->BWPSize,dci->frequency_domain_assignment.val);
//nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->frequency_domain_assignment.val);
/* TIME_DOM_RESOURCE_ASSIGNMENT */ /* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val) < 0) if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val) < 0)
...@@ -3349,16 +3349,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc ...@@ -3349,16 +3349,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
dlsch_config_pdu_1_0->pucch_resource_id, dlsch_config_pdu_1_0->pucch_resource_id,
dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind); dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind);
if (mac->RA_window_cnt >= 0 && rnti == mac->ra_rnti){
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH;
}
else if(rnti == SI_RNTI) {
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH;
}
else {
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
}
// dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP;
LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type); LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
...@@ -3640,9 +3630,6 @@ void nr_ue_send_sdu(module_id_t module_idP, ...@@ -3640,9 +3630,6 @@ void nr_ue_send_sdu(module_id_t module_idP,
// N_RB configuration according to 7.3.1.0 (DCI size alignment) of TS 38.212 // N_RB configuration according to 7.3.1.0 (DCI size alignment) of TS 38.212
int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
int N_RB = 0, start_RB; int N_RB = 0, start_RB;
switch(rnti_type) { switch(rnti_type) {
case NR_RNTI_RA: case NR_RNTI_RA:
...@@ -3659,7 +3646,7 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){ ...@@ -3659,7 +3646,7 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
} }
break; break;
case NR_RNTI_SI: case NR_RNTI_SI:
N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); N_RB = mac->type0_PDCCH_CSS_config.num_rbs;
break; break;
case NR_RNTI_C: case NR_RNTI_C:
N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, 275); N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, 275);
......
...@@ -186,13 +186,10 @@ void schedule_control_sib1(module_id_t module_id, ...@@ -186,13 +186,10 @@ void schedule_control_sib1(module_id_t module_id,
gNB_mac->sched_ctrlCommon->coreset = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->coreset)); gNB_mac->sched_ctrlCommon->coreset = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->coreset));
gNB_mac->sched_ctrlCommon->active_bwp = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->active_bwp)); gNB_mac->sched_ctrlCommon->active_bwp = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->active_bwp));
fill_default_searchSpaceZero(gNB_mac->sched_ctrlCommon->search_space); fill_default_searchSpaceZero(gNB_mac->sched_ctrlCommon->search_space);
fill_default_coresetZero(gNB_mac->sched_ctrlCommon->coreset); fill_default_coresetZero(gNB_mac->sched_ctrlCommon->coreset,servingcellconfigcommon);
fill_default_initialDownlinkBWP(gNB_mac->sched_ctrlCommon->active_bwp,servingcellconfigcommon); fill_default_initialDownlinkBWP(gNB_mac->sched_ctrlCommon->active_bwp,servingcellconfigcommon);
} }
//gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->genericParameters.locationAndBandwidth =
// gNB_mac->secondaryCellGroupCommon->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.locationAndBandwidth;
gNB_mac->sched_ctrlCommon->time_domain_allocation = time_domain_allocation; gNB_mac->sched_ctrlCommon->time_domain_allocation = time_domain_allocation;
gNB_mac->sched_ctrlCommon->mcsTableIdx = mcsTableIdx; gNB_mac->sched_ctrlCommon->mcsTableIdx = mcsTableIdx;
gNB_mac->sched_ctrlCommon->mcs = mcs; gNB_mac->sched_ctrlCommon->mcs = mcs;
...@@ -215,27 +212,21 @@ void schedule_control_sib1(module_id_t module_id, ...@@ -215,27 +212,21 @@ void schedule_control_sib1(module_id_t module_id,
return; return;
} }
const uint16_t bwpSize = NRRIV2BW(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275); const uint16_t bwpSize = gNB_mac->type0_PDCCH_CSS_config.num_rbs;
int rbStart = NRRIV2PRBOFFSET(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275); int rbStart = gNB_mac->type0_PDCCH_CSS_config.cset_start_rb;
printf("====== rel15->BWPSize = %i\n", bwpSize);
printf("====== rel15->BWPStart = %i\n", rbStart);
// Freq-domain allocation
while (rbStart < bwpSize && vrb_map[rbStart]) rbStart++;
// Calculate number of PRB_DMRS // Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6; uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
// Calculate number of symbols // Calculate number of symbols
struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
//tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength = 53;
const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength; const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength;
int startSymbolIndex, nrOfSymbols; int startSymbolIndex, nrOfSymbols;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
//startSymbolIndex = 3; LOG_I(MAC,"SLIV = %i\n", startSymbolAndLength);
//nrOfSymbols = 12; LOG_I(MAC,"startSymbolIndex = %i\n", startSymbolIndex);
LOG_I(MAC,"nrOfSymbols = %i\n", nrOfSymbols);
int rbSize = 0; int rbSize = 0;
uint32_t TBS = 0; uint32_t TBS = 0;
...@@ -246,16 +237,12 @@ void schedule_control_sib1(module_id_t module_id, ...@@ -246,16 +237,12 @@ void schedule_control_sib1(module_id_t module_id,
rbSize, nrOfSymbols, N_PRB_DMRS,0, 0,1) >> 3; rbSize, nrOfSymbols, N_PRB_DMRS,0, 0,1) >> 3;
} while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize] && TBS < gNB_mac->sched_ctrlCommon->num_total_bytes); } while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize] && TBS < gNB_mac->sched_ctrlCommon->num_total_bytes);
gNB_mac->sched_ctrlCommon->rbSize = rbSize; gNB_mac->sched_ctrlCommon->rbSize = rbSize;
gNB_mac->sched_ctrlCommon->rbStart = 0;
if(rbStart >= gNB_mac->type0_PDCCH_CSS_config.cset_start_rb) {
gNB_mac->sched_ctrlCommon->rbStart = rbStart - gNB_mac->type0_PDCCH_CSS_config.cset_start_rb;
}
// Mark the corresponding RBs as used // Mark the corresponding RBs as used
for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->rbSize; rb++) { for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->rbSize; rb++) {
vrb_map[rb + rbStart] = 1; vrb_map[rb + rbStart] = 1;
} }
} }
void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
...@@ -289,8 +276,9 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, ...@@ -289,8 +276,9 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15->rnti = SI_RNTI; pdsch_pdu_rel15->rnti = SI_RNTI;
pdsch_pdu_rel15->pduIndex = gNB_mac->pdu_index[0]++; pdsch_pdu_rel15->pduIndex = gNB_mac->pdu_index[0]++;
pdsch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275); pdsch_pdu_rel15->BWPSize = gNB_mac->type0_PDCCH_CSS_config.num_rbs;
pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275); pdsch_pdu_rel15->BWPStart = gNB_mac->type0_PDCCH_CSS_config.cset_start_rb;
pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing; pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
if (bwp->bwp_Common->genericParameters.cyclicPrefix) { if (bwp->bwp_Common->genericParameters.cyclicPrefix) {
pdsch_pdu_rel15->CyclicPrefix = *bwp->bwp_Common->genericParameters.cyclicPrefix; pdsch_pdu_rel15->CyclicPrefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
...@@ -334,13 +322,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, ...@@ -334,13 +322,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
dci_pdu_rel15[0].frequency_domain_assignment.val = dci_pdu_rel15[0].frequency_domain_assignment.val =
PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize, PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
pdsch_pdu_rel15->rbStart, pdsch_pdu_rel15->rbStart,
NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275)); gNB_mac->type0_PDCCH_CSS_config.num_rbs);
printf("==== pdsch_pdu_rel15->rbSize = %i\n", pdsch_pdu_rel15->rbSize);
printf("==== pdsch_pdu_rel15->rbStart = %i\n", pdsch_pdu_rel15->rbStart);
printf("==== BW = %i\n", NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275));
printf("==== RIV = %i\n", dci_pdu_rel15[0].frequency_domain_assignment.val);
dci_pdu_rel15[0].time_domain_assignment.val = gNB_mac->sched_ctrlCommon->time_domain_allocation; dci_pdu_rel15[0].time_domain_assignment.val = gNB_mac->sched_ctrlCommon->time_domain_allocation;
dci_pdu_rel15[0].mcs = gNB_mac->sched_ctrlCommon->mcs; dci_pdu_rel15[0].mcs = gNB_mac->sched_ctrlCommon->mcs;
...@@ -380,7 +362,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, ...@@ -380,7 +362,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
LOG_D(MAC,"CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix); LOG_D(MAC,"CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix);
LOG_D(MAC,"StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex); LOG_D(MAC,"StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex);
LOG_D(MAC,"DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols); LOG_D(MAC,"DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols);
for(int n=0;n<6;n++) LOG_I(MAC,"FreqDomainResource[%i]: %x\n",n, pdcch_pdu_rel15->FreqDomainResource[n]); for(int n=0;n<6;n++) LOG_D(MAC,"FreqDomainResource[%i]: %x\n",n, pdcch_pdu_rel15->FreqDomainResource[n]);
LOG_D(MAC,"CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType); LOG_D(MAC,"CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType);
LOG_D(MAC,"RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize); LOG_D(MAC,"RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize);
LOG_D(MAC,"InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize); LOG_D(MAC,"InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize);
...@@ -397,14 +379,14 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -397,14 +379,14 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
// static values // static values
const int CC_id = 0; const int CC_id = 0;
int time_domain_allocation = 2; int time_domain_allocation = 0;
uint8_t mcsTableIdx = 0; uint8_t mcsTableIdx = 0;
uint8_t mcs = 0; uint8_t mcs = 0;
uint8_t numDmrsCdmGrpsNoData = 1; uint8_t numDmrsCdmGrpsNoData = 1;
gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP]; gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
if( (frameP%2 == gNB_mac->type0_PDCCH_CSS_config.sfn_c) && (slotP == gNB_mac->type0_PDCCH_CSS_config.n_0 ) ) { if( (frameP%2 == gNB_mac->type0_PDCCH_CSS_config.sfn_c) && (slotP == gNB_mac->type0_PDCCH_CSS_config.n_0) && (gNB_mac->type0_PDCCH_CSS_config.num_rbs > 0) ) {
LOG_D(MAC,"> SIB1 transmission\n"); LOG_D(MAC,"> SIB1 transmission\n");
...@@ -421,17 +403,9 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -421,17 +403,9 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
// Calculate number of symbols // Calculate number of symbols
int startSymbolIndex, nrOfSymbols; int startSymbolIndex, nrOfSymbols;
struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
//tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength = 53;
const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength; const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
printf("oooo SLIV = %i\n", startSymbolAndLength);
printf("oooo startSymbolIndex = %i\n", startSymbolIndex);
printf("oooo nrOfSymbols = %i\n", nrOfSymbols);
//startSymbolIndex = 3;
//nrOfSymbols = 12;
// Calculate number of PRB_DMRS // Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6; uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
...@@ -439,10 +413,6 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -439,10 +413,6 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx), nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx),
gNB_mac->sched_ctrlCommon->rbSize, nrOfSymbols, N_PRB_DMRS,0 ,0 ,1 ) >> 3; gNB_mac->sched_ctrlCommon->rbSize, nrOfSymbols, N_PRB_DMRS,0 ,0 ,1 ) >> 3;
printf("TBS = %i\n", TBS);
printf("gNB_mac->sched_ctrlCommon->rbSize = %i\n", gNB_mac->sched_ctrlCommon->rbSize);
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body; nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, TBS, startSymbolIndex, nrOfSymbols); nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, TBS, startSymbolIndex, nrOfSymbols);
...@@ -460,9 +430,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -460,9 +430,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
gNB_mac->TX_req[CC_id].Number_of_PDUs++; gNB_mac->TX_req[CC_id].Number_of_PDUs++;
gNB_mac->TX_req[CC_id].SFN = frameP; gNB_mac->TX_req[CC_id].SFN = frameP;
gNB_mac->TX_req[CC_id].Slot = slotP; gNB_mac->TX_req[CC_id].Slot = slotP;
} }
} }
...@@ -73,7 +73,7 @@ void rrc_remove_nsa_user(gNB_RRC_INST *rrc, int rnti); ...@@ -73,7 +73,7 @@ void rrc_remove_nsa_user(gNB_RRC_INST *rrc, int rnti);
void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon); void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0); void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0); void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0);
......
...@@ -73,7 +73,7 @@ void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfi ...@@ -73,7 +73,7 @@ void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfi
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0; *bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0;
} }
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0) { void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon) {
coreset0->controlResourceSetId = 0; coreset0->controlResourceSetId = 0;
...@@ -88,10 +88,9 @@ void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0) { ...@@ -88,10 +88,9 @@ void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0) {
coreset0->frequencyDomainResources.size = 6; coreset0->frequencyDomainResources.size = 6;
coreset0->frequencyDomainResources.bits_unused = 3; coreset0->frequencyDomainResources.bits_unused = 3;
coreset0->duration = 1; coreset0->duration = 1;
//coreset0->cce_REG_MappingType.present = NR_ControlResourceSet__cce_REG_MappingType_PR_nonInterleaved; // FIXME: Interleaved
coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*coreset0->cce_REG_MappingType.choice.interleaved)); coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*coreset0->cce_REG_MappingType.choice.interleaved));
coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2; coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = 0; //scc->physCellId; coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = servingcellconfigcommon->physCellId;
coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle; coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
if(coreset0->tci_StatesPDCCH_ToAddList == NULL) coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*coreset0->tci_StatesPDCCH_ToAddList)); if(coreset0->tci_StatesPDCCH_ToAddList == NULL) coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*coreset0->tci_StatesPDCCH_ToAddList));
......
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