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canghaiwuhen
OpenXG-RAN
Commits
2bee4f49
Commit
2bee4f49
authored
Jun 16, 2020
by
Sakthivel Velumani
Browse files
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Plain Diff
partial fix for pdsch dmrs issue
decoding performance degraded. still some issue to be solved.
parent
9add099c
Changes
4
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4 changed files
with
18 additions
and
10 deletions
+18
-10
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+1
-1
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+11
-1
openair1/SIMULATION/NR_PHY/dlsim.c
openair1/SIMULATION/NR_PHY/dlsim.c
+5
-4
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+1
-4
No files found.
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
View file @
2bee4f49
...
@@ -267,7 +267,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
...
@@ -267,7 +267,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t
dmrs_Type
=
harq_process
->
dmrsConfigType
;
uint8_t
dmrs_Type
=
harq_process
->
dmrsConfigType
;
AssertFatal
(
dmrs_Type
==
1
||
dmrs_Type
==
2
,
"Illegal dmrs_type %d
\n
"
,
dmrs_Type
);
AssertFatal
(
dmrs_Type
==
1
||
dmrs_Type
==
2
,
"Illegal dmrs_type %d
\n
"
,
dmrs_Type
);
uint8_t
nb_re_dmrs
=
12
;
//(dmrs_Type==1)?6:4;
uint8_t
nb_re_dmrs
=
(
dmrs_Type
==
1
)
?
6
:
4
;
// should be changed based on MAC parameters
uint16_t
dmrs_length
=
get_num_dmrs
(
harq_process
->
dlDmrsSymbPos
);
uint16_t
dmrs_length
=
get_num_dmrs
(
harq_process
->
dlDmrsSymbPos
);
AssertFatal
(
dmrs_length
==
1
||
dmrs_length
==
2
,
"Illegal dmrs_length %d
\n
"
,
dmrs_length
);
AssertFatal
(
dmrs_length
==
1
||
dmrs_length
==
2
,
"Illegal dmrs_length %d
\n
"
,
dmrs_length
);
...
...
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
2bee4f49
...
@@ -3091,7 +3091,17 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
...
@@ -3091,7 +3091,17 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
dlsch0
->
current_harq_pid
);
dlsch0
->
current_harq_pid
);
else
{
// This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS)
else
{
// This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS)
if
(
pdsch
==
RA_PDSCH
)
ue
->
pdsch_vars_ra
[
eNB_id
]
->
llr_offset
[
m
]
=
ue
->
pdsch_vars_ra
[
eNB_id
]
->
llr_offset
[
m
-
1
];
if
(
pdsch
==
RA_PDSCH
)
ue
->
pdsch_vars_ra
[
eNB_id
]
->
llr_offset
[
m
]
=
ue
->
pdsch_vars_ra
[
eNB_id
]
->
llr_offset
[
m
-
1
];
else
if
(
pdsch
==
PDSCH
)
ue
->
pdsch_vars
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
]
->
llr_offset
[
m
]
=
ue
->
pdsch_vars
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
]
->
llr_offset
[
m
-
1
];
else
if
(
pdsch
==
PDSCH
)
nr_rx_pdsch
(
ue
,
pdsch
,
eNB_id
,
eNB_id_i
,
proc
->
frame_rx
,
nr_tti_rx
,
// nr_tti_rx,
m
,
first_symbol_flag
,
dual_stream_UE
,
i_mod
,
dlsch0
->
current_harq_pid
);
else
AssertFatal
(
1
==
0
,
"not RA_PDSCH or PDSCH
\n
"
);
else
AssertFatal
(
1
==
0
,
"not RA_PDSCH or PDSCH
\n
"
);
}
}
if
(
pdsch
==
PDSCH
)
LOG_D
(
PHY
,
"Done processing symbol %d : llr_offset %d
\n
"
,
m
,
ue
->
pdsch_vars
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
]
->
llr_offset
[
m
]);
if
(
pdsch
==
PDSCH
)
LOG_D
(
PHY
,
"Done processing symbol %d : llr_offset %d
\n
"
,
m
,
ue
->
pdsch_vars
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
]
->
llr_offset
[
m
]);
...
...
openair1/SIMULATION/NR_PHY/dlsim.c
View file @
2bee4f49
...
@@ -736,7 +736,7 @@ int main(int argc, char **argv)
...
@@ -736,7 +736,7 @@ int main(int argc, char **argv)
NR_UE_DLSCH_t
*
dlsch0
=
UE
->
dlsch
[
UE
->
current_thread_id
[
UE_proc
.
nr_tti_rx
]][
0
][
0
];
NR_UE_DLSCH_t
*
dlsch0
=
UE
->
dlsch
[
UE
->
current_thread_id
[
UE_proc
.
nr_tti_rx
]][
0
][
0
];
int
harq_pid
=
dlsch0
->
current_harq_pid
;
int
harq_pid
=
slot
;
NR_DL_UE_HARQ_t
*
UE_harq_process
=
dlsch0
->
harq_processes
[
harq_pid
];
NR_DL_UE_HARQ_t
*
UE_harq_process
=
dlsch0
->
harq_processes
[
harq_pid
];
NR_gNB_DLSCH_t
*
gNB_dlsch
=
gNB
->
dlsch
[
0
][
0
];
NR_gNB_DLSCH_t
*
gNB_dlsch
=
gNB
->
dlsch
[
0
][
0
];
...
@@ -752,10 +752,11 @@ int main(int argc, char **argv)
...
@@ -752,10 +752,11 @@ int main(int argc, char **argv)
memset
(
RC
.
nrmac
[
0
]
->
cce_list
[
1
][
1
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
memset
(
RC
.
nrmac
[
0
]
->
cce_list
[
1
][
1
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
clear_nr_nfapi_information
(
RC
.
nrmac
[
0
],
0
,
frame
,
slot
);
clear_nr_nfapi_information
(
RC
.
nrmac
[
0
],
0
,
frame
,
slot
);
UE_list
->
UE_sched_ctrl
[
0
].
harq_processes
[
0
].
ndi
=
!
(
trial
&
1
);
UE_list
->
UE_sched_ctrl
[
0
].
harq_processes
[
harq_pid
].
ndi
=
!
(
trial
&
1
);
UE_list
->
UE_sched_ctrl
[
0
].
harq_processes
[
0
].
round
=
round
;
UE_list
->
UE_sched_ctrl
[
0
].
harq_processes
[
harq_pid
].
round
=
round
;
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
0
]
->
round
=
round
;
UE_list
->
UE_sched_ctrl
[
0
].
current_harq_pid
=
harq_pid
;
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
harq_pid
]
->
round
=
round
;
if
(
css_flag
==
0
)
nr_schedule_uss_dlsch_phytest
(
0
,
frame
,
slot
,
&
pucch_sched
,
&
dlsch_config
);
if
(
css_flag
==
0
)
nr_schedule_uss_dlsch_phytest
(
0
,
frame
,
slot
,
&
pucch_sched
,
&
dlsch_config
);
else
nr_schedule_css_dlsch_phytest
(
0
,
frame
,
slot
);
else
nr_schedule_css_dlsch_phytest
(
0
,
frame
,
slot
);
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @
2bee4f49
...
@@ -267,10 +267,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
...
@@ -267,10 +267,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
rel15
->
coreset
.
scrambling_rnti
=
mac
->
t_crnti
;
rel15
->
coreset
.
scrambling_rnti
=
mac
->
t_crnti
;
}
else
{
}
else
{
rel15
->
coreset
.
pdcch_dmrs_scrambling_id
=
*
scc
->
physCellId
;
rel15
->
coreset
.
pdcch_dmrs_scrambling_id
=
*
scc
->
physCellId
;
if
(
mac
->
ra_state
==
WAIT_RAR
)
rel15
->
coreset
.
scrambling_rnti
=
0
;
rel15
->
coreset
.
scrambling_rnti
=
0
;
else
rel15
->
coreset
.
scrambling_rnti
=
rel15
->
rnti
;
}
}
if
(
add_dci
){
if
(
add_dci
){
...
...
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