Commit 302e4c57 authored by Nick Ho's avatar Nick Ho

NB_generate_dci_top skeleton, code not compiled

parent 6f4d5db7
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.0 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/LTE_TRANSPORT/dci.c
* \brief Implements PDCCH physical channel TX/RX procedures (36.211) and DCI encoding/decoding (36.212/36.213). Current LTE compliance V8.6 2009-03.
* \author R. Knopp
* \date 2011
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#ifdef USER_MODE
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#endif
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "SCHED/defs.h"
#include "SIMULATION/TOOLS/defs.h" // for taus
#include "PHY/sse_intrin.h"
#include "assertions.h"
#include "T.h"
uint8_t generate_dci_top_NB(uint8_t Num_dci,
DCI_ALLOC_t *dci_alloc,
uint32_t n_rnti,
int16_t amp,
LTE_DL_FRAME_PARMS *frame_parms,
//NB_IoT_eNB_NPDCCH_t npdcch,
int32_t **txdataF,
uint32_t subframe)
{
uint8_t *e_ptr,num_pdcch_symbols;
int8_t L;
uint32_t i, lprime;
uint32_t gain_lin_QPSK,kprime,kprime_mod12,mprime,nsymb,symbol_offset,tti_offset;
int16_t re_offset;
uint8_t mi = get_mi(frame_parms,subframe);
static uint8_t e[DCI_BITS_MAX];
static int32_t yseq0[Msymb],yseq1[Msymb],wbar0[Msymb],wbar1[Msymb];
int32_t *y[2];
int32_t *wbar[2];
int nushiftmod3 = frame_parms->nushift%3;
int split_flag=0;
/*
**e_ptr : store the encoding result, and as a input to modulation
*num_pdcch_symbols : to calculate the resource allocation for pdcch
*L = aggregation level (there is 2 (at most) in NB-IoT) (Note this is not the real value but the index)
*lprime,kprime,kprime_mod12,mprime,nsymb,symbol_offset,tti_offset,re_offset : used in the REG allocation
*gain_lin_QPSK,yseq0[Msymb],yseq1[Msymb],*y[2] : used in the modulation
*mi = used in interleaving
*e = used to store the taus sequence (taus sequence is used to generate the first sequence for DCI)
*wbar used in the interleaving and also REG allocation
*/
//num_pdcch_symbols = get_num_pdcch_symbols(num_ue_spec_dci+num_common_dci,dci_alloc,frame_parms,subframe);
wbar[0] = &wbar0[0];
wbar[1] = &wbar1[0];
y[0] = &yseq0[0];
y[1] = &yseq1[0];
// reset all bits to <NIL>, here we set <NIL> elements as 2
// memset(e, 2, DCI_BITS_MAX);
// here we interpret NIL as a random QPSK sequence. That makes power estimation easier.
for (i=0; i<DCI_BITS_MAX; i++)
e[i]=taus()&1;
e_ptr = e;
// generate DCIs in order of decreasing aggregation level, then common/ue spec
// MAC is assumed to have ordered the UE spec DCI according to the RNTI-based randomization
// there is only 2 aggregation (0 = 1, 1 = 2)
for (L=1; L>=0; L--) {
for (i=0; i<Num_dci; i++) {
if (dci_alloc[i].L == (uint8_t)L) {
if (dci_alloc[i].firstCCE>=0) {
//encoding
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,e+(72*dci_alloc[i].firstCCE),dci_alloc[i].dci_length,dci_alloc[i].L,dci_alloc[i].rnti);
//new NB-IoT
npdcch_encoding_NB_IoT(
dci_alloc[i].dci_pdu,
frame_parms,
npdcch, //see when function dci_top is called
//no frame
subframe
//rm_stats, te_stats, i_stats
);
}
}
}
}
// Scrambling
//pdcch_scrambling(frame_parms,subframe,e,8*get_nquad(num_pdcch_symbols, frame_parms, mi));
//NB-IoT--------------------------
/*
* switch(npdcch_start_index)
* case 0
* G = 272
* case 1
* G = 248
* case 2
* G = 224
* case 3
* G = 200
*/
npdcch_scrambling_NB_IoT(
frame_parms,
npdcch,
//G,
//q = nf mod 2 (TS 36.211 ch 10.2.3.1) with nf = number of frame
//slot_id
);
//NB-IoT
npdcch_modulation_NB_IoT(
txdataF,
AMP,
frame_parms,
//no symbol
//npdcch0???
//RB_ID --> statically get from the higher layer (may included in the dl_frame params)
);
// This is the interleaving procedure defined in 36-211, first part of Section 6.8.5
//pdcch_interleaving(frame_parms,&y[0],&wbar[0],num_pdcch_symbols,mi);
//in NB-IoT the interleaving is done directly with the encoding procedure
//there is no interleaving because we don't apply turbo coding
// This is the REG allocation algorithm from 36-211, second part of Section 6.8.5
// there is a function to do the resource mapping function
return 0;
}
...@@ -74,7 +74,8 @@ int NB_generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB_NB *eNB, ...@@ -74,7 +74,8 @@ int NB_generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB_NB *eNB,
{ {
void *ULSCH_DCI_NB = NULL; void *ULSCH_DCI_NB = NULL;
DCI_PDU_NB *DCI_pdu;
eNB->DCI_pdu = (DCI_PDU_NB*) malloc(sizeof(DCI_PDU_NB));
/// type = 0 => DCI Format N0, type = 1 => DCI Format N1, 1 bits /// type = 0 => DCI Format N0, type = 1 => DCI Format N1, 1 bits
uint8_t type; uint8_t type;
...@@ -119,9 +120,9 @@ int NB_generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB_NB *eNB, ...@@ -119,9 +120,9 @@ int NB_generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB_NB *eNB,
((DCIN0_t *)ULSCH_DCI_NB)->ndi =ndi; ((DCIN0_t *)ULSCH_DCI_NB)->ndi =ndi;
((DCIN0_t *)ULSCH_DCI_NB)->DCIRep =DCIRep; ((DCIN0_t *)ULSCH_DCI_NB)->DCIRep =DCIRep;
DCI_pdu->Num_dci = Num_dci; eNB->DCI_pdu->Num_dci = Num_dci;
NB_add_dci(DCI_pdu,ULSCH_DCI_NB,rnti,sizeof(DCIN0_t),aggregation,sizeof_DCIN0_t,DCIFormatN0); NB_add_dci(eNB->DCI_pdu,ULSCH_DCI_NB,rnti,sizeof(DCIN0_t),aggregation,sizeof_DCIN0_t,DCIFormatN0);
// use this value to configure PHY both harq_processes and resource mapping. // use this value to configure PHY both harq_processes and resource mapping.
...@@ -149,7 +150,7 @@ int NB_generate_eNB_dlsch_params_from_dci(int frame, ...@@ -149,7 +150,7 @@ int NB_generate_eNB_dlsch_params_from_dci(int frame,
{ {
void *DLSCH_DCI_NB = NULL; void *DLSCH_DCI_NB = NULL;
DCI_PDU_NB *DCI_pdu; eNB->DCI_pdu = (DCI_PDU_NB*) malloc(sizeof(DCI_PDU_NB));
//N1 start //N1 start
...@@ -211,9 +212,9 @@ int NB_generate_eNB_dlsch_params_from_dci(int frame, ...@@ -211,9 +212,9 @@ int NB_generate_eNB_dlsch_params_from_dci(int frame,
((DCIN1_RAR_t *)DLSCH_DCI_NB)->HARQackRes =HARQackRes; ((DCIN1_RAR_t *)DLSCH_DCI_NB)->HARQackRes =HARQackRes;
((DCIN1_RAR_t *)DLSCH_DCI_NB)->DCIRep =DCIRep; ((DCIN1_RAR_t *)DLSCH_DCI_NB)->DCIRep =DCIRep;
DCI_pdu->Num_dci = Num_dci; eNB->DCI_pdu->Num_dci = Num_dci;
NB_add_dci(DCI_pdu,DLSCH_DCI_NB,rnti,sizeof(DCIN1_RAR_t),aggregation,sizeof_DCIN1_RAR_t,DCIFormatN1_RAR); NB_add_dci(eNB->DCI_pdu,DLSCH_DCI_NB,rnti,sizeof(DCIN1_RAR_t),aggregation,sizeof_DCIN1_RAR_t,DCIFormatN1_RAR);
// use this value to configure PHY both harq_processes and resource mapping. // use this value to configure PHY both harq_processes and resource mapping.
...@@ -243,9 +244,9 @@ int NB_generate_eNB_dlsch_params_from_dci(int frame, ...@@ -243,9 +244,9 @@ int NB_generate_eNB_dlsch_params_from_dci(int frame,
((DCIN1_t *)DLSCH_DCI_NB)->HARQackRes =HARQackRes; ((DCIN1_t *)DLSCH_DCI_NB)->HARQackRes =HARQackRes;
((DCIN1_t *)DLSCH_DCI_NB)->DCIRep =DCIRep; ((DCIN1_t *)DLSCH_DCI_NB)->DCIRep =DCIRep;
DCI_pdu->Num_dci = Num_dci; eNB->DCI_pdu->Num_dci = Num_dci;
NB_add_dci(DCI_pdu,DLSCH_DCI_NB,rnti,sizeof(DCIN1_t),aggregation,sizeof_DCIN1_t,DCIFormatN1); NB_add_dci(eNB->DCI_pdu,DLSCH_DCI_NB,rnti,sizeof(DCIN1_t),aggregation,sizeof_DCIN1_t,DCIFormatN1);
// use this value to configure PHY both harq_processes and resource mapping. // use this value to configure PHY both harq_processes and resource mapping.
...@@ -260,9 +261,9 @@ int NB_generate_eNB_dlsch_params_from_dci(int frame, ...@@ -260,9 +261,9 @@ int NB_generate_eNB_dlsch_params_from_dci(int frame,
((DCIN2_Ind_t *)DLSCH_DCI_NB)->directIndInf =directIndInf; ((DCIN2_Ind_t *)DLSCH_DCI_NB)->directIndInf =directIndInf;
((DCIN2_Ind_t *)DLSCH_DCI_NB)->resInfoBits =resInfoBits; ((DCIN2_Ind_t *)DLSCH_DCI_NB)->resInfoBits =resInfoBits;
DCI_pdu->Num_dci = Num_dci; eNB->DCI_pdu->Num_dci = Num_dci;
NB_add_dci(DCI_pdu,DLSCH_DCI_NB,rnti,sizeof(DCIN2_Ind_t),aggregation,sizeof_DCIN2_Ind_t,DCIFormatN2_Ind); NB_add_dci(eNB->DCI_pdu,DLSCH_DCI_NB,rnti,sizeof(DCIN2_Ind_t),aggregation,sizeof_DCIN2_Ind_t,DCIFormatN2_Ind);
// use this value to configure PHY both harq_processes and resource mapping. // use this value to configure PHY both harq_processes and resource mapping.
...@@ -282,9 +283,9 @@ int NB_generate_eNB_dlsch_params_from_dci(int frame, ...@@ -282,9 +283,9 @@ int NB_generate_eNB_dlsch_params_from_dci(int frame,
((DCIN2_Pag_t *)DLSCH_DCI_NB)->RepNum =RepNum; ((DCIN2_Pag_t *)DLSCH_DCI_NB)->RepNum =RepNum;
((DCIN2_Pag_t *)DLSCH_DCI_NB)->DCIRep =DCIRep; ((DCIN2_Pag_t *)DLSCH_DCI_NB)->DCIRep =DCIRep;
DCI_pdu->Num_dci = Num_dci; eNB->DCI_pdu->Num_dci = Num_dci;
NB_add_dci(DCI_pdu,DLSCH_DCI_NB,rnti,sizeof(DCIN2_Pag_t),aggregation,sizeof_DCIN2_Pag_t,DCIFormatN2_Pag); NB_add_dci(eNB->DCI_pdu,DLSCH_DCI_NB,rnti,sizeof(DCIN2_Pag_t),aggregation,sizeof_DCIN2_Pag_t,DCIFormatN2_Pag);
// use this value to configure PHY both harq_processes and resource mapping. // use this value to configure PHY both harq_processes and resource mapping.
......
...@@ -479,6 +479,7 @@ typedef struct PHY_VARS_eNB_s { ...@@ -479,6 +479,7 @@ typedef struct PHY_VARS_eNB_s {
//NB-IoT------------------------ //NB-IoT------------------------
NB_IoT_eNB_NPBCH npbch; NB_IoT_eNB_NPBCH npbch;
NB_IoT_eNB_NPDCCH_t *npdcch[NUMBER_OF_UE_MAC_NB_IoT]; //check the max size of this array NB_IoT_eNB_NPDCCH_t *npdcch[NUMBER_OF_UE_MAC_NB_IoT]; //check the max size of this array
DCI_PDU_NB DCI_pdu;
/// cell-specific reference symbols /// cell-specific reference symbols
uint32_t lte_gold_table[20][2][14]; uint32_t lte_gold_table[20][2][14];
......
...@@ -164,6 +164,14 @@ typedef struct{ ...@@ -164,6 +164,14 @@ typedef struct{
}npdcch_t; }npdcch_t;
typedef struct{
//for indicate receiving the NPUSCH
nfapi_ul_config_nulsch_pdu nulsch_pdu;
//for indicate receiving the NPRACH
nfapi_ul_config_nrach_pdu nrach_pdu;
}nulsch_t;
typedef union{ typedef union{
npdcch_t NB_DCI; npdcch_t NB_DCI;
...@@ -172,6 +180,8 @@ typedef union{ ...@@ -172,6 +180,8 @@ typedef union{
npbch_t NB_BCH; npbch_t NB_BCH;
nulsch_t NB_UL;
}NB_DL_u; }NB_DL_u;
......
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