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canghaiwuhen
OpenXG-RAN
Commits
578b17de
Commit
578b17de
authored
Nov 04, 2020
by
rmagueta
Browse files
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Plain Diff
First baseline implementation of SIB1
parent
45911fb8
Changes
5
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Showing
5 changed files
with
62 additions
and
394 deletions
+62
-394
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+11
-37
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+0
-1
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+26
-325
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+2
-1
openair2/RRC/NR/MESSAGES/asn1_msg.c
openair2/RRC/NR/MESSAGES/asn1_msg.c
+23
-30
No files found.
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
578b17de
...
...
@@ -1357,9 +1357,9 @@ void *UE_thread_slot1_dl_processing(void *arg) {
CPU_ZERO
(
&
cpuset
);
if
(
(
proc
->
sub_frame_start
+
1
)
%
RX_NB_TH
==
0
&&
threads
.
slot1_proc_one
!=
-
1
)
CPU_SET
(
threads
.
slot1_proc_one
,
&
cpuset
);
if
(
RX_NB_TH
>
1
&&
(
proc
->
sub_frame_start
+
1
)
%
RX_NB_TH
==
1
&&
threads
.
slot1_proc_two
!=
-
1
)
if
(
(
proc
->
sub_frame_start
+
1
)
%
RX_NB_TH
==
1
&&
threads
.
slot1_proc_two
!=
-
1
)
CPU_SET
(
threads
.
slot1_proc_two
,
&
cpuset
);
if
(
RX_NB_TH
>
2
&&
(
proc
->
sub_frame_start
+
1
)
%
RX_NB_TH
==
2
&&
threads
.
slot1_proc_three
!=
-
1
)
if
(
(
proc
->
sub_frame_start
+
1
)
%
RX_NB_TH
==
2
&&
threads
.
slot1_proc_three
!=
-
1
)
CPU_SET
(
threads
.
slot1_proc_three
,
&
cpuset
);
init_thread
(
900000
,
1000000
,
FIFO_PRIORITY
-
1
,
&
cpuset
,
...
...
@@ -1654,8 +1654,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
uint8_t
dci_cnt
=
0
;
NR_DL_FRAME_PARMS
*
fp
=
&
ue
->
frame_parms
;
//NR_UE_MAC_INST_t *mac = get_mac_inst(0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX
,
VCD_FUNCTION_IN
);
LOG_D
(
PHY
,
" ****** start RX-Chain for Frame.Slot %d.%d ******
\n
"
,
frame_rx
%
1024
,
nr_tti_rx
);
...
...
@@ -1694,12 +1692,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
#endif
}
//if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){
nr_ue_rsrp_measurements
(
ue
,
nr_tti_rx
,
0
);
//}
nr_ue_pbch_procedures
(
gNB_id
,
ue
,
proc
,
0
);
if
(
ue
->
no_timing_correction
==
0
)
{
...
...
@@ -1846,6 +1838,15 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
// deactivate dlsch once dlsch proc is done
ue
->
dlsch_SI
[
gNB_id
]
->
active
=
0
;
// FIXME: It was assumed that SIB1 has only one segment
int
harq_pid
=
PHY_vars_UE_g
[
0
][
0
]
->
dlsch_SI
[
0
]
->
current_harq_pid
;
if
(
ue
->
dlsch_SI
[
gNB_id
]
->
harq_processes
[
harq_pid
]
->
harq_ack
.
ack
==
1
)
{
nr_rrc_ue_decode_NR_SIB1_Message
(
&
ue
->
dlsch_SI
[
gNB_id
]
->
harq_processes
[
harq_pid
]
->
c
[
0
][
0
],
ue
->
dlsch_SI
[
gNB_id
]
->
harq_processes
[
harq_pid
]
->
TBS
);
}
else
{
LOG_D
(
PHY
,
"SIB1 CRC NOT OK"
);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI
,
VCD_FUNCTION_OUT
);
}
...
...
@@ -1963,33 +1964,6 @@ start_meas(&ue->generic_stat);
}
#endif
// do procedures for SI-RNTI
if
((
ue
->
dlsch_SI
[
gNB_id
])
&&
(
ue
->
dlsch_SI
[
gNB_id
]
->
active
==
1
))
{
nr_ue_dlsch_procedures
(
ue
,
proc
,
gNB_id
,
SI_PDSCH
,
ue
->
dlsch_SI
[
gNB_id
],
NULL
,
&
ue
->
dlsch_SI_errors
[
gNB_id
],
mode
);
ue
->
dlsch_SI
[
gNB_id
]
->
active
=
0
;
// FIXME: It was assumed that SIB1 has only one segment
int
harq_pid
=
PHY_vars_UE_g
[
0
][
0
]
->
dlsch_SI
[
0
]
->
current_harq_pid
;
if
(
ue
->
dlsch_SI
[
gNB_id
]
->
harq_processes
[
harq_pid
]
->
harq_ack
.
ack
==
1
)
{
nr_rrc_ue_decode_NR_SIB1_Message
(
&
ue
->
dlsch_SI
[
gNB_id
]
->
harq_processes
[
harq_pid
]
->
c
[
0
][
0
],
ue
->
dlsch_SI
[
gNB_id
]
->
harq_processes
[
harq_pid
]
->
TBS
);
}
else
{
LOG_D
(
PHY
,
"SIB1 CRC NOT OK"
);
}
}
// do procedures for P-RNTI
if
((
ue
->
dlsch_p
[
gNB_id
])
&&
(
ue
->
dlsch_p
[
gNB_id
]
->
active
==
1
))
{
nr_ue_pdsch_procedures
(
ue
,
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @
578b17de
...
...
@@ -117,7 +117,6 @@ const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f
const
int32_t
table_38213_10_1_1_c2
[
5
]
=
{
0
,
0
,
4
,
2
,
1
};
const
char
*
prachfmt
[]
=
{
"A1"
,
"A2"
,
"A3"
,
"B1"
,
"B2"
,
"B3"
,
"B4"
,
"C0"
,
"C2"
};
const
char
*
prachfmt03
[]
=
{
"0"
,
"1"
,
"2"
,
"3"
};
const
char
*
prachfmt
[]
=
{
"0"
,
"1"
,
"2"
,
"3"
,
"A1"
,
"A2"
,
"A3"
,
"B1"
,
"B4"
,
"C0"
,
"C2"
,
"A1/B1"
,
"A2/B2"
,
"A3/B3"
};
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
578b17de
...
...
@@ -964,15 +964,40 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
nr_mac_rrc_data_ind_ue
(
module_id
,
cc_id
,
gNB_index
,
NR_BCCH_BCH
,
(
uint8_t
*
)
pduP
,
3
);
// fixed 3 bytes MIB PDU
AssertFatal
(
mac
->
mib
!=
NULL
,
"nr_ue_decode_mib() mac->mib == NULL
\n
"
);
//if(mac->mib != NULL){
uint16_t
frame
=
(
mac
->
mib
->
systemFrameNumber
.
buf
[
0
]
>>
mac
->
mib
->
systemFrameNumber
.
bits_unused
);
uint16_t
frame_number_4lsb
=
0
;
for
(
int
i
=
0
;
i
<
4
;
i
++
)
frame_number_4lsb
|=
((
extra_bits
>>
i
)
&
1
)
<<
(
3
-
i
);
//uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4]
uint8_t
ssb_subcarrier_offset_msb
=
(
extra_bits
>>
5
)
&
0x1
;
// extra bits[5]
uint8_t
ssb_subcarrier_offset
=
(
uint8_t
)
mac
->
mib
->
ssb_SubcarrierOffset
;
//uint32_t ssb_index = 0; // TODO: ssb_index should obtain from L1 in case Lssb != 64
frame
=
frame
<<
4
;
frame
=
frame
|
frame_number_4lsb
;
if
(
ssb_length
==
64
){
ssb_index
=
ssb_index
&
((
extra_bits
>>
2
)
&
0x1C
);
// { extra_bits[5:7], ssb_index[2:0] }
}
else
{
if
(
ssb_subcarrier_offset_msb
){
ssb_subcarrier_offset
=
ssb_subcarrier_offset
|
0x10
;
}
}
#ifdef DEBUG_MIB
LOG_I
(
MAC
,
"system frame number(6 MSB bits): %d
\n
"
,
mac
->
mib
->
systemFrameNumber
.
buf
[
0
]);
LOG_I
(
MAC
,
"system frame number(with LSB): %d
\n
"
,
(
int
)
frame
);
LOG_I
(
MAC
,
"subcarrier spacing (0=15or60, 1=30or120): %d
\n
"
,
(
int
)
mac
->
mib
->
subCarrierSpacingCommon
);
LOG_I
(
MAC
,
"ssb carrier offset(with MSB): %d
\n
"
,
(
int
)
ssb_subcarrier_offset
);
LOG_I
(
MAC
,
"dmrs type A position (0=pos2,1=pos3): %d
\n
"
,
(
int
)
mac
->
mib
->
dmrs_TypeA_Position
);
LOG_I
(
MAC
,
"pdcch config sib1.controlResourceSetZero: %d
\n
"
,
(
int
)
mac
->
mib
->
pdcch_ConfigSIB1
.
controlResourceSetZero
);
LOG_I
(
MAC
,
"pdcch config sib1.searchSpaceZero: %d
\n
"
,
(
int
)
mac
->
mib
->
pdcch_ConfigSIB1
.
searchSpaceZero
);
LOG_I
(
MAC
,
"cell barred (0=barred,1=notBarred): %d
\n
"
,
(
int
)
mac
->
mib
->
cellBarred
);
LOG_I
(
MAC
,
"intra frequency reselection (0=allowed,1=notAllowed): %d
\n
"
,
(
int
)
mac
->
mib
->
intraFreqReselection
);
LOG_I
(
MAC
,
"half frame bit(extra bits): %d
\n
"
,
(
int
)
half_frame_bit
);
LOG_I
(
MAC
,
"ssb index(extra bits): %d
\n
"
,
(
int
)
ssb_index
);
#endif
get_type0_PDCCH_CSS_config_parameters
(
&
mac
->
type0_PDCCH_CSS_config
,
mac
->
mib
,
extra_bits
,
ssb_length
,
ssb_index
);
...
...
@@ -983,331 +1008,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
mac
->
type0_pdcch_ss_n_c
=
mac
->
type0_PDCCH_CSS_config
.
n_c
;
mac
->
dl_config_request
.
sfn
=
mac
->
type0_PDCCH_CSS_config
.
frame
;
mac
->
dl_config_request
.
slot
=
(
ssb_index
>>
1
)
+
((
ssb_index
>>
4
)
<<
1
);
// not valid for 240kHz SCS
channel_bandwidth_t
min_channel_bw
=
bw_10MHz
;
// deafult for testing
//TODO: Check this
uint32_t
is_condition_A
=
(
ssb_subcarrier_offset
==
0
);
// 38.213 ch.13
frequency_range_t
frequency_range
=
FR1
;
uint32_t
index_4msb
=
(
mac
->
mib
->
pdcch_ConfigSIB1
.
controlResourceSetZero
);
uint32_t
index_4lsb
=
(
mac
->
mib
->
pdcch_ConfigSIB1
.
searchSpaceZero
);
int32_t
num_rbs
=
-
1
;
int32_t
num_symbols
=
-
1
;
int32_t
rb_offset
=
-
1
;
//LOG_I(MAC,"<<<<<<<<<configSIB1 %d index_4msb %d index_4lsb %d scs_ssb %d scs_pdcch %d switch %d ",
//mac->mib->pdcch_ConfigSIB1,index_4msb,index_4lsb,scs_ssb,scs_pdcch, (scs_ssb << 5)|scs_pdcch);
// type0-pdcch coreset
switch
(
(
scs_ssb
<<
5
)
|
scs_pdcch
){
case
(
scs_15kHz
<<
5
)
|
scs_15kHz
:
AssertFatal
(
index_4msb
<
15
,
"38.213 Table 13-1 4 MSB out of range
\n
"
);
mac
->
type0_pdcch_ss_mux_pattern
=
1
;
num_rbs
=
table_38213_13_1_c2
[
index_4msb
];
num_symbols
=
table_38213_13_1_c3
[
index_4msb
];
rb_offset
=
table_38213_13_1_c4
[
index_4msb
];
break
;
case
(
scs_15kHz
<<
5
)
|
scs_30kHz
:
AssertFatal
(
index_4msb
<
14
,
"38.213 Table 13-2 4 MSB out of range
\n
"
);
mac
->
type0_pdcch_ss_mux_pattern
=
1
;
num_rbs
=
table_38213_13_2_c2
[
index_4msb
];
num_symbols
=
table_38213_13_2_c3
[
index_4msb
];
rb_offset
=
table_38213_13_2_c4
[
index_4msb
];
break
;
case
(
scs_30kHz
<<
5
)
|
scs_15kHz
:
if
((
min_channel_bw
&
bw_5MHz
)
|
(
min_channel_bw
&
bw_10MHz
)){
AssertFatal
(
index_4msb
<
9
,
"38.213 Table 13-3 4 MSB out of range
\n
"
);
mac
->
type0_pdcch_ss_mux_pattern
=
1
;
num_rbs
=
table_38213_13_3_c2
[
index_4msb
];
num_symbols
=
table_38213_13_3_c3
[
index_4msb
];
rb_offset
=
table_38213_13_3_c4
[
index_4msb
];
}
else
if
(
min_channel_bw
&
bw_40MHz
){
AssertFatal
(
index_4msb
<
9
,
"38.213 Table 13-5 4 MSB out of range
\n
"
);
mac
->
type0_pdcch_ss_mux_pattern
=
1
;
num_rbs
=
table_38213_13_5_c2
[
index_4msb
];
num_symbols
=
table_38213_13_5_c3
[
index_4msb
];
rb_offset
=
table_38213_13_5_c4
[
index_4msb
];
}
else
{
;
}
break
;
case
(
scs_30kHz
<<
5
)
|
scs_30kHz
:
if
((
min_channel_bw
&
bw_5MHz
)
|
(
min_channel_bw
&
bw_10MHz
)){
mac
->
type0_pdcch_ss_mux_pattern
=
1
;
num_rbs
=
table_38213_13_4_c2
[
index_4msb
];
num_symbols
=
table_38213_13_4_c3
[
index_4msb
];
rb_offset
=
table_38213_13_4_c4
[
index_4msb
];
LOG_I
(
MAC
,
"<<<<<<<<<index_4msb %d num_rbs %d num_symb %d rb_offset %d
\n
"
,
index_4msb
,
num_rbs
,
num_symbols
,
rb_offset
);
}
else
if
(
min_channel_bw
&
bw_40MHz
){
AssertFatal
(
index_4msb
<
10
,
"38.213 Table 13-6 4 MSB out of range
\n
"
);
mac
->
type0_pdcch_ss_mux_pattern
=
1
;
num_rbs
=
table_38213_13_6_c2
[
index_4msb
];
num_symbols
=
table_38213_13_6_c3
[
index_4msb
];
rb_offset
=
table_38213_13_6_c4
[
index_4msb
];
}
else
{
;
}
break
;
case
(
scs_120kHz
<<
5
)
|
scs_60kHz
:
AssertFatal
(
index_4msb
<
12
,
"38.213 Table 13-7 4 MSB out of range
\n
"
);
if
(
index_4msb
&
0x7
){
mac
->
type0_pdcch_ss_mux_pattern
=
1
;
}
else
if
(
index_4msb
&
0x18
){
mac
->
type0_pdcch_ss_mux_pattern
=
2
;
}
else
{
;
}
num_rbs
=
table_38213_13_7_c2
[
index_4msb
];
num_symbols
=
table_38213_13_7_c3
[
index_4msb
];
if
(
!
is_condition_A
&&
(
index_4msb
==
8
||
index_4msb
==
10
)){
rb_offset
=
table_38213_13_7_c4
[
index_4msb
]
-
1
;
}
else
{
rb_offset
=
table_38213_13_7_c4
[
index_4msb
];
}
break
;
case
(
scs_120kHz
<<
5
)
|
scs_120kHz
:
AssertFatal
(
index_4msb
<
8
,
"38.213 Table 13-8 4 MSB out of range
\n
"
);
if
(
index_4msb
&
0x3
){
mac
->
type0_pdcch_ss_mux_pattern
=
1
;
}
else
if
(
index_4msb
&
0x0c
){
mac
->
type0_pdcch_ss_mux_pattern
=
3
;
}
num_rbs
=
table_38213_13_8_c2
[
index_4msb
];
num_symbols
=
table_38213_13_8_c3
[
index_4msb
];
if
(
!
is_condition_A
&&
(
index_4msb
==
4
||
index_4msb
==
6
)){
rb_offset
=
table_38213_13_8_c4
[
index_4msb
]
-
1
;
}
else
{
rb_offset
=
table_38213_13_8_c4
[
index_4msb
];
}
break
;
case
(
scs_240kHz
<<
5
)
|
scs_60kHz
:
AssertFatal
(
index_4msb
<
4
,
"38.213 Table 13-9 4 MSB out of range
\n
"
);
mac
->
type0_pdcch_ss_mux_pattern
=
1
;
num_rbs
=
table_38213_13_9_c2
[
index_4msb
];
num_symbols
=
table_38213_13_9_c3
[
index_4msb
];
rb_offset
=
table_38213_13_9_c4
[
index_4msb
];
break
;
case
(
scs_240kHz
<<
5
)
|
scs_120kHz
:
AssertFatal
(
index_4msb
<
8
,
"38.213 Table 13-10 4 MSB out of range
\n
"
);
if
(
index_4msb
&
0x3
){
mac
->
type0_pdcch_ss_mux_pattern
=
1
;
}
else
if
(
index_4msb
&
0x0c
){
mac
->
type0_pdcch_ss_mux_pattern
=
2
;
}
num_rbs
=
table_38213_13_10_c2
[
index_4msb
];
num_symbols
=
table_38213_13_10_c3
[
index_4msb
];
if
(
!
is_condition_A
&&
(
index_4msb
==
4
||
index_4msb
==
6
)){
rb_offset
=
table_38213_13_10_c4
[
index_4msb
]
-
1
;
}
else
{
rb_offset
=
table_38213_13_10_c4
[
index_4msb
];
}
break
;
default:
break
;
}
AssertFatal
(
num_rbs
!=
-
1
,
"Type0 PDCCH coreset num_rbs undefined"
);
AssertFatal
(
num_symbols
!=
-
1
,
"Type0 PDCCH coreset num_symbols undefined"
);
AssertFatal
(
rb_offset
!=
-
1
,
"Type0 PDCCH coreset rb_offset undefined"
);
//uint32_t cell_id = 0; // obtain from L1 later
//mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
//mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
uint64_t
mask
=
0x0
;
uint8_t
i
;
for
(
i
=
0
;
i
<
(
num_rbs
/
6
);
++
i
){
// 38.331 Each bit corresponds a group of 6 RBs
mask
=
mask
>>
1
;
mask
=
mask
|
0x100000000000
;
}
//LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset);
/*
mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask;
mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset
//mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED;
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id;
mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id;
*/
// type0-pdcch search space
float
big_o
;
float
big_m
;
uint32_t
temp
;
SFN_C_TYPE
sfn_c
=
SFN_C_IMPOSSIBLE
;
// only valid for mux=1
uint32_t
n_c
=
UINT_MAX
;
uint32_t
number_of_search_space_per_slot
=
UINT_MAX
;
// uint32_t first_symbol_index=UINT_MAX;
// uint32_t search_space_duration; // element of search space
// 38.213 table 10.1-1
/// MUX PATTERN 1
if
(
mac
->
type0_pdcch_ss_mux_pattern
==
1
&&
frequency_range
==
FR1
){
big_o
=
table_38213_13_11_c1
[
index_4lsb
];
number_of_search_space_per_slot
=
table_38213_13_11_c2
[
index_4lsb
];
big_m
=
table_38213_13_11_c3
[
index_4lsb
];
temp
=
(
uint32_t
)(
big_o
*
pow
(
2
,
scs_pdcch
))
+
(
uint32_t
)(
ssb_index
*
big_m
);
n_c
=
temp
/
num_slot_per_frame
;
if
((
temp
/
num_slot_per_frame
)
&
0x1
){
sfn_c
=
SFN_C_MOD_2_EQ_1
;
}
else
{
sfn_c
=
SFN_C_MOD_2_EQ_0
;
}
// if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 7) && (ssb_index&1)){
// first_symbol_index = num_symbols;
// }else{
// first_symbol_index = table_38213_13_11_c4[index_4lsb];
// }
// 38.213 chapter 13: over two consecutive slots
// search_space_duration = 2;
}
if
(
mac
->
type0_pdcch_ss_mux_pattern
==
1
&&
frequency_range
==
FR2
){
big_o
=
table_38213_13_12_c1
[
index_4lsb
];
number_of_search_space_per_slot
=
table_38213_13_11_c2
[
index_4lsb
];
big_m
=
table_38213_13_12_c3
[
index_4lsb
];
// if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 10) && (ssb_index&1)){
// first_symbol_index = 7;
// }else if((index_4lsb == 6 || index_4lsb == 7 || index_4lsb == 8 || index_4lsb == 11) && (ssb_index&1)){
// first_symbol_index = num_symbols;
// }else{
// first_symbol_index = 0;
// }
// 38.213 chapter 13: over two consecutive slots
//search_space_duration = 2;
}
/// MUX PATTERN 2
if
(
mac
->
type0_pdcch_ss_mux_pattern
==
2
){
if
((
scs_ssb
==
scs_120kHz
)
&&
(
scs_pdcch
==
scs_60kHz
)){
// 38.213 Table 13-13
AssertFatal
(
index_4lsb
==
0
,
"38.213 Table 13-13 4 LSB out of range
\n
"
);
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
// sfn_c = SFN_C_EQ_SFN_SSB;
n_c
=
get_ssb_slot
(
ssb_index
);
// switch(ssb_index & 0x3){ // ssb_index(i) mod 4
// case 0:
// first_symbol_index = 0;
// break;
// case 1:
// first_symbol_index = 1;
// break;
// case 2:
// first_symbol_index = 6;
// break;
// case 3:
// first_symbol_index = 7;
// break;
// default: break;
// }
}
else
if
((
scs_ssb
==
scs_240kHz
)
&&
(
scs_pdcch
==
scs_120kHz
)){
// 38.213 Table 13-14
AssertFatal
(
index_4lsb
==
0
,
"38.213 Table 13-14 4 LSB out of range
\n
"
);
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
// sfn_c = SFN_C_EQ_SFN_SSB;
n_c
=
get_ssb_slot
(
ssb_index
);
switch
(
ssb_index
&
0x7
){
// ssb_index(i) mod 8
case
0
:
// first_symbol_index = 0;
break
;
case
1
:
// first_symbol_index = 1;
break
;
case
2
:
// first_symbol_index = 2;
break
;
case
3
:
// first_symbol_index = 3;
break
;
case
4
:
// first_symbol_index = 12;
n_c
=
get_ssb_slot
(
ssb_index
)
-
1
;
break
;
case
5
:
// first_symbol_index = 13;
n_c
=
get_ssb_slot
(
ssb_index
)
-
1
;
break
;
case
6
:
// first_symbol_index = 0;
break
;
case
7
:
// first_symbol_index = 1;
break
;
default:
break
;
}
}
else
{
;
}
// 38.213 chapter 13: over one slot
// search_space_duration = 1;
}
/// MUX PATTERN 3
if
(
mac
->
type0_pdcch_ss_mux_pattern
==
3
){
if
((
scs_ssb
==
scs_120kHz
)
&&
(
scs_pdcch
==
scs_120kHz
)){
// 38.213 Table 13-15
AssertFatal
(
index_4lsb
==
0
,
"38.213 Table 13-15 4 LSB out of range
\n
"
);
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
// sfn_c = SFN_C_EQ_SFN_SSB;
n_c
=
get_ssb_slot
(
ssb_index
);
// switch(ssb_index & 0x3){ // ssb_index(i) mod 4
// case 0:
// first_symbol_index = 4;
// break;
// case 1:
// first_symbol_index = 8;
// break;
// case 2:
// first_symbol_index = 2;
// break;
// case 3:
// first_symbol_index = 6;
// break;
// default: break;
// }
}
else
{
;
}
// 38.213 chapter 13: over one slot
// search_space_duration = 1;
}
AssertFatal
(
number_of_search_space_per_slot
!=
UINT_MAX
,
""
);
/*
uint32_t coreset_duration = num_symbols * number_of_search_space_per_slot;
mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0];
mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1];
mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4
mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8
mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16
mac->type0_pdcch_dci_config.duration = search_space_duration;
mac->type0_pdcch_dci_config.coreset.duration = coreset_duration; // coreset
AssertFatal(first_symbol_index!=UINT_MAX,"");
mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
*/
AssertFatal
(
sfn_c
!=
SFN_C_IMPOSSIBLE
,
""
);
AssertFatal
(
n_c
!=
UINT_MAX
,
""
);
mac
->
type0_pdcch_ss_sfn_c
=
sfn_c
;
mac
->
type0_pdcch_ss_n_c
=
n_c
;
// fill in the elements in config request inside P5 message
mac
->
phy_config
.
Mod_id
=
module_id
;
mac
->
phy_config
.
CC_id
=
cc_id
;
mac
->
dl_config_request
.
sfn
=
frame
;
mac
->
dl_config_request
.
slot
=
(
ssb_index
>>
1
)
+
((
ssb_index
>>
4
)
<<
1
);
// not valid for 240kHz SCS
channel_bandwidth_t
min_channel_bw
=
bw_10MHz
;
// default for testing
return
0
;
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
View file @
578b17de
...
...
@@ -205,7 +205,8 @@ void schedule_control_sib1(module_id_t module_id,
gNB_mac
->
sched_ctrlCommon
->
coreset
,
gNB_mac
->
sched_ctrlCommon
->
aggregation_level
,
0
,
0
);
0
,
nr_of_candidates
);
const
uint16_t
bwpSize
=
NRRIV2BW
(
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
int
rbStart
=
NRRIV2PRBOFFSET
(
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
...
...
openair2/RRC/NR/MESSAGES/asn1_msg.c
View file @
578b17de
...
...
@@ -39,6 +39,7 @@
#include <asn_application.h>
#include <asn_internal.h>
/* for _ASN_DEFAULT_STACK_MAX */
#include <per_encoder.h>
#include <PHY/defs_nr_common.h>
#include "asn1_msg.h"
#include "RRC/NR/nr_rrc_extern.h"
...
...
@@ -267,10 +268,6 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
gNB_RrcConfigurationReq
*
configuration
)
{
asn_enc_rval_t
enc_rval
;
NR_BCCH_DL_SCH_Message_t
*
sib1_message
;
struct
NR_SIB1
*
sib1
;
int
i
;
struct
NR_PLMN_IdentityInfo
nr_plmn_info
;
// TODO : Add support for more than one PLMN
//int num_plmn = configuration->num_plmn;
...
...
@@ -278,31 +275,29 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
struct
NR_PLMN_Identity
nr_plmn
[
num_plmn
];
NR_MCC_MNC_Digit_t
nr_mcc_digit
[
num_plmn
][
3
];
NR_MCC_MNC_Digit_t
nr_mnc_digit
[
num_plmn
][
3
];
memset
(
nr_plmn
,
0
,
sizeof
(
nr_plmn
));
memset
(
nr_mcc_digit
,
0
,
sizeof
(
nr_mcc_digit
));
memset
(
nr_mnc_digit
,
0
,
sizeof
(
nr_mnc_digit
));
// struct NR_UAC_BarringInfoSet nr_uac_BarringInfoSet;
sib1_message
=
CALLOC
(
1
,
sizeof
(
NR_BCCH_DL_SCH_Message_t
));
memset
(
sib1_message
,
0
,
sizeof
(
NR_BCCH_DL_SCH_Message_t
));
NR_BCCH_DL_SCH_Message_t
*
sib1_message
=
CALLOC
(
1
,
sizeof
(
NR_BCCH_DL_SCH_Message_t
));
carrier
->
siblock1
=
sib1_message
;
sib1_message
->
message
.
present
=
NR_BCCH_DL_SCH_MessageType_PR_c1
;
sib1_message
->
message
.
choice
.
c1
=
CALLOC
(
1
,
sizeof
(
struct
NR_BCCH_DL_SCH_MessageType__c1
));
memset
(
sib1_message
->
message
.
choice
.
c1
,
0
,
sizeof
(
struct
NR_BCCH_DL_SCH_MessageType__c1
));
sib1_message
->
message
.
choice
.
c1
->
present
=
NR_BCCH_DL_SCH_MessageType__c1_PR_systemInformationBlockType1
;
sib1_message
->
message
.
choice
.
c1
->
choice
.
systemInformationBlockType1
=
CALLOC
(
1
,
sizeof
(
struct
NR_SIB1
));
sib1
=
sib1_message
->
message
.
choice
.
c1
->
choice
.
systemInformationBlockType1
;
memset
(
sib1
,
0
,
sizeof
(
struct
NR_SIB1
))
;
struct
NR_SIB1
*
sib1
=
sib1_message
->
message
.
choice
.
c1
->
choice
.
systemInformationBlockType1
;
sib1
->
cellSelectionInfo
=
CALLOC
(
1
,
sizeof
(
struct
NR_SIB1__cellSelectionInfo
));
memset
(
sib1
->
cellSelectionInfo
,
0
,
sizeof
(
struct
NR_SIB1__cellSelectionInfo
));
sib1
->
cellSelectionInfo
->
q_RxLevMin
=
-
50
;
memset
(
&
nr_plmn_info
.
plmn_IdentityList
,
0
,
sizeof
(
struct
NR_PLMN_IdentityInfo__plmn_IdentityList
));
asn_set_empty
(
&
nr_plmn_info
.
plmn_IdentityList
.
list
);
memset
(
&
nr_plmn_info
,
0
,
sizeof
(
struct
NR_PLMN_IdentityInfo
));
memset
(
nr_plmn
,
0
,
num_plmn
*
sizeof
(
struct
NR_PLMN_Identity
));
for
(
i
=
0
;
i
<
num_plmn
;
++
i
)
{
struct
NR_PLMN_IdentityInfo
*
nr_plmn_info
=
CALLOC
(
1
,
sizeof
(
struct
NR_PLMN_IdentityInfo
));
asn_set_empty
(
&
nr_plmn_info
->
plmn_IdentityList
.
list
);
for
(
int
i
=
0
;
i
<
num_plmn
;
++
i
)
{
nr_mcc_digit
[
i
][
0
]
=
(
configuration
->
mcc
[
i
]
/
100
)
%
10
;
nr_mcc_digit
[
i
][
1
]
=
(
configuration
->
mcc
[
i
]
/
10
)
%
10
;
nr_mcc_digit
[
i
][
2
]
=
(
configuration
->
mcc
[
i
])
%
10
;
nr_plmn
[
i
].
mcc
=
CALLOC
(
1
,
sizeof
(
struct
NR_MCC
));
memset
(
nr_plmn
[
i
].
mcc
,
0
,
sizeof
(
struct
NR_MCC
));
asn_set_empty
(
&
nr_plmn
[
i
].
mcc
->
list
);
ASN_SEQUENCE_ADD
(
&
nr_plmn
[
i
].
mcc
->
list
,
&
nr_mcc_digit
[
i
][
0
]);
ASN_SEQUENCE_ADD
(
&
nr_plmn
[
i
].
mcc
->
list
,
&
nr_mcc_digit
[
i
][
1
]);
...
...
@@ -310,26 +305,23 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
nr_mnc_digit
[
i
][
0
]
=
(
configuration
->
mnc
[
i
]
/
100
)
%
10
;
nr_mnc_digit
[
i
][
1
]
=
(
configuration
->
mnc
[
i
]
/
10
)
%
10
;
nr_mnc_digit
[
i
][
2
]
=
(
configuration
->
mnc
[
i
])
%
10
;
memset
(
&
nr_plmn
[
i
].
mnc
,
0
,
sizeof
(
NR_MNC_t
));
nr_plmn
[
i
].
mnc
.
list
.
size
=
0
;
nr_plmn
[
i
].
mnc
.
list
.
count
=
0
;
ASN_SEQUENCE_ADD
(
&
nr_plmn
[
i
].
mnc
.
list
,
&
nr_mnc_digit
[
i
][
0
]);
ASN_SEQUENCE_ADD
(
&
nr_plmn
[
i
].
mnc
.
list
,
&
nr_mnc_digit
[
i
][
1
]);
ASN_SEQUENCE_ADD
(
&
nr_plmn
[
i
].
mnc
.
list
,
&
nr_mnc_digit
[
i
][
2
]);
ASN_SEQUENCE_ADD
(
&
nr_plmn_info
.
plmn_IdentityList
.
list
,
&
nr_plmn
[
i
]);
ASN_SEQUENCE_ADD
(
&
nr_plmn_info
->
plmn_IdentityList
.
list
,
&
nr_plmn
[
i
]);
}
//end plmn loop
nr_plmn_info
.
cellIdentity
.
buf
=
MALLOC
(
8
);
memset
(
nr_plmn_info
.
cellIdentity
.
buf
,
0
,
8
);
nr_plmn_info
.
cellIdentity
.
buf
[
0
]
=
(
configuration
->
cell_identity
>>
20
)
&
0xff
;
nr_plmn_info
.
cellIdentity
.
buf
[
1
]
=
(
configuration
->
cell_identity
>>
12
)
&
0xff
;
nr_plmn_info
.
cellIdentity
.
buf
[
2
]
=
(
configuration
->
cell_identity
>>
4
)
&
0xff
;
nr_plmn_info
.
cellIdentity
.
buf
[
3
]
=
(
configuration
->
cell_identity
<<
4
)
&
0xff
;
nr_plmn_info
.
cellIdentity
.
size
=
4
;
nr_plmn_info
.
cellIdentity
.
bits_unused
=
4
;
nr_plmn_info
.
cellReservedForOperatorUse
=
0
;
memset
(
&
sib1
->
cellAccessRelatedInfo
,
0
,
sizeof
(
NR_CellAccessRelatedInfo_t
));
ASN_SEQUENCE_ADD
(
&
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
,
&
nr_plmn_info
);
nr_plmn_info
->
cellIdentity
.
buf
=
CALLOC
(
1
,
8
);
nr_plmn_info
->
cellIdentity
.
buf
[
0
]
=
(
configuration
->
cell_identity
>>
20
)
&
0xff
;
nr_plmn_info
->
cellIdentity
.
buf
[
1
]
=
(
configuration
->
cell_identity
>>
12
)
&
0xff
;
nr_plmn_info
->
cellIdentity
.
buf
[
2
]
=
(
configuration
->
cell_identity
>>
4
)
&
0xff
;
nr_plmn_info
->
cellIdentity
.
buf
[
3
]
=
(
configuration
->
cell_identity
<<
4
)
&
0xff
;
nr_plmn_info
->
cellIdentity
.
size
=
4
;
nr_plmn_info
->
cellIdentity
.
bits_unused
=
4
;
nr_plmn_info
->
cellReservedForOperatorUse
=
0
;
ASN_SEQUENCE_ADD
(
&
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
,
nr_plmn_info
);
#if 0
sib1->uac_BarringInfo = CALLOC(1, sizeof(struct NR_SIB1__uac_BarringInfo));
memset(sib1->uac_BarringInfo, 0, sizeof(struct NR_SIB1__uac_BarringInfo));
...
...
@@ -345,11 +337,12 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
xer_fprint
(
stdout
,
&
asn_DEF_NR_SIB1
,
(
const
void
*
)
sib1_message
->
message
.
choice
.
c1
->
choice
.
systemInformationBlockType1
);
//encode SIB1 to data
if
(
carrier
->
SIB1
==
NULL
)
carrier
->
SIB1
=
(
uint8_t
*
)
malloc16
(
MAX_NR_SIB_LENGTH
/
8
);
enc_rval
=
uper_encode_to_buffer
(
&
asn_DEF_NR_BCCH_DL_SCH_Message
,
NULL
,
(
void
*
)
sib1_message
,
carrier
->
SIB1
,
100
);
MAX_NR_SIB_LENGTH
/
8
);
AssertFatal
(
enc_rval
.
encoded
>
0
,
"ASN1 message encoding failed (%s, %lu)!
\n
"
,
enc_rval
.
failed_type
->
name
,
enc_rval
.
encoded
);
...
...
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