Skip to content

O
OpenXG-RAN
Commit 669724c1 authored by nepes's avatar nepes
Browse files
Options

Merge branch 'eMTC-testing' of https://gitlab.eurecom.fr/oai/openairinterface5g into eMTC-testing

parents b28b1441 87f415d2
Expand all Show whitespace changes
Inline Side-by-side
Showing with 4291 additions and 4202 deletions
README.txt
View file @ 669724c1
...@@ -62,3 +62,4 @@ v1.0.0 -> January 2019. This version first implements the architectural split de ...@@ -62,3 +62,4 @@ v1.0.0 -> January 2019. This version first implements the architectural split de
New tools: config library, telnet server, ... New tools: config library, telnet server, ...
A lot of bugfixes and a proper automated Continuous Integration process validates contributions. A lot of bugfixes and a proper automated Continuous Integration process validates contributions.
v1.0.1 -> February 2019: Bug fix for the UE L1 simulator. v1.0.1 -> February 2019: Bug fix for the UE L1 simulator.
v1.0.2 -> February 2019: Full OAI support for 3.13.1 UHD
ci-scripts/buildOnVM.sh
View file @ 669724c1
...@@ -94,14 +94,21 @@ function build_on_vm { ...@@ -94,14 +94,21 @@ function build_on_vm {
echo "############################################################" echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base" echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################" echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml
fi echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
release_vm_create_lock
else
echo "Waiting for VM to be started" echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME` VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR" echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
fi
echo "############################################################" echo "############################################################"
echo "Copying GIT repo into VM ($VM_NAME)" echo "Copying GIT repo into VM ($VM_NAME)"
......
ci-scripts/cppcheck_suppressions.list
View file @ 669724c1
...@@ -67,6 +67,15 @@ syntaxError:openair1/SIMULATION/LTE_PHY/dlsim_tm4.c ...@@ -67,6 +67,15 @@ syntaxError:openair1/SIMULATION/LTE_PHY/dlsim_tm4.c
// omg, otg commented out in cmakelist to be cleaned up definitely? // omg, otg commented out in cmakelist to be cleaned up definitely?
arrayIndexOutOfBounds:openair2/UTIL/OMG/omg.c arrayIndexOutOfBounds:openair2/UTIL/OMG/omg.c
uninitvar:openair2/UTIL/OTG/otg_rx_socket.c uninitvar:openair2/UTIL/OTG/otg_rx_socket.c
//-----------------------------------------------------------------------------
// cppcheck is not able to understand that buf is initialized at the first
// iteration of the loop.
nullPointer:common/utils/T/local_tracer.c:243
//-----------------------------------------------------------------------------
// once again cppcheck is not to understand that fds is initialized in the
// first iteration of the loop
nullPointer:common/utils/T/tracer/multi.c:264
nullPointer:common/utils/T/tracer/multi.c:265
// //
//***************************************************************************** //*****************************************************************************
// //
......
ci-scripts/createVM.sh
View file @ 669724c1
...@@ -49,6 +49,35 @@ function create_usage { ...@@ -49,6 +49,35 @@ function create_usage {
echo "" echo ""
} }
function acquire_vm_create_lock {
local FlockFile="/tmp/vmclone.lck"
local unlocked="0"
touch ${FlockFile} 2>/dev/null
if [[ $? -ne 0 ]]
then
echo "Cannot access lock file ${FlockFile}"
exit 2
fi
while [ $unlocked -eq 0 ]
do
exec 5>${FlockFile}
flock -nx 5
if [[ $? -ne 0 ]]
then
echo "Another instance of VM creation is running"
sleep 10
else
unlocked="1"
fi
done
chmod 666 ${FlockFile} 2>/dev/null
}
function release_vm_create_lock {
local FlockFile="/tmp/vmclone.lck"
rm -Rf ${FlockFile}
}
function create_vm { function create_vm {
echo "############################################################" echo "############################################################"
echo "OAI CI VM script" echo "OAI CI VM script"
...@@ -60,10 +89,12 @@ function create_vm { ...@@ -60,10 +89,12 @@ function create_vm {
echo "############################################################" echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base" echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################" echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml
echo "Waiting for VM to be started" echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME` VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR" echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
release_vm_create_lock
} }
ci-scripts/runTestOnVM.sh
View file @ 669724c1
...@@ -317,11 +317,18 @@ function install_epc_on_vm { ...@@ -317,11 +317,18 @@ function install_epc_on_vm {
echo "############################################################" echo "############################################################"
echo "Creating test EPC VM ($LOC_EPC_VM_NAME) on Ubuntu Cloud Image base" echo "Creating test EPC VM ($LOC_EPC_VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################" echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $LOC_EPC_VM_NAME release=xenial --unsafe-caching uvt-kvm create $LOC_EPC_VM_NAME release=xenial --unsafe-caching
echo "Waiting for VM to be started"
uvt-kvm wait $LOC_EPC_VM_NAME --insecure
release_vm_create_lock
else
echo "Waiting for VM to be started"
uvt-kvm wait $LOC_EPC_VM_NAME --insecure
fi fi
uvt-kvm wait $LOC_EPC_VM_NAME --insecure
local LOC_EPC_VM_IP_ADDR=`uvt-kvm ip $LOC_EPC_VM_NAME` local LOC_EPC_VM_IP_ADDR=`uvt-kvm ip $LOC_EPC_VM_NAME`
echo "$LOC_EPC_VM_NAME has for IP addr = $LOC_EPC_VM_IP_ADDR" echo "$LOC_EPC_VM_NAME has for IP addr = $LOC_EPC_VM_IP_ADDR"
scp -o StrictHostKeyChecking=no /etc/apt/apt.conf.d/01proxy ubuntu@$LOC_EPC_VM_IP_ADDR:/home/ubuntu scp -o StrictHostKeyChecking=no /etc/apt/apt.conf.d/01proxy ubuntu@$LOC_EPC_VM_IP_ADDR:/home/ubuntu
......
common/utils/T/tracer/gui/notify.c
View file @ 669724c1
...@@ -46,7 +46,7 @@ void unregister_notifier(gui *_g, unsigned long notifier_id) { ...@@ -46,7 +46,7 @@ void unregister_notifier(gui *_g, unsigned long notifier_id) {
if (g->notifiers[i].id == notifier_id) break; if (g->notifiers[i].id == notifier_id) break;
if (i == g->notifiers_count) if (i == g->notifiers_count)
ERR("%s:%d: notifier_id %ld not found\n", __FILE__,__LINE__,notifier_id); ERR("%s:%d: notifier_id %lu not found\n", __FILE__,__LINE__,notifier_id);
free(g->notifiers[i].notification); free(g->notifiers[i].notification);
memmove(g->notifiers + i, g->notifiers + i + 1, memmove(g->notifiers + i, g->notifiers + i + 1,
......
common/utils/T/tracer/textlog.c
View file @ 669724c1
...@@ -195,5 +195,8 @@ int main(int n, char **v) ...@@ -195,5 +195,8 @@ int main(int n, char **v)
handle_event(h, e); handle_event(h, e);
} }
free(on_off_name);
free(on_off_action);
return 0; return 0;
} }
common/utils/T/tracer/utils.c
View file @ 669724c1
...@@ -273,6 +273,6 @@ void PUTX2(OBUF *o, int i) { ...@@ -273,6 +273,6 @@ void PUTX2(OBUF *o, int i) {
void PUTUL(OBUF *o, unsigned long l) { void PUTUL(OBUF *o, unsigned long l) {
char s[128]; char s[128];
sprintf(s, "%ld", l); sprintf(s, "%lu", l);
PUTS(o, s); PUTS(o, s);
} }
openair1/PHY/TOOLS/lte_phy_scope_tm4.c
View file @ 669724c1
...@@ -812,9 +812,6 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form, ...@@ -812,9 +812,6 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
free(bit1); free(bit1);
free(bit_pdcch); free(bit_pdcch);
free(llr_pdcch); free(llr_pdcch);
for (arx=0;arx<nb_antennas_rx;arx++) {
free(chest_t_abs[arx]);
}
//This is done to avoid plotting old data when TB0 is disabled, and TB1 is mapped onto CW0 //This is done to avoid plotting old data when TB0 is disabled, and TB1 is mapped onto CW0
/*if (phy_vars_ue->transmission_mode[eNB_id]==3 && phy_vars_ue->transmission_mode[eNB_id]==4){ /*if (phy_vars_ue->transmission_mode[eNB_id]==3 && phy_vars_ue->transmission_mode[eNB_id]==4){
......
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @ 669724c1
This diff is collapsed.
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @ 669724c1
This source diff could not be displayed because it is too large. You can view the blob instead.
openair2/LAYER2/MAC/eNB_scheduler_fairRR.c
View file @ 669724c1
...@@ -295,7 +295,8 @@ void dlsch_scheduler_pre_ue_select_fairRR( ...@@ -295,7 +295,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id, CC_id,
UE_id, UE_id,
subframeP, subframeP,
S_DL_NONE); S_DL_NONE,
rnti);
end_flag[CC_id] = 1; end_flag[CC_id] = 1;
break; break;
} }
...@@ -418,7 +419,8 @@ void dlsch_scheduler_pre_ue_select_fairRR( ...@@ -418,7 +419,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id, CC_id,
UE_id, UE_id,
subframeP, subframeP,
S_DL_NONE); S_DL_NONE,
rnti);
end_flag[CC_id] = 1; end_flag[CC_id] = 1;
break; break;
} }
...@@ -541,7 +543,8 @@ void dlsch_scheduler_pre_ue_select_fairRR( ...@@ -541,7 +543,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id, CC_id,
UE_id, UE_id,
subframeP, subframeP,
S_DL_NONE); S_DL_NONE,
rnti);
end_flag[CC_id] = 1; end_flag[CC_id] = 1;
break; break;
} }
...@@ -810,7 +813,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP, ...@@ -810,7 +813,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
unsigned char ta_len = 0; unsigned char ta_len = 0;
unsigned char sdu_lcids[NB_RB_MAX], lcid, offset, num_sdus = 0; unsigned char sdu_lcids[NB_RB_MAX], lcid, offset, num_sdus = 0;
uint16_t nb_rb, nb_rb_temp, nb_available_rb; uint16_t nb_rb, nb_rb_temp, nb_available_rb;
uint16_t TBS, j, sdu_lengths[NB_RB_MAX], rnti, padding = 0, post_padding = 0; uint16_t TBS, j, sdu_lengths[NB_RB_MAX], padding = 0, post_padding = 0;
rnti_t rnti = 0;
unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES]; unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
unsigned char round = 0; unsigned char round = 0;
unsigned char harq_pid = 0; unsigned char harq_pid = 0;
...@@ -1215,8 +1219,11 @@ schedule_ue_spec_fairRR(module_id_t module_idP, ...@@ -1215,8 +1219,11 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
} }
add_ue_dlsch_info(module_idP, add_ue_dlsch_info(module_idP,
CC_id, UE_id, subframeP, CC_id,
S_DL_SCHEDULED); UE_id,
subframeP,
S_DL_SCHEDULED,
rnti);
//eNB_UE_stats->dlsch_trials[round]++; //eNB_UE_stats->dlsch_trials[round]++;
UE_list->eNB_UE_stats[CC_id][UE_id]. UE_list->eNB_UE_stats[CC_id][UE_id].
num_retransmission += 1; num_retransmission += 1;
...@@ -1678,10 +1685,10 @@ schedule_ue_spec_fairRR(module_id_t module_idP, ...@@ -1678,10 +1685,10 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
if (opt_enabled == 1) { if (opt_enabled == 1) {
trace_pdu(DIRECTION_DOWNLINK, (uint8_t *)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0], trace_pdu(DIRECTION_DOWNLINK, (uint8_t *)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
TBS, module_idP, WS_RA_RNTI, UE_RNTI(module_idP,UE_id), TBS, module_idP, WS_RA_RNTI, UE_RNTI(module_idP, UE_id),
eNB->frame, eNB->subframe,0,0); eNB->frame, eNB->subframe,0,0);
LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d rnti %x with size %d\n", LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d rnti %x with size %d\n",
module_idP, CC_id, frameP, UE_RNTI(module_idP,UE_id), TBS); module_idP, CC_id, frameP, UE_RNTI(module_idP, UE_id), TBS);
} }
T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP), T_INT(subframeP), T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP), T_INT(subframeP),
...@@ -1691,7 +1698,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP, ...@@ -1691,7 +1698,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
CC_id, CC_id,
UE_id, UE_id,
subframeP, subframeP,
S_DL_SCHEDULED); S_DL_SCHEDULED,
rnti);
// store stats // store stats
eNB->eNB_stats[CC_id].dlsch_bytes_tx+=sdu_length_total; eNB->eNB_stats[CC_id].dlsch_bytes_tx+=sdu_length_total;
eNB->eNB_stats[CC_id].dlsch_pdus_tx+=1; eNB->eNB_stats[CC_id].dlsch_pdus_tx+=1;
......
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @ 669724c1
This diff is collapsed.
openair2/LAYER2/MAC/mac_proto.h
View file @ 669724c1
...@@ -441,7 +441,7 @@ void init_ue_sched_info(void); ...@@ -441,7 +441,7 @@ void init_ue_sched_info(void);
void add_ue_ulsch_info(module_id_t module_idP, int CC_id, int UE_id, void add_ue_ulsch_info(module_id_t module_idP, int CC_id, int UE_id,
sub_frame_t subframe, UE_ULSCH_STATUS status); sub_frame_t subframe, UE_ULSCH_STATUS status);
void add_ue_dlsch_info(module_id_t module_idP, int CC_id, int UE_id, void add_ue_dlsch_info(module_id_t module_idP, int CC_id, int UE_id,
sub_frame_t subframe, UE_DLSCH_STATUS status); sub_frame_t subframe, UE_DLSCH_STATUS status, rnti_t rnti);
int find_UE_id(module_id_t module_idP, rnti_t rnti); int find_UE_id(module_id_t module_idP, rnti_t rnti);
int find_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP); int find_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP);
rnti_t UE_RNTI(module_id_t module_idP, int UE_id); rnti_t UE_RNTI(module_id_t module_idP, int UE_id);
...@@ -1209,7 +1209,6 @@ void fill_nfapi_dlsch_config(eNB_MAC_INST * eNB, ...@@ -1209,7 +1209,6 @@ void fill_nfapi_dlsch_config(eNB_MAC_INST * eNB,
void fill_nfapi_harq_information(module_id_t module_idP, void fill_nfapi_harq_information(module_id_t module_idP,
int CC_idP, int CC_idP,
uint16_t rntiP, uint16_t rntiP,
uint16_t absSFP,
nfapi_ul_config_harq_information * nfapi_ul_config_harq_information *
harq_information, uint8_t cce_idxP); harq_information, uint8_t cce_idxP);
...@@ -1223,7 +1222,8 @@ void fill_nfapi_ulsch_harq_information(module_id_t module_idP, ...@@ -1223,7 +1222,8 @@ void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
uint16_t fill_nfapi_uci_acknak(module_id_t module_idP, uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
int CC_idP, int CC_idP,
uint16_t rntiP, uint16_t rntiP,
uint16_t absSFP, uint8_t cce_idxP); uint16_t absSFP,
uint8_t cce_idxP);
void fill_nfapi_dl_dci_1A(nfapi_dl_config_request_pdu_t * dl_config_pdu, void fill_nfapi_dl_dci_1A(nfapi_dl_config_request_pdu_t * dl_config_pdu,
uint8_t aggregation_level, uint8_t aggregation_level,
......
openair2/LAYER2/MAC/pre_processor.c
View file @ 669724c1
...@@ -460,7 +460,12 @@ void decode_slice_positioning(module_id_t Mod_idP, ...@@ -460,7 +460,12 @@ void decode_slice_positioning(module_id_t Mod_idP,
// This fuction sorts the UE in order their dlsch buffer and CQI // This fuction sorts the UE in order their dlsch buffer and CQI
void sort_UEs(module_id_t Mod_idP, int slice_idx, int frameP, sub_frame_t subframeP) { void
sort_UEs(module_id_t Mod_idP,
int slice_idx,
int frameP,
sub_frame_t subframeP)
{
int i; int i;
int list[MAX_MOBILES_PER_ENB]; int list[MAX_MOBILES_PER_ENB];
int list_size = 0; int list_size = 0;
...@@ -468,16 +473,13 @@ void sort_UEs(module_id_t Mod_idP, int slice_idx, int frameP, sub_frame_t subfra ...@@ -468,16 +473,13 @@ void sort_UEs(module_id_t Mod_idP, int slice_idx, int frameP, sub_frame_t subfra
UE_list_t *UE_list = &RC.mac[Mod_idP]->UE_list; UE_list_t *UE_list = &RC.mac[Mod_idP]->UE_list;
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) { for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
if (UE_list->active[i] == FALSE) continue;
if (UE_RNTI(Mod_idP, i) == NOT_A_RNTI) continue;
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1) continue; if (UE_list->active[i] == TRUE &&
UE_RNTI(Mod_idP, i) != NOT_A_RNTI &&
if (!ue_dl_slice_membership(Mod_idP, i, slice_idx)) continue; UE_list->UE_sched_ctrl[i].ul_out_of_sync != 1 &&
ue_dl_slice_membership(Mod_idP, i, slice_idx)) {
list[list_size] = i; list[list_size++] = i;
list_size++; }
} }
decode_sorting_policy(Mod_idP, slice_idx); decode_sorting_policy(Mod_idP, slice_idx);
...@@ -1170,12 +1172,15 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id, ...@@ -1170,12 +1172,15 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
uint8_t CC_id; uint8_t CC_id;
uint16_t i, j; uint16_t i, j;
int min_rb_unit[NFAPI_CC_MAX]; int min_rb_unit[NFAPI_CC_MAX];
slice_info_t *sli = &RC.mac[Mod_id]->slice_info;
eNB_MAC_INST *eNB = RC.mac[Mod_id];
slice_info_t *sli = &eNB->slice_info;
uint16_t (*nb_rbs_required)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_required; uint16_t (*nb_rbs_required)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_required;
uint16_t (*nb_rbs_accounted)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_accounted; uint16_t (*nb_rbs_accounted)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_accounted;
uint16_t (*nb_rbs_remaining)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_remaining; uint16_t (*nb_rbs_remaining)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_remaining;
uint8_t (*MIMO_mode_indicator)[N_RBG_MAX] = sli->pre_processor_results[slice_idx].MIMO_mode_indicator; uint8_t (*MIMO_mode_indicator)[N_RBG_MAX] = sli->pre_processor_results[slice_idx].MIMO_mode_indicator;
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
UE_list_t *UE_list = &eNB->UE_list;
UE_sched_ctrl *ue_sched_ctl; UE_sched_ctrl *ue_sched_ctl;
// int rrc_status = RRC_IDLE; // int rrc_status = RRC_IDLE;
#ifdef TM5 #ifdef TM5
...@@ -1191,7 +1196,10 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id, ...@@ -1191,7 +1196,10 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
// Initialize scheduling information for all active UEs // Initialize scheduling information for all active UEs
memset(&sli->pre_processor_results[slice_idx], 0, sizeof(sli->pre_processor_results[slice_idx])); memset(&sli->pre_processor_results[slice_idx], 0, sizeof(sli->pre_processor_results[slice_idx]));
// FIXME: After the memset above, some of the resets in reset() are redundant // FIXME: After the memset above, some of the resets in reset() are redundant
dlsch_scheduler_pre_processor_reset(Mod_id, slice_idx, frameP, subframeP, dlsch_scheduler_pre_processor_reset(Mod_id,
slice_idx,
frameP,
subframeP,
min_rb_unit, min_rb_unit,
nb_rbs_required, nb_rbs_required,
rballoc_sub, rballoc_sub,
...@@ -1199,20 +1207,38 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id, ...@@ -1199,20 +1207,38 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
mbsfn_flag); // FIXME: Not sure if useful mbsfn_flag); // FIXME: Not sure if useful
// STATUS // STATUS
// Store the DLSCH buffer for each logical channel // Store the DLSCH buffer for each logical channel
store_dlsch_buffer(Mod_id, slice_idx, frameP, subframeP); store_dlsch_buffer(Mod_id,
slice_idx,
frameP,
subframeP);
// Calculate the number of RBs required by each UE on the basis of logical channel's buffer // Calculate the number of RBs required by each UE on the basis of logical channel's buffer
assign_rbs_required(Mod_id, slice_idx, frameP, subframeP, nb_rbs_required, min_rb_unit); assign_rbs_required(Mod_id,
slice_idx,
frameP,
subframeP,
nb_rbs_required,
min_rb_unit);
// Sorts the user on the basis of dlsch logical channel buffer and CQI // Sorts the user on the basis of dlsch logical channel buffer and CQI
sort_UEs(Mod_id, slice_idx, frameP, subframeP); sort_UEs(Mod_id,
slice_idx,
frameP,
subframeP);
// ACCOUNTING // ACCOUNTING
// This procedure decides the number of RBs to allocate // This procedure decides the number of RBs to allocate
dlsch_scheduler_pre_processor_accounting(Mod_id, slice_idx, frameP, subframeP, dlsch_scheduler_pre_processor_accounting(Mod_id,
slice_idx,
frameP,
subframeP,
min_rb_unit, min_rb_unit,
nb_rbs_required, nb_rbs_required,
nb_rbs_accounted); nb_rbs_accounted);
// POSITIONING // POSITIONING
// This procedure does the main allocation of the RBs // This procedure does the main allocation of the RBs
dlsch_scheduler_pre_processor_positioning(Mod_id, slice_idx, dlsch_scheduler_pre_processor_positioning(Mod_id,
slice_idx,
min_rb_unit, min_rb_unit,
nb_rbs_required, nb_rbs_required,
nb_rbs_accounted, nb_rbs_accounted,
...@@ -1222,8 +1248,9 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id, ...@@ -1222,8 +1248,9 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
// SHARING // SHARING
// If there are available RBs left in the slice, allocate them to the highest priority UEs // If there are available RBs left in the slice, allocate them to the highest priority UEs
if (RC.mac[Mod_id]->slice_info.intraslice_share_active) { if (eNB->slice_info.intraslice_share_active) {
dlsch_scheduler_pre_processor_intraslice_sharing(Mod_id, slice_idx, dlsch_scheduler_pre_processor_intraslice_sharing(Mod_id,
slice_idx,
min_rb_unit, min_rb_unit,
nb_rbs_required, nb_rbs_required,
nb_rbs_accounted, nb_rbs_accounted,
...@@ -1236,7 +1263,7 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id, ...@@ -1236,7 +1263,7 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
// This has to be revisited!!!! // This has to be revisited!!!!
for (CC_id = 0; CC_id < RC.nb_mac_CC[Mod_id]; CC_id++) { for (CC_id = 0; CC_id < RC.nb_mac_CC[Mod_id]; CC_id++) {
COMMON_channels_t *cc = &RC.mac[Mod_id]->common_channels[CC_id]; COMMON_channels_t *cc = &eNB->common_channels[CC_id];
int N_RBG = to_rbg(cc->mib->message.dl_Bandwidth); int N_RBG = to_rbg(cc->mib->message.dl_Bandwidth);
i1 = 0; i1 = 0;
i2 = 0; i2 = 0;
...@@ -1244,35 +1271,25 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id, ...@@ -1244,35 +1271,25 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
for (j = 0; j < N_RBG; j++) { for (j = 0; j < N_RBG; j++) {
if (MIMO_mode_indicator[CC_id][j] == 2) { if (MIMO_mode_indicator[CC_id][j] == 2) {
i1 = i1 + 1; i1++;
} else if (MIMO_mode_indicator[CC_id][j] == 1) { } else if (MIMO_mode_indicator[CC_id][j] == 1) {
i2 = i2 + 1; i2++;
} else if (MIMO_mode_indicator[CC_id][j] == 0) { } else if (MIMO_mode_indicator[CC_id][j] == 0) {
i3 = i3 + 1; i3++;
} }
} }
if ((i1 < N_RBG) && (i2 > 0) && (i3 == 0)) { if (i1 < N_RBG) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions = if (i2 > 0 && i3 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]-> PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions + 1;
check_for_SUMIMO_transmissions + 1; } else if (i3 > 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions + 1;
} }
} else if (i3 == N_RBG && i1 == 0 && i2 == 0) {
if (i3 == N_RBG && i1 == 0 && i2 == 0) { PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions + 1;
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions +
1;
} }
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions + 1;
if ((i1 < N_RBG) && (i3 > 0)) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->
check_for_MUMIMO_transmissions + 1;
}
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions +
1;
} }
#endif #endif
...@@ -1283,22 +1300,30 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id, ...@@ -1283,22 +1300,30 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) { for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
CC_id = UE_list->ordered_CCids[i][UE_id]; CC_id = UE_list->ordered_CCids[i][UE_id];
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[UE_id]; //PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[UE_id];
COMMON_channels_t *cc = &RC.mac[Mod_id]->common_channels[CC_id]; COMMON_channels_t *cc = &eNB->common_channels[CC_id];
int N_RBG = to_rbg(cc->mib->message.dl_Bandwidth); int N_RBG = to_rbg(cc->mib->message.dl_Bandwidth);
if (ue_sched_ctl->pre_nb_available_rbs[CC_id] > 0) { if (ue_sched_ctl->pre_nb_available_rbs[CC_id] > 0) {
LOG_D(MAC, "******************DL Scheduling Information for UE%d ************************\n", UE_id); LOG_D(MAC, "******************DL Scheduling Information for UE%d ************************\n",
LOG_D(MAC, "dl power offset UE%d = %d \n", UE_id, ue_sched_ctl->dl_pow_off[CC_id]); UE_id);
LOG_D(MAC, "***********RB Alloc for every subband for UE%d ***********\n", UE_id); LOG_D(MAC, "dl power offset UE%d = %d \n",
UE_id,
ue_sched_ctl->dl_pow_off[CC_id]);
LOG_D(MAC, "***********RB Alloc for every subband for UE%d ***********\n",
UE_id);
for (j = 0; j < N_RBG; j++) { for (j = 0; j < N_RBG; j++) {
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].rballoc_sub[UE_id] = rballoc_sub_UE[CC_id][UE_id][UE_id]; //PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].rballoc_sub[UE_id] = rballoc_sub_UE[CC_id][UE_id][UE_id];
LOG_D(MAC, "RB Alloc for UE%d and Subband%d = %d\n", UE_id, j, ue_sched_ctl->rballoc_sub_UE[CC_id][j]); LOG_D(MAC, "RB Alloc for UE%d and Subband%d = %d\n",
UE_id, j,
ue_sched_ctl->rballoc_sub_UE[CC_id][j]);
} }
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = pre_nb_available_rbs[CC_id][UE_id]; //PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = pre_nb_available_rbs[CC_id][UE_id];
LOG_D(MAC, "[eNB %d][SLICE %d]Total RBs allocated for UE%d = %d\n", LOG_D(MAC, "[eNB %d][SLICE %d]Total RBs allocated for UE%d = %d\n",
Mod_id, RC.mac[Mod_id]->slice_info.dl[slice_idx].id, UE_id, Mod_id,
eNB->slice_info.dl[slice_idx].id,
UE_id,
ue_sched_ctl->pre_nb_available_rbs[CC_id]); ue_sched_ctl->pre_nb_available_rbs[CC_id]);
} }
} }
......
openair2/LAYER2/MAC/rar_tools.c
View file @ 669724c1
...@@ -110,98 +110,124 @@ fill_rar(const module_id_t module_idP, ...@@ -110,98 +110,124 @@ fill_rar(const module_id_t module_idP,
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) #if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
/*
* Fill the RAR buffer (header + PDU) for LTE-M devices
*/
unsigned short fill_rar_br(eNB_MAC_INST *eNB, unsigned short fill_rar_br(eNB_MAC_INST *eNB,
int CC_id, int CC_id,
RA_t *ra, RA_t *ra,
const frame_t frameP, const frame_t frameP,
const sub_frame_t subframeP, const sub_frame_t subframeP,
uint8_t* const dlsch_buffer, uint8_t* const dlsch_buffer,
const uint8_t ce_level const uint8_t ce_level)
)
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
{ {
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *) dlsch_buffer;
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer;
COMMON_channels_t *cc = &eNB->common_channels[CC_id]; COMMON_channels_t *cc = &eNB->common_channels[CC_id];
uint8_t *rar = (uint8_t *)(dlsch_buffer+1); uint8_t *rar = (uint8_t *)(dlsch_buffer + 1);
uint32_t rballoc,reps;
uint32_t TPC,ULdelay,cqireq,mpdcch_nb_index;
int input_buffer_length;
uint32_t rballoc = 0;
uint32_t reps = 0;
uint32_t ULdelay = 0;
uint32_t cqireq = 0;
uint32_t mpdcch_nb_index = 0;
uint32_t TPC = 0;
int input_buffer_length = 0;
int N_NB_index = 0;
AssertFatal(ra != NULL, "RA is null \n"); AssertFatal(ra != NULL, "RA is null \n");
// subheader fixed /* Subheader fixed */
rarh->E = 0; // First and last RAR rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = ra->preamble_index; // Respond to Preamble 0 only for the moment rarh->RAPID = ra->preamble_index; // Respond to Preamble
ra->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t) (ra->timing_offset >> (2 + 4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t) (ra->timing_offset << (4 - 2)) & 0xf0; // 4 LSBs of timing advance + divide by 4
int N_NB_index; /* RAR PDU */
/* TA Command */
ra->timing_offset /= 16; // T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t) (ra->timing_offset >> 4) & 0x7f; // 7 MSBs of timing advance
rar[1] = (uint8_t) (ra->timing_offset & 0x0f) << 4; // 4 LSBs of timing advance
// Copy the Msg2 narrowband /* Copy the Msg2 narrowband */
ra->msg34_narrowband = ra->msg2_narrowband; ra->msg34_narrowband = ra->msg2_narrowband;
ra->msg3_first_rb = 0; ra->msg3_first_rb = 0;
ra->msg3_nb_rb = 2; ra->msg3_nb_rb = 2;
if (ce_level < 2) { // CE Level 0, 1 (CEmodeA)
if (ce_level < 2) { //CE Level 0,1, CEmodeA
input_buffer_length = 6; input_buffer_length = 6;
N_NB_index = get_numnarrowbandbits(cc->mib->message.dl_Bandwidth); N_NB_index = get_numnarrowbandbits(cc->mib->message.dl_Bandwidth);
rar[4] = (uint8_t)(ra->rnti>>8); /* UL Grant */
rar[5] = (uint8_t)(ra->rnti&0xff);
//cc->ra[ra_idx].timing_offset = 0;
reps = 0; reps = 0;
ra->msg3_mcs = 7; ra->msg3_mcs = 7;
TPC = 3; // no power increase TPC = 3; // no power increase
ULdelay = 0; ULdelay = 0;
cqireq = 0; cqireq = 0;
mpdcch_nb_index = 0; mpdcch_nb_index = 0;
rballoc = mac_computeRIV(6,ra->msg3_first_rb,ra->msg3_nb_rb); rballoc = mac_computeRIV(6, ra->msg3_first_rb, ra->msg3_nb_rb);
uint32_t buffer = 0; uint32_t buffer = 0;
buffer |= ra->msg34_narrowband << (16 + (4 - N_NB_index)); buffer |= ra->msg34_narrowband << (16 + (4 - N_NB_index));
buffer |= ((rballoc & 0xFF) << (12 + (4 - N_NB_index))); buffer |= ((rballoc & 0x0F) << (12 + (4 - N_NB_index)));
buffer |= ((reps & 0x03) << (10 + (4 - N_NB_index))); buffer |= ((reps & 0x03) << (10 + (4 - N_NB_index)));
buffer |= ((ra->msg3_mcs & 0x07) << (7 + (4 - N_NB_index))); buffer |= ((ra->msg3_mcs & 0x07) << (7 + (4 - N_NB_index)));
buffer |= ((TPC & 0x07) << (4 + (4 - N_NB_index))); buffer |= ((TPC & 0x07) << (4 + (4 - N_NB_index)));
buffer |= ((cqireq & 0x01) << (3 + (4 - N_NB_index))); buffer |= ((cqireq & 0x01) << (3 + (4 - N_NB_index)));
buffer |= ((ULdelay & 0x01) << (2 + (4 - N_NB_index))); buffer |= ((ULdelay & 0x01) << (2 + (4 - N_NB_index)));
buffer |= (mpdcch_nb_index << (4 - N_NB_index)); buffer |= (mpdcch_nb_index << (4 - N_NB_index));
rar[1] = (buffer>>16) & 0x0F;
rar[2] = (buffer>>8) & 0xFF;
rar[3] = buffer&0xFF;
}
else { // CE level 2,3 => CEModeB
AssertFatal(1==0,"Shouldn't get here ...\n"); rar[1] |= (uint8_t) (buffer >> 16) & 0x0F;
input_buffer_length =5; rar[2] = (uint8_t) (buffer >> 8) & 0xFF;
rar[3] = (uint8_t) buffer & 0xFF;
/* RA CRNTI */
rar[4] = (uint8_t)(ra->rnti >> 8);
rar[5] = (uint8_t)(ra->rnti & 0xff);
} else { // CE level 2, 3 (CEModeB)
AssertFatal(1 == 0, "Shouldn't get here ...\n");
rar[3] = (uint8_t)(ra->rnti>>8); input_buffer_length = 5;
rar[4] = (uint8_t)(ra->rnti&0xff);
rar[3] = (uint8_t)(ra->rnti >> 8);
rar[4] = (uint8_t)(ra->rnti & 0xff);
} }
LOG_I(MAC,"[RAPROC] Frame %d Subframe %d : Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ce_level %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n",
frameP,subframeP, LOG_I(MAC, "[RAPROC] Frame %d Subframe %d : Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ce_level %d, CRNTI %x, preamble %d/%d, TIMING OFFSET %d\n",
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5], frameP,
subframeP,
*(uint8_t*) rarh,
rar[0],
rar[1],
rar[2],
rar[3],
rar[4],
rar[5],
ce_level, ce_level,
ra->rnti, ra->rnti,
rarh->RAPID,ra->preamble_index, rarh->RAPID,
ra->preamble_index,
ra->timing_offset); ra->timing_offset);
if (opt_enabled) { if (opt_enabled) {
trace_pdu(DIRECTION_DOWNLINK , dlsch_buffer, input_buffer_length, eNB->Mod_id, WS_RA_RNTI , 1, trace_pdu(DIRECTION_DOWNLINK,
eNB->frame, eNB->subframe, 0, 0); dlsch_buffer,
LOG_D(OPT, input_buffer_length,
"[RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n", eNB->Mod_id,
frameP, ra->rnti, rarh->RAPID, input_buffer_length); WS_RA_RNTI,
1,
eNB->frame,
eNB->subframe,
0,
0);
LOG_D(OPT, "[RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
frameP,
ra->rnti,
rarh->RAPID,
input_buffer_length);
} }
return (ra->rnti); return (ra->rnti);
......
openair3/S1AP/s1ap_eNB_trace.c
View file @ 669724c1
...@@ -107,7 +107,7 @@ int s1ap_eNB_handle_trace_start(uint32_t assoc_id, ...@@ -107,7 +107,7 @@ int s1ap_eNB_handle_trace_start(uint32_t assoc_id,
{ {
S1AP_TraceStart_t *container; S1AP_TraceStart_t *container;
S1AP_TraceStartIEs_t *ie; S1AP_TraceStartIEs_t *ie;
struct s1ap_eNB_ue_context_s *ue_desc_p; struct s1ap_eNB_ue_context_s *ue_desc_p = NULL;
struct s1ap_eNB_mme_data_s *mme_ref_p; struct s1ap_eNB_mme_data_s *mme_ref_p;
DevAssert(pdu != NULL); DevAssert(pdu != NULL);
......
openair3/TEST/EPC_TEST/generate_scenario.c
View file @ 669724c1
...@@ -270,7 +270,7 @@ static void enb_config_display(void) ...@@ -270,7 +270,7 @@ static void enb_config_display(void)
printf( " ENB CONFIG FILE CONTENT LOADED:\n"); printf( " ENB CONFIG FILE CONTENT LOADED:\n");
printf( "----------------------------------------------------------------------\n"); printf( "----------------------------------------------------------------------\n");
for (i = 0; i < g_enb_properties.number; i++) { for (i = 0; i < g_enb_properties.number; i++) {
printf( "ENB CONFIG for instance %u:\n\n", i); printf( "ENB CONFIG for instance %d:\n\n", i);
printf( "\teNB name: \t%s\n",g_enb_properties.properties[i]->eNB_name); printf( "\teNB name: \t%s\n",g_enb_properties.properties[i]->eNB_name);
printf( "\teNB ID: \t%"PRIu32"\n",g_enb_properties.properties[i]->eNB_id); printf( "\teNB ID: \t%"PRIu32"\n",g_enb_properties.properties[i]->eNB_id);
printf( "\tCell type: \t%s\n",g_enb_properties.properties[i]->cell_type == CELL_MACRO_ENB ? "CELL_MACRO_ENB":"CELL_HOME_ENB"); printf( "\tCell type: \t%s\n",g_enb_properties.properties[i]->cell_type == CELL_MACRO_ENB ? "CELL_MACRO_ENB":"CELL_HOME_ENB");
......
openair3/TEST/EPC_TEST/play_scenario.c
View file @ 669724c1
...@@ -1103,7 +1103,7 @@ et_config_parse_opt_line ( ...@@ -1103,7 +1103,7 @@ et_config_parse_opt_line (
fprintf(stderr, "Please provide a valid -D/--delay-on-exit argument, %s is not a valid value\n", delay_on_exit); fprintf(stderr, "Please provide a valid -D/--delay-on-exit argument, %s is not a valid value\n", delay_on_exit);
exit(1); exit(1);
} }
printf("Delay on exit is %u\n", delay_on_exit); printf("Delay on exit is %d\n", (int) delay_on_exit);
} }
break; break;
......
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
View file @ 669724c1
...@@ -28,7 +28,12 @@ ...@@ -28,7 +28,12 @@
#include <pthread.h> #include <pthread.h>
#include <unistd.h> #include <unistd.h>
#include <stdio.h> #include <stdio.h>
#include <uhd/version.hpp>
#if UHD_VERSION < 3110000
#include <uhd/utils/thread_priority.hpp> #include <uhd/utils/thread_priority.hpp>
#else
#include <uhd/utils/thread.hpp>
#endif
#include <uhd/usrp/multi_usrp.hpp> #include <uhd/usrp/multi_usrp.hpp>
#include <uhd/version.hpp> #include <uhd/version.hpp>
#include <boost/lexical_cast.hpp> #include <boost/lexical_cast.hpp>
...@@ -183,7 +188,7 @@ static int sync_to_gps(openair0_device *device) { ...@@ -183,7 +188,7 @@ static int sync_to_gps(openair0_device *device) {
num_gps_locked++; num_gps_locked++;
std::cout << boost::format("GPS Locked\n"); std::cout << boost::format("GPS Locked\n");
} else { } else {
std::cerr << "WARNING: GPS not locked - time will not be accurate until locked" << std::endl; LOG_W(HW,"WARNING: GPS not locked - time will not be accurate until locked\n");
} }
//Set to GPS time //Set to GPS time
...@@ -724,6 +729,7 @@ void *freq_thread(void *arg) { ...@@ -724,6 +729,7 @@ void *freq_thread(void *arg) {
usrp_state_t *s = (usrp_state_t *)device->priv; usrp_state_t *s = (usrp_state_t *)device->priv;
s->usrp->set_tx_freq(device->openair0_cfg[0].tx_freq[0]); s->usrp->set_tx_freq(device->openair0_cfg[0].tx_freq[0]);
s->usrp->set_rx_freq(device->openair0_cfg[0].rx_freq[0]); s->usrp->set_rx_freq(device->openair0_cfg[0].rx_freq[0]);
return NULL;
} }
/*! \brief Set frequencies (TX/RX). Spawns a thread to handle the frequency change to not block the calling thread /*! \brief Set frequencies (TX/RX). Spawns a thread to handle the frequency change to not block the calling thread
* \param device the hardware to use * \param device the hardware to use
...@@ -1073,16 +1079,16 @@ extern "C" { ...@@ -1073,16 +1079,16 @@ extern "C" {
uhd::device_addrs_t device_adds = uhd::device::find(args); uhd::device_addrs_t device_adds = uhd::device::find(args);
if (device_adds.size() == 0) { if (device_adds.size() == 0) {
std::cerr<<"No USRP Device Found. " << std::endl; LOG_E(HW,"No USRP Device Found.\n ");
free(s); free(s);
return -1; return -1;
} else if (device_adds.size() > 1) { } else if (device_adds.size() > 1) {
std::cerr<<"More than one USRP Device Found. Please specify device more precisely in config file." << std::endl; LOG_E(HW,"More than one USRP Device Found. Please specify device more precisely in config file.\n");
free(s); free(s);
return -1; return -1;
} }
std::cerr << "Found USRP " << device_adds[0].get("type") << "\n"; LOG_I(HW,"Found USRP %s\n", device_adds[0].get("type").c_str());
double usrp_master_clock; double usrp_master_clock;
if (device_adds[0].get("type") == "b200") { if (device_adds[0].get("type") == "b200") {
...@@ -1090,7 +1096,7 @@ extern "C" { ...@@ -1090,7 +1096,7 @@ extern "C" {
device->type = USRP_B200_DEV; device->type = USRP_B200_DEV;
usrp_master_clock = 30.72e6; usrp_master_clock = 30.72e6;
args += boost::str(boost::format(",master_clock_rate=%f") % usrp_master_clock); args += boost::str(boost::format(",master_clock_rate=%f") % usrp_master_clock);
args += ",num_send_frames=256,num_recv_frames=256, send_frame_size=15360, recv_frame_size=15360" ; args += ",num_send_frames=256,num_recv_frames=256, send_frame_size=7680, recv_frame_size=7680" ;
} }
if (device_adds[0].get("type") == "n3xx") { if (device_adds[0].get("type") == "n3xx") {
...@@ -1287,8 +1293,9 @@ extern "C" { ...@@ -1287,8 +1293,9 @@ extern "C" {
samples/=10000; samples/=10000;
LOG_I(PHY,"RF board max packet size %u, size for 100µs jitter %d \n", max, samples); LOG_I(PHY,"RF board max packet size %u, size for 100µs jitter %d \n", max, samples);
if ( samples < max ) if ( samples < max ) {
stream_args_rx.args["spp"] = str(boost::format("%d") % samples ); stream_args_rx.args["spp"] = str(boost::format("%d") % samples );
}
LOG_I(PHY,"rx_max_num_samps %zu\n", LOG_I(PHY,"rx_max_num_samps %zu\n",
s->usrp->get_rx_stream(stream_args_rx)->get_max_num_samps()); s->usrp->get_rx_stream(stream_args_rx)->get_max_num_samps());
......
targets/RT/USER/lte-ru.c
View file @ 669724c1
/******************************************************************************* /*
OpenAirInterface * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
Copyright(c) 1999 - 2014 Eurecom * contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
OpenAirInterface is free software: you can redistribute it and/or modify * The OpenAirInterface Software Alliance licenses this file to You under
it under the terms of the GNU General Public License as published by * the OAI Public License, Version 1.1 (the "License"); you may not use this file
the Free Software Foundation, either version 3 of the License, or * except in compliance with the License.
(at your option) any later version. * You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
OpenAirInterface is distributed in the hope that it will be useful, *
but WITHOUT ANY WARRANTY; without even the implied warranty of * Unless required by applicable law or agreed to in writing, software
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * distributed under the License is distributed on an "AS IS" BASIS,
GNU General Public License for more details. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
You should have received a copy of the GNU General Public License * limitations under the License.
along with OpenAirInterface.The full GNU General Public License is *-------------------------------------------------------------------------------
included in this distribution in the file called "COPYING". If not, * For more information about the OpenAirInterface (OAI) Software Alliance:
see <http://www.gnu.org/licenses/>. * contact@openairinterface.org
*/
Contact Information
OpenAirInterface Admin: openair_admin@eurecom.fr
OpenAirInterface Tech : openair_tech@eurecom.fr
OpenAirInterface Dev : openair4g-devel@lists.eurecom.fr
Address : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
*******************************************************************************/
/*! \file lte-enb.c /*! \file lte-enb.c
* \brief Top-level threads for eNodeB * \brief Top-level threads for eNodeB
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment