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canghaiwuhen
OpenXG-RAN
Commits
7451f4c9
Commit
7451f4c9
authored
Nov 21, 2017
by
Raymond Knopp
Browse files
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Plain Diff
fixed MPDDCH resource element mappings and DMRS scrambling initialization
parent
2d97eb4b
Changes
4
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Side-by-side
Showing
4 changed files
with
48 additions
and
28 deletions
+48
-28
openair1/PHY/LTE_TRANSPORT/dci_tools.c
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+14
-9
openair1/PHY/LTE_TRANSPORT/edci.c
openair1/PHY/LTE_TRANSPORT/edci.c
+31
-16
openair1/SCHED/phy_procedures_lte_eNb.c
openair1/SCHED/phy_procedures_lte_eNb.c
+1
-1
openair2/LAYER2/MAC/eNB_scheduler_RA.c
openair2/LAYER2/MAC/eNB_scheduler_RA.c
+2
-2
No files found.
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @
7451f4c9
...
@@ -2218,8 +2218,8 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
...
@@ -2218,8 +2218,8 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
((
DCI6_1A_10MHz_t
*
)
dci_pdu
)
->
harq_ack_off
=
rel13
->
harq_resource_offset
;
((
DCI6_1A_10MHz_t
*
)
dci_pdu
)
->
harq_ack_off
=
rel13
->
harq_resource_offset
;
((
DCI6_1A_10MHz_t
*
)
dci_pdu
)
->
dci_rep
=
rel13
->
dci_subframe_repetition_number
;
((
DCI6_1A_10MHz_t
*
)
dci_pdu
)
->
dci_rep
=
rel13
->
dci_subframe_repetition_number
;
LOG_I
(
PHY
,
"Frame %d, Subframe %d : Programming Format 6-1A DCI, mcs %d, rballoc %x, dci_rep r%d, L %d, narrowband %d, start_symbol %d
\n
"
,
LOG_I
(
PHY
,
"Frame %d, Subframe %d : Programming Format 6-1A DCI, mcs %d, rballoc %x, dci_rep r%d, L %d, narrowband %d, start_symbol %d
, TPC %d, ra_flag %d, dci_type %d
\n
"
,
frame
,
subframe
,
rel13
->
mcs
,
rel13
->
resource_block_coding
,
1
+
rel13
->
dci_subframe_repetition_number
,
rel13
->
aggregation_level
,
rel13
->
mpdcch_narrow_band
,
dci_alloc
->
start_symbol
);
frame
,
subframe
,
rel13
->
mcs
,
rel13
->
resource_block_coding
,
1
+
rel13
->
dci_subframe_repetition_number
,
rel13
->
aggregation_level
,
rel13
->
mpdcch_narrow_band
,
dci_alloc
->
start_symbol
,
rel13
->
tpc
,
dci_alloc
->
ra_flag
,
rel13
->
rnti_type
);
break
;
break
;
case
100
:
case
100
:
dci_alloc
->
dci_length
=
sizeof_DCI6_1A_20MHz_t
;
dci_alloc
->
dci_length
=
sizeof_DCI6_1A_20MHz_t
;
...
@@ -2333,7 +2333,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
...
@@ -2333,7 +2333,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
// printf("DCI: Setting subframe_tx for subframe %d\n",subframe);
// printf("DCI: Setting subframe_tx for subframe %d\n",subframe);
dlsch0
->
subframe_tx
[(
subframe
+
2
)
%
10
]
=
1
;
dlsch0
->
subframe_tx
[(
subframe
+
2
)
%
10
]
=
1
;
LOG_I
(
PHY
,
"PDSCH : resource_block_coding %x"
,
rel13
->
resource_block_coding
);
LOG_I
(
PHY
,
"PDSCH : resource_block_coding %x
\n
"
,
rel13
->
resource_block_coding
);
conv_eMTC_rballoc
(
rel13
->
resource_block_coding
,
fp
->
N_RB_DL
,
dlsch0_harq
->
rb_alloc
);
conv_eMTC_rballoc
(
rel13
->
resource_block_coding
,
fp
->
N_RB_DL
,
dlsch0_harq
->
rb_alloc
);
...
@@ -2360,7 +2360,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
...
@@ -2360,7 +2360,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
dlsch0
->
harq_mask
=
0
;
dlsch0
->
harq_mask
=
0
;
}
}
if
((
dlsch0
->
harq_mask
&
(
1
<<
rel13
->
harq_process
))
>
0
)
{
if
((
dlsch0
->
harq_mask
&
(
1
<<
rel13
->
harq_process
))
>
0
)
{
if
(
rel13
->
new_data_indicator
!=
dlsch0_harq
->
ndi
)
if
(
(
rel13
->
new_data_indicator
!=
dlsch0_harq
->
ndi
)
||
(
dci_alloc
->
ra_flag
==
1
)
)
dlsch0_harq
->
round
=
0
;
dlsch0_harq
->
round
=
0
;
}
else
{
// process is inactive, so activate and set round to 0
}
else
{
// process is inactive, so activate and set round to 0
dlsch0_harq
->
round
=
0
;
dlsch0_harq
->
round
=
0
;
...
@@ -2369,10 +2369,15 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
...
@@ -2369,10 +2369,15 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
if
(
dlsch0_harq
->
round
==
0
)
{
if
(
dlsch0_harq
->
round
==
0
)
{
dlsch0_harq
->
status
=
ACTIVE
;
dlsch0_harq
->
status
=
ACTIVE
;
dlsch0_harq
->
mcs
=
rel13
->
mcs
;
if
(
dci_alloc
->
ra_flag
==
0
)
// get TBS from table using mcs and nb_rb
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
else
if
(
rel13
->
tpc
==
0
)
//N1A_PRB=2, get TBS from table using mcs and nb_rb=2
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
1
];
else
if
(
rel13
->
tpc
==
1
)
//N1A_PRB=3, get TBS from table using mcs and nb_rb=3
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
2
];
// MCS and TBS don't change across HARQ rounds
LOG_I
(
PHY
,
"TBS = %d(%d)
\n
"
,
dlsch0_harq
->
TBS
,
dlsch0_harq
->
mcs
);
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
}
}
dlsch0
->
active
=
1
;
dlsch0
->
active
=
1
;
dlsch0
->
harq_mask
|=
(
1
<<
rel13
->
harq_process
);
dlsch0
->
harq_mask
|=
(
1
<<
rel13
->
harq_process
);
...
@@ -2384,7 +2389,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
...
@@ -2384,7 +2389,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
dlsch0
->
harq_ids
[
dlsch0_harq
->
subframe
]
=
rel13
->
harq_process
;
dlsch0
->
harq_ids
[
dlsch0_harq
->
subframe
]
=
rel13
->
harq_process
;
dlsch0_harq
->
pdsch_start
=
rel13
->
start_symbol
;
dlsch0_harq
->
pdsch_start
=
rel13
->
start_symbol
;
LOG_I
(
PHY
,
"Setting DLSCH harq %d
to active for %d.%d
\n
"
,
rel13
->
harq_process
,
dlsch0_harq
->
frame
,
dlsch0_harq
->
subframe
);
LOG_I
(
PHY
,
"Setting DLSCH harq %d
round %d to active for %d.%d
\n
"
,
rel13
->
harq_process
,
dlsch0_harq
->
round
,
dlsch0_harq
->
frame
,
dlsch0_harq
->
subframe
);
dlsch0
->
rnti
=
rel13
->
rnti
;
dlsch0
->
rnti
=
rel13
->
rnti
;
...
...
openair1/PHY/LTE_TRANSPORT/edci.c
View file @
7451f4c9
...
@@ -84,7 +84,8 @@ void mpdcch_scrambling(LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, ui
...
@@ -84,7 +84,8 @@ void mpdcch_scrambling(LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, ui
// rule for BL/CE UEs from Section 6.8.B2 in 36.211
// rule for BL/CE UEs from Section 6.8.B2 in 36.211
x2
=
((((
j0
+
j
)
*
Nacc
)
%
10
)
<<
9
)
+
mdci
->
dmrs_scrambling_init
;
x2
=
((((
j0
+
j
)
*
Nacc
)
%
10
)
<<
9
)
+
mdci
->
dmrs_scrambling_init
;
LOG_I
(
PHY
,
"MPDCCH cinit = %x (mdci->dmrs_scrambling_init = %d)
\n
"
,
x2
,
mdci
->
dmrs_scrambling_init
);
for
(
n
=
0
;
n
<
length
;
n
++
)
{
for
(
n
=
0
;
n
<
length
;
n
++
)
{
if
((
i
&
0x1f
)
==
0
)
{
if
((
i
&
0x1f
)
==
0
)
{
s
=
lte_gold_generic
(
&
x1
,
&
x2
,
reset
);
s
=
lte_gold_generic
(
&
x1
,
&
x2
,
reset
);
...
@@ -139,26 +140,33 @@ static uint16_t mpdcch5ss2p109110tab[792];
...
@@ -139,26 +140,33 @@ static uint16_t mpdcch5ss2p109110tab[792];
void
init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
void
init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
{
int
l
,
k
,
kmod
,
re107108
=
0
,
re109110
=
0
;
int
l
,
k
,
kmod
,
re107108
=
0
,
re109110
=
0
;
int
nushift
=
eNB
->
frame_parms
.
Nid_cell
%
6
;
int
nushiftp3
=
(
eNB
->
frame_parms
.
Nid_cell
+
3
)
%
6
;
// NOTE : THIS IS FOR TM1 ONLY FOR NOW!!!!!!!
LOG_I
(
PHY
,
"Inititalizing mpdcch5ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
LOG_I
(
PHY
,
"Inititalizing mpdcch5ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
2
;
l
<
14
;
l
++
)
{
for
(
l
=
2
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
72
;
k
++
)
{
for
(
k
=
0
;
k
<
72
;
k
++
)
{
kmod
=
k
%
12
;
kmod
=
k
%
12
;
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(
kmod
==
2
)
||
(
kmod
==
3
)
||
(
kmod
==
4
)
||
(
kmod
==
7
)
||
(
kmod
==
8
)
||
(
kmod
==
9
))
{
if
((((
l
==
4
)
||
(
l
==
11
))
&&
(
kmod
!=
nushiftp3
)
&&
(
kmod
!=
(
nushiftp3
+
6
)))
||
((
l
==
7
)
&&
(
kmod
!=
nushift
)
&&
(
kmod
!=
(
nushift
+
6
))))
{
// CS RS
mpdcch5ss2p109110tab
[
re109110
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch5ss2p107108tab
[
re107108
]
=
mpdcch5ss2p109110tab
[
re109110
];
re107108
++
;
re109110
++
;
printf
(
"CSRS: l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
if
(((
l
!=
4
)
&&
(
l
!=
7
)
&&
(
l
!=
11
))
&&
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(
kmod
==
2
)
||
(
kmod
==
3
)
||
(
kmod
==
4
)
||
(
kmod
==
7
)
||
(
kmod
==
8
)
||
(
kmod
==
9
)))
{
mpdcch5ss2p109110tab
[
re109110
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch5ss2p109110tab
[
re109110
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch5ss2p107108tab
[
re107108
]
=
mpdcch5ss2p109110tab
[
re109110
];
mpdcch5ss2p107108tab
[
re107108
]
=
mpdcch5ss2p109110tab
[
re109110
];
re107108
++
;
re107108
++
;
re109110
++
;
re109110
++
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
else
if
((
kmod
==
0
)
||
(
kmod
==
5
)
||
(
kmod
==
10
))
{
mpdcch5ss2p109110tab
[
re109110
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
else
if
((
kmod
==
1
)
||
(
kmod
==
6
)
||
(
kmod
==
11
))
{
mpdcch5ss2p107108tab
[
re107108
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
}
}
}
}
}
AssertFatal
(
re107108
==
792
,
"RE count not equal to 792
\n
"
);
AssertFatal
(
re107108
==
684
,
"RE count not equal to 684
\n
"
);
}
}
// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
...
@@ -295,6 +303,10 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
...
@@ -295,6 +303,10 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
// Assumption: only handle a single MPDCCH per narrowband
// Assumption: only handle a single MPDCCH per narrowband
int
nsymb
=
(
fp
->
Ncp
==
0
)
?
14
:
12
;
int
symbol_offset
=
(
uint32_t
)
fp
->
ofdm_symbol_size
*
(
subframe
*
nsymb
);
LOG_I
(
PHY
,
"generate_mdci_top: num_dci %d
\n
"
,
mpdcch
->
num_dci
);
LOG_I
(
PHY
,
"generate_mdci_top: num_dci %d
\n
"
,
mpdcch
->
num_dci
);
for
(
i
=
0
;
i
<
mpdcch
->
num_dci
;
i
++
)
{
for
(
i
=
0
;
i
<
mpdcch
->
num_dci
;
i
++
)
{
...
@@ -310,11 +322,10 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
...
@@ -310,11 +322,10 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
// These are to avoid unimplemented things
// These are to avoid unimplemented things
AssertFatal
(
mdci
->
ce_mode
==
1
,
"CE mode (%d) B not activated yet
\n
"
,
mdci
->
ce_mode
);
AssertFatal
(
mdci
->
ce_mode
==
1
,
"CE mode (%d) B not activated yet
\n
"
,
mdci
->
ce_mode
);
AssertFatal
(
mdci
->
L
==
24
,
"Only 2+4 and aggregation 24 for now
\n
"
);
AssertFatal
(
mdci
->
L
==
24
,
"Only 2+4 and aggregation 24 for now
\n
"
);
int
a_index
=
mdci
->
rnti
&
3
;
LOG_I
(
PHY
,
"mdci %d
: rnti %x, L %d, prb_pairs %d, ce_mode %d, i0 %d, ss %d
\n
"
,
i
,
mdci
->
rnti
,
mdci
->
L
,
mdci
->
number_of_prb_pairs
,
mdci
->
ce_mode
,
mdci
->
i0
,
mdci
->
start_symbol
);
LOG_I
(
PHY
,
"mdci %d
, length %d: rnti %x, L %d, prb_pairs %d, ce_mode %d, i0 %d, ss %d Ant %d
\n
"
,
i
,
mdci
->
dci_length
,
mdci
->
rnti
,
mdci
->
L
,
mdci
->
number_of_prb_pairs
,
mdci
->
ce_mode
,
mdci
->
i0
,
mdci
->
start_symbol
,(
a_index
<
2
)
?
107
:
109
);
i0
=
mdci
->
i0
;
i0
=
mdci
->
i0
;
// antenna index
// antenna index
int
a_index
=
mdci
->
rnti
&
3
;
if
((
mdci
->
start_symbol
==
1
)
&&
(
a_index
<
2
))
{
if
((
mdci
->
start_symbol
==
1
)
&&
(
a_index
<
2
))
{
mpdcchtab
=
mpdcch5ss1p107108tab
;
mpdcchtab
=
mpdcch5ss1p107108tab
;
...
@@ -390,7 +401,7 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
...
@@ -390,7 +401,7 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
int
re_offset
=
fp
->
first_carrier_offset
+
(
12
*
nb_i0
)
+
mdci
->
narrowband
*
12
*
6
;
int
re_offset
=
fp
->
first_carrier_offset
+
(
12
*
nb_i0
)
+
mdci
->
narrowband
*
12
*
6
;
if
(
re_offset
>
fp
->
ofdm_symbol_size
)
if
(
re_offset
>
fp
->
ofdm_symbol_size
)
re_offset
-=
(
fp
->
ofdm_symbol_size
-
1
);
re_offset
-=
(
fp
->
ofdm_symbol_size
-
1
);
int32_t
*
txF
=
&
txdataF
[
0
][
re_offset
];
int32_t
*
txF
=
&
txdataF
[
0
][
symbol_offset
+
re_offset
];
int32_t
yIQ
;
int32_t
yIQ
;
for
(
i
=
0
;
i
<
(
coded_bits
>>
1
);
i
++
)
{
for
(
i
=
0
;
i
<
(
coded_bits
>>
1
);
i
++
)
{
...
@@ -426,17 +437,19 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
...
@@ -426,17 +437,19 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
idelta
=
Nacc
-
2
;
idelta
=
Nacc
-
2
;
j0
=
(
i0
+
idelta
)
/
Nacc
;
j0
=
(
i0
+
idelta
)
/
Nacc
;
j
=
(
i
-
i0
)
/
Nacc
;
j
=
(
absSF
-
i0
)
/
Nacc
;
uint32_t
a
=
((((
j0
+
j
)
*
Nacc
)
%
10
)
+
1
);
uint32_t
a
=
((((
j0
+
j
)
*
Nacc
)
%
10
)
+
1
);
uint32_t
b
=
((
mdci
->
dmrs_scrambling_init
<<
1
)
+
1
)
<<
16
;
uint32_t
b
=
((
mdci
->
dmrs_scrambling_init
<<
1
)
+
1
)
<<
16
;
x2
=
a
*
b
;
x2
=
a
*
b
;
LOG_I
(
PHY
,
"mpdcch_dmrs cinit %d
\n
"
,
x2
);
x2
=
x2
+
2
;
LOG_I
(
PHY
,
"mpdcch_dmrs cinit %x (a=%d,b=%d,i0=%d,j0=%d)
\n
"
,
x2
,
a
,
b
,
i0
,
j0
);
// add MPDCCH pilots
// add MPDCCH pilots
int
reset
=
1
;
int
reset
=
1
;
//gain_lin_QPSK*=2;
for
(
i
=
0
;
i
<
(
24
*
6
);
i
+=
2
)
{
for
(
i
=
0
;
i
<
(
24
*
6
);
i
+=
2
)
{
if
((
i
&
0x1f
)
==
0
)
{
if
((
i
&
0x1f
)
==
0
)
{
s
=
lte_gold_generic
(
&
x1
,
&
x2
,
reset
);
s
=
lte_gold_generic
(
&
x1
,
&
x2
,
reset
);
...
@@ -444,7 +457,9 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
...
@@ -444,7 +457,9 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
}
}
((
int16_t
*
)
&
yIQ
)[
0
]
=
(((
s
>>
(
i
&
0x1f
))
&
1
)
==
1
)
?
-
gain_lin_QPSK
:
gain_lin_QPSK
;
((
int16_t
*
)
&
yIQ
)[
0
]
=
(((
s
>>
(
i
&
0x1f
))
&
1
)
==
1
)
?
-
gain_lin_QPSK
:
gain_lin_QPSK
;
((
int16_t
*
)
&
yIQ
)[
1
]
=
(((
s
>>
((
i
+
1
)
&
0x1f
))
&
1
)
==
1
)
?
-
gain_lin_QPSK
:
gain_lin_QPSK
;
((
int16_t
*
)
&
yIQ
)[
1
]
=
(((
s
>>
((
i
+
1
)
&
0x1f
))
&
1
)
==
1
)
?
-
gain_lin_QPSK
:
gain_lin_QPSK
;
txF
[
off
+
mpdcch_dmrs_tab
[(
i
>>
1
)]]
=
yIQ
;
txF
[
mpdcch_dmrs_tab
[(
i
>>
1
)]]
=
yIQ
;
txF
[
mpdcch_dmrs_tab
[
1
+
(
i
>>
1
)]]
=
yIQ
;
LOG_D
(
PHY
,
"mpdcch_dmrs pos %d: %d => (%d,%d)
\n
"
,
i
,
off
+
mpdcch_dmrs_tab
[(
i
>>
1
)],
((
int16_t
*
)
&
yIQ
)[
0
],
((
int16_t
*
)
&
yIQ
)[
1
]);
LOG_D
(
PHY
,
"mpdcch_dmrs pos %d: %d => (%d,%d)
\n
"
,
i
,
off
+
mpdcch_dmrs_tab
[(
i
>>
1
)],
((
int16_t
*
)
&
yIQ
)[
0
],
((
int16_t
*
)
&
yIQ
)[
1
]);
}
}
}
}
...
...
openair1/SCHED/phy_procedures_lte_eNb.c
View file @
7451f4c9
...
@@ -535,7 +535,7 @@ prach_procedures (PHY_VARS_eNB * eNB,
...
@@ -535,7 +535,7 @@ prach_procedures (PHY_VARS_eNB * eNB,
eNB
->
preamble_list_br
[
ind
].
preamble_rel8
.
timing_advance
=
max_preamble_delay
[
ind
];
//
eNB
->
preamble_list_br
[
ind
].
preamble_rel8
.
timing_advance
=
max_preamble_delay
[
ind
];
//
eNB
->
preamble_list_br
[
ind
].
preamble_rel8
.
preamble
=
max_preamble
[
ind
];
eNB
->
preamble_list_br
[
ind
].
preamble_rel8
.
preamble
=
max_preamble
[
ind
];
// note: fid is implicitly 0 here, this is the rule for eMTC RA-RNTI from 36.321, Section 5.1.4
// note: fid is implicitly 0 here, this is the rule for eMTC RA-RNTI from 36.321, Section 5.1.4
eNB
->
preamble_list_br
[
ind
].
preamble_rel8
.
rnti
=
1
+
subframe
+
(
eNB
->
prach_vars_br
.
first_frame
[
ce_level
]
%
40
);
eNB
->
preamble_list_br
[
ind
].
preamble_rel8
.
rnti
=
1
+
subframe
+
(
60
*
(
eNB
->
prach_vars_br
.
first_frame
[
ce_level
]
%
40
)
);
eNB
->
preamble_list_br
[
ind
].
instance_length
=
0
;
//don't know exactly what this is
eNB
->
preamble_list_br
[
ind
].
instance_length
=
0
;
//don't know exactly what this is
eNB
->
preamble_list_br
[
ind
].
preamble_rel13
.
rach_resource_type
=
1
+
ce_level
;
// CE Level
eNB
->
preamble_list_br
[
ind
].
preamble_rel13
.
rach_resource_type
=
1
+
ce_level
;
// CE Level
LOG_D
(
PHY
,
"Filling NFAPI indication for RACH %d CELevel %d (mask %x) : TA %d, Preamble %d, rnti %x, rach_resource_type %d
\n
"
,
LOG_D
(
PHY
,
"Filling NFAPI indication for RACH %d CELevel %d (mask %x) : TA %d, Preamble %d, rnti %x, rach_resource_type %d
\n
"
,
...
...
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @
7451f4c9
...
@@ -275,7 +275,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
...
@@ -275,7 +275,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
initial_transmission_sf_io
=
(
frameP
*
10
)
+
subframeP
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
initial_transmission_sf_io
=
(
frameP
*
10
)
+
subframeP
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
transmission_power
=
6000
;
// 0dB
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
transmission_power
=
6000
;
// 0dB
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
resource_block_coding
=
getRIV
(
6
,
0
,
6
)
|
(
RA_template
->
msg2_narrowband
<<
5
);
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
resource_block_coding
=
getRIV
(
6
,
0
,
6
)
|
(
RA_template
->
msg2_narrowband
<<
5
);
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
mcs
=
4
;
// adjust according to size of RAR, 208 bits with N1A_PRB=3
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
mcs
=
1
;
// adjust according to size of RAR, 208 bits with N1A_PRB=3
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
pdsch_reptition_levels
=
4
;
// fix to 4 for now
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
pdsch_reptition_levels
=
4
;
// fix to 4 for now
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
redundancy_version
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
redundancy_version
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
new_data_indicator
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
new_data_indicator
=
0
;
...
@@ -286,7 +286,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
...
@@ -286,7 +286,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
pmi
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
pmi
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
harq_resource_offset
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
harq_resource_offset
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
dci_subframe_repetition_number
=
rep
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
dci_subframe_repetition_number
=
rep
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
tpc
=
1
;
// N1A_PRB=3 (36.212); => 208 bits for mcs=4, choose mcs according t message size TBD
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
tpc
=
0
;
// N1A_PRB=2 (36.212);
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
downlink_assignment_index_length
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
downlink_assignment_index_length
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
downlink_assignment_index
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
downlink_assignment_index
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
allocate_prach_flag
=
0
;
dl_config_pdu
->
mpdcch_pdu
.
mpdcch_pdu_rel13
.
allocate_prach_flag
=
0
;
...
...
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