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Commit 75baa396 authored by Raymond Knopp's avatar Raymond Knopp
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Rework of UE in lte-softmodem.c for ExpressMIMO2 target 

git-svn-id: http://svn.eurecom.fr/openair4G/trunk@6484 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent efdf9907
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Showing with 611 additions and 538 deletions
openair1/PHY/LTE_TRANSPORT/prach.c
View file @ 75baa396
...@@ -45,7 +45,7 @@ ...@@ -45,7 +45,7 @@
#include "SCHED/extern.h" #include "SCHED/extern.h"
#include "UTIL/LOG/vcd_signal_dumper.h" #include "UTIL/LOG/vcd_signal_dumper.h"
//#define PRACH_DEBUG 1 #define PRACH_DEBUG 1
uint16_t NCS_unrestricted[16] = {0,13,15,18,22,26,32,38,46,59,76,93,119,167,279,419}; uint16_t NCS_unrestricted[16] = {0,13,15,18,22,26,32,38,46,59,76,93,119,167,279,419};
uint16_t NCS_restricted[15] = {15,18,22,26,32,38,46,55,68,82,100,128,158,202,237}; // high-speed case uint16_t NCS_restricted[15] = {15,18,22,26,32,38,46,55,68,82,100,128,158,202,237}; // high-speed case
......
openair1/PHY/defs.h
View file @ 75baa396
...@@ -403,6 +403,7 @@ typedef struct ...@@ -403,6 +403,7 @@ typedef struct
uint8_t Mod_id; uint8_t Mod_id;
uint8_t CC_id; uint8_t CC_id;
uint8_t local_flag; uint8_t local_flag;
int is_synchronized;
int instance_cnt_tx; int instance_cnt_tx;
int instance_cnt_rx; int instance_cnt_rx;
int instance_cnt_synch; int instance_cnt_synch;
......
openair1/SCHED/phy_procedures_lte_ue.c
View file @ 75baa396
...@@ -624,7 +624,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra ...@@ -624,7 +624,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
int8_t Po_PUCCH; int8_t Po_PUCCH;
int32_t ulsch_start=0; int32_t ulsch_start=0;
#ifdef EXMIMO #ifdef EXMIMO
int ulsch_end=0,overflow=0; int overflow=0;
int k,l; int k,l;
#endif #endif
int slot_tx = phy_vars_ue->slot_tx; int slot_tx = phy_vars_ue->slot_tx;
...@@ -637,6 +637,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra ...@@ -637,6 +637,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
#endif #endif
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
start_meas(&phy_vars_ue->phy_proc_tx); start_meas(&phy_vars_ue->phy_proc_tx);
#ifdef EMOS #ifdef EMOS
...@@ -649,7 +650,8 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra ...@@ -649,7 +650,8 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
if ((abstraction_flag==0)) { if ((abstraction_flag==0)) {
for (aa=0;aa<frame_parms->nb_antennas_tx;aa++){ for (aa=0;aa<frame_parms->nb_antennas_tx;aa++){
memset(&phy_vars_ue->lte_ue_common_vars.txdataF[aa][subframe_tx*frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti], memset(&phy_vars_ue->lte_ue_common_vars.txdataF[aa][subframe_tx*frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti],
0,frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti*sizeof(int32_t)); 0,
frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti*sizeof(int32_t));
} }
} }
...@@ -1180,18 +1182,19 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra ...@@ -1180,18 +1182,19 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
#endif // end CBA #endif // end CBA
if (abstraction_flag == 0) { if (abstraction_flag == 0) {
if (generate_ul_signal == 1 ) { nsymb = (frame_parms->Ncp == 0) ? 14 : 12;
nsymb = (frame_parms->Ncp == 0) ? 14 : 12;
#ifdef EXMIMO //this is the EXPRESS MIMO case #ifdef EXMIMO //this is the EXPRESS MIMO case
ulsch_start = (phy_vars_ue->rx_offset+subframe_tx*frame_parms->samples_per_tti-openair_daq_vars.timing_advance-phy_vars_ue->timing_advance-phy_vars_ue->N_TA_offset+5)%(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti); ulsch_start = (phy_vars_ue->rx_offset+subframe_tx*frame_parms->samples_per_tti-openair_daq_vars.timing_advance-phy_vars_ue->timing_advance-phy_vars_ue->N_TA_offset+5)%(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti);
#else //this is the normal case #else //this is the normal case
ulsch_start = (frame_parms->samples_per_tti*subframe_tx)-phy_vars_ue->N_TA_offset; ulsch_start = (frame_parms->samples_per_tti*subframe_tx)-phy_vars_ue->N_TA_offset;
#endif //else EXMIMO #endif //else EXMIMO
if (generate_ul_signal == 1 ) {
start_meas(&phy_vars_ue->ofdm_mod_stats);
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) { start_meas(&phy_vars_ue->ofdm_mod_stats);
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
if (frame_parms->Ncp == 1) if (frame_parms->Ncp == 1)
PHY_ofdm_mod(&phy_vars_ue->lte_ue_common_vars.txdataF[aa][subframe_tx*nsymb*frame_parms->ofdm_symbol_size], PHY_ofdm_mod(&phy_vars_ue->lte_ue_common_vars.txdataF[aa][subframe_tx*nsymb*frame_parms->ofdm_symbol_size],
#ifdef EXMIMO #ifdef EXMIMO
...@@ -1214,18 +1217,18 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra ...@@ -1214,18 +1217,18 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
#endif #endif
nsymb, nsymb,
&phy_vars_ue->lte_frame_parms); &phy_vars_ue->lte_frame_parms);
/* /*
if (subframe_tx == 8) { if (subframe_tx == 8) {
printf("Symbol 0 %p (offset %d) base %p\n", printf("Symbol 0 %p (offset %d) base %p\n",
&phy_vars_ue->lte_ue_common_vars.txdataF[0][nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX*subframe], &phy_vars_ue->lte_ue_common_vars.txdataF[0][nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX*subframe],
nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX*subframe, nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX*subframe,
phy_vars_ue->lte_ue_common_vars.txdataF[0]); phy_vars_ue->lte_ue_common_vars.txdataF[0]);
write_output("txsigF8.m","txsF8", &phy_vars_ue->lte_ue_common_vars.txdataF[0][nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX*subframe], write_output("txsigF8.m","txsF8", &phy_vars_ue->lte_ue_common_vars.txdataF[0][nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX*subframe],
phy_vars_ue->lte_frame_parms.ofdm_symbol_size*nsymb,1,1); phy_vars_ue->lte_frame_parms.ofdm_symbol_size*nsymb,1,1);
write_output("txsig8.m","txs8", &phy_vars_ue->lte_ue_common_vars.txdata[0][phy_vars_ue->lte_frame_parms.samples_per_tti*subframe], write_output("txsig8.m","txs8", &phy_vars_ue->lte_ue_common_vars.txdata[0][phy_vars_ue->lte_frame_parms.samples_per_tti*subframe],
phy_vars_ue->lte_frame_parms.samples_per_tti,1,1); phy_vars_ue->lte_frame_parms.samples_per_tti,1,1);
} }
*/ */
#ifndef OFDMA_ULSCH #ifndef OFDMA_ULSCH
#ifdef EXMIMO #ifdef EXMIMO
...@@ -1236,13 +1239,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra ...@@ -1236,13 +1239,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
apply_7_5_kHz(phy_vars_ue,&phy_vars_ue->lte_ue_common_vars.txdata[aa][ulsch_start],1); apply_7_5_kHz(phy_vars_ue,&phy_vars_ue->lte_ue_common_vars.txdata[aa][ulsch_start],1);
#endif #endif
/* /*
if (subframe_tx == 8) { if (subframe_tx == 8) {
write_output("txsig8_mod.m","txs8_mod", &phy_vars_ue->lte_ue_common_vars.txdata[0][phy_vars_ue->lte_frame_parms.samples_per_tti*subframe], write_output("txsig8_mod.m","txs8_mod", &phy_vars_ue->lte_ue_common_vars.txdata[0][phy_vars_ue->lte_frame_parms.samples_per_tti*subframe],
phy_vars_ue->lte_frame_parms.samples_per_tti,1,1); phy_vars_ue->lte_frame_parms.samples_per_tti,1,1);
} }
*/ */
#endif #endif
#ifdef EXMIMO #ifdef EXMIMO
overflow = ulsch_start - 9*frame_parms->samples_per_tti; overflow = ulsch_start - 9*frame_parms->samples_per_tti;
//if ((slot_tx==4) && (aa==0)) printf("ulsch_start %d, overflow %d\n",ulsch_start,overflow); //if ((slot_tx==4) && (aa==0)) printf("ulsch_start %d, overflow %d\n",ulsch_start,overflow);
...@@ -1257,10 +1260,15 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra ...@@ -1257,10 +1260,15 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
((short*)phy_vars_ue->lte_ue_common_vars.txdata[aa])[2*k+1] = ((short*)dummy_tx_buffer)[2*l+1]<<4; ((short*)phy_vars_ue->lte_ue_common_vars.txdata[aa])[2*k+1] = ((short*)dummy_tx_buffer)[2*l+1]<<4;
} }
#endif #endif
} //nb_antennas_tx } //nb_antennas_tx
stop_meas(&phy_vars_ue->ofdm_mod_stats); stop_meas(&phy_vars_ue->ofdm_mod_stats);
} // generate_ul_signal == 1 } // generate_ul_signal == 1
else { // no uplink so clear signal buffer instead
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
memset(&phy_vars_ue->lte_ue_common_vars.txdata[aa][ulsch_start],0,frame_parms->samples_per_tti<<2);
}
}
} }
} // mode != PRACH } // mode != PRACH
// }// slot_tx is even // }// slot_tx is even
...@@ -1319,9 +1327,11 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra ...@@ -1319,9 +1327,11 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
#else #else
phy_vars_ue->lte_ue_prach_vars[eNB_id]->amp = AMP; phy_vars_ue->lte_ue_prach_vars[eNB_id]->amp = AMP;
#endif #endif
start_meas(&phy_vars_ue->tx_prach); // start_meas(&phy_vars_ue->tx_prach);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_IN);
prach_power = generate_prach(phy_vars_ue,eNB_id,subframe_tx,frame_tx); prach_power = generate_prach(phy_vars_ue,eNB_id,subframe_tx,frame_tx);
stop_meas(&phy_vars_ue->tx_prach); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_OUT);
// stop_meas(&phy_vars_ue->tx_prach);
LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n", LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n",
Mod_id, Mod_id,
get_PL(Mod_id,CC_id,eNB_id), get_PL(Mod_id,CC_id,eNB_id),
...@@ -1394,8 +1404,8 @@ void lte_ue_measurement_procedures(uint16_t l, PHY_VARS_UE *phy_vars_ue,uint8_t ...@@ -1394,8 +1404,8 @@ void lte_ue_measurement_procedures(uint16_t l, PHY_VARS_UE *phy_vars_ue,uint8_t
LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_ue->lte_frame_parms; LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_ue->lte_frame_parms;
// int aa; // int aa;
#if defined(EXMIMO) && defined(DRIVER2013) #if defined(EXMIMO) && defined(DRIVER2013)
exmimo_config_t *p_exmimo_config = openair0_exmimo_pci[0].exmimo_config_ptr; // exmimo_config_t *p_exmimo_config = openair0_exmimo_pci[0].exmimo_config_ptr;
int aa; // int aa;
#endif #endif
int Mod_id=phy_vars_ue->Mod_id; int Mod_id=phy_vars_ue->Mod_id;
int slot_rx = phy_vars_ue->slot_rx; int slot_rx = phy_vars_ue->slot_rx;
...@@ -2117,7 +2127,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst ...@@ -2117,7 +2127,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
(dci_alloc_rx[i].format == format1A)) { (dci_alloc_rx[i].format == format1A)) {
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] subframe %d: Found rnti %x, format 1A, dci_cnt %d\n",phy_vars_ue->Mod_id,subframe_rx,dci_alloc_rx[i].rnti,i); LOG_D(PHY,"[UE %d] subframe %d: Found rnti %x, format 1A, dci_cnt %d\n",phy_vars_ue->Mod_id,subframe_rx,dci_alloc_rx[i].rnti,i);
/* /*
if (((frame_rx%100) == 0) || (frame_rx < 20)) if (((frame_rx%100) == 0) || (frame_rx < 20))
dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]); dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
...@@ -2194,7 +2204,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst ...@@ -2194,7 +2204,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
else if( (dci_alloc_rx[i].rnti == phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti) && else if( (dci_alloc_rx[i].rnti == phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti) &&
(dci_alloc_rx[i].format == format0)) { (dci_alloc_rx[i].format == format0)) {
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d][PUSCH] Frame %d subframe %d: Found rnti %x, format 0, dci_cnt %d\n", LOG_D(PHY,"[UE %d][PUSCH] Frame %d subframe %d: Found rnti %x, format 0, dci_cnt %d\n",
phy_vars_ue->Mod_id,frame_rx,subframe_rx,dci_alloc_rx[i].rnti,i); phy_vars_ue->Mod_id,frame_rx,subframe_rx,dci_alloc_rx[i].rnti,i);
/* /*
if (((frame_rx%100) == 0) || (frame_rx < 20)) if (((frame_rx%100) == 0) || (frame_rx < 20))
...@@ -2332,8 +2342,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst ...@@ -2332,8 +2342,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
#endif #endif
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_UE, (slot_rx + 1) % 20);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_UE, frame_rx);
start_meas(&phy_vars_ue->phy_proc_rx); start_meas(&phy_vars_ue->phy_proc_rx);
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
...@@ -2641,7 +2650,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst ...@@ -2641,7 +2650,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
// SI_DLSCH // SI_DLSCH
if (phy_vars_ue->dlsch_ue_SI[eNB_id]->active == 1) { if (phy_vars_ue->dlsch_ue_SI[eNB_id]->active == 1) {
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
LOG_I(PHY,"SI is active in subframe %d\n",subframe_prev); LOG_D(PHY,"SI is active in subframe %d\n",subframe_prev);
#endif #endif
// process symbols 10,11,12 (13) of last SF and trigger DLSCH decoding // process symbols 10,11,12 (13) of last SF and trigger DLSCH decoding
...@@ -2688,7 +2697,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst ...@@ -2688,7 +2697,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
frame_rx,subframe_prev); frame_rx,subframe_prev);
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
LOG_I(PHY,"Decoding DLSCH_SI : rb_alloc %x : nb_rb %d G %d TBS %d\n",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc[0], LOG_D(PHY,"Decoding DLSCH_SI : rb_alloc %x : nb_rb %d G %d TBS %d\n",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc[0],
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb, phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->G, phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->G,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS); phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS);
...@@ -2731,7 +2740,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst ...@@ -2731,7 +2740,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
if (ret == (1+phy_vars_ue->dlsch_ue_SI[eNB_id]->max_turbo_iterations)) { if (ret == (1+phy_vars_ue->dlsch_ue_SI[eNB_id]->max_turbo_iterations)) {
phy_vars_ue->dlsch_SI_errors[eNB_id]++; phy_vars_ue->dlsch_SI_errors[eNB_id]++;
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] Frame %d, subframe %d, received SI in error\n",phy_vars_ue->Mod_id,frame_rx,subframe_prev); LOG_D(PHY,"[UE %d] Frame %d, subframe %d, received SI in error\n",phy_vars_ue->Mod_id,frame_rx,subframe_prev);
#endif #endif
#ifdef USER_MODE #ifdef USER_MODE
...@@ -2746,7 +2755,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst ...@@ -2746,7 +2755,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
//if ((frame_rx % 100) == 0) //if ((frame_rx % 100) == 0)
LOG_I(PHY,"[UE %d] Frame %d, subframe %d, received SI for TBS %d\n", LOG_D(PHY,"[UE %d] Frame %d, subframe %d, received SI for TBS %d\n",
phy_vars_ue->Mod_id,frame_rx,subframe_prev,phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS); phy_vars_ue->Mod_id,frame_rx,subframe_prev,phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS);
#endif #endif
...@@ -3609,11 +3618,11 @@ void phy_UE_lte_check_measurement_thresholds(instance_t instanceP, ral_threshold ...@@ -3609,11 +3618,11 @@ void phy_UE_lte_check_measurement_thresholds(instance_t instanceP, ral_threshold
#endif #endif
if ((subframe_select(&phy_vars_ue->lte_frame_parms,subframe_tx)==SF_UL)|| if ((subframe_select(&phy_vars_ue->lte_frame_parms,subframe_tx)==SF_UL)||
(phy_vars_ue->lte_frame_parms.frame_type == 0)){ (phy_vars_ue->lte_frame_parms.frame_type == FDD)){
phy_procedures_UE_TX(phy_vars_ue,eNB_id,abstraction_flag,mode,r_type); phy_procedures_UE_TX(phy_vars_ue,eNB_id,abstraction_flag,mode,r_type);
} }
if ((subframe_select(&phy_vars_ue->lte_frame_parms,subframe_rx)==SF_DL) || if ((subframe_select(&phy_vars_ue->lte_frame_parms,subframe_rx)==SF_DL) ||
(phy_vars_ue->lte_frame_parms.frame_type == 0)){ (phy_vars_ue->lte_frame_parms.frame_type == FDD)){
#ifdef Rel10 #ifdef Rel10
if (phy_procedures_RN_UE_RX(slot_rx, slot_tx, r_type) != 0 ) if (phy_procedures_RN_UE_RX(slot_rx, slot_tx, r_type) != 0 )
#endif #endif
......
openair2/LAYER2/MAC/ue_procedures.c
View file @ 75baa396
...@@ -345,7 +345,7 @@ void ue_send_sdu(module_id_t module_idP, uint8_t CC_id,frame_t frameP,uint8_t *s ...@@ -345,7 +345,7 @@ void ue_send_sdu(module_id_t module_idP, uint8_t CC_id,frame_t frameP,uint8_t *s
#ifdef DEBUG_HEADER_PARSING #ifdef DEBUG_HEADER_PARSING
LOG_D(MAC,"[UE] CE %d : UE Timing Advance : %d\n",i,payload_ptr[0]); LOG_D(MAC,"[UE] CE %d : UE Timing Advance : %d\n",i,payload_ptr[0]);
#endif #endif
//mac_xface->process_timing_advance(module_idP,payload_ptr[0]); mac_xface->process_timing_advance(module_idP,CC_id,payload_ptr[0]);
payload_ptr++; payload_ptr++;
break; break;
case DRX_CMD: case DRX_CMD:
......
openair2/UTIL/LOG/vcd_signal_dumper.c
View file @ 75baa396
...@@ -77,9 +77,15 @@ struct vcd_module_s { ...@@ -77,9 +77,15 @@ struct vcd_module_s {
const char* eurecomVariablesNames[] = { const char* eurecomVariablesNames[] = {
"frame_number_TX_eNB", "frame_number_TX_eNB",
"frame_number_RX_eNB", "frame_number_RX_eNB",
"frame_number_UE", "frame_number_TX_UE",
"slot_number_UE", "frame_number_RX_UE",
"slot_number_TX_UE",
"slot_number_RX_UE",
"subframe_number_TX_UE",
"subframe_number_RX_UE",
"daq_mbox", "daq_mbox",
"rx_offset_mbox",
"ue_rx_offset",
"diff2", "diff2",
"hw_subframe", "hw_subframe",
"hw_frame", "hw_frame",
...@@ -164,6 +170,7 @@ const char* eurecomFunctionsNames[] = { ...@@ -164,6 +170,7 @@ const char* eurecomFunctionsNames[] = {
"phy_enb_prach_rx", "phy_enb_prach_rx",
"phy_enb_pdcch_tx", "phy_enb_pdcch_tx",
"phy_enb_rs_tx", "phy_enb_rs_tx",
"phy_ue_generate_prach",
"phy_ue_ulsch_modulation", "phy_ue_ulsch_modulation",
"phy_ue_ulsch_encoding", "phy_ue_ulsch_encoding",
"phy_ue_ulsch_scrambling", "phy_ue_ulsch_scrambling",
......
openair2/UTIL/LOG/vcd_signal_dumper.h
View file @ 75baa396
...@@ -50,9 +50,15 @@ typedef enum ...@@ -50,9 +50,15 @@ typedef enum
{ {
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX_ENB = 0, VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX_ENB = 0,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX_ENB, VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX_ENB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_UE, VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX_UE,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_UE, VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX_UE,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX_UE,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX_UE,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX_UE,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX_UE,
VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX,
VCD_SIGNAL_DUMPER_VARIABLES_UE_OFFSET_MBOX,
VCD_SIGNAL_DUMPER_VARIABLES_UE_RX_OFFSET,
VCD_SIGNAL_DUMPER_VARIABLES_DIFF, VCD_SIGNAL_DUMPER_VARIABLES_DIFF,
VCD_SIGNAL_DUMPER_VARIABLES_HW_SUBFRAME, VCD_SIGNAL_DUMPER_VARIABLES_HW_SUBFRAME,
VCD_SIGNAL_DUMPER_VARIABLES_HW_FRAME, VCD_SIGNAL_DUMPER_VARIABLES_HW_FRAME,
...@@ -139,6 +145,7 @@ typedef enum { ...@@ -139,6 +145,7 @@ typedef enum {
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX, VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX, VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX, VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ULSCH_MODULATION, VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ULSCH_MODULATION,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ULSCH_ENCODING, VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ULSCH_ENCODING,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ULSCH_SCRAMBLING, VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ULSCH_SCRAMBLING,
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band13.exmimo2.conf
View file @ 75baa396
...@@ -115,10 +115,10 @@ eNBs = ...@@ -115,10 +115,10 @@ eNBs =
NETWORK_INTERFACES : NETWORK_INTERFACES :
{ {
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0"; ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.13.82/24"; ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.13.171/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0"; ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.13.82/24"; ENB_IPV4_ADDRESS_FOR_S1U = "192.168.13.171/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152 ENB_PORT_FOR_S1U = 2152; # Spec 2152
}; };
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band39.conf
View file @ 75baa396
...@@ -43,7 +43,7 @@ eNBs = ...@@ -43,7 +43,7 @@ eNBs =
uplink_frequency_offset = 0; uplink_frequency_offset = 0;
Nid_cell = 0; Nid_cell = 0;
N_RB_DL = 50; N_RB_DL = 25;
Nid_cell_mbsfn = 0; Nid_cell_mbsfn = 0;
nb_antennas_tx = 1; nb_antennas_tx = 1;
nb_antennas_rx = 1; nb_antennas_rx = 1;
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band39.tm1.exmimo2.conf deleted 100644 → 0
View file @ efdf9907
Active_eNBs = ( "eNB_Eurecom_LTEBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
eNBs =
(
{
# real_time choice in {hard, rt-preempt, no}
real_time = "no";
////////// Identification parameters:
eNB_ID = 0xe00;
cell_type = "CELL_MACRO_ENB";
eNB_name = "eNB_Eurecom_LTEBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = "1";
mobile_country_code = "208";
mobile_network_code = "92";
////////// Physical parameters:
component_carriers = (
{
frame_type = "TDD";
tdd_config = 3;
tdd_config_s = 0;
prefix_type = "NORMAL";
eutra_band = 39;
downlink_frequency = 1907600000L;
uplink_frequency_offset = 0;
Nid_cell = 0;
N_RB_DL = 25;
Nid_cell_mbsfn = 0;
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 10;
rx_gain = 10;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
pusch_enable64QAM = "DISABLE";
pusch_hoppingMode = "interSubFrame";
pusch_hoppingOffset = 0;
pusch_groupHoppingEnabled = "ENABLE";
pusch_groupAssignment = 0;
pusch_sequenceHoppingEnabled = "DISABLE";
pusch_nDMRS1 = 0;
phich_duration = "NORMAL";
phich_resource = "ONESIXTH";
srs_enable = "DISABLE";
/* srs_BandwidthConfig =;
srs_SubframeConfig =;
srs_ackNackST =;
srs_MaxUpPts =;*/
pusch_p0_Nominal = -95;
pusch_alpha = "AL1";
pucch_p0_Nominal = -108;
msg3_delta_Preamble = 6;
pucch_deltaF_Format1 = "deltaF2";
pucch_deltaF_Format1b = "deltaF3";
pucch_deltaF_Format2 = "deltaF0";
pucch_deltaF_Format2a = "deltaF0";
pucch_deltaF_Format2b = "deltaF0";
rach_numberOfRA_Preambles = 64;
rach_preamblesGroupAConfig = "DISABLE";
/*
rach_sizeOfRA_PreamblesGroupA = ;
rach_messageSizeGroupA = ;
rach_messagePowerOffsetGroupB = ;
*/
rach_powerRampingStep = 2;
rach_preambleInitialReceivedTargetPower = -104;
rach_preambleTransMax = 6;
rach_raResponseWindowSize = 10;
rach_macContentionResolutionTimer = 48;
rach_maxHARQ_Msg3Tx = 4;
pcch_default_PagingCycle = 128;
pcch_nB = "oneT";
bcch_modificationPeriodCoeff = 2;
ue_TimersAndConstants_t300 = 1000;
ue_TimersAndConstants_t301 = 1000;
ue_TimersAndConstants_t310 = 1000;
ue_TimersAndConstants_t311 = 10000;
ue_TimersAndConstants_n310 = 20;
ue_TimersAndConstants_n311 = 1;
}
);
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.13.11";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.13.10/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.13.10/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
}
);
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.exmimo2.conf
View file @ 75baa396
...@@ -114,10 +114,10 @@ eNBs = ...@@ -114,10 +114,10 @@ eNBs =
NETWORK_INTERFACES : NETWORK_INTERFACES :
{ {
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0"; ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.13.10/24"; ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.13.171/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0"; ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.13.10/24"; ENB_IPV4_ADDRESS_FOR_S1U = "192.168.13.171/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152 ENB_PORT_FOR_S1U = 2152; # Spec 2152
}; };
...@@ -135,7 +135,7 @@ eNBs = ...@@ -135,7 +135,7 @@ eNBs =
rlc_log_verbosity ="medium"; rlc_log_verbosity ="medium";
pdcp_log_level ="info"; pdcp_log_level ="info";
pdcp_log_verbosity ="medium"; pdcp_log_verbosity ="medium";
rrc_log_level ="debug"; rrc_log_level ="info";
rrc_log_verbosity ="medium"; rrc_log_verbosity ="medium";
}; };
......
targets/RT/USER/Makefile
View file @ 75baa396
...@@ -164,7 +164,7 @@ CFLAGS += -DSMBV ...@@ -164,7 +164,7 @@ CFLAGS += -DSMBV
endif endif
CFLAGS += -DPHYSIM -DUSER_MODE -DPC_TARGET -DPC_DSP -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TXRX=2 -DNB_ANTENNAS_TX=2 -DPHY_CONTEXT=1 CFLAGS += -DPHYSIM -DUSER_MODE -DPC_TARGET -DPC_DSP -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TXRX=2 -DNB_ANTENNAS_TX=2 -DPHY_CONTEXT=1
CFLAGS += -DOPENAIR_LTE -DENABLE_FXP -DOPENAIR1 -DDLSCH_THREAD #-DULSCH_THREAD CFLAGS += -DOPENAIR_LTE -DENABLE_FXP -DOPENAIR1 #-DDLSCH_THREAD #-DULSCH_THREAD
ifeq ($(EXMIMO),1) ifeq ($(EXMIMO),1)
......
targets/RT/USER/lte-softmodem.c
View file @ 75baa396
...@@ -199,6 +199,7 @@ RTIME T0; ...@@ -199,6 +199,7 @@ RTIME T0;
pthread_attr_t attr_UE_init_synch; pthread_attr_t attr_UE_init_synch;
pthread_attr_t attr_UE_thread_tx; pthread_attr_t attr_UE_thread_tx;
pthread_attr_t attr_UE_thread_rx; pthread_attr_t attr_UE_thread_rx;
struct sched_param sched_param_UE_thread;
struct sched_param sched_param_UE_init_synch; struct sched_param sched_param_UE_init_synch;
struct sched_param sched_param_UE_thread_tx; struct sched_param sched_param_UE_thread_tx;
struct sched_param sched_param_UE_thread_rx; struct sched_param sched_param_UE_thread_rx;
...@@ -379,7 +380,7 @@ int transmission_mode=1; ...@@ -379,7 +380,7 @@ int transmission_mode=1;
int16_t glog_level = LOG_DEBUG; int16_t glog_level = LOG_DEBUG;
int16_t glog_verbosity = LOG_MED; int16_t glog_verbosity = LOG_MED;
int16_t hw_log_level = LOG_DEBUG; int16_t hw_log_level = LOG_INFO;
int16_t hw_log_verbosity = LOG_MED; int16_t hw_log_verbosity = LOG_MED;
int16_t phy_log_level = LOG_DEBUG; int16_t phy_log_level = LOG_DEBUG;
int16_t phy_log_verbosity = LOG_MED; int16_t phy_log_verbosity = LOG_MED;
...@@ -387,9 +388,9 @@ int16_t mac_log_level = LOG_DEBUG; ...@@ -387,9 +388,9 @@ int16_t mac_log_level = LOG_DEBUG;
int16_t mac_log_verbosity = LOG_MED; int16_t mac_log_verbosity = LOG_MED;
int16_t rlc_log_level = LOG_DEBUG; int16_t rlc_log_level = LOG_DEBUG;
int16_t rlc_log_verbosity = LOG_MED; int16_t rlc_log_verbosity = LOG_MED;
int16_t pdcp_log_level = LOG_DEBUG; int16_t pdcp_log_level = LOG_INFO;
int16_t pdcp_log_verbosity = LOG_MED; int16_t pdcp_log_verbosity = LOG_MED;
int16_t rrc_log_level = LOG_DEBUG; int16_t rrc_log_level = LOG_INFO;
int16_t rrc_log_verbosity = LOG_MED; int16_t rrc_log_verbosity = LOG_MED;
# if defined(ENABLE_USE_MME) # if defined(ENABLE_USE_MME)
int16_t gtpu_log_level = LOG_DEBUG; int16_t gtpu_log_level = LOG_DEBUG;
...@@ -1821,12 +1822,6 @@ static void *eNB_thread(void *arg) ...@@ -1821,12 +1822,6 @@ static void *eNB_thread(void *arg)
return 0; return 0;
} }
#ifdef USRP_DEBUG
int is_synchronized=1;
#else
int is_synchronized=0;
#endif
typedef enum { typedef enum {
pss=0, pss=0,
pbch=1, pbch=1,
...@@ -1841,9 +1836,9 @@ static void *UE_thread_synch(void *arg) { ...@@ -1841,9 +1836,9 @@ static void *UE_thread_synch(void *arg) {
int current_offset = 0; int current_offset = 0;
sync_mode_t sync_mode = pss; sync_mode_t sync_mode = pss;
UE->is_synchronized = 0;
printf("UE_thread_sync in with PHY_vars_UE %p\n",arg); printf("UE_thread_sync in with PHY_vars_UE %p\n",arg);
#ifdef USRP printf("waiting for sync (UE_thread_synch) \n");
printf("waiting for USRP sync (UE_thread_synch) \n");
#ifdef RTAI #ifdef RTAI
rt_sem_wait(sync_sem); rt_sem_wait(sync_sem);
#else #else
...@@ -1856,7 +1851,6 @@ static void *UE_thread_synch(void *arg) { ...@@ -1856,7 +1851,6 @@ static void *UE_thread_synch(void *arg) {
printf("unlocked sync_mutex (UE_sync_thread)\n"); printf("unlocked sync_mutex (UE_sync_thread)\n");
#endif #endif
printf("starting UE synch thread\n"); printf("starting UE synch thread\n");
#endif
if (UE_scan == 1) { if (UE_scan == 1) {
for (card=0;card<MAX_CARDS;card++) { for (card=0;card<MAX_CARDS;card++) {
...@@ -1866,7 +1860,7 @@ static void *UE_thread_synch(void *arg) { ...@@ -1866,7 +1860,7 @@ static void *UE_thread_synch(void *arg) {
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i]; openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i];
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i]; openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i];
openair0_cfg[card].rx_gain[i] = PHY_vars_UE_g[0][0]->rx_total_gain_dB-USRP_GAIN_OFFSET; openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB-USRP_GAIN_OFFSET;
#ifdef USRP #ifdef USRP
#ifndef USRP_DEBUG #ifndef USRP_DEBUG
openair0_set_rx_frequencies(&openair0,&openair0_cfg[0]); openair0_set_rx_frequencies(&openair0,&openair0_cfg[0]);
...@@ -1924,11 +1918,11 @@ static void *UE_thread_synch(void *arg) { ...@@ -1924,11 +1918,11 @@ static void *UE_thread_synch(void *arg) {
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i]+openair_daq_vars.freq_offset; openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i]+openair_daq_vars.freq_offset;
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i]+openair_daq_vars.freq_offset; openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i]+openair_daq_vars.freq_offset;
openair0_cfg[card].rx_gain[i] = PHY_vars_UE_g[0][0]->rx_total_gain_dB-USRP_GAIN_OFFSET; // 65 calibrated for USRP B210 @ 2.6 GHz openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB-USRP_GAIN_OFFSET; // 65 calibrated for USRP B210 @ 2.6 GHz
#ifdef USRP #ifdef USRP
#ifndef USRP_DEBUG #ifndef USRP_DEBUG
openair0_set_rx_frequencies(&openair0,&openair0_cfg[0]); openair0_set_rx_frequencies(&openair0,&openair0_cfg[0]);
// openair0_set_gains(&openair0,&openair0_cfg[0]); // openair0_set_gains(&openair0,&openair0_cfg[0]);
#endif #endif
#endif #endif
} }
...@@ -1937,7 +1931,7 @@ static void *UE_thread_synch(void *arg) { ...@@ -1937,7 +1931,7 @@ static void *UE_thread_synch(void *arg) {
break; break;
case pbch: case pbch:
if (initial_sync(PHY_vars_UE_g[0][0],mode)==0) { if (initial_sync(UE,mode)==0) {
/* /*
lte_adjust_synch(&PHY_vars_UE_g[0]->lte_frame_parms, lte_adjust_synch(&PHY_vars_UE_g[0]->lte_frame_parms,
PHY_vars_UE_g[0], PHY_vars_UE_g[0],
...@@ -1954,65 +1948,67 @@ static void *UE_thread_synch(void *arg) { ...@@ -1954,65 +1948,67 @@ static void *UE_thread_synch(void *arg) {
T0 = rt_get_time_ns(); T0 = rt_get_time_ns();
is_synchronized = 1; UE->is_synchronized = 1;
PHY_vars_UE_g[0][0]->slot_rx = 0; #ifndef EXMIMO
//oai_exit=1; UE->slot_rx = 0;
//start the DMA transfers UE->slot_tx = 4;
//LOG_D(HW,"Before openair0_start_rt_acquisition \n"); #else
//openair0_start_rt_acquisition(0); UE->slot_rx = 18;
UE->slot_tx = 2;
hw_slot_offset = (PHY_vars_UE_g[0][0]->rx_offset<<1) / PHY_vars_UE_g[0][0]->lte_frame_parms.samples_per_tti; #endif
hw_slot_offset = (UE->rx_offset<<1) / UE->lte_frame_parms.samples_per_tti;
LOG_I(HW,"Got synch: hw_slot_offset %d\n",hw_slot_offset); LOG_I(HW,"Got synch: hw_slot_offset %d\n",hw_slot_offset);
} }
else { else {
if (openair_daq_vars.freq_offset >= 0) { if (openair_daq_vars.freq_offset >= 0) {
openair_daq_vars.freq_offset += 100; openair_daq_vars.freq_offset += 100;
openair_daq_vars.freq_offset *= -1; openair_daq_vars.freq_offset *= -1;
} }
else { else {
openair_daq_vars.freq_offset *= -1; openair_daq_vars.freq_offset *= -1;
} }
if (abs(openair_daq_vars.freq_offset) > 7500) { if (abs(openair_daq_vars.freq_offset) > 7500) {
LOG_I(PHY,"[initial_sync] No cell synchronization found, abandoning\n"); LOG_I(PHY,"[initial_sync] No cell synchronization found, abandoning\n");
mac_xface->macphy_exit("No cell synchronization found, abandoning"); mac_xface->macphy_exit("No cell synchronization found, abandoning");
} }
else { else {
LOG_I(PHY,"[initial_sync] trying carrier off %d Hz, rxgain %d\n",openair_daq_vars.freq_offset, LOG_I(PHY,"[initial_sync] trying carrier off %d Hz, rxgain %d\n",openair_daq_vars.freq_offset,
PHY_vars_UE_g[0][0]->rx_total_gain_dB); UE->rx_total_gain_dB);
for (card=0;card<MAX_CARDS;card++) { for (card=0;card<MAX_CARDS;card++) {
for (i=0; i<openair0_cfg[card].rx_num_channels; i++) { for (i=0; i<openair0_cfg[card].rx_num_channels; i++) {
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i]+openair_daq_vars.freq_offset; openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i]+openair_daq_vars.freq_offset;
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i]+openair_daq_vars.freq_offset; openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i]+openair_daq_vars.freq_offset;
openair0_cfg[card].rx_gain[i] = PHY_vars_UE_g[0][0]->rx_total_gain_dB-USRP_GAIN_OFFSET; // 65 calibrated for USRP B210 @ 2.6 GHz openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB-USRP_GAIN_OFFSET; // 65 calibrated for USRP B210 @ 2.6 GHz
#ifdef USRP #ifdef USRP
#ifndef USRP_DEBUG #ifndef USRP_DEBUG
openair0_set_frequencies(&openair0,&openair0_cfg[0]); openair0_set_frequencies(&openair0,&openair0_cfg[0]);
// openair0_set_gains(&openair0,&openair0_cfg[0]); // openair0_set_gains(&openair0,&openair0_cfg[0]);
#endif #endif
#endif #endif
} }
} }
// openair0_dump_config(&openair0_cfg[0],UE_flag); // openair0_dump_config(&openair0_cfg[0],UE_flag);
// rt_sleep_ns(FRAME_PERIOD); // rt_sleep_ns(FRAME_PERIOD);
} // freq_offset } // freq_offset
} // initial_sync=0 } // initial_sync=0
break; break;
case si: case si:
default: default:
break; break;
} }
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SYNCH,0); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SYNCH,0);
if (pthread_mutex_lock(&PHY_vars_UE_g[0][0]->mutex_synch) != 0) { printf("Finished synch : Locking synch mutex (thread_sync)\n");
if (pthread_mutex_lock(&UE->mutex_synch) != 0) {
printf("[openair][SCHED][eNB] error locking mutex for UE synch\n"); printf("[openair][SCHED][eNB] error locking mutex for UE synch\n");
} }
else { else {
PHY_vars_UE_g[0][0]->instance_cnt_synch--; UE->instance_cnt_synch--;
if (pthread_mutex_unlock(&PHY_vars_UE_g[0][0]->mutex_synch) != 0) { if (pthread_mutex_unlock(&UE->mutex_synch) != 0) {
printf("[openair][SCHED][eNB] error unlocking mutex for UE synch\n"); printf("[openair][SCHED][eNB] error unlocking mutex for UE synch\n");
} }
} }
...@@ -2027,15 +2023,10 @@ static void *UE_thread_tx(void *arg) { ...@@ -2027,15 +2023,10 @@ static void *UE_thread_tx(void *arg) {
struct sched_attr attr; struct sched_attr attr;
unsigned int flags = 0; unsigned int flags = 0;
#endif #endif
int ret;
PHY_VARS_UE *UE = (PHY_VARS_UE*)arg; PHY_VARS_UE *UE = (PHY_VARS_UE*)arg;
#ifndef OPENAIR2
UE->UE_mode[eNB_id]=PUSCH;
UE->prach_resources[eNB_id] = &prach_resources_local;
prach_resources_local.ra_RNTI = 0xbeef;
prach_resources_local.ra_PreambleIndex = 0;
#endif
UE->instance_cnt_tx=-1; UE->instance_cnt_tx=-1;
#ifdef LOWLATENCY #ifdef LOWLATENCY
...@@ -2046,9 +2037,10 @@ static void *UE_thread_tx(void *arg) { ...@@ -2046,9 +2037,10 @@ static void *UE_thread_tx(void *arg) {
/* This creates a 1ms reservation every 10ms period*/ /* This creates a 1ms reservation every 10ms period*/
attr.sched_policy = SCHED_DEADLINE; attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = 1 * 1000000; // each tx thread requires 1ms to finish its job attr.sched_runtime = 1 * 500000; // each tx thread requires .5ms to finish its job
attr.sched_deadline =1 * 1000000; // each tx thread will finish within 1ms attr.sched_deadline =1 * 1000000; // each tx thread will finish within 1ms
attr.sched_period = 1 * 10000000; // each tx thread has a period of 10ms from the starting point attr.sched_period = 1 * 1000000; // each tx thread has a period of 1ms from the starting point
if (sched_setattr(0, &attr, flags) < 0 ){ if (sched_setattr(0, &attr, flags) < 0 ){
perror("[SCHED] eNB tx thread: sched_setattr failed\n"); perror("[SCHED] eNB tx thread: sched_setattr failed\n");
...@@ -2056,6 +2048,22 @@ static void *UE_thread_tx(void *arg) { ...@@ -2056,6 +2048,22 @@ static void *UE_thread_tx(void *arg) {
} }
#endif #endif
#ifndef EXMIMO
printf("waiting for sync (UE_thread_tx)\n");
#ifdef RTAI
rt_sem_wait(sync_sem);
#else
pthread_mutex_lock(&sync_mutex);
printf("Locked sync_mutex, waiting (UE_thread_tx)\n");
while (sync_var<0)
pthread_cond_wait(&sync_cond, &sync_mutex);
pthread_mutex_unlock(&sync_mutex);
printf("unlocked sync_mutex, waiting (UE_thread_tx)\n");
#endif
#endif
printf("Starting UE TX thread\n");
mlockall(MCL_CURRENT | MCL_FUTURE); mlockall(MCL_CURRENT | MCL_FUTURE);
while (!oai_exit) { while (!oai_exit) {
...@@ -2074,17 +2082,46 @@ static void *UE_thread_tx(void *arg) { ...@@ -2074,17 +2082,46 @@ static void *UE_thread_tx(void *arg) {
exit_fun("nothing to add"); exit_fun("nothing to add");
} }
} }
if ((subframe_select(&UE->lte_frame_parms,UE->slot_tx>>1)==SF_UL)|| if ((subframe_select(&UE->lte_frame_parms,UE->slot_tx>>1)==SF_UL)){
(UE->lte_frame_parms.frame_type == FDD)){
phy_procedures_UE_TX(UE,eNB_id,0,mode,no_relay); phy_procedures_UE_TX(UE,eNB_id,0,mode,no_relay);
} }
if ((subframe_select(&UE->lte_frame_parms,UE->slot_tx>>1)==SF_S) && if ((subframe_select(&UE->lte_frame_parms,UE->slot_tx>>1)==SF_S) &&
((UE->slot_tx&1)==1)) { ((UE->slot_tx&1)==1)) {
phy_procedures_UE_S_TX(UE,eNB_id,0,no_relay); phy_procedures_UE_S_TX(UE,eNB_id,0,no_relay);
} }
if (UE->lte_frame_parms.frame_type == TDD) {
ret = mac_xface->ue_scheduler(UE->Mod_id,
UE->frame_tx,
UE->slot_rx>>1,
subframe_select(&UE->lte_frame_parms,UE->slot_tx>>1),
eNB_id);
if (ret == CONNECTION_LOST) {
LOG_E(PHY,"[UE %d] Frame %d, subframe %d RRC Connection lost, returning to PRACH\n",UE->Mod_id,
UE->frame_rx,UE->slot_tx>>1);
UE->UE_mode[eNB_id] = PRACH;
// mac_xface->macphy_exit("Connection lost");
}
else if (ret == PHY_RESYNCH) {
LOG_E(PHY,"[UE %d] Frame %d, subframe %d RRC Connection lost, trying to resynch\n",
UE->Mod_id,
UE->frame_rx,UE->slot_tx>>1);
UE->UE_mode[eNB_id] = RESYNCH;
// mac_xface->macphy_exit("Connection lost");
//exit(-1);
} else if (ret == PHY_HO_PRACH) {
LOG_I(PHY,"[UE %d] Frame %d, subframe %d, return to PRACH and perform a contention-free access\n",
UE->Mod_id,UE->frame_rx,UE->slot_tx>>1);
UE->UE_mode[eNB_id] = PRACH;
}
}
if (pthread_mutex_lock(&UE->mutex_tx) != 0) { if (pthread_mutex_lock(&UE->mutex_tx) != 0) {
printf("[openair][SCHED][eNB] error locking mutex for UE TX thread\n"); printf("[openair][SCHED][eNB] error locking mutex for UE TX thread\n");
} }
...@@ -2095,12 +2132,14 @@ static void *UE_thread_tx(void *arg) { ...@@ -2095,12 +2132,14 @@ static void *UE_thread_tx(void *arg) {
printf("[openair][SCHED][eNB] error unlocking mutex for UE\n"); printf("[openair][SCHED][eNB] error unlocking mutex for UE\n");
} }
} }
UE->slot_tx++; UE->slot_tx+=2;
if (UE->slot_tx==20) { if (UE->slot_tx>=20) {
UE->slot_tx=0; UE->slot_tx-=20;
UE->frame_tx++; UE->frame_tx++;
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX_UE, UE->frame_tx);
} }
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX_UE, UE->slot_tx>>1);
} }
return(0); return(0);
} }
...@@ -2109,32 +2148,33 @@ static void *UE_thread_rx(void *arg) { ...@@ -2109,32 +2148,33 @@ static void *UE_thread_rx(void *arg) {
PHY_VARS_UE *UE = (PHY_VARS_UE*)arg; PHY_VARS_UE *UE = (PHY_VARS_UE*)arg;
int i; int i;
/* int ret;
#ifdef LOWLATENCY
struct sched_attr attr; #ifdef LOWLATENCY
unsigned int flags = 0; struct sched_attr attr;
#endif unsigned int flags = 0;
*/ #endif
UE->instance_cnt_rx=-1; UE->instance_cnt_rx=-1;
/*
#ifdef LOWLATENCY
attr.size = sizeof(attr);
attr.sched_flags = 0;
attr.sched_nice = 0;
attr.sched_priority = 0;
// This creates a 1ms reservation every 10ms period #ifdef LOWLATENCY
attr.sched_policy = SCHED_DEADLINE; attr.size = sizeof(attr);
attr.sched_runtime = 1 * 800000; // each tx thread requires 1ms to finish its job attr.sched_flags = 0;
attr.sched_deadline =1 * 1000000; // each tx thread will finish within 1ms attr.sched_nice = 0;
attr.sched_period = 1 * 1000000; // each tx thread has a period of 10ms from the starting point attr.sched_priority = 0;
if (sched_setattr(0, &attr, flags) < 0 ){ // This creates a 1ms reservation every 10ms period
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = 1 * 800000; // each rx thread requires 1ms to finish its job
attr.sched_deadline =1 * 1000000; // each rx thread will finish within 1ms
attr.sched_period = 1 * 1000000; // each rx thread has a period of 1ms from the starting point
if (sched_setattr(0, &attr, flags) < 0 ){
perror("[SCHED] eNB tx thread: sched_setattr failed\n"); perror("[SCHED] eNB tx thread: sched_setattr failed\n");
exit(-1); exit(-1);
} }
#endif #endif
*/
mlockall(MCL_CURRENT | MCL_FUTURE); mlockall(MCL_CURRENT | MCL_FUTURE);
#ifndef EXMIMO #ifndef EXMIMO
...@@ -2150,22 +2190,19 @@ static void *UE_thread_rx(void *arg) { ...@@ -2150,22 +2190,19 @@ static void *UE_thread_rx(void *arg) {
printf("unlocked sync_mutex, waiting (UE_thread_rx)\n"); printf("unlocked sync_mutex, waiting (UE_thread_rx)\n");
#endif #endif
#endif #endif
printf("Starting UE RX thread\n"); printf("Starting UE RX thread\n");
while (!oai_exit) { while (!oai_exit) {
printf("UE_thread_rx: locking UE RX mutex\n"); // printf("UE_thread_rx: locking UE RX mutex\n");
if (pthread_mutex_lock(&UE->mutex_rx) != 0) { if (pthread_mutex_lock(&UE->mutex_rx) != 0) {
LOG_E(PHY,"[SCHED][eNB] error locking mutex for UE RX\n"); LOG_E(PHY,"[SCHED][eNB] error locking mutex for UE RX\n");
exit_fun("nothing to add"); exit_fun("nothing to add");
} }
else { else {
printf("UE_thread_rx: unlocking UE RX mutex (IC %d)\n",UE->instance_cnt_rx);
while (UE->instance_cnt_rx < 0) { while (UE->instance_cnt_rx < 0) {
printf("Waiting for cond_rx (%p)\n",(void*)&UE->cond_rx);
pthread_cond_wait(&UE->cond_rx,&UE->mutex_rx); pthread_cond_wait(&UE->cond_rx,&UE->mutex_rx);
printf("Got UE RX condition, IC %d @ %llu\n",UE->instance_cnt_rx,rt_get_time_ns()-T0);
} }
if (pthread_mutex_unlock(&UE->mutex_rx) != 0) { if (pthread_mutex_unlock(&UE->mutex_rx) != 0) {
LOG_E(PHY,"[SCHED][eNB] error unlocking mutex for UE RX\n"); LOG_E(PHY,"[SCHED][eNB] error unlocking mutex for UE RX\n");
...@@ -2173,40 +2210,71 @@ static void *UE_thread_rx(void *arg) { ...@@ -2173,40 +2210,71 @@ static void *UE_thread_rx(void *arg) {
} }
for (i=0;i<2;i++) { for (i=0;i<2;i++) {
printf("UE_thread_rx: processing slot %d (slot rx %d) @ %llu\n",i,UE->slot_rx,rt_get_time_ns()-T0); if ((subframe_select(&UE->lte_frame_parms,UE->slot_rx>>1)==SF_DL) |
if ((subframe_select(&UE->lte_frame_parms,UE->slot_rx>>1)==SF_DL) || (UE->lte_frame_parms.frame_type == FDD)) {
(UE->lte_frame_parms.frame_type == FDD)){
phy_procedures_UE_RX(UE,eNB_id,0,mode,no_relay,NULL); phy_procedures_UE_RX(UE,eNB_id,0,mode,no_relay,NULL);
} }
if ((subframe_select(&UE->lte_frame_parms,UE->slot_rx>>1)==SF_S) && if ((subframe_select(&UE->lte_frame_parms,UE->slot_rx>>1)==SF_S) &&
((UE->slot_rx&1)==0)) { ((UE->slot_rx&1)==0)) {
phy_procedures_UE_RX(UE,eNB_id,0,mode,no_relay,NULL); phy_procedures_UE_RX(UE,eNB_id,0,mode,no_relay,NULL);
} }
if (i==0) {
ret = mac_xface->ue_scheduler(UE->Mod_id,
UE->frame_tx,
UE->slot_rx>>1,
subframe_select(&UE->lte_frame_parms,UE->slot_tx>>1),
eNB_id);
if (ret == CONNECTION_LOST) {
LOG_E(PHY,"[UE %d] Frame %d, subframe %d RRC Connection lost, returning to PRACH\n",UE->Mod_id,
UE->frame_rx,UE->slot_tx>>1);
UE->UE_mode[eNB_id] = PRACH;
// mac_xface->macphy_exit("Connection lost");
}
else if (ret == PHY_RESYNCH) {
LOG_E(PHY,"[UE %d] Frame %d, subframe %d RRC Connection lost, trying to resynch\n",
UE->Mod_id,
UE->frame_rx,UE->slot_tx>>1);
UE->UE_mode[eNB_id] = RESYNCH;
// mac_xface->macphy_exit("Connection lost");
//exit(-1);
}
else if (ret == PHY_HO_PRACH) {
LOG_I(PHY,"[UE %d] Frame %d, subframe %d, return to PRACH and perform a contention-free access\n",
UE->Mod_id,UE->frame_rx,UE->slot_tx>>1);
UE->UE_mode[eNB_id] = PRACH;
}
}
UE->slot_rx++; UE->slot_rx++;
if (UE->slot_rx==20) { if (UE->slot_rx==20) {
UE->slot_rx=0; UE->slot_rx=0;
UE->frame_rx++; UE->frame_rx++;
} vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX_UE, UE->frame_rx);
} }
}
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX_UE, UE->slot_rx>>1);
if (pthread_mutex_lock(&UE->mutex_rx) != 0) {
printf("[openair][SCHED][eNB] error locking mutex for UE RX\n");
}
else {
UE->instance_cnt_rx--;
if (pthread_mutex_unlock(&UE->mutex_rx) != 0) { }
if (pthread_mutex_lock(&UE->mutex_rx) != 0) {
printf("[openair][SCHED][eNB] error locking mutex for UE RX\n");
}
else {
UE->instance_cnt_rx--;
if (pthread_mutex_unlock(&UE->mutex_rx) != 0) {
printf("[openair][SCHED][eNB] error unlocking mutex for UE RX\n"); printf("[openair][SCHED][eNB] error unlocking mutex for UE RX\n");
} }
} }
printf("UE_thread_rx done\n"); // printf("UE_thread_rx done\n");
} }
}
return(0); return(0);
} }
...@@ -2217,7 +2285,8 @@ static void *UE_thread_rx(void *arg) { ...@@ -2217,7 +2285,8 @@ static void *UE_thread_rx(void *arg) {
static void *UE_thread(void *arg) { static void *UE_thread(void *arg) {
LTE_DL_FRAME_PARMS *frame_parms=&PHY_vars_UE_g[0][0]->lte_frame_parms; LTE_DL_FRAME_PARMS *frame_parms=&UE->lte_frame_parms;
PHY_VARS_UE *UE=PHY_vars_UE_g[0][0];
int slot=1,frame=0,hw_subframe=0,rx_cnt=0,tx_cnt=0; int slot=1,frame=0,hw_subframe=0,rx_cnt=0,tx_cnt=0;
// unsigned int aa; // unsigned int aa;
...@@ -2294,13 +2363,13 @@ static void *UE_thread(void *arg) { ...@@ -2294,13 +2363,13 @@ static void *UE_thread(void *arg) {
#ifndef USRP_DEBUG #ifndef USRP_DEBUG
for (i=0;i<PHY_vars_UE_g[0][0]->lte_frame_parms.nb_antennas_rx;i++) for (i=0;i<UE->lte_frame_parms.nb_antennas_rx;i++)
rxp[i] = (dummy_dump==0) ? (void*)&rxdata[i][rx_cnt*samples_per_packets] : (void*)dummy[i]; rxp[i] = (dummy_dump==0) ? (void*)&rxdata[i][rx_cnt*samples_per_packets] : (void*)dummy[i];
rxs = openair0.trx_read_func(&openair0, rxs = openair0.trx_read_func(&openair0,
&timestamp, &timestamp,
rxp, rxp,
samples_per_packets - ((rx_cnt==0) ? rx_off_diff : 0), samples_per_packets - ((rx_cnt==0) ? rx_off_diff : 0),
PHY_vars_UE_g[0][0]->lte_frame_parms.nb_antennas_rx); UE->lte_frame_parms.nb_antennas_rx);
if (rxs != (samples_per_packets- ((rx_cnt==0) ? rx_off_diff : 0))) if (rxs != (samples_per_packets- ((rx_cnt==0) ? rx_off_diff : 0)))
exit_fun("problem in rx"); exit_fun("problem in rx");
...@@ -2310,19 +2379,19 @@ static void *UE_thread(void *arg) { ...@@ -2310,19 +2379,19 @@ static void *UE_thread(void *arg) {
// Transmit TX buffer based on timestamp from RX // Transmit TX buffer based on timestamp from RX
if (tx_enabled) { if (tx_enabled) {
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE,1); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE,1);
for (i=0;i<PHY_vars_UE_g[0][0]->lte_frame_parms.nb_antennas_tx;i++) for (i=0;i<UE->lte_frame_parms.nb_antennas_tx;i++)
txp[i] = (void*)&txdata[i][tx_cnt*samples_per_packets]; txp[i] = (void*)&txdata[i][tx_cnt*samples_per_packets];
openair0.trx_write_func(&openair0, openair0.trx_write_func(&openair0,
(timestamp+samples_per_packets*tx_delay-tx_forward_nsamps), (timestamp+samples_per_packets*tx_delay-tx_forward_nsamps),
txp, txp,
samples_per_packets, samples_per_packets,
PHY_vars_UE_g[0][0]->lte_frame_parms.nb_antennas_tx, UE->lte_frame_parms.nb_antennas_tx,
1); 1);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE,0); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE,0);
} }
#else #else
rt_sleep_ns(10000000); rt_sleep_ns(1000000);
#endif #endif
rx_cnt++; rx_cnt++;
tx_cnt++; tx_cnt++;
...@@ -2336,42 +2405,42 @@ static void *UE_thread(void *arg) { ...@@ -2336,42 +2405,42 @@ static void *UE_thread(void *arg) {
if (is_synchronized==1) { if (UE->is_synchronized==1) {
LOG_D(HW,"UE_thread: hw_frame %d, hw_subframe %d (time %llu)\n",frame,hw_subframe,rt_get_time_ns()-T0); LOG_D(HW,"UE_thread: hw_frame %d, hw_subframe %d (time %llu)\n",frame,hw_subframe,rt_get_time_ns()-T0);
if (start_rx_stream==1) { if (start_rx_stream==1) {
// printf("UE_thread: locking UE mutex_rx\n"); // printf("UE_thread: locking UE mutex_rx\n");
if (pthread_mutex_lock(&PHY_vars_UE_g[0][0]->mutex_rx) != 0) { if (pthread_mutex_lock(&UE->mutex_rx) != 0) {
LOG_E(PHY,"[SCHED][UE] error locking mutex for UE RX thread\n"); LOG_E(PHY,"[SCHED][UE] error locking mutex for UE RX thread\n");
exit_fun("nothing to add"); exit_fun("nothing to add");
} }
else { else {
PHY_vars_UE_g[0][0]->instance_cnt_rx++; UE->instance_cnt_rx++;
// printf("UE_thread: Unlocking UE mutex_rx\n"); // printf("UE_thread: Unlocking UE mutex_rx\n");
pthread_mutex_unlock(&PHY_vars_UE_g[0][0]->mutex_rx); pthread_mutex_unlock(&UE->mutex_rx);
if (PHY_vars_UE_g[0][0]->instance_cnt_rx == 0) { if (UE->instance_cnt_rx == 0) {
LOG_D(HW,"Scheduling UE RX for frame %d (hw frame %d), subframe %d (%d), mode %d\n",PHY_vars_UE_g[0][0]->frame_rx,frame,hw_subframe,PHY_vars_UE_g[0][0]->slot_rx>>1,mode); // LOG_D(HW,"Scheduling UE RX for frame %d (hw frame %d), subframe %d (%d), mode %d\n",UE->frame_rx,frame,hw_subframe,UE->slot_rx>>1,mode);
if (pthread_cond_signal(&PHY_vars_UE_g[0][0]->cond_rx) != 0) { if (pthread_cond_signal(&UE->cond_rx) != 0) {
LOG_E(PHY,"[SCHED][UE] ERROR pthread_cond_signal for UE RX thread\n"); LOG_E(PHY,"[SCHED][UE] ERROR pthread_cond_signal for UE RX thread\n");
exit_fun("nothing to add"); exit_fun("nothing to add");
} }
else { else {
// printf("UE_thread: cond_signal for RX ok (%p) @ %llu\n",(void*)&PHY_vars_UE_g[0][0]->cond_rx,rt_get_time_ns()-T0); // printf("UE_thread: cond_signal for RX ok (%p) @ %llu\n",(void*)&UE->cond_rx,rt_get_time_ns()-T0);
} }
if (mode == rx_calib_ue) { if (mode == rx_calib_ue) {
if (frame == 10) { if (frame == 10) {
LOG_D(PHY,"[SCHED][UE] Found cell with N_RB_DL %d, PHICH CONFIG (%d,%d), Nid_cell %d, NB_ANTENNAS_TX %d, initial frequency offset %d Hz, frequency offset %d Hz, RSSI (digital) %d dB, measured Gain %d dB, total_rx_gain %d dB, USRP rx gain %f dB\n", LOG_D(PHY,"[SCHED][UE] Found cell with N_RB_DL %d, PHICH CONFIG (%d,%d), Nid_cell %d, NB_ANTENNAS_TX %d, initial frequency offset %d Hz, frequency offset %d Hz, RSSI (digital) %d dB, measured Gain %d dB, total_rx_gain %d dB, USRP rx gain %f dB\n",
PHY_vars_UE_g[0][0]->lte_frame_parms.N_RB_DL, UE->lte_frame_parms.N_RB_DL,
PHY_vars_UE_g[0][0]->lte_frame_parms.phich_config_common.phich_duration, UE->lte_frame_parms.phich_config_common.phich_duration,
PHY_vars_UE_g[0][0]->lte_frame_parms.phich_config_common.phich_resource, UE->lte_frame_parms.phich_config_common.phich_resource,
PHY_vars_UE_g[0][0]->lte_frame_parms.Nid_cell, UE->lte_frame_parms.Nid_cell,
PHY_vars_UE_g[0][0]->lte_frame_parms.nb_antennas_tx_eNB, UE->lte_frame_parms.nb_antennas_tx_eNB,
openair_daq_vars.freq_offset, openair_daq_vars.freq_offset,
PHY_vars_UE_g[0][0]->lte_ue_common_vars.freq_offset, UE->lte_ue_common_vars.freq_offset,
PHY_vars_UE_g[0][0]->PHY_measurements.rx_power_avg_dB[0], UE->PHY_measurements.rx_power_avg_dB[0],
PHY_vars_UE_g[0][0]->PHY_measurements.rx_power_avg_dB[0] - rx_input_level_dBm, UE->PHY_measurements.rx_power_avg_dB[0] - rx_input_level_dBm,
PHY_vars_UE_g[0][0]->rx_total_gain_dB, UE->rx_total_gain_dB,
openair0_cfg[0].rx_gain[0] openair0_cfg[0].rx_gain[0]
); );
exit_fun("[HW][UE] UE in RX calibration mode, exiting"); exit_fun("[HW][UE] UE in RX calibration mode, exiting");
...@@ -2389,17 +2458,17 @@ static void *UE_thread(void *arg) { ...@@ -2389,17 +2458,17 @@ static void *UE_thread(void *arg) {
if ((hw_subframe == 9)&&(dummy_dump == 0)) { if ((hw_subframe == 9)&&(dummy_dump == 0)) {
// Wake up initial synch thread // Wake up initial synch thread
if (pthread_mutex_lock(&PHY_vars_UE_g[0][0]->mutex_synch) != 0) { if (pthread_mutex_lock(&UE->mutex_synch) != 0) {
LOG_E(PHY,"[SCHED][UE] error locking mutex for UE initial synch thread\n"); LOG_E(PHY,"[SCHED][UE] error locking mutex for UE initial synch thread\n");
exit_fun("nothing to add"); exit_fun("nothing to add");
} }
else { else {
PHY_vars_UE_g[0][0]->instance_cnt_synch++; UE->instance_cnt_synch++;
pthread_mutex_unlock(&PHY_vars_UE_g[0][0]->mutex_synch); pthread_mutex_unlock(&UE->mutex_synch);
dummy_dump = 1; dummy_dump = 1;
if (PHY_vars_UE_g[0][0]->instance_cnt_synch == 0) { if (UE->instance_cnt_synch == 0) {
if (pthread_cond_signal(&PHY_vars_UE_g[0][0]->cond_synch) != 0) { if (pthread_cond_signal(&UE->cond_synch) != 0) {
LOG_E(PHY,"[SCHED][UE] ERROR pthread_cond_signal for UE sync thread\n"); LOG_E(PHY,"[SCHED][UE] ERROR pthread_cond_signal for UE sync thread\n");
exit_fun("nothing to add"); exit_fun("nothing to add");
} }
...@@ -2411,10 +2480,6 @@ static void *UE_thread(void *arg) { ...@@ -2411,10 +2480,6 @@ static void *UE_thread(void *arg) {
} }
} }
} }
/*
if ((slot%2000)<10)
LOG_D(HW,"fun0: doing very hard work\n");
*/
hw_subframe++; hw_subframe++;
slot+=2; slot+=2;
...@@ -2422,12 +2487,12 @@ static void *UE_thread(void *arg) { ...@@ -2422,12 +2487,12 @@ static void *UE_thread(void *arg) {
hw_subframe = 0; hw_subframe = 0;
frame++; frame++;
slot = 1; slot = 1;
if (PHY_vars_UE_g[0][0]->instance_cnt_synch < 0) { if (UE->instance_cnt_synch < 0) {
if (is_synchronized == 1) { if (UE->is_synchronized == 1) {
// openair0_set_gains(&openair0,&openair0_cfg[0]); // openair0_set_gains(&openair0,&openair0_cfg[0]);
rx_off_diff = 0; rx_off_diff = 0;
// LOG_D(PHY,"HW RESYNC: hw_frame %d: rx_offset = %d\n",frame,PHY_vars_UE_g[0][0]->rx_offset); // LOG_D(PHY,"HW RESYNC: hw_frame %d: rx_offset = %d\n",frame,UE->rx_offset);
if ((PHY_vars_UE_g[0][0]->rx_offset > RX_OFF_MAX)&&(start_rx_stream==0)) { if ((UE->rx_offset > RX_OFF_MAX)&&(start_rx_stream==0)) {
start_rx_stream=1; start_rx_stream=1;
//LOG_D(PHY,"HW RESYNC: hw_frame %d: Resynchronizing sample stream\n"); //LOG_D(PHY,"HW RESYNC: hw_frame %d: Resynchronizing sample stream\n");
frame=0; frame=0;
...@@ -2437,18 +2502,18 @@ static void *UE_thread(void *arg) { ...@@ -2437,18 +2502,18 @@ static void *UE_thread(void *arg) {
rxs = openair0.trx_read_func(&openair0, rxs = openair0.trx_read_func(&openair0,
&timestamp, &timestamp,
(void**)rxdata, (void**)rxdata,
PHY_vars_UE_g[0][0]->rx_offset, UE->rx_offset,
PHY_vars_UE_g[0][0]->lte_frame_parms.nb_antennas_rx); UE->lte_frame_parms.nb_antennas_rx);
#else #else
rt_sleep_ns(10000000); rt_sleep_ns(10000000);
#endif #endif
PHY_vars_UE_g[0][0]->rx_offset=0; UE->rx_offset=0;
} }
else if ((PHY_vars_UE_g[0][0]->rx_offset < RX_OFF_MIN)&&(start_rx_stream==1)) { else if ((UE->rx_offset < RX_OFF_MIN)&&(start_rx_stream==1)) {
// rx_off_diff = -PHY_vars_UE_g[0][0]->rx_offset + RX_OFF_MIN; // rx_off_diff = -UE->rx_offset + RX_OFF_MIN;
} }
else if ((PHY_vars_UE_g[0][0]->rx_offset > (FRAME_LENGTH_COMPLEX_SAMPLES-RX_OFF_MAX)) &&(start_rx_stream==1) && (rx_correction_timer == 0)) { else if ((UE->rx_offset > (FRAME_LENGTH_COMPLEX_SAMPLES-RX_OFF_MAX)) &&(start_rx_stream==1) && (rx_correction_timer == 0)) {
rx_off_diff = FRAME_LENGTH_COMPLEX_SAMPLES-PHY_vars_UE_g[0][0]->rx_offset; rx_off_diff = FRAME_LENGTH_COMPLEX_SAMPLES-UE->rx_offset;
rx_correction_timer = 5; rx_correction_timer = 5;
} }
if (rx_correction_timer>0) if (rx_correction_timer>0)
...@@ -2472,13 +2537,13 @@ static void *UE_thread(void *arg) { ...@@ -2472,13 +2537,13 @@ static void *UE_thread(void *arg) {
#ifdef EXMIMO #ifdef EXMIMO
/* This is the main UE thread. Initially it is doing a periodic get_frame. One synchronized it gets woken up by the kernel driver using the RTAI message mechanism (rt_send and rt_receive). */ /* This is the main UE thread. Initially it is doing a periodic get_frame. One synchronized it gets woken up by the kernel driver using the RTAI message mechanism (rt_send and rt_receive). */
static void *UE_thread(void *arg) { static void *UE_thread(void *arg) {
PHY_VARS_UE *UE=PHY_vars_UE_g[0][0];
#ifdef RTAI #ifdef RTAI
RT_TASK *task; RT_TASK *task;
#endif #endif
// RTIME in, out, diff; // RTIME in, out, diff;
int slot=0,frame=0,hw_slot,last_slot,next_slot; int slot=0,frame=0,hw_slot,last_slot,next_slot;
// unsigned int aa; // unsigned int aa;
static int is_synchronized = 0;
int delay_cnt; int delay_cnt;
RTIME time_in; RTIME time_in;
int hw_slot_offset=0,rx_offset_mbox=0,mbox_target=0,mbox_current=0; int hw_slot_offset=0,rx_offset_mbox=0,mbox_target=0,mbox_current=0;
...@@ -2486,11 +2551,29 @@ static void *UE_thread(void *arg) { ...@@ -2486,11 +2551,29 @@ static void *UE_thread(void *arg) {
int i, ret; int i, ret;
int CC_id,card; int CC_id,card;
volatile unsigned int *DAQ_MBOX = openair0_daq_cnt(); volatile unsigned int *DAQ_MBOX = openair0_daq_cnt();
#ifndef USRP
//exmimo_config_t *p_exmimo_config = openair0_exmimo_pci[card].exmimo_config_ptr;; int wait_sync_cnt = 0;
int first_synch = 1;
#ifdef LOWLATENCY
struct sched_attr attr;
unsigned int flags = 0;
unsigned long mask = 1; // processor 0
#endif #endif
printf("waiting for sync (UE_thread)\n");
#ifdef RTAI
rt_sem_wait(sync_sem);
#else
pthread_mutex_lock(&sync_mutex);
printf("Locked sync_mutex, waiting (UE_thread)\n");
while (sync_var<0)
pthread_cond_wait(&sync_cond, &sync_mutex);
pthread_mutex_unlock(&sync_mutex);
printf("unlocked sync_mutex, waiting (UE_thread)\n");
#endif
printf("starting UE thread\n");
#if defined(ENABLE_ITTI) && defined(ENABLE_USE_MME) #if defined(ENABLE_ITTI) && defined(ENABLE_USE_MME)
/* Wait for NAS UE to start cell selection */ /* Wait for NAS UE to start cell selection */
wait_system_ready ("Waiting for UE to be activated by UserProcess %s\r", &start_UE); wait_system_ready ("Waiting for UE to be activated by UserProcess %s\r", &start_UE);
...@@ -2505,29 +2588,58 @@ static void *UE_thread(void *arg) { ...@@ -2505,29 +2588,58 @@ static void *UE_thread(void *arg) {
rt_make_hard_real_time(); rt_make_hard_real_time();
#endif #endif
#ifdef LOWLATENCY
attr.size = sizeof(attr);
attr.sched_flags = 0;
attr.sched_nice = 0;
attr.sched_priority = 0;
// This creates a .25 ms reservation
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = 0.25 * 1000000;
attr.sched_deadline = 0.25 * 1000000;
attr.sched_period = 0.5 * 1000000;
// pin the UE main thread to CPU0
// if (pthread_setaffinity_np(pthread_self(), sizeof(mask),&mask) <0) {
// perror("[MAIN_ENB_THREAD] pthread_setaffinity_np failed\n");
// }
if (sched_setattr(0, &attr, flags) < 0 ){
perror("[SCHED] main UE thread: sched_setattr failed\n");
exit_fun("Nothing to add");
} else {
LOG_I(HW,"[SCHED][eNB] eNB main deadline thread %ld started on CPU %d\n",
gettid(),sched_getcpu());
}
#endif
mlockall(MCL_CURRENT | MCL_FUTURE); mlockall(MCL_CURRENT | MCL_FUTURE);
openair_daq_vars.freq_offset = 0; //-7500; openair_daq_vars.freq_offset = 0; //-7500;
/*
if (mode == rx_calib_ue) { first_synch = 1;
openair_daq_vars.freq_offset = -7500;
for (i=0; i<4; i++) {
p_exmimo_config->rf.rf_freq_rx[i] = p_exmimo_config->rf.rf_freq_rx[i]+openair_daq_vars.freq_offset;
p_exmimo_config->rf.rf_freq_tx[i] = p_exmimo_config->rf.rf_freq_rx[i]+openair_daq_vars.freq_offset;
}
openair0_dump_config(0);
}
*/
while (!oai_exit) { while (!oai_exit) {
hw_slot = (((((volatile unsigned int *)DAQ_MBOX)[0]+1)%150)<<1)/15; //the slot the hw is about to store hw_slot = (((((volatile unsigned int *)DAQ_MBOX)[0]+1)%150)<<1)/15; //the slot the hw is about to store
if (is_synchronized) { if (UE->is_synchronized) {
if (first_synch == 1) {
first_synch = 0;
for (card=0;card<openair0_num_detected_cards;card++)
openair0_start_rt_acquisition(card);
rt_sleep_ns(FRAME_PERIOD/10);
}
//this is the mbox counter that indicates the start of the frame //this is the mbox counter that indicates the start of the frame
rx_offset_mbox = (PHY_vars_UE_g[0][0]->rx_offset * 150) / (10*PHY_vars_UE_g[0][0]->lte_frame_parms.samples_per_tti); rx_offset_mbox = (UE->rx_offset * 150) / (10*UE->lte_frame_parms.samples_per_tti);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_UE_RX_OFFSET, UE->rx_offset);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_UE_OFFSET_MBOX, rx_offset_mbox);
//this is the mbox counter where we should be //this is the mbox counter where we should be
mbox_target = (((((slot+1)%20)*15+1)>>1) + rx_offset_mbox + 1)%150; mbox_target = (((((slot+1)%20)*15+1)>>1) + rx_offset_mbox + 1)%150;
// round up to the next multiple of two (mbox counter from express MIMO gives only even numbers) // round up to the next multiple of two (mbox counter from express MIMO gives only even numbers)
...@@ -2552,160 +2664,235 @@ static void *UE_thread(void *arg) { ...@@ -2552,160 +2664,235 @@ static void *UE_thread(void *arg) {
LOG_W(HW,"[UE] just missed slot (total missed slots %ld)\n", num_missed_slots); LOG_W(HW,"[UE] just missed slot (total missed slots %ld)\n", num_missed_slots);
} }
} }
slot++; slot++;
if (slot==20) { if (slot==20) {
slot=0; slot=0;
frame++; frame++;
}
// update thread slot/frame counters because of skipped slot
UE->slot_rx++;
UE->slot_tx++;
if (UE->slot_rx == 20) {
UE->slot_rx = 0;
UE->frame_rx++;
}
if (UE->slot_tx == 20) {
UE->slot_tx = 0;
UE->frame_tx++;
} }
continue; continue;
} }
if (diff2>8) if (diff2>8)
LOG_D(HW,"UE Frame %d: skipped slot, waiting for hw to catch up (slot %d, hw_slot %d, mbox_current %d, mbox_target %d, diff %d)\n",frame, slot, hw_slot, mbox_current, mbox_target, diff2); LOG_D(HW,"UE Frame %d: skipped slot, waiting for hw to catch up (slot %d, hw_slot %d, mbox_current %d, mbox_target %d, diff %d)\n",frame, slot, hw_slot, mbox_current, mbox_target, diff2);
/*
if (frame%100==0)
LOG_D(HW,"frame %d (%d), slot %d, hw_slot %d, rx_offset_mbox %d, mbox_target %d, mbox_current %d, diff %d\n",frame, PHY_vars_UE_g[0]->frame, slot,hw_slot,rx_offset_mbox,mbox_target,mbox_current,diff2);
*/
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX); vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DIFF, diff2); vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DIFF, diff2);
// This loop implements the delay of 1 slot to allow for processing
delay_cnt = 0; delay_cnt = 0;
while ((diff2>0) && (!oai_exit) && (is_synchronized) ) { while ((diff2>0) && (!oai_exit) ) {
time_in = rt_get_time_ns(); time_in = rt_get_time_ns();
//LOG_D(HW,"eNB Frame %d delaycnt %d : hw_slot %d (%d), slot %d (%d), diff %d, time %llu\n",frame,delay_cnt,hw_slot,((volatile unsigned int *)DAQ_MBOX)[0],slot,mbox_target,diff2,time_in); //LOG_D(HW,"eNB Frame %d delaycnt %d : hw_slot %d (%d), slot %d (%d), diff %d, time %llu\n",frame,delay_cnt,hw_slot,((volatile unsigned int *)DAQ_MBOX)[0],slot,mbox_target,diff2,time_in);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX); vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RT_SLEEP,1); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RT_SLEEP,1);
ret = rt_sleep_ns(diff2*DAQ_PERIOD); ret = rt_sleep_ns(diff2*DAQ_PERIOD);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RT_SLEEP,0); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RT_SLEEP,0);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX); vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX);
if (ret) if (ret)
LOG_D(HW,"eNB Frame %d, time %llu: rt_sleep_ns returned %d\n",frame, time_in); LOG_D(HW,"eNB Frame %d, time %llu: rt_sleep_ns returned %d\n",frame, time_in);
hw_slot = (((((volatile unsigned int *)DAQ_MBOX)[0]+1)%150)<<1)/15;
//LOG_D(HW,"eNB Frame %d : hw_slot %d, time %llu\n",frame,hw_slot,rt_get_time_ns());
delay_cnt++;
if (delay_cnt == 30) {
LOG_D(HW,"UE frame %d: HW stopped ... \n",frame);
exit_fun("[HW][UE] HW stopped");
}
mbox_current = ((volatile unsigned int *)DAQ_MBOX)[0];
if ((mbox_current>=135) && (mbox_target<15)) //handle the frame wrap-arround
diff2 = 150-mbox_current+mbox_target;
else if ((mbox_current<15) && (mbox_target>=135))
diff2 = -150+mbox_target-mbox_current;
else
diff2 = mbox_target - mbox_current;
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX);
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DIFF, diff2);
}
// on even slots, schedule processing of entire subframe
if ((slot&1) == 0) {
if (pthread_mutex_lock(&UE->mutex_rx) != 0) {
LOG_E(PHY,"[SCHED][UE] error locking mutex for UE RX thread\n");
exit_fun("nothing to add");
}
else {
hw_slot = (((((volatile unsigned int *)DAQ_MBOX)[0]+1)%150)<<1)/15; UE->instance_cnt_rx++;
//LOG_D(HW,"eNB Frame %d : hw_slot %d, time %llu\n",frame,hw_slot,rt_get_time_ns()); //printf("UE_thread: Unlocking UE mutex_rx\n");
delay_cnt++; pthread_mutex_unlock(&UE->mutex_rx);
if (delay_cnt == 30) { if (UE->instance_cnt_rx == 0) {
LOG_D(HW,"UE frame %d: HW stopped ... \n",frame); LOG_D(HW,"Scheduling UE RX for frame %d (hw frame %d), subframe %d (%d), mode %d\n",UE->frame_rx,frame,slot>>1,UE->slot_rx>>1,mode);
exit_fun("[HW][UE] HW stopped"); if (pthread_cond_signal(&UE->cond_rx) != 0) {
LOG_E(PHY,"[SCHED][UE] ERROR pthread_cond_signal for UE RX thread\n");
exit_fun("nothing to add");
}
else {
// printf("UE_thread: cond_signal for RX ok (%p) @ %llu\n",(void*)&UE->cond_rx,rt_get_time_ns()-T0);
}
if (mode == rx_calib_ue) {
if (frame == 10) {
LOG_D(PHY,"[SCHED][UE] Found cell with N_RB_DL %d, PHICH CONFIG (%d,%d), Nid_cell %d, NB_ANTENNAS_TX %d, initial frequency offset %d Hz, frequency offset %d Hz, RSSI (digital) %d dB, measured Gain %d dB, total_rx_gain %d dB, USRP rx gain %f dB\n",
UE->lte_frame_parms.N_RB_DL,
UE->lte_frame_parms.phich_config_common.phich_duration,
UE->lte_frame_parms.phich_config_common.phich_resource,
UE->lte_frame_parms.Nid_cell,
UE->lte_frame_parms.nb_antennas_tx_eNB,
openair_daq_vars.freq_offset,
UE->lte_ue_common_vars.freq_offset,
UE->PHY_measurements.rx_power_avg_dB[0],
UE->PHY_measurements.rx_power_avg_dB[0] - rx_input_level_dBm,
UE->rx_total_gain_dB,
openair0_cfg[0].rx_gain[0]
);
exit_fun("[HW][UE] UE in RX calibration mode, exiting");
}
}
}
else {
LOG_E(PHY,"[SCHED][UE] UE RX thread busy!!\n");
exit_fun("nothing to add");
}
} }
mbox_current = ((volatile unsigned int *)DAQ_MBOX)[0];
if ((mbox_current>=135) && (mbox_target<15)) //handle the frame wrap-arround if (pthread_mutex_lock(&UE->mutex_tx) != 0) {
diff2 = 150-mbox_current+mbox_target; LOG_E(PHY,"[SCHED][UE] error locking mutex for UE TX thread\n");
else if ((mbox_current<15) && (mbox_target>=135)) exit_fun("nothing to add");
diff2 = -150+mbox_target-mbox_current; }
else else {
diff2 = mbox_target - mbox_current;
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *DAQ_MBOX); UE->instance_cnt_tx++;
vcd_signal_dumper_dump_variable_by_name(VCD_SIGNAL_DUMPER_VARIABLES_DIFF, diff2); //printf("UE_thread: Unlocking UE mutex_rx\n");
pthread_mutex_unlock(&UE->mutex_tx);
if (UE->instance_cnt_tx == 0) {
LOG_D(HW,"Scheduling UE TX for frame %d (hw frame %d), subframe %d (%d), mode %d\n",UE->frame_tx,frame,slot>>1,UE->slot_tx>>1,mode);
if (pthread_cond_signal(&UE->cond_tx) != 0) {
LOG_E(PHY,"[SCHED][UE] ERROR pthread_cond_signal for UE TX thread\n");
exit_fun("nothing to add");
}
else {
// printf("UE_thread: cond_signal for RX ok (%p) @ %llu\n",(void*)&UE->cond_rx,rt_get_time_ns()-T0);
}
}
else {
LOG_E(PHY,"[SCHED][UE] UE TX thread busy!!\n");
exit_fun("nothing to add");
}
}
} }
}
last_slot = (slot)%LTE_SLOTS_PER_FRAME;
if (last_slot <0)
last_slot+=LTE_SLOTS_PER_FRAME;
next_slot = (slot+3)%LTE_SLOTS_PER_FRAME;
PHY_vars_UE_g[0][0]->slot_rx = last_slot;
PHY_vars_UE_g[0][0]->slot_tx = next_slot;
if (PHY_vars_UE_g[0][0]->slot_rx==20)
PHY_vars_UE_g[0][0]->frame_rx++;
if (PHY_vars_UE_g[0][0]->slot_tx==20)
PHY_vars_UE_g[0][0]->frame_tx++;
/*
if (is_synchronized) { if ((slot%2000)<10)
phy_procedures_UE_lte (PHY_vars_UE_g[0][0], 0, 0, mode, 0, NULL); LOG_D(HW,"fun0: doing very hard work\n");
*/
} // now increment slot and frame counters
else { // we are not yet synchronized slot++;
if (slot==20) {
slot=0;
frame++;
}
}
else if (UE->is_synchronized == 0) { // we are not yet synchronized
hw_slot_offset = 0; hw_slot_offset = 0;
first_synch = 1;
slot = 0; slot = 0;
openair0_get_frame(0);
// LOG_D(HW,"after get_frame\n");
// rt_sleep_ns(FRAME_PERIOD); // wait until we can lock mutex_synch
// LOG_D(HW,"after sleep\n"); if (pthread_mutex_lock(&UE->mutex_synch) != 0) {
LOG_E(PHY,"[SCHED][UE] error locking mutex for UE initial synch thread\n");
if (initial_sync(PHY_vars_UE_g[0][0],mode)==0) { exit_fun("noting to add");
/*
lte_adjust_synch(&PHY_vars_UE_g[0]->lte_frame_parms,
PHY_vars_UE_g[0],
0,
1,
16384);
*/
//for better visualization afterwards
/*
for (aa=0; aa<PHY_vars_UE_g[0]->lte_frame_parms.nb_antennas_rx; aa++)
memset(PHY_vars_UE_g[0]->lte_ue_common_vars.rxdata[aa],0,
PHY_vars_UE_g[0]->lte_frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int));
*/
/*if (mode == rx_calib_ue) {
exit_fun("[HW][UE] UE in RX calibration mode");
}
else {*/
is_synchronized = 1;
//start the DMA transfers
//LOG_D(HW,"Before openair0_start_rt_acquisition \n");
for (card=0;card<openair0_num_detected_cards;card++)
openair0_start_rt_acquisition(card);
hw_slot_offset = (PHY_vars_UE_g[0][0]->rx_offset<<1) / PHY_vars_UE_g[0][0]->lte_frame_parms.samples_per_tti;
//LOG_D(HW,"Got synch: hw_slot_offset %d\n",hw_slot_offset);
oai_exit=1;
/*}*/
} }
else { else {
if (openair_daq_vars.freq_offset >= 0) { if (UE->instance_cnt_synch < 0) {
openair_daq_vars.freq_offset += 100;
openair_daq_vars.freq_offset *= -1; wait_sync_cnt=0;
} openair0_get_frame(0);
else { // increment instance count for sync thread
openair_daq_vars.freq_offset *= -1; UE->instance_cnt_synch++;
} pthread_mutex_unlock(&UE->mutex_synch);
if (abs(openair_daq_vars.freq_offset) > 7500) { if (pthread_cond_signal(&UE->cond_synch) != 0) {
LOG_I(PHY,"[initial_sync] No cell synchronization found, abondoning\n"); LOG_E(PHY,"[SCHED][UE] ERROR pthread_cond_signal for UE sync thread\n");
mac_xface->macphy_exit("No cell synchronization found, abondoning"); exit_fun("nothing to add");
}
} }
else { else {
// LOG_I(PHY,"[initial_sync] trying carrier off %d Hz\n",openair_daq_vars.freq_offset); wait_sync_cnt++;
#ifndef USRP pthread_mutex_unlock(&UE->mutex_synch);
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) { if (wait_sync_cnt>1000)
for (i=0; i<openair0_cfg[rf_map[CC_id].card].rx_num_channels; i++) exit_fun("waiting to long for synch thread");
openair0_cfg[rf_map[CC_id].card].rx_freq[rf_map[CC_id].chain+i] = downlink_frequency[CC_id][i]+openair_daq_vars.freq_offset; else
for (i=0; i<openair0_cfg[rf_map[CC_id].card].tx_num_channels; i++) rt_sleep_ns(FRAME_PERIOD);
openair0_cfg[rf_map[CC_id].card].tx_freq[rf_map[CC_id].chain+i] = downlink_frequency[CC_id][i]+openair_daq_vars.freq_offset;
}
openair0_config(&openair0_cfg[0],UE_flag);
#endif
rt_sleep_ns(FRAME_PERIOD);
} }
} }
}
/* /*
if ((slot%2000)<10) if (initial_sync(UE,mode)==0) {
LOG_D(HW,"fun0: doing very hard work\n");
*/ if (mode == rx_calib_ue) {
slot++; exit_fun("[HW][UE] UE in RX calibration mode");
if (slot==20) { }
slot=0; else {
frame++; is_synchronized = 1;
//start the streaming DMA transfers
for (card=0;card<openair0_num_detected_cards;card++)
openair0_start_rt_acquisition(card);
hw_slot_offset = (UE->rx_offset<<1) / UE->lte_frame_parms.samples_per_tti;
}
}
else {
if (openair_daq_vars.freq_offset >= 0) {
openair_daq_vars.freq_offset += 100;
openair_daq_vars.freq_offset *= -1;
}
else {
openair_daq_vars.freq_offset *= -1;
}
if (abs(openair_daq_vars.freq_offset) > 7500) {
LOG_I(PHY,"[initial_sync] No cell synchronization found, abondoning\n");
mac_xface->macphy_exit("No cell synchronization found, abondoning");
}
else {
// LOG_I(PHY,"[initial_sync] trying carrier off %d Hz\n",openair_daq_vars.freq_offset);
#ifndef USRP
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
for (i=0; i<openair0_cfg[rf_map[CC_id].card].rx_num_channels; i++)
openair0_cfg[rf_map[CC_id].card].rx_freq[rf_map[CC_id].chain+i] = downlink_frequency[CC_id][i]+openair_daq_vars.freq_offset;
for (i=0; i<openair0_cfg[rf_map[CC_id].card].tx_num_channels; i++)
openair0_cfg[rf_map[CC_id].card].tx_freq[rf_map[CC_id].chain+i] = downlink_frequency[CC_id][i]+openair_daq_vars.freq_offset;
}
openair0_config(&openair0_cfg[0],UE_flag);
#endif
rt_sleep_ns(FRAME_PERIOD);
}
}
*/
} }
#if defined(ENABLE_ITTI)
itti_update_lte_time(frame, slot);
#endif
} }
LOG_D(HW,"UE_thread: finished, ran %d times.\n",frame);
LOG_D(HW,"UE_thread: finished, ran %d times.\n",frame);
#ifdef HARD_RT #ifdef HARD_RT
rt_make_soft_real_time(); rt_make_soft_real_time();
#endif #endif
// clean task // clean task
#ifdef RTAI #ifdef RTAI
rt_task_delete(task); rt_task_delete(task);
...@@ -2724,13 +2911,13 @@ void init_UE_threads(void) { ...@@ -2724,13 +2911,13 @@ void init_UE_threads(void) {
PHY_VARS_UE *UE=PHY_vars_UE_g[0][0]; PHY_VARS_UE *UE=PHY_vars_UE_g[0][0];
pthread_attr_init(&attr_UE_thread_tx); pthread_attr_init(&attr_UE_thread_tx);
pthread_attr_setstacksize(&attr_UE_thread_tx,PTHREAD_STACK_MIN); pthread_attr_setstacksize(&attr_UE_thread_tx,16*PTHREAD_STACK_MIN);
sched_param_UE_thread_tx.sched_priority = sched_get_priority_max(SCHED_FIFO)-1; sched_param_UE_thread_tx.sched_priority = sched_get_priority_max(SCHED_FIFO)-1;
pthread_attr_setschedparam (&attr_UE_thread_tx, &sched_param_UE_thread_tx); pthread_attr_setschedparam (&attr_UE_thread_tx, &sched_param_UE_thread_tx);
pthread_attr_setschedpolicy (&attr_UE_thread_tx, SCHED_FIFO); pthread_attr_setschedpolicy (&attr_UE_thread_tx, SCHED_FIFO);
pthread_attr_init(&attr_UE_thread_rx); pthread_attr_init(&attr_UE_thread_rx);
pthread_attr_setstacksize(&attr_UE_thread_rx,PTHREAD_STACK_MIN); pthread_attr_setstacksize(&attr_UE_thread_rx,8*PTHREAD_STACK_MIN);
sched_param_UE_thread_rx.sched_priority = sched_get_priority_max(SCHED_FIFO)-1; sched_param_UE_thread_rx.sched_priority = sched_get_priority_max(SCHED_FIFO)-1;
pthread_attr_setschedparam (&attr_UE_thread_rx, &sched_param_UE_thread_rx); pthread_attr_setschedparam (&attr_UE_thread_rx, &sched_param_UE_thread_rx);
pthread_attr_setschedpolicy (&attr_UE_thread_rx, SCHED_FIFO); pthread_attr_setschedpolicy (&attr_UE_thread_rx, SCHED_FIFO);
...@@ -2748,19 +2935,9 @@ void init_UE_threads(void) { ...@@ -2748,19 +2935,9 @@ void init_UE_threads(void) {
pthread_create(&UE->thread_rx,NULL,UE_thread_rx,(void*)UE); pthread_create(&UE->thread_rx,NULL,UE_thread_rx,(void*)UE);
pthread_create(&UE->thread_rx,NULL,UE_thread_synch,(void*)UE); pthread_create(&UE->thread_rx,NULL,UE_thread_synch,(void*)UE);
UE->frame_tx = 0; UE->frame_tx = 0;
#ifndef EXMIMO
UE->slot_tx = 2;
UE->slot_rx = 0;
UE->frame_rx = 0;
#else
UE->slot_tx = 1;
UE->slot_rx = 19;
UE->frame_rx = 0; UE->frame_rx = 0;
#endif
} }
...@@ -3297,7 +3474,7 @@ int main(int argc, char **argv) { ...@@ -3297,7 +3474,7 @@ int main(int argc, char **argv) {
else else
{ //UE_flag==1 { //UE_flag==1
frame_parms[CC_id]->nb_antennas_tx = 1; frame_parms[CC_id]->nb_antennas_tx = 1;
frame_parms[CC_id]->nb_antennas_rx = 2; frame_parms[CC_id]->nb_antennas_rx = 1;
frame_parms[CC_id]->nb_antennas_tx_eNB = (transmission_mode == 1) ? 1 : 2; //initial value overwritten by initial sync later frame_parms[CC_id]->nb_antennas_tx_eNB = (transmission_mode == 1) ? 1 : 2; //initial value overwritten by initial sync later
} }
frame_parms[CC_id]->mode1_flag = (transmission_mode == 1) ? 1 : 0; frame_parms[CC_id]->mode1_flag = (transmission_mode == 1) ? 1 : 0;
...@@ -3592,10 +3769,12 @@ int main(int argc, char **argv) { ...@@ -3592,10 +3769,12 @@ int main(int argc, char **argv) {
#endif #endif
} }
printf("Initializing openair0 ...");
if (openair0_device_init(&openair0, &openair0_cfg[0]) <0) { if (openair0_device_init(&openair0, &openair0_cfg[0]) <0) {
printf("Exiting, cannot initialize device\n"); printf("Exiting, cannot initialize device\n");
exit(-1); exit(-1);
} }
printf("Done\n");
mac_xface = malloc(sizeof(MAC_xface)); mac_xface = malloc(sizeof(MAC_xface));
...@@ -3621,6 +3800,7 @@ int main(int argc, char **argv) { ...@@ -3621,6 +3800,7 @@ int main(int argc, char **argv) {
printf("ITTI tasks created\n"); printf("ITTI tasks created\n");
#endif #endif
printf("Filling UE band info\n");
if (UE_flag==1) if (UE_flag==1)
fill_ue_band_info(); fill_ue_band_info();
...@@ -3648,7 +3828,7 @@ int main(int argc, char **argv) { ...@@ -3648,7 +3828,7 @@ int main(int argc, char **argv) {
number_of_cards = 1; number_of_cards = 1;
#endif #endif
openair_daq_vars.timing_advance = 0;
for(CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) { for(CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
rf_map[CC_id].card=0; rf_map[CC_id].card=0;
...@@ -3657,6 +3837,7 @@ int main(int argc, char **argv) { ...@@ -3657,6 +3837,7 @@ int main(int argc, char **argv) {
// connect the TX/RX buffers // connect the TX/RX buffers
if (UE_flag==1) { if (UE_flag==1) {
openair_daq_vars.timing_advance = 170;
if (setup_ue_buffers(PHY_vars_UE_g[0],&openair0_cfg[0],rf_map)!=0) { if (setup_ue_buffers(PHY_vars_UE_g[0],&openair0_cfg[0],rf_map)!=0) {
printf("Error setting up eNB buffer\n"); printf("Error setting up eNB buffer\n");
exit(-1); exit(-1);
...@@ -3671,6 +3852,7 @@ int main(int argc, char **argv) { ...@@ -3671,6 +3852,7 @@ int main(int argc, char **argv) {
//p_exmimo_config->framing.tdd_config = TXRXSWITCH_TESTRX; //p_exmimo_config->framing.tdd_config = TXRXSWITCH_TESTRX;
} }
else { else {
openair_daq_vars.timing_advance = 0;
if (setup_eNB_buffers(PHY_vars_eNB_g[0],&openair0_cfg[0],rf_map)!=0) { if (setup_eNB_buffers(PHY_vars_eNB_g[0],&openair0_cfg[0],rf_map)!=0) {
printf("Error setting up eNB buffer\n"); printf("Error setting up eNB buffer\n");
exit(-1); exit(-1);
...@@ -3809,18 +3991,20 @@ int main(int argc, char **argv) { ...@@ -3809,18 +3991,20 @@ int main(int argc, char **argv) {
#ifndef RTAI #ifndef RTAI
pthread_attr_init (&attr_dlsch_threads); pthread_attr_init (&attr_dlsch_threads);
pthread_attr_setstacksize(&attr_dlsch_threads,PTHREAD_STACK_MIN); pthread_attr_setstacksize(&attr_dlsch_threads,4*PTHREAD_STACK_MIN);
pthread_attr_init (&attr_UE_thread); pthread_attr_init (&attr_UE_thread);
pthread_attr_setstacksize(&attr_UE_thread,4*PTHREAD_STACK_MIN); pthread_attr_setstacksize(&attr_UE_thread,8192);//5*PTHREAD_STACK_MIN);
#ifndef LOWLATENCY #ifndef LOWLATENCY
sched_param_UE_thread.sched_priority = sched_get_priority_max(SCHED_FIFO);
pthread_attr_setschedparam(&attr_UE_thread,&sched_param_UE_thread);
sched_param_dlsch.sched_priority = sched_get_priority_max(SCHED_FIFO); //OPENAIR_THREAD_PRIORITY; sched_param_dlsch.sched_priority = sched_get_priority_max(SCHED_FIFO); //OPENAIR_THREAD_PRIORITY;
pthread_attr_setschedparam (&attr_dlsch_threads, &sched_param_dlsch); pthread_attr_setschedparam (&attr_dlsch_threads, &sched_param_dlsch);
pthread_attr_setschedpolicy (&attr_dlsch_threads, SCHED_FIFO); pthread_attr_setschedpolicy (&attr_dlsch_threads, SCHED_FIFO);
#endif #endif
pthread_attr_init (&attr_UE_init_synch); pthread_attr_init (&attr_UE_init_synch);
pthread_attr_setstacksize(&attr_UE_init_synch,PTHREAD_STACK_MIN); pthread_attr_setstacksize(&attr_UE_init_synch,8*PTHREAD_STACK_MIN);
sched_param_UE_init_synch.sched_priority = sched_get_priority_max(SCHED_FIFO); //OPENAIR_THREAD_PRIORITY; sched_param_UE_init_synch.sched_priority = sched_get_priority_max(SCHED_FIFO); //OPENAIR_THREAD_PRIORITY;
pthread_attr_setschedparam (&attr_UE_init_synch, &sched_param_UE_init_synch); pthread_attr_setschedparam (&attr_UE_init_synch, &sched_param_UE_init_synch);
pthread_attr_setschedpolicy (&attr_UE_init_synch, SCHED_FIFO); pthread_attr_setschedpolicy (&attr_UE_init_synch, SCHED_FIFO);
...@@ -3830,6 +4014,12 @@ int main(int argc, char **argv) { ...@@ -3830,6 +4014,12 @@ int main(int argc, char **argv) {
// start the main thread // start the main thread
if (UE_flag == 1) { if (UE_flag == 1) {
init_UE_threads(); init_UE_threads();
#ifdef DLSCH_THREAD
init_rx_pdsch_thread();
rt_sleep_ns(FRAME_PERIOD/10);
init_dlsch_threads();
#endif
printf("UE threads created\n");
sleep(1); sleep(1);
#ifdef RTAI #ifdef RTAI
main_ue_thread = rt_thread_create(UE_thread, NULL, 100000000); main_ue_thread = rt_thread_create(UE_thread, NULL, 100000000);
...@@ -3843,12 +4033,6 @@ int main(int argc, char **argv) { ...@@ -3843,12 +4033,6 @@ int main(int argc, char **argv) {
LOG_D(HW,"[lte-softmodem.c] Allocate UE_thread successful\n"); LOG_D(HW,"[lte-softmodem.c] Allocate UE_thread successful\n");
} }
#endif #endif
#ifdef DLSCH_THREAD
init_rx_pdsch_thread();
rt_sleep_ns(FRAME_PERIOD/10);
init_dlsch_threads();
#endif
printf("UE threads created\n");
} }
else { else {
......
targets/RT/USER/sched_rx_pdsch.c
View file @ 75baa396
...@@ -187,7 +187,7 @@ static void * rx_pdsch_thread(void *param) { ...@@ -187,7 +187,7 @@ static void * rx_pdsch_thread(void *param) {
//time0 = rt_get_time_ns(); //time0 = rt_get_time_ns();
// rt_printk("[SCHED][RX_PDSCH][before rx_pdsch] Frame %d, slot %d, time %llu\n",UE->frame,last_slot,rt_get_time_ns()); // rt_printk("[SCHED][RX_PDSCH][before rx_pdsch] Frame %d, slot %d, time %llu\n",UE->frame,last_slot,rt_get_time_ns());
for (m=pilot2;m<UE->lte_frame_parms.symbols_per_tti;m++) { for (m=pilot2;m<UE->lte_frame_parms.symbols_per_tti;m++) {
rx_pdsch(UE, rx_pdsch(UE,
PDSCH, PDSCH,
eNB_id, eNB_id,
......
targets/RT/USER/ue.gtkw
View file @ 75baa396
[*] [*]
[*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI [*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI
[*] Sat Jan 3 21:45:58 2015 [*] Thu Feb 5 10:38:10 2015
[*] [*]
[dumpfile] "/tmp/openair_dump_UE.vcd" [dumpfile] "/tmp/openair_dump_UE.vcd"
[dumpfile_mtime] "Sat Jan 3 21:45:33 2015" [dumpfile_mtime] "Thu Feb 5 10:38:10 2015"
[dumpfile_size] 98393197 [dumpfile_size] 63195810
[savefile] "/home/haswell/openair4G_knopp/targets/RT/USER/ue.gtkw" [savefile] "/home/ephese/openair4G/targets/RT/USER/ue.gtkw"
[timestart] 72755430000 [timestart] 55175040000
[size] 1221 600 [size] 1221 600
[pos] 251 123 [pos] -1 -1
*-21.000000 72759034000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 *-17.000000 55175269780 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 224 [sst_width] 224
[signals_width] 262 [signals_width] 262
[sst_expanded] 1 [sst_expanded] 1
[sst_vpaned_height] 143 [sst_vpaned_height] 143
@24 @24
variables.hw_subframe[63:0] variables.hw_subframe[63:0]
variables.frame_number_UE[63:0]
@25
variables.slot_number_UE[63:0]
@28 @28
functions.phy_procedures_ue_rx functions.phy_procedures_ue_rx
functions.phy_procedures_ue_tx
@24
variables.frame_number_RX_UE[63:0]
variables.frame_number_TX_UE[63:0]
@25
variables.subframe_number_RX_UE[63:0]
variables.subframe_number_TX_UE[63:0]
@28
functions.ue_slot_fep functions.ue_slot_fep
functions.lte_ue_measurement_procedures functions.lte_ue_measurement_procedures
functions.ue_rrc_measurements functions.ue_rrc_measurements
...@@ -30,6 +35,7 @@ functions.lte_ue_pbch_procedures ...@@ -30,6 +35,7 @@ functions.lte_ue_pbch_procedures
functions.lte_ue_pdcch_procedures functions.lte_ue_pdcch_procedures
functions.rx_pdcch functions.rx_pdcch
functions.dci_decoding functions.dci_decoding
functions.phy_ue_generate_prach
functions.phy_ue_ulsch_encoding functions.phy_ue_ulsch_encoding
functions.phy_ue_ulsch_modulation functions.phy_ue_ulsch_modulation
functions.phy_ue_ulsch_scrambling functions.phy_ue_ulsch_scrambling
......
targets/RT/USER/ue_exmimo2.gtkw
View file @ 75baa396
[*] [*]
[*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI [*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI
[*] Thu Feb 5 10:24:50 2015 [*] Thu Feb 5 17:45:30 2015
[*] [*]
[dumpfile] "/tmp/openair_dump_UE.vcd" [dumpfile] "/tmp/openair_dump_UE.vcd"
[dumpfile_mtime] "Thu Feb 5 10:24:33 2015" [dumpfile_mtime] "Thu Feb 5 17:10:05 2015"
[dumpfile_size] 57929998 [dumpfile_size] 18764854
[savefile] "/home/ephese/openair4G/targets/RT/USER/ue_exmimo2.gtkw" [savefile] "/home/ephese/openair4G/targets/RT/USER/ue_exmimo2.gtkw"
[timestart] 7161510000 [timestart] 4937140000
[size] 1463 640 [size] 1463 640
[pos] 105 102 [pos] 105 102
*-22.000000 7171400000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 *-22.000000 4947033063 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 224 [sst_width] 224
[signals_width] 262 [signals_width] 262
[sst_expanded] 1 [sst_expanded] 1
...@@ -19,13 +19,15 @@ variables.hw_subframe[63:0] ...@@ -19,13 +19,15 @@ variables.hw_subframe[63:0]
variables.daq_mbox[63:0] variables.daq_mbox[63:0]
variables.diff2[63:0] variables.diff2[63:0]
variables.ue_rx_offset[63:0] variables.ue_rx_offset[63:0]
@25
variables.rx_offset_mbox[63:0] variables.rx_offset_mbox[63:0]
@28 @28
functions.rt_sleep functions.rt_sleep
@24 @24
variables.subframe_number_RX_UE[63:0] variables.subframe_number_RX_UE[63:0]
variables.subframe_number_TX_UE[63:0] variables.subframe_number_TX_UE[63:0]
variables.slot_number_RX_UE[63:0]
@25
variables.slot_number_RX_UE[63:0]
@28 @28
functions.phy_procedures_ue_rx functions.phy_procedures_ue_rx
functions.phy_procedures_ue_tx functions.phy_procedures_ue_tx
......
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