Commit 795b6e02 authored by Francesco Mani's avatar Francesco Mani

fix for pusch num_dmrs_cdm_grps_no_data

parent 619f82cb
...@@ -1387,8 +1387,10 @@ void ulsch_modulation(int32_t **txdataF, ...@@ -1387,8 +1387,10 @@ void ulsch_modulation(int32_t **txdataF,
NR_UE_ULSCH_t *ulsch); NR_UE_ULSCH_t *ulsch);
uint8_t allowed_ulsch_re_in_dmrs_symbol(uint16_t k,
uint16_t start_sc,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type);
int generate_ue_dlsch_params_from_dci(int frame, int generate_ue_dlsch_params_from_dci(int frame,
......
...@@ -114,7 +114,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -114,7 +114,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t data_existing =0; uint8_t data_existing =0;
uint8_t L_ptrs, K_ptrs; // PTRS parameters uint8_t L_ptrs, K_ptrs; // PTRS parameters
uint16_t beta_ptrs; // PTRS parameter related to power control uint16_t beta_ptrs; // PTRS parameter related to power control
uint8_t no_data_in_dmrs = 1;
NR_UE_ULSCH_t *ulsch_ue; NR_UE_ULSCH_t *ulsch_ue;
NR_UL_UE_HARQ_t *harq_process_ul_ue=NULL; NR_UL_UE_HARQ_t *harq_process_ul_ue=NULL;
...@@ -128,7 +127,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -128,7 +127,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
number_dmrs_symbols = 0; number_dmrs_symbols = 0;
for (cwd_index = 0;cwd_index < num_of_codewords; cwd_index++) { for (cwd_index = 0;cwd_index < num_of_codewords; cwd_index++) {
ulsch_ue = UE->ulsch[thread_id][gNB_id][cwd_index]; ulsch_ue = UE->ulsch[thread_id][gNB_id][cwd_index];
...@@ -149,10 +147,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -149,10 +147,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
rnti = harq_process_ul_ue->pusch_pdu.rnti; rnti = harq_process_ul_ue->pusch_pdu.rnti;
ulsch_ue->Nid_cell = Nid_cell; ulsch_ue->Nid_cell = Nid_cell;
if(no_data_in_dmrs) nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6:4)*harq_process_ul_ue->pusch_pdu.num_dmrs_cdm_grps_no_data;
nb_dmrs_re_per_rb = 12;
else
nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6:4);
N_RE_prime = NR_NB_SC_PER_RB*number_of_symbols - nb_dmrs_re_per_rb*number_dmrs_symbols - N_PRB_oh; N_RE_prime = NR_NB_SC_PER_RB*number_of_symbols - nb_dmrs_re_per_rb*number_dmrs_symbols - N_PRB_oh;
...@@ -174,7 +169,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -174,7 +169,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
0, 0,
harq_process_ul_ue->pusch_pdu.nrOfLayers); harq_process_ul_ue->pusch_pdu.nrOfLayers);
uint8_t access_mode = SCHEDULED_ACCESS; uint8_t access_mode = SCHEDULED_ACCESS;
//-----------------------------------------------------// //-----------------------------------------------------//
...@@ -439,7 +433,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -439,7 +433,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
ptrs_idx++; ptrs_idx++;
} else if (((ul_dmrs_symb_pos >> l) & 0x01) == 0) { } else if (allowed_ulsch_re_in_dmrs_symbol(k,start_sc,harq_process_ul_ue->pusch_pdu.num_dmrs_cdm_grps_no_data,dmrs_type)) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = ((int16_t *) ulsch_ue->y)[m<<1]; ((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = ((int16_t *) ulsch_ue->y)[m<<1];
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = ((int16_t *) ulsch_ue->y)[(m<<1) + 1]; ((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = ((int16_t *) ulsch_ue->y)[(m<<1) + 1];
...@@ -474,6 +468,27 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -474,6 +468,27 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
} }
uint8_t allowed_ulsch_re_in_dmrs_symbol(uint16_t k,
uint16_t start_sc,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type) {
uint8_t delta;
for (int i = 0; i<numDmrsCdmGrpsNoData; i++){
if (dmrs_type==NFAPI_NR_DMRS_TYPE1) {
delta = i;
if (((k-start_sc)%2) == delta)
return (0);
}
else {
delta = i<<1;
if ( (((k-start_sc)%6) == delta) || (((k-start_sc)%6) == (delta+1)) )
return (0);
}
}
return (1);
}
uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE, uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
uint8_t harq_pid, uint8_t harq_pid,
uint8_t slot, uint8_t slot,
......
...@@ -266,6 +266,7 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH ...@@ -266,6 +266,7 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
G); G);
stop_meas(&gNB->ulsch_decoding_stats); stop_meas(&gNB->ulsch_decoding_stats);
if (ret > gNB->ulsch[ULSCH_id][0]->max_ldpc_iterations){ if (ret > gNB->ulsch[ULSCH_id][0]->max_ldpc_iterations){
LOG_I(PHY, "ULSCH %d in error\n",ULSCH_id); LOG_I(PHY, "ULSCH %d in error\n",ULSCH_id);
nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 1); nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 1);
......
...@@ -2768,9 +2768,9 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id, ...@@ -2768,9 +2768,9 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
nr_tti_rx, nr_tti_rx,
&dci_ind); &dci_ind);
//#ifdef NR_PDCCH_SCHED_DEBUG #ifdef NR_PDCCH_SCHED_DEBUG
LOG_I(PHY,"<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%u\n",dci_cnt); LOG_I(PHY,"<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%u\n",dci_cnt);
//#endif #endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_OUT);
//LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d PHICH RX\n",ue->Mod_id,frame_rx,nr_tti_rx); //LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d PHICH RX\n",ue->Mod_id,frame_rx,nr_tti_rx);
......
...@@ -648,7 +648,7 @@ int main(int argc, char **argv) ...@@ -648,7 +648,7 @@ int main(int argc, char **argv)
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId;
pusch_pdu->scid = 0; pusch_pdu->scid = 0;
pusch_pdu->dmrs_ports = 1; pusch_pdu->dmrs_ports = 1;
pusch_pdu->num_dmrs_cdm_grps_no_data = 2; pusch_pdu->num_dmrs_cdm_grps_no_data = 1;
pusch_pdu->resource_alloc = 1; pusch_pdu->resource_alloc = 1;
pusch_pdu->rb_start = start_rb; pusch_pdu->rb_start = start_rb;
pusch_pdu->rb_size = nb_rb; pusch_pdu->rb_size = nb_rb;
...@@ -703,9 +703,6 @@ int main(int argc, char **argv) ...@@ -703,9 +703,6 @@ int main(int argc, char **argv)
//there are plenty of other parameters that we don't seem to be using for now. e.g. //there are plenty of other parameters that we don't seem to be using for now. e.g.
ul_config.ul_config_list[0].pusch_config_pdu.absolute_delta_PUSCH = 0; ul_config.ul_config_list[0].pusch_config_pdu.absolute_delta_PUSCH = 0;
if(no_data_in_dmrs)
nb_re_dmrs = 12;
else
nb_re_dmrs = ((ul_config.ul_config_list[0].pusch_config_pdu.dmrs_config_type == pusch_dmrs_type1) ? 6 : 4); nb_re_dmrs = ((ul_config.ul_config_list[0].pusch_config_pdu.dmrs_config_type == pusch_dmrs_type1) ? 6 : 4);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, number_dmrs_symbols, mod_order, 1); available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, number_dmrs_symbols, mod_order, 1);
......
...@@ -818,6 +818,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -818,6 +818,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.dmrs_config_type = dmrs_config_type; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.dmrs_config_type = dmrs_config_type;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_index = mcs_index; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_index = mcs_index;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.num_dmrs_cdm_grps_no_data = 1;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = 0; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = 0;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = rv_index; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = rv_index;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.nrOfLayers = nrOfLayers; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.nrOfLayers = nrOfLayers;
......
...@@ -872,6 +872,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP, ...@@ -872,6 +872,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
0, 0,
pusch_pdu->nrOfLayers)>>3; pusch_pdu->nrOfLayers)>>3;
pusch_pdu->pusch_data.num_cb = 0; //CBG not supported pusch_pdu->pusch_data.num_cb = 0; //CBG not supported
//pusch_pdu->pusch_data.cb_present_and_position; //pusch_pdu->pusch_data.cb_present_and_position;
//pusch_pdu->pusch_uci; //pusch_pdu->pusch_uci;
......
...@@ -283,7 +283,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) { ...@@ -283,7 +283,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
dl_config->slot=UE_mac->dl_config_request.slot; dl_config->slot=UE_mac->dl_config_request.slot;
dl_config->number_pdus=0; dl_config->number_pdus=0;
printf(" UE_mac->dl_config_request.slot %d VS dcireq->slot %d \n", UE_mac->dl_config_request.slot, dcireq->slot); //printf(" UE_mac->dl_config_request.slot %d VS dcireq->slot %d \n", UE_mac->dl_config_request.slot, dcireq->slot);
LOG_D(PHY, "Entering UE DCI configuration frame %d slot %d \n", dcireq->frame, dcireq->slot); LOG_D(PHY, "Entering UE DCI configuration frame %d slot %d \n", dcireq->frame, dcireq->slot);
......
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