Commit 7f9c483f authored by Florian Kaltenberger's avatar Florian Kaltenberger

increasing DL slots to 11

parent 3f066dec
......@@ -728,16 +728,16 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
int sf_extension = 0;
//nr_subframe_t SF_type = nr_slot_select(cfg,slot%fp->slots_per_frame,frame);
if ((slot == 0) ||
(slot == 1) || IS_SOFTMODEM_RFSIM ) {
if (((slot >= 0) &&
(slot <= 10)) || IS_SOFTMODEM_RFSIM ) {
int siglen=fp->samples_per_slot;
int flags;
if (slot==0)
flags = 2;
else if (slot==1)
else if (slot==10)
flags=3;
else
flags=4;
flags=1;
/*
if (SF_type == SF_S) {
......
......@@ -278,7 +278,7 @@ int nr_dlsch_encoding(unsigned char *a,
unsigned int G;
unsigned int crc=1;
uint8_t harq_pid = dlsch->harq_ids[frame&2][slot];
uint8_t harq_pid = dlsch->harq_ids[frame%2][slot];
AssertFatal(harq_pid<8 && harq_pid>=0,"illegal harq_pid %d\b",harq_pid);
nfapi_nr_dl_config_dlsch_pdu_rel15_t rel15 = dlsch->harq_processes[harq_pid]->dlsch_pdu.dlsch_pdu_rel15;
uint16_t nb_rb = rel15.n_prb;
......@@ -339,7 +339,7 @@ int nr_dlsch_encoding(unsigned char *a,
dlsch->harq_processes[harq_pid]->B = A+24;
// dlsch->harq_processes[harq_pid]->b = a;
AssertFatal((A/8)+4 <= MAX_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,MAX_DLSCH_PAYLOAD_BYTES);
AssertFatal((A/8)+4 <= MAX_NR_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,MAX_NR_DLSCH_PAYLOAD_BYTES);
memcpy(dlsch->harq_processes[harq_pid]->b,a,(A/8)+4); // why is this +4 if the CRC is only 3 bytes?
}
......@@ -354,7 +354,7 @@ int nr_dlsch_encoding(unsigned char *a,
dlsch->harq_processes[harq_pid]->B = A+16;
// dlsch->harq_processes[harq_pid]->b = a;
AssertFatal((A/8)+3 <= MAX_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,MAX_DLSCH_PAYLOAD_BYTES);
AssertFatal((A/8)+3 <= MAX_NR_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,MAX_NR_DLSCH_PAYLOAD_BYTES);
memcpy(dlsch->harq_processes[harq_pid]->b,a,(A/8)+3); // using 3 bytes to mimic the case of 24 bit crc
}
......
......@@ -376,10 +376,10 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// Phytest scheduling
if (slot_rxP==2){
nr_schedule_uss_ulsch_phytest(&RC.nrmac[module_idP]->UL_tti_req[0], frame_rxP, slot_rxP);
//nr_schedule_uss_ulsch_phytest(&RC.nrmac[module_idP]->UL_tti_req[0], frame_rxP, slot_rxP);
}
if (slot_txP==1){
if (slot_txP>=1 && slot_txP<=10){
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL);
}
......
......@@ -178,13 +178,13 @@ int configure_fapi_dl_Tx(nfapi_nr_dl_config_request_body_t *dl_req,
nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &dl_config_dci_pdu->dci_dl_pdu.pdcch_params_rel15;
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15;
dlsch_pdu_rel15->start_prb = 0;
dlsch_pdu_rel15->n_prb = 50;
dlsch_pdu_rel15->n_prb = 100;
dlsch_pdu_rel15->start_symbol = 2;
dlsch_pdu_rel15->nb_symbols = 9;
dlsch_pdu_rel15->rnti = rnti;
dlsch_pdu_rel15->nb_layers =1;
dlsch_pdu_rel15->nb_codewords = 1;
dlsch_pdu_rel15->mcs_idx = 9;
dlsch_pdu_rel15->mcs_idx = 26;
dlsch_pdu_rel15->ndi = 1;
dlsch_pdu_rel15->redundancy_version = 0;
......
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