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Commit 8e6cc019 authored by Raymond Knopp's avatar Raymond Knopp
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handling of PDCCH order. stoping UE-specific scheduler during RA procedure.... 

handling of PDCCH order. stoping UE-specific scheduler during RA procedure. checking for DCI format (resource allocation) to not overwrite resource_block_coding for format 1A DCIs.
parent 6bfc0d63
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Showing with 77 additions and 33 deletions
openair1/PHY/LTE_TRANSPORT/dci.c
View file @ 8e6cc019
...@@ -2274,8 +2274,8 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols, ...@@ -2274,8 +2274,8 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
if (dci_alloc[i].L == (uint8_t)L) { if (dci_alloc[i].L == (uint8_t)L) {
#ifdef DEBUG_DCI_ENCODING #ifdef DEBUG_DCI_ENCODING
if (dci_alloc[i].rnti!=0xFFFF) if (dci_alloc[i].rnti==0x02)
LOG_D(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x), rnti %x\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,dci_alloc[i].L, LOG_I(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x), rnti %x\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,dci_alloc[i].L,
*(unsigned int*)dci_alloc[i].dci_pdu, *(unsigned int*)dci_alloc[i].dci_pdu,
dci_alloc[i].rnti); dci_alloc[i].rnti);
//dump_dci(frame_parms,&dci_alloc[i]); //dump_dci(frame_parms,&dci_alloc[i]);
......
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ 8e6cc019
...@@ -898,6 +898,10 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci ...@@ -898,6 +898,10 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci
dlsch1_harq = dlsch1->harq_processes[rel8->harq_process]; dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
dlsch1_harq->codeword = 1; dlsch1_harq->codeword = 1;
dlsch0->subframe_tx[subframe] = 1; dlsch0->subframe_tx[subframe] = 1;
if (dlsch0->rnti != rel8->rnti) { // if rnti of dlsch is not the same as in the config, this is a new entry
dlsch0_harq->round=0;
dlsch0->harq_mask=0;
}
if ((dlsch0->harq_mask & (1<<rel8->harq_process)) > 0 ) { if ((dlsch0->harq_mask & (1<<rel8->harq_process)) > 0 ) {
if (rel8->new_data_indicator_1 != dlsch0_harq->ndi) if (rel8->new_data_indicator_1 != dlsch0_harq->ndi)
dlsch0_harq->round=0; dlsch0_harq->round=0;
...@@ -908,16 +912,22 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci ...@@ -908,16 +912,22 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci
} }
dlsch0_harq->ndi = rel8->new_data_indicator_1; dlsch0_harq->ndi = rel8->new_data_indicator_1;
LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) \n",rel8->harq_process,dlsch0->harq_mask,dlsch0_harq->round, dlsch0->active = 1;
if (rel8->rnti_type == 2)
dlsch0_harq->round = 0;
LOG_D(PHY,"NFAPI: harq_pid %d harq_mask %x, round %d ndi (%d,%d) \n",rel8->harq_process,dlsch0->harq_mask,dlsch0_harq->round,
dlsch0_harq->ndi,rel8->new_data_indicator_1); dlsch0_harq->ndi,rel8->new_data_indicator_1);
switch (rel8->dci_format) { switch (rel8->dci_format) {
case NFAPI_DL_DCI_FORMAT_1A: case NFAPI_DL_DCI_FORMAT_1A:
AssertFatal(rel8->resource_block_coding < 8192, "Frame %d, Subframe %d: rel8->resource_block_coding (%p) %u >= 8192 (rnti %x, rnti_type %d, format %d, harq_id %d\n",
proc->frame_tx,subframe,
&rel8->resource_block_coding,rel8->resource_block_coding,rel8->rnti,rel8->rnti_type,rel8->dci_format,rel8->harq_process);
dci_alloc->format = format1A; dci_alloc->format = format1A;
dlsch0->active = 1;
if (rel8->rnti == SI_RNTI)
dlsch0_harq->round = 0;
switch (fp->N_RB_DL) { switch (fp->N_RB_DL) {
case 6: case 6:
...@@ -945,7 +955,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci ...@@ -945,7 +955,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci
((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
} }
// check if PDCCH order
if (rel8->resource_block_coding == 63) {
dlsch0->active = 0;
return;
}
AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n"); AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n");
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rel8->resource_block_coding]; dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rel8->resource_block_coding];
dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag; dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag;
...@@ -976,6 +990,12 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci ...@@ -976,6 +990,12 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci
((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; ((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
} }
// check if PDCCH order
if (rel8->resource_block_coding == 511) {
dlsch0->active = 0;
return;
}
AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n"); AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n");
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rel8->resource_block_coding]; dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rel8->resource_block_coding];
dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag; dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag;
...@@ -1006,6 +1026,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci ...@@ -1006,6 +1026,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci
((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
} }
// check if PDCCH order
if (rel8->resource_block_coding == 2047) {
dlsch0->active = 0;
return;
}
AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n"); AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n");
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rel8->resource_block_coding]; dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rel8->resource_block_coding];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rel8->resource_block_coding]; dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rel8->resource_block_coding];
...@@ -1037,6 +1062,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci ...@@ -1037,6 +1062,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci
((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process; ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid = rel8->harq_process;
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
} }
// check if PDCCH order
if (rel8->resource_block_coding == 8191) {
dlsch0->active = 0;
return;
}
AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n"); AssertFatal(rel8->virtual_resource_block_assignment_flag==LOCALIZED,"Distributed RB allocation not done yet\n");
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rel8->resource_block_coding]; dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rel8->resource_block_coding];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rel8->resource_block_coding]; dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rel8->resource_block_coding];
...@@ -1057,7 +1087,7 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci ...@@ -1057,7 +1087,7 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci
NPRB = dlsch0_harq->nb_rb; NPRB = dlsch0_harq->nb_rb;
I_mcs = get_I_TBS(rel8->mcs_1); I_mcs = get_I_TBS(rel8->mcs_1);
} }
AssertFatal(NPRB>0,"DCI 1A: NPRB == 0\n"); AssertFatal(NPRB>0,"DCI 1A: NPRB = 0 (rnti %x, rnti type %d, tpc %d, round %d, resource_block_coding %d)\n",rel8->rnti,rel8->rnti_type,rel8->tpc,dlsch0_harq->round,rel8->resource_block_coding);
dlsch0_harq->rvidx = rel8->redundancy_version_1; dlsch0_harq->rvidx = rel8->redundancy_version_1;
dlsch0_harq->Nl = 1; dlsch0_harq->Nl = 1;
dlsch0_harq->mimo_mode = (fp->nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI; dlsch0_harq->mimo_mode = (fp->nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI;
...@@ -1075,7 +1105,7 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci ...@@ -1075,7 +1105,7 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci
if (dlsch0_harq->round == 0) if (dlsch0_harq->round == 0)
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
LOG_D(PHY,"DCI 1A: mcs %d, rballoc %x,rv %d, rnti %x\n",rel8->mcs_1,rel8->resource_block_coding,rel8->redundancy_version_1,rel8->rnti); if (rel8->rnti_type == 1) LOG_I(PHY,"DCI 1A: round %d, mcs %d, rballoc %x,rv %d, rnti %x\n",dlsch0_harq->round,rel8->mcs_1,rel8->resource_block_coding,rel8->redundancy_version_1,rel8->rnti);
break; break;
case NFAPI_DL_DCI_FORMAT_1: case NFAPI_DL_DCI_FORMAT_1:
......
openair1/SCHED/fapi_l1.c
View file @ 8e6cc019
...@@ -168,6 +168,9 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, ...@@ -168,6 +168,9 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
dlsch0_harq->pdsch_start = eNB->pdcch_vars[proc->subframe_tx & 1].num_pdcch_symbols; dlsch0_harq->pdsch_start = eNB->pdcch_vars[proc->subframe_tx & 1].num_pdcch_symbols;
if (dlsch0_harq->round==0) { //get pointer to SDU if this a new SDU if (dlsch0_harq->round==0) { //get pointer to SDU if this a new SDU
AssertFatal(sdu!=NULL,"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d\n",
proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid,
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index);
if (rel8->rnti != 0xFFFF) LOG_D(PHY,"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d\n", if (rel8->rnti != 0xFFFF) LOG_D(PHY,"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d\n",
proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid); proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid);
if (codeword_index == 0) dlsch0_harq->pdu = sdu; if (codeword_index == 0) dlsch0_harq->pdu = sdu;
......
openair1/SCHED/phy_procedures_lte_eNb.c
View file @ 8e6cc019
...@@ -270,9 +270,9 @@ void pdsch_procedures(PHY_VARS_eNB *eNB, ...@@ -270,9 +270,9 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
int input_buffer_length = dlsch_harq->TBS/8; int input_buffer_length = dlsch_harq->TBS/8;
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms; LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
if (frame < 200) { if (dlsch->rnti == 0x02) {//frame < 200) {
LOG_D(PHY, LOG_I(PHY,
"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", pdsch_start %d, G %d, nb_rb %"PRIu16", rb0 %x, rb1 %x, TBS %"PRIu16", pmi_alloc %"PRIx64", rv %"PRIu8" (round %"PRIu8")\n", "[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", pdsch_start %d, G %d, nb_rb %"PRIu16", rb0 %x, rb1 %x, TBS %"PRIu16", pmi_alloc %"PRIx64", rv %"PRIu8" (round %"PRIu8")\n",
eNB->Mod_id, dlsch->rnti,harq_pid, eNB->Mod_id, dlsch->rnti,harq_pid,
frame, subframe, input_buffer_length, dlsch_harq->pdsch_start, frame, subframe, input_buffer_length, dlsch_harq->pdsch_start,
...@@ -1619,10 +1619,12 @@ void release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subf ...@@ -1619,10 +1619,12 @@ void release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subf
AssertFatal(dlsch0_harq!=NULL,"dlsch0_harq is null\n"); AssertFatal(dlsch0_harq!=NULL,"dlsch0_harq is null\n");
dlsch0_harq->status = SCH_IDLE; dlsch0_harq->status = SCH_IDLE;
if ((dlsch1_harq == NULL)|| /*if ((dlsch1_harq == NULL)||
((dlsch1_harq!=NULL)&& ((dlsch1_harq!=NULL)&&
(dlsch1_harq->status == SCH_IDLE))) (dlsch1_harq->status == SCH_IDLE)))*/
dlsch0->harq_mask &= ~(1<<harq_pid); dlsch0->harq_mask &= ~(1<<harq_pid);
LOG_D(PHY,"Frame %d, subframe %d: Releasing harq %d for UE %x\n",frame,subframe,harq_pid,dlsch0->rnti);
} }
else { // release all processes in the bundle that was acked, based on mask else { // release all processes in the bundle that was acked, based on mask
// This is at most 4 for multiplexing and 9 for bundling/special bundling // This is at most 4 for multiplexing and 9 for bundling/special bundling
......
openair2/LAYER2/MAC/eNB_scheduler.c
View file @ 8e6cc019
...@@ -330,12 +330,11 @@ void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id, ...@@ -330,12 +330,11 @@ void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id,
// check uplink failure // check uplink failure
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer>0)&& if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer>0)&&
(UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync==0)) { (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync==0)) {
LOG_D(MAC,"UE %d rnti %x: UL Failure timer %d \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer); LOG_I(MAC,"UE %d rnti %x: UL Failure timer %d \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
if (UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent==0) { if (UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent==0) {
UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent=1; UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent=1;
// add a format 1A dci for this UE to request an RA procedure (only one UE per subframe) // add a format 1A dci for this UE to request an RA procedure (only one UE per subframe)
LOG_D(MAC,"UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d) \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
nfapi_dl_config_request_pdu_t* dl_config_pdu = &DL_req[CC_id].dl_config_request_body.dl_config_pdu_list[DL_req[CC_id].dl_config_request_body.number_pdu]; nfapi_dl_config_request_pdu_t* dl_config_pdu = &DL_req[CC_id].dl_config_request_body.dl_config_pdu_list[DL_req[CC_id].dl_config_request_body.number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t)); memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE; dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
...@@ -351,16 +350,10 @@ void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id, ...@@ -351,16 +350,10 @@ void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = pdcch_order_table[cc[CC_id].mib->message.dl_Bandwidth]; dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = pdcch_order_table[cc[CC_id].mib->message.dl_Bandwidth];
DL_req[CC_id].dl_config_request_body.number_dci++; DL_req[CC_id].dl_config_request_body.number_dci++;
DL_req[CC_id].dl_config_request_body.number_pdu++; DL_req[CC_id].dl_config_request_body.number_pdu++;
LOG_I(MAC,"UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d), resource_block_coding %d \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding);
/*
add_ue_spec_dci(&DL_req[CC_id],
rnti,
get_aggregation(get_tw_index(module_idP,CC_id),eNB_UE_stats->DL_cqi[0],format1A),
format1A,
NO_DLSCH);*/
} }
else { // ra_pdcch_sent==1 else { // ra_pdcch_sent==1
LOG_D(MAC,"UE %d rnti %x: sent PDCCH order for RAPROC waiting (failure timer %d) \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer); LOG_I(MAC,"UE %d rnti %x: sent PDCCH order for RAPROC waiting (failure timer %d) \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer % 40) == 0) if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer % 40) == 0)
UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent=0; // resend every 4 frames UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent=0; // resend every 4 frames
} }
...@@ -369,7 +362,7 @@ void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id, ...@@ -369,7 +362,7 @@ void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id,
// check threshold // check threshold
if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 200) { if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 200) {
// inform RRC of failure and clear timer // inform RRC of failure and clear timer
LOG_D(MAC,"UE %d rnti %x: UL Failure after repeated PDCCH orders: Triggering RRC \n",UE_id,rnti); LOG_I(MAC,"UE %d rnti %x: UL Failure after repeated PDCCH orders: Triggering RRC \n",UE_id,rnti);
mac_eNB_rrc_ul_failure(module_idP,CC_id,frameP,subframeP,rnti); mac_eNB_rrc_ul_failure(module_idP,CC_id,frameP,subframeP,rnti);
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer=0; UE_list->UE_sched_ctrl[UE_id].ul_failure_timer=0;
UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync=1; UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync=1;
......
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @ 8e6cc019
...@@ -388,7 +388,7 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -388,7 +388,7 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
{ {
if ((RA_template->Msg2_frame == frameP) && (RA_template->Msg2_subframe == subframeP)) { if ((RA_template->Msg2_frame == frameP) && (RA_template->Msg2_subframe == subframeP)) {
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generating RAR DCI, RA_active %d format 1A (%d,%d))\n", LOG_I(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generating RAR DCI, RA_active %d format 1A (%d,%d))\n",
module_idP, CC_idP, frameP, subframeP, module_idP, CC_idP, frameP, subframeP,
RA_template->RA_active, RA_template->RA_active,
...@@ -860,7 +860,18 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -860,7 +860,18 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
1, // ndi 1, // ndi
0, // rv 0, // rv
0); // vrb_flag 0); // vrb_flag
LOG_I(MAC,"Frame %d, subframe %d: Msg4 DCI pdu_num %d (rnti %x,rnti_type %d,harq_pid %d, resource_block_coding (%p) %d\n",
frameP,
subframeP,
dl_req->number_pdu,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.harq_process,
&dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding);
AssertFatal(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding < 8192,
"resource_block_coding %u < 8192\n",
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding);
if (!CCE_allocation_infeasible(module_idP,CC_idP,1, if (!CCE_allocation_infeasible(module_idP,CC_idP,1,
subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level, subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
RA_template->rnti)) { RA_template->rnti)) {
...@@ -936,6 +947,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -936,6 +947,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
(cc->p_eNB==1 ) ? 1 : 2, // transmission mode (cc->p_eNB==1 ) ? 1 : 2, // transmission mode
1, // num_bf_prb_per_subband 1, // num_bf_prb_per_subband
1); // num_bf_vector 1); // num_bf_vector
LOG_I(MAC,"Filled DLSCH config, pdu number %d, non-dci pdu_index %d\n",dl_req->number_pdu,eNB->pdu_index[CC_idP]);
// DL request // DL request
eNB->TX_req[CC_idP].sfn_sf = fill_nfapi_tx_req(&eNB->TX_req[CC_idP].tx_request_body, eNB->TX_req[CC_idP].sfn_sf = fill_nfapi_tx_req(&eNB->TX_req[CC_idP].tx_request_body,
...@@ -1070,7 +1082,7 @@ void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP, ...@@ -1070,7 +1082,7 @@ void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP,
dl_req->number_dci++; dl_req->number_dci++;
dl_req->number_pdu++; dl_req->number_pdu++;
LOG_D(MAC,"msg4 retransmission for rnti %x (round %d) fsf %d/%d\n", RA_template->rnti, round, frameP, subframeP); LOG_I(MAC,"msg4 retransmission for rnti %x (round %d) fsf %d/%d\n", RA_template->rnti, round, frameP, subframeP);
// DLSCH Config // DLSCH Config
fill_nfapi_dlsch_config(eNB, fill_nfapi_dlsch_config(eNB,
dl_req, dl_req,
...@@ -1152,7 +1164,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP) ...@@ -1152,7 +1164,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP)
if (RA_template->RA_active == TRUE) { if (RA_template->RA_active == TRUE) {
LOG_D(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA %d is active (generate RAR %d, generate_Msg4 %d, wait_ack_Msg4 %d, rnti %x)\n", LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA %d is active (generate RAR %d, generate_Msg4 %d, wait_ack_Msg4 %d, rnti %x)\n",
module_idP,frameP,subframeP,CC_id,i,RA_template->generate_rar,RA_template->generate_Msg4,RA_template->wait_ack_Msg4, RA_template->rnti); module_idP,frameP,subframeP,CC_id,i,RA_template->generate_rar,RA_template->generate_Msg4,RA_template->wait_ack_Msg4, RA_template->rnti);
if (RA_template->generate_rar == 1) generate_Msg2(module_idP,CC_id,frameP,subframeP,RA_template); if (RA_template->generate_rar == 1) generate_Msg2(module_idP,CC_id,frameP,subframeP,RA_template);
......
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @ 8e6cc019
...@@ -635,6 +635,9 @@ schedule_ue_spec( ...@@ -635,6 +635,9 @@ schedule_ue_spec(
UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid; UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid;
UE_list->eNB_UE_stats[CC_id][UE_id].harq_round = round; UE_list->eNB_UE_stats[CC_id][UE_id].harq_round = round;
if (UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status < RRC_CONNECTED) continue;
sdu_length_total=0; sdu_length_total=0;
num_sdus=0; num_sdus=0;
...@@ -1378,14 +1381,15 @@ fill_DLSCH_dci( ...@@ -1378,14 +1381,15 @@ fill_DLSCH_dci(
for (i=0;i<DL_req[CC_id].dl_config_request_body.number_pdu;i++) { for (i=0;i<DL_req[CC_id].dl_config_request_body.number_pdu;i++) {
dl_config_pdu = &DL_req[CC_id].dl_config_request_body.dl_config_pdu_list[i]; dl_config_pdu = &DL_req[CC_id].dl_config_request_body.dl_config_pdu_list[i];
if ((dl_config_pdu->pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)&& if ((dl_config_pdu->pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)&&
(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti == rnti)) { (dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti == rnti) &&
(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format != 1)) {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub); dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_allocation_type = 0; dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_allocation_type = 0;
} }
else if ((dl_config_pdu->pdu_type == NFAPI_DL_CONFIG_DLSCH_PDU_TYPE)&& else if ((dl_config_pdu->pdu_type == NFAPI_DL_CONFIG_DLSCH_PDU_TYPE)&&
(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti == rnti)) { (dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti == rnti) &&
(dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type==0)) {
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub); dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 0;
} }
} }
} }
......
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