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Commit bfd2c35c authored by yaojie's avatar yaojie
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fix warning/error

parent e15f0b28
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Showing with 132 additions and 68 deletions
cmake_targets/CMakeLists.txt
View file @ bfd2c35c
...@@ -3329,14 +3329,6 @@ add_executable(nr-ittisim ...@@ -3329,14 +3329,6 @@ add_executable(nr-ittisim
${SHLIB_LOADER_SOURCES} ${SHLIB_LOADER_SOURCES}
) )
#target_link_libraries (nr-ittisim
# -Wl,--start-group
# UTIL HASHTABLE SCTP_CLIENT UDP LFDS NR_GTPV1U SECU_CN SECU_OSA
# ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} ${FLEXRAN_AGENT_LIB} LFDS7 ${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} RRC_LIB NR_RRC_LIB
# NGAP_LIB NGAP_GNB S1AP_LIB S1AP_ENB
# X2AP_LIB X2AP_ENB F1AP_LIB F1AP M2AP_LIB M2AP_ENB M3AP_LIB M3AP_ENB ${PROTO_AGENT_LIB} ${FSPT_MSG_LIB}
# -Wl,--end-group z dl)
target_link_libraries (nr-ittisim target_link_libraries (nr-ittisim
-Wl,--start-group -Wl,--start-group
UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_NR_COMMON PHY_RU LFDS NR_GTPV1U SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_NR_COMMON PHY_RU LFDS NR_GTPV1U SECU_CN SECU_OSA
......
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @ bfd2c35c
...@@ -66,9 +66,9 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd ...@@ -66,9 +66,9 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd
void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id, uint8_t dci_format){ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id, uint8_t dci_format){
uint16_t monitoringSymbolsWithinSlot; uint16_t monitoringSymbolsWithinSlot = 0;
uint8_t bwp_id = 1, coreset_id = 1; uint8_t bwp_id = 1, coreset_id = 1;
int sps; int sps = 0;
def_dci_pdu_rel15 = calloc(1,sizeof(dci_pdu_rel15_t)); def_dci_pdu_rel15 = calloc(1,sizeof(dci_pdu_rel15_t));
AssertFatal(mac->scc != NULL, "scc is null\n"); AssertFatal(mac->scc != NULL, "scc is null\n");
NR_ServingCellConfigCommon_t *scc = mac->scc; NR_ServingCellConfigCommon_t *scc = mac->scc;
...@@ -184,7 +184,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl ...@@ -184,7 +184,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
int ss_id; int ss_id;
uint8_t bwp_id = 1, coreset_id = 1; uint8_t bwp_id = 1, coreset_id = 1;
NR_ServingCellConfig_t *scd = mac->scg->spCellConfig->spCellConfigDedicated; //NR_ServingCellConfig_t *scd = mac->scg->spCellConfig->spCellConfigDedicated;
NR_BWP_Downlink_t *bwp = mac->DLbwp[bwp_id - 1]; NR_BWP_Downlink_t *bwp = mac->DLbwp[bwp_id - 1];
#ifdef DEBUG_DCI #ifdef DEBUG_DCI
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ bfd2c35c
...@@ -1275,7 +1275,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue, ...@@ -1275,7 +1275,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
(dynamic_prb_BundlingType2==dy_2_n4)||(dynamic_prb_BundlingType2==dy_2_wideband)) prb_BundlingType_size=1; (dynamic_prb_BundlingType2==dy_2_n4)||(dynamic_prb_BundlingType2==dy_2_wideband)) prb_BundlingType_size=1;
// 15 RATE_MATCHING_IND FIXME!!! // 15 RATE_MATCHING_IND FIXME!!!
// according to TS 38.212: Rate matching indicator – 0, 1, or 2 bits according to higher layer parameter rateMatchPattern // according to TS 38.212: Rate matching indicator  E0, 1, or 2 bits according to higher layer parameter rateMatchPattern
uint8_t rateMatching_bits = pdsch_config.n_rateMatchPatterns; uint8_t rateMatching_bits = pdsch_config.n_rateMatchPatterns;
// 16 ZP_CSI_RS_TRIGGER FIXME!!! // 16 ZP_CSI_RS_TRIGGER FIXME!!!
// 0, 1, or 2 bits as defined in Subclause 5.1.4.2 of [6, TS 38.214]. // 0, 1, or 2 bits as defined in Subclause 5.1.4.2 of [6, TS 38.214].
...@@ -1418,7 +1418,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue, ...@@ -1418,7 +1418,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
// 2 bits otherwise // 2 bits otherwise
uint8_t ptrs_dmrs_bits=0; //FIXME!!! uint8_t ptrs_dmrs_bits=0; //FIXME!!!
// 46 BETA_OFFSET_IND // 46 BETA_OFFSET_IND
// at IE PUSCH-Config, beta_offset indicator – 0 if the higher layer parameter betaOffsets = semiStatic; otherwise 2 bits // at IE PUSCH-Config, beta_offset indicator  E0 if the higher layer parameter betaOffsets = semiStatic; otherwise 2 bits
// uci-OnPUSCH // uci-OnPUSCH
// Selection between and configuration of dynamic and semi-static beta-offset. If the field is absent or released, the UE applies the value 'semiStatic' and the BetaOffsets // Selection between and configuration of dynamic and semi-static beta-offset. If the field is absent or released, the UE applies the value 'semiStatic' and the BetaOffsets
uint8_t betaOffsets = 0; uint8_t betaOffsets = 0;
...@@ -3289,10 +3289,10 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -3289,10 +3289,10 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
case NR_RNTI_P: case NR_RNTI_P:
/* /*
// Short Messages Indicator – 2 bits // Short Messages Indicator  E2 bits
for (int i=0; i<2; i++) for (int i=0; i<2; i++)
dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_size-pos++); dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_size-pos++);
// Short Messages – 8 bits // Short Messages  E8 bits
for (int i=0; i<8; i++) for (int i=0; i<8; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages>>(7-i))&1)<<(dci_size-pos++); *dci_pdu |= (((uint64_t)dci_pdu_rel15->short_messages>>(7-i))&1)<<(dci_size-pos++);
// Freq domain assignment 0-16 bit // Freq domain assignment 0-16 bit
...@@ -3359,13 +3359,13 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -3359,13 +3359,13 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
// HARQ process number 4bit // HARQ process number 4bit
pos+=4; pos+=4;
dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf;
// Downlink assignment index – 2 bits // Downlink assignment index  E2 bits
pos+=2; pos+=2;
dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3;
// TPC command for scheduled PUCCH – 2 bits // TPC command for scheduled PUCCH  E2 bits
pos+=2; pos+=2;
dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3;
// PDSCH-to-HARQ_feedback timing indicator – 3 bits // PDSCH-to-HARQ_feedback timing indicator  E3 bits
pos+=3; pos+=3;
dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&7; dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&7;
...@@ -3386,7 +3386,7 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -3386,7 +3386,7 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
// Time domain assignment 4bit // Time domain assignment 4bit
pos+=4; pos+=4;
dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf;
// Frequency hopping flag – 1 bit // Frequency hopping flag  E1 bit
pos++; pos++;
dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1; dci_pdu_rel15->frequency_hopping_flag.val= (*dci_pdu>>(dci_size-pos))&1;
// MCS 5 bit // MCS 5 bit
...@@ -3401,10 +3401,10 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -3401,10 +3401,10 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
// HARQ process number 4bit // HARQ process number 4bit
pos+=4; pos+=4;
dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf;
// TPC command for scheduled PUSCH – 2 bits // TPC command for scheduled PUSCH  E2 bits
pos+=2; pos+=2;
dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3;
// UL/SUL indicator – 1 bit // UL/SUL indicator  E1 bit
/* commented for now (RK): need to get this from BWP descriptor /* commented for now (RK): need to get this from BWP descriptor
if (cfg->pucch_config.pucch_GroupHopping.value) if (cfg->pucch_config.pucch_GroupHopping.value)
dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++); dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)ul_sul_indicator&1)<<(dci_size-pos++);
...@@ -3422,7 +3422,7 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -3422,7 +3422,7 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
// Time domain assignment 4bit // Time domain assignment 4bit
for (int i=0; i<4; i++) for (int i=0; i<4; i++)
dci_pdu->= (((uint64_t)*dci_pdu>>(dci_size-pos)time_domain_assignment>>(3-i))&1)<<(dci_size-pos++); dci_pdu->= (((uint64_t)*dci_pdu>>(dci_size-pos)time_domain_assignment>>(3-i))&1)<<(dci_size-pos++);
// Frequency hopping flag – 1 bit // Frequency hopping flag  E1 bit
dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)frequency_hopping_flag&1)<<(dci_size-pos++); dci_pdu->= ((uint64_t)*dci_pdu>>(dci_size-pos)frequency_hopping_flag&1)<<(dci_size-pos++);
// MCS 5 bit // MCS 5 bit
for (int i=0; i<5; i++) for (int i=0; i<5; i++)
...@@ -3436,11 +3436,11 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -3436,11 +3436,11 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
for (int i=0; i<4; i++) for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)*dci_pdu>>(dci_size-pos)harq_pid>>(3-i))&1)<<(dci_size-pos++); *dci_pdu |= (((uint64_t)*dci_pdu>>(dci_size-pos)harq_pid>>(3-i))&1)<<(dci_size-pos++);
// TPC command for scheduled PUSCH – 2 bits // TPC command for scheduled PUSCH  E2 bits
for (int i=0; i<2; i++) for (int i=0; i<2; i++)
dci_pdu->= (((uint64_t)*dci_pdu>>(dci_size-pos)tpc>>(1-i))&1)<<(dci_size-pos++); dci_pdu->= (((uint64_t)*dci_pdu>>(dci_size-pos)tpc>>(1-i))&1)<<(dci_size-pos++);
*/ */
// UL/SUL indicator – 1 bit // UL/SUL indicator  E1 bit
/* /*
commented for now (RK): need to get this information from BWP descriptor commented for now (RK): need to get this information from BWP descriptor
if (cfg->pucch_config.pucch_GroupHopping.value) if (cfg->pucch_config.pucch_GroupHopping.value)
......
openair2/RRC/NR/MESSAGES/asn1_msg.c
View file @ bfd2c35c
...@@ -1073,6 +1073,7 @@ uint16_t do_RRCReconfiguration( ...@@ -1073,6 +1073,7 @@ uint16_t do_RRCReconfiguration(
dedicatedNAS_Message = calloc(1, sizeof(NR_DedicatedNAS_Message_t)); dedicatedNAS_Message = calloc(1, sizeof(NR_DedicatedNAS_Message_t));
dedicatedNAS_Message->buf = ue_context_pP->ue_context.nas_pdu.buffer; dedicatedNAS_Message->buf = ue_context_pP->ue_context.nas_pdu.buffer;
dedicatedNAS_Message->size = ue_context_pP->ue_context.nas_pdu.length; dedicatedNAS_Message->size = ue_context_pP->ue_context.nas_pdu.length;
ie->nonCriticalExtension->dedicatedNAS_MessageList = calloc(1, sizeof(struct NR_RRCReconfiguration_v1530_IEs__dedicatedNAS_MessageList));
ASN_SEQUENCE_ADD(&ie->nonCriticalExtension->dedicatedNAS_MessageList->list, dedicatedNAS_Message); ASN_SEQUENCE_ADD(&ie->nonCriticalExtension->dedicatedNAS_MessageList->list, dedicatedNAS_Message);
dl_dcch_msg.message.choice.c1->choice.rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration = ie; dl_dcch_msg.message.choice.c1->choice.rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration = ie;
...@@ -1106,15 +1107,6 @@ uint16_t do_RRCReconfiguration( ...@@ -1106,15 +1107,6 @@ uint16_t do_RRCReconfiguration(
return(-1); return(-1);
} }
#ifdef ITTI_SIM
MessageDef *message_p;
message_p = itti_alloc_new_message (TASK_RRC_GNB_SIM, GNB_RRC_DCCH_DATA_IND);
GNB_RRC_DCCH_DATA_IND (message_p).rbid = DCCH;
GNB_RRC_DCCH_DATA_IND (message_p).sdu = (uint8_t*)buffer;
GNB_RRC_DCCH_DATA_IND (message_p).size = (enc_rval.encoded+7)/8;
itti_send_msg_to_task (TASK_RRC_UE_SIM, ctxt_pP->instance, message_p);
#endif
return((enc_rval.encoded+7)/8); return((enc_rval.encoded+7)/8);
} }
...@@ -1192,9 +1184,9 @@ do_NR_RRCReconfigurationComplete( ...@@ -1192,9 +1184,9 @@ do_NR_RRCReconfigurationComplete(
NR_RRCReconfigurationComplete__criticalExtensions_PR_rrcReconfigurationComplete; NR_RRCReconfigurationComplete__criticalExtensions_PR_rrcReconfigurationComplete;
rrcReconfigurationComplete->criticalExtensions.choice.rrcReconfigurationComplete->nonCriticalExtension = NULL; rrcReconfigurationComplete->criticalExtensions.choice.rrcReconfigurationComplete->nonCriticalExtension = NULL;
rrcReconfigurationComplete->criticalExtensions.choice.rrcReconfigurationComplete->lateNonCriticalExtension = NULL; rrcReconfigurationComplete->criticalExtensions.choice.rrcReconfigurationComplete->lateNonCriticalExtension = NULL;
if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) { //if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
xer_fprint(stdout, &asn_DEF_NR_UL_DCCH_Message, (void *)&ul_dcch_msg); xer_fprint(stdout, &asn_DEF_NR_UL_DCCH_Message, (void *)&ul_dcch_msg);
} //}
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_UL_DCCH_Message, enc_rval = uper_encode_to_buffer(&asn_DEF_NR_UL_DCCH_Message,
NULL, NULL,
...@@ -1203,7 +1195,7 @@ do_NR_RRCReconfigurationComplete( ...@@ -1203,7 +1195,7 @@ do_NR_RRCReconfigurationComplete(
100); 100);
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n", AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n",
enc_rval.failed_type->name, enc_rval.encoded); enc_rval.failed_type->name, enc_rval.encoded);
LOG_D(NR_RRC,"rrcReconfigurationComplete Encoded %zd bits (%zd bytes)\n",enc_rval.encoded,(enc_rval.encoded+7)/8); LOG_I(NR_RRC,"rrcReconfigurationComplete Encoded %zd bits (%zd bytes)\n",enc_rval.encoded,(enc_rval.encoded+7)/8);
return((enc_rval.encoded+7)/8); return((enc_rval.encoded+7)/8);
} }
......
openair2/RRC/NR/MESSAGES/asn1_msg.h
View file @ bfd2c35c
...@@ -118,3 +118,5 @@ uint8_t do_RRCSetupComplete(uint8_t Mod_id, ...@@ -118,3 +118,5 @@ uint8_t do_RRCSetupComplete(uint8_t Mod_id,
uint8_t sel_plmn_id, uint8_t sel_plmn_id,
const int dedicatedInfoNASLength, const int dedicatedInfoNASLength,
const char *dedicatedInfoNAS); const char *dedicatedInfoNAS);
uint8_t do_RRCSetupRequest(uint8_t Mod_id, uint8_t *buffer,uint8_t *rv);
\ No newline at end of file
openair2/RRC/NR/nr_rrc_defs.h
View file @ bfd2c35c
...@@ -150,7 +150,7 @@ typedef struct UE_RRC_INFO_NR_s { ...@@ -150,7 +150,7 @@ typedef struct UE_RRC_INFO_NR_s {
uint32_t SIStatus; uint32_t SIStatus;
uint32_t SIcnt; uint32_t SIcnt;
uint8_t MCCHStatus[8]; // MAX_MBSFN_AREA uint8_t MCCHStatus[8]; // MAX_MBSFN_AREA
uint8_t SIwindowsize; //!< Corresponds to the SIB1 si-WindowLength parameter. The unit is ms. Possible values are (final): 1,2,5,10,15,20,40 uint16_t SIwindowsize; //!< Corresponds to the SIB1 si-WindowLength parameter. The unit is ms. Possible values are (final): 1,2,5,10,15,20,40
uint8_t handoverTarget; uint8_t handoverTarget;
//HO_STATE_t ho_state; //HO_STATE_t ho_state;
uint16_t uint16_t
......
openair2/RRC/NR/rrc_gNB.c
View file @ bfd2c35c
...@@ -576,8 +576,8 @@ rrc_gNB_process_RRCReconfigurationComplete( ...@@ -576,8 +576,8 @@ rrc_gNB_process_RRCReconfigurationComplete(
NR_DRB_Identity_t *drb_id_p = NULL; NR_DRB_Identity_t *drb_id_p = NULL;
ue_context_pP->ue_context.ue_reestablishment_timer = 0; ue_context_pP->ue_context.ue_reestablishment_timer = 0;
rnti_t rnti = ue_context_pP->ue_id_rnti; //rnti_t rnti = ue_context_pP->ue_id_rnti;
module_id_t module_id = ctxt_pP->module_id; //module_id_t module_id = ctxt_pP->module_id;
// int UE_id_mac = find_UE_id(module_id, rnti); // int UE_id_mac = find_UE_id(module_id, rnti);
...@@ -625,6 +625,31 @@ rrc_gNB_process_RRCReconfigurationComplete( ...@@ -625,6 +625,31 @@ rrc_gNB_process_RRCReconfigurationComplete(
// NULL); // NULL);
/* Loop through DRBs and establish if necessary */ /* Loop through DRBs and establish if necessary */
/* Set the SRB active in UE context */
if (SRB_configList != NULL) {
for (int i = 0; (i < SRB_configList->list.count) && (i < 3); i++) {
if (SRB_configList->list.array[i]->srb_Identity == 1) {
ue_context_pP->ue_context.Srb1.Active = 1;
} else if (SRB_configList->list.array[i]->srb_Identity == 2) {
ue_context_pP->ue_context.Srb2.Active = 1;
ue_context_pP->ue_context.Srb2.Srb_info.Srb_id = 2;
LOG_I(NR_RRC,"[gNB %d] Frame %d CC %d : SRB2 is now active\n",
ctxt_pP->module_id,
ctxt_pP->frame,
ue_context_pP->ue_context.primaryCC_id);
} else {
LOG_W(NR_RRC,"[gNB %d] Frame %d CC %d : invalide SRB identity %ld\n",
ctxt_pP->module_id,
ctxt_pP->frame,
ue_context_pP->ue_context.primaryCC_id,
SRB_configList->list.array[i]->srb_Identity);
}
}
free(SRB_configList);
ue_context_pP->ue_context.SRB_configList2[xid] = NULL;
}
if (DRB_configList != NULL) { if (DRB_configList != NULL) {
for (int i = 0; i < DRB_configList->list.count; i++) { for (int i = 0; i < DRB_configList->list.count; i++) {
if (DRB_configList->list.array[i]) { if (DRB_configList->list.array[i]) {
...@@ -1057,7 +1082,7 @@ rrc_gNB_decode_dcch( ...@@ -1057,7 +1082,7 @@ rrc_gNB_decode_dcch(
uint64_t fiveg_s_TMSI = bitStr_to_uint64(&ul_dcch_msg->message.choice.c1->choice.rrcSetupComplete-> uint64_t fiveg_s_TMSI = bitStr_to_uint64(&ul_dcch_msg->message.choice.c1->choice.rrcSetupComplete->
criticalExtensions.choice.rrcSetupComplete->ng_5G_S_TMSI_Value->choice.ng_5G_S_TMSI); criticalExtensions.choice.rrcSetupComplete->ng_5G_S_TMSI_Value->choice.ng_5G_S_TMSI);
LOG_I(NR_RRC, "Received rrcSetupComplete, 5g_s_TMSI: 0x%lX, amf_set_id: 0x%lX(%d), amf_pointer: 0x%lX(%d), 5g TMSI: 0x%X \n", LOG_I(NR_RRC, "Received rrcSetupComplete, 5g_s_TMSI: 0x%lX, amf_set_id: 0x%lX(%ld), amf_pointer: 0x%lX(%ld), 5g TMSI: 0x%X \n",
fiveg_s_TMSI, fiveg_s_TMSI >> 38, fiveg_s_TMSI >> 38, fiveg_s_TMSI, fiveg_s_TMSI >> 38, fiveg_s_TMSI >> 38,
(fiveg_s_TMSI >> 32) & 0x3F, (fiveg_s_TMSI >> 32) & 0x3F, (fiveg_s_TMSI >> 32) & 0x3F, (fiveg_s_TMSI >> 32) & 0x3F,
(uint32_t)fiveg_s_TMSI); (uint32_t)fiveg_s_TMSI);
...@@ -1102,6 +1127,7 @@ rrc_gNB_decode_dcch( ...@@ -1102,6 +1127,7 @@ rrc_gNB_decode_dcch(
// } // }
rrc_gNB_generate_UECapabilityEnquiry(ctxt_pP, ue_context_p); rrc_gNB_generate_UECapabilityEnquiry(ctxt_pP, ue_context_p);
//rrc_gNB_generate_defaultRRCReconfiguration(ctxt_pP, ue_context_p);
break; break;
case NR_UL_DCCH_MessageType__c1_PR_ueCapabilityInformation: case NR_UL_DCCH_MessageType__c1_PR_ueCapabilityInformation:
......
openair2/RRC/NR_UE/rrc_UE.c
View file @ bfd2c35c
This diff is collapsed.
openair2/RRC/NR_UE/rrc_defs.h
View file @ bfd2c35c
...@@ -183,6 +183,7 @@ typedef struct NR_UE_RRC_INST_s { ...@@ -183,6 +183,7 @@ typedef struct NR_UE_RRC_INST_s {
long selected_plmn_identity; long selected_plmn_identity;
Rrc_State_NR_t nrRrcState; Rrc_State_NR_t nrRrcState;
Rrc_Sub_State_NR_t nrRrcSubState; Rrc_Sub_State_NR_t nrRrcSubState;
as_nas_info_t initialNasMsg;
} NR_UE_RRC_INST_t; } NR_UE_RRC_INST_t;
#endif #endif
......
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