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canghaiwuhen
OpenXG-RAN
Commits
c9c1df0b
Commit
c9c1df0b
authored
Oct 12, 2020
by
Sakthivel Velumani
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Plain Diff
fixed dlsim build error
also added a log message for DCI generation in MAC
parent
f7cef6b1
Changes
2
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2 changed files
with
2 additions
and
1 deletion
+2
-1
openair1/SIMULATION/NR_PHY/dlsim.c
openair1/SIMULATION/NR_PHY/dlsim.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+1
-0
No files found.
openair1/SIMULATION/NR_PHY/dlsim.c
View file @
c9c1df0b
...
@@ -779,7 +779,7 @@ int main(int argc, char **argv)
...
@@ -779,7 +779,7 @@ int main(int argc, char **argv)
UE_info
->
UE_sched_ctrl
[
0
].
current_harq_pid
=
harq_pid
;
UE_info
->
UE_sched_ctrl
[
0
].
current_harq_pid
=
harq_pid
;
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
harq_pid
]
->
round
=
round
;
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
harq_pid
]
->
round
=
round
;
for
(
int
i
=
0
;
i
<
MAX_NUM_CORESET
;
i
++
)
for
(
int
i
=
0
;
i
<
MAX_NUM_CORESET
;
i
++
)
gNB_mac
->
UE_
list
.
num_pdcch_cand
[
0
][
i
]
=
0
;
gNB_mac
->
UE_
info
.
num_pdcch_cand
[
0
][
i
]
=
0
;
if
(
css_flag
==
0
)
nr_schedule_uss_dlsch_phytest
(
0
,
frame
,
slot
,
&
pucch_sched
,
&
dlsch_config
);
if
(
css_flag
==
0
)
nr_schedule_uss_dlsch_phytest
(
0
,
frame
,
slot
,
&
pucch_sched
,
&
dlsch_config
);
else
nr_schedule_css_dlsch_phytest
(
0
,
frame
,
slot
);
else
nr_schedule_css_dlsch_phytest
(
0
,
frame
,
slot
);
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
c9c1df0b
...
@@ -1531,6 +1531,7 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
...
@@ -1531,6 +1531,7 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
pos
+=
1
;
pos
+=
1
;
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
dmrs_sequence_initialization
.
val
&
0x1
)
<<
(
dci_size
-
pos
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
dmrs_sequence_initialization
.
val
&
0x1
)
<<
(
dci_size
-
pos
);
}
}
LOG_D
(
MAC
,
"DCI index %d has %d bits and the payload is %lx
\n
"
,
d
,
dci_size
,
*
dci_pdu
);
}
}
}
}
...
...
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