Commit cdc240d4 authored by Florian Kaltenberger's avatar Florian Kaltenberger

cosmetic changes

parent 8779866c
...@@ -501,6 +501,7 @@ uint16_t padding; ...@@ -501,6 +501,7 @@ uint16_t padding;
typedef struct{ typedef struct{
nfapi_tl_t tl; nfapi_tl_t tl;
uint8_t coreset_id; uint8_t coreset_id;
///bitmap of 45 bits, where each bit is 6 PRB
uint64_t frequency_domain_resources; uint64_t frequency_domain_resources;
uint8_t duration; uint8_t duration;
uint8_t cce_reg_mapping_type; uint8_t cce_reg_mapping_type;
......
...@@ -36,6 +36,8 @@ nr_subframe_t nr_slot_select(nfapi_nr_config_request_t *cfg,unsigned char slot) ...@@ -36,6 +36,8 @@ nr_subframe_t nr_slot_select(nfapi_nr_config_request_t *cfg,unsigned char slot)
{ {
if (cfg->subframe_config.duplex_mode.value == FDD) if (cfg->subframe_config.duplex_mode.value == FDD)
return(SF_DL); return(SF_DL);
LOG_E(PHY,"Not developped TDD mode\n"); else {
return -1; LOG_W(PHY,"TDD slot formats not yet implemented, assuming DL\n");
return(SF_DL);
}
} }
...@@ -154,7 +154,7 @@ int main(int argc, char **argv) ...@@ -154,7 +154,7 @@ int main(int argc, char **argv)
unsigned char frame_type = 0; unsigned char frame_type = 0;
unsigned char pbch_phase = 0; unsigned char pbch_phase = 0;
int frame=0,slot=1; int frame=0,slot=0;
int frame_length_complex_samples; int frame_length_complex_samples;
int frame_length_complex_samples_no_prefix; int frame_length_complex_samples_no_prefix;
int slot_length_complex_samples_no_prefix; int slot_length_complex_samples_no_prefix;
...@@ -170,7 +170,7 @@ int main(int argc, char **argv) ...@@ -170,7 +170,7 @@ int main(int argc, char **argv)
int run_initial_sync=0; int run_initial_sync=0;
int do_pdcch_flag=1; int do_pdcch_flag=1;
int loglvl=OAILOG_WARNING; int loglvl=OAILOG_INFO;
float target_error_rate = 0.01; float target_error_rate = 0.01;
...@@ -405,23 +405,24 @@ int main(int argc, char **argv) ...@@ -405,23 +405,24 @@ int main(int argc, char **argv)
double fs,bw; double fs,bw;
if (mu == 1 && N_RB_DL == 217) { if (mu == 1) {
if (N_RB_DL > 217 && N_RB_DL <= 273) {
fs = 122.88e6; fs = 122.88e6;
bw = 80e6; bw = 100e6;
}
else if (mu == 1 && N_RB_DL == 245) {
fs = 122.88e6;
bw = 90e6;
} }
else if (mu == 1 && N_RB_DL == 273) { else if (N_RB_DL > 106 && N_RB_DL <= 217) {
fs = 122.88e6; fs = 122.88e6;
bw = 100e6; bw = 80e6;
} }
else if (mu == 1 && N_RB_DL == 106) { else if (N_RB_DL > 0 && N_RB_DL <= 106) {
fs = 61.44e6; fs = 61.44e6;
bw = 40e6; bw = 40e6;
} }
else AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL); else
AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL);
}
else
AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL);
gNB2UE = new_channel_desc_scm(n_tx, gNB2UE = new_channel_desc_scm(n_tx,
n_rx, n_rx,
...@@ -607,15 +608,18 @@ int main(int argc, char **argv) ...@@ -607,15 +608,18 @@ int main(int argc, char **argv)
dl_config.dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI; dl_config.dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0x1234; // to be set dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0x1234; // to be set
uint64_t mask = 0x0;
uint16_t num_rbs=24; uint16_t num_rbs=24;
uint16_t rb_offset=0; uint16_t rb_offset=0;
uint16_t cell_id=0; uint16_t cell_id=0;
uint16_t num_symbols=2; uint16_t num_symbols=2;
uint64_t mask = 0x1E0000000000;
/*uint64_t mask = 0x0;
for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
mask = mask >> 1; mask = mask >> 1;
mask = mask | 0x100000000000; mask = mask | 0x100000000000;
} }*/
printf("mask = %lx\n",mask);
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.frequency_domain_resource = mask; dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.frequency_domain_resource = mask;
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset; // additional parameter other than coreset dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset; // additional parameter other than coreset
...@@ -642,6 +646,8 @@ int main(int argc, char **argv) ...@@ -642,6 +646,8 @@ int main(int argc, char **argv)
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.duration = search_space_duration; dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.duration = search_space_duration;
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff; dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
printf("monitoring_symbols_within_slot = %x\n",dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.monitoring_symbols_within_slot);
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = N_RB_DL; dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = N_RB_DL;
for (SNR=snr0; SNR<snr1; SNR+=.2) { for (SNR=snr0; SNR<snr1; SNR+=.2) {
......
...@@ -344,6 +344,8 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p ...@@ -344,6 +344,8 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
} }
/* this function fills the pdcch_params based on the coreset and search_space parameters. */
void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params, void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nfapi_nr_coreset_t* coreset, nfapi_nr_coreset_t* coreset,
nfapi_nr_search_space_t* search_space, nfapi_nr_search_space_t* search_space,
......
...@@ -47,7 +47,7 @@ extern RAN_CONTEXT_t RC; ...@@ -47,7 +47,7 @@ extern RAN_CONTEXT_t RC;
void nr_init_coreset(nfapi_nr_coreset_t *coreset) { void nr_init_coreset(nfapi_nr_coreset_t *coreset) {
coreset->coreset_id = 1; coreset->coreset_id = 1;
coreset->frequency_domain_resources = 0x1E0000000000;//0x1FFFE0000000; // 96 RB starting from CRB0 coreset->frequency_domain_resources = 0x1E0000000000; ///bitmap of 45 bits, where each bit is 6 PRB
coreset->duration = 2; coreset->duration = 2;
coreset->cce_reg_mapping_type = NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED; coreset->cce_reg_mapping_type = NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED;
coreset->reg_bundle_size = 6; coreset->reg_bundle_size = 6;
...@@ -65,7 +65,7 @@ void nr_init_search_space(nfapi_nr_search_space_t *search_space) { ...@@ -65,7 +65,7 @@ void nr_init_search_space(nfapi_nr_search_space_t *search_space) {
search_space->duration = 5; search_space->duration = 5;
search_space->slot_monitoring_periodicity = NFAPI_NR_SS_PERIODICITY_SL10; search_space->slot_monitoring_periodicity = NFAPI_NR_SS_PERIODICITY_SL10;
search_space->slot_monitoring_offset = 1; search_space->slot_monitoring_offset = 1;
search_space->monitoring_symbols_in_slot = 0xC0000000; // first 2 ofdm symbols search_space->monitoring_symbols_in_slot = 0x3; // first 2 ofdm symbols
search_space->css_formats_0_0_and_1_0 = 1; search_space->css_formats_0_0_and_1_0 = 1;
search_space->uss_dci_formats = 0; // enum to be defined-- formats 0.0 and 1.0 search_space->uss_dci_formats = 0; // enum to be defined-- formats 0.0 and 1.0
for (int i=0; i<NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS; i++) for (int i=0; i<NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS; i++)
......
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