Commit dd695beb authored by Raymond Knopp's avatar Raymond Knopp

functions up to Msg3 reception. Still a bug in decoding, signal is perfect,...

functions up to Msg3 reception. Still a bug in decoding, signal is perfect, but decoding fails. probably an issue in the descrambling
parent 7db69e3a
...@@ -177,9 +177,9 @@ void dci_encoding(uint8_t *a, ...@@ -177,9 +177,9 @@ void dci_encoding(uint8_t *a,
#endif #endif
// encode dci // encode dci
#ifdef DEBUG_DCI_ENCODING //#ifdef DEBUG_DCI_ENCODING
printf("Doing DCI encoding for %d bits, e %p, rnti %x\n",A,e,rnti); if (E>1000) printf("Doing DCI encoding for %d bits, e %p, rnti %x\n",A,e,rnti);
#endif //#endif
memset((void *)d,LTE_NULL,96); memset((void *)d,LTE_NULL,96);
...@@ -197,42 +197,25 @@ void dci_encoding(uint8_t *a, ...@@ -197,42 +197,25 @@ void dci_encoding(uint8_t *a,
#endif #endif
RCC = sub_block_interleaving_cc(D,d+96,w); RCC = sub_block_interleaving_cc(D,d+96,w);
#ifdef DEBUG_DCI_ENCODING //#ifdef DEBUG_DCI_ENCODING
printf("Doing DCI rate matching for %d channel bits, RCC %d, e %p\n",E,RCC,e); if (E>1000) printf("Doing DCI rate matching for %d channel bits, RCC %d, e %p\n",E,RCC,e);
#endif //#endif
lte_rate_matching_cc(RCC,E,w,e); lte_rate_matching_cc(RCC,E,w,e);
} }
uint8_t *generate_dci0(uint8_t *dci, uint8_t *generate_dci0(uint8_t *dci,
uint8_t *e, uint8_t *e,
uint8_t DCI_LENGTH, uint8_t DCI_LENGTH,
uint8_t aggregation_level, uint16_t coded_bits,
uint8_t bitsperCCE,
uint16_t rnti) uint16_t rnti)
{ {
uint16_t coded_bits;
uint8_t dci_flip[8]; uint8_t dci_flip[8];
AssertFatal((aggregation_level==1) ||
(aggregation_level==2) ||
(aggregation_level==4) ||
(aggregation_level==8)
#ifdef Rel14 // Added for EPDCCH/MPDCCH
||
(aggregation_level==16) ||
(aggregation_level==24) ||
(aggregation_level==32)
#endif
,
"generate_dci FATAL, illegal aggregation_level %d\n",aggregation_level);
coded_bits = bitsperCCE * aggregation_level;
/* /*
#ifdef DEBUG_DCI_ENCODING #ifdef DEBUG_DCI_ENCODING
...@@ -2293,8 +2276,7 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols, ...@@ -2293,8 +2276,7 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
e_ptr = generate_dci0(dci_alloc[i].dci_pdu, e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
e+(72*dci_alloc[i].firstCCE), e+(72*dci_alloc[i].firstCCE),
dci_alloc[i].dci_length, dci_alloc[i].dci_length,
dci_alloc[i].L, 72*dci_alloc[i].L,
72,
dci_alloc[i].rnti); dci_alloc[i].rnti);
} }
} }
......
...@@ -164,12 +164,11 @@ int8_t delta_PUSCH_acc[4] = { -1, 0, 1, 3 }; ...@@ -164,12 +164,11 @@ int8_t delta_PUSCH_acc[4] = { -1, 0, 1, 3 };
int8_t *delta_PUCCH_lut = delta_PUSCH_acc; int8_t *delta_PUCCH_lut = delta_PUSCH_acc;
void void
conv_eMTC_rballoc (uint16_t resource_block_coding, uint32_t N_RB_DL, uint32_t * rb_alloc) conv_eMTC_rballoc (uint8_t narrowband,uint16_t resource_block_coding, uint32_t N_RB_DL, uint32_t * rb_alloc)
{ {
int narrowband = resource_block_coding >> 5; int RIV = resource_block_coding;
int RIV = resource_block_coding & 31;
int N_NB_DL = N_RB_DL / 6; int N_NB_DL = N_RB_DL / 6;
int i0 = (N_RB_DL >> 1) - (3 * N_NB_DL); int i0 = (N_RB_DL >> 1) - (3 * N_NB_DL);
int first_rb = (6 * narrowband) + i0; int first_rb = (6 * narrowband) + i0;
...@@ -177,6 +176,8 @@ conv_eMTC_rballoc (uint16_t resource_block_coding, uint32_t N_RB_DL, uint32_t * ...@@ -177,6 +176,8 @@ conv_eMTC_rballoc (uint16_t resource_block_coding, uint32_t N_RB_DL, uint32_t *
int ind = first_rb >> 5; int ind = first_rb >> 5;
int ind_mod = first_rb & 31; int ind_mod = first_rb & 31;
AssertFatal(RIV<32,"RIV is %d > 31\n");
if (((N_RB_DL & 1) > 0) && (narrowband >= (N_NB_DL >> 1))) if (((N_RB_DL & 1) > 0) && (narrowband >= (N_NB_DL >> 1)))
first_rb++; first_rb++;
rb_alloc[0] = 0; rb_alloc[0] = 0;
...@@ -2208,6 +2209,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t * ...@@ -2208,6 +2209,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
((DCI6_1A_10MHz_t *) dci_pdu)->type = 1; ((DCI6_1A_10MHz_t *) dci_pdu)->type = 1;
((DCI6_1A_10MHz_t *) dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag; ((DCI6_1A_10MHz_t *) dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag;
((DCI6_1A_10MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; ((DCI6_1A_10MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_1A_10MHz_t *) dci_pdu)->narrowband = rel13->mpdcch_narrow_band;
((DCI6_1A_10MHz_t *) dci_pdu)->mcs = rel13->mcs; ((DCI6_1A_10MHz_t *) dci_pdu)->mcs = rel13->mcs;
((DCI6_1A_10MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels); ((DCI6_1A_10MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels);
((DCI6_1A_10MHz_t *) dci_pdu)->harq_pid = rel13->harq_process; ((DCI6_1A_10MHz_t *) dci_pdu)->harq_pid = rel13->harq_process;
...@@ -2218,8 +2220,22 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t * ...@@ -2218,8 +2220,22 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
((DCI6_1A_10MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset; ((DCI6_1A_10MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
((DCI6_1A_10MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number; ((DCI6_1A_10MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number;
LOG_I(PHY,"Frame %d, Subframe %d : Programming Format 6-1A DCI, mcs %d, rballoc %x, dci_rep r%d, L %d, narrowband %d, start_symbol %d, TPC %d, ra_flag %d, dci_type %d\n", LOG_I(PHY,"Frame %d, Subframe %d : Programming Format 6-1A DCI, type %d, hopping %d, narrowband %d, rballoc %x, mcs %d, rep %d, harq_pid %d, ndi %d, rv %d, TPC %d, srs_req %d, harq_ack_off %d, dci_rep r%d => %x\n",
frame,subframe,rel13->mcs,rel13->resource_block_coding,1+rel13->dci_subframe_repetition_number,rel13->aggregation_level,rel13->mpdcch_narrow_band,dci_alloc->start_symbol,rel13->tpc,dci_alloc->ra_flag,rel13->rnti_type); frame,subframe,
((DCI6_1A_10MHz_t *) dci_pdu)->type,
((DCI6_1A_10MHz_t *) dci_pdu)->hopping,
((DCI6_1A_10MHz_t *) dci_pdu)->narrowband,
((DCI6_1A_10MHz_t *) dci_pdu)->rballoc,
((DCI6_1A_10MHz_t *) dci_pdu)->mcs,
((DCI6_1A_10MHz_t *) dci_pdu)->rep,
((DCI6_1A_10MHz_t *) dci_pdu)->harq_pid,
((DCI6_1A_10MHz_t *) dci_pdu)->ndi,
((DCI6_1A_10MHz_t *) dci_pdu)->rv,
((DCI6_1A_10MHz_t *) dci_pdu)->TPC,
((DCI6_1A_10MHz_t *) dci_pdu)->srs_req,
((DCI6_1A_10MHz_t *) dci_pdu)->harq_ack_off,
((DCI6_1A_10MHz_t *) dci_pdu)->dci_rep,
((uint32_t*)dci_pdu)[0]);
break; break;
case 100: case 100:
dci_alloc->dci_length = sizeof_DCI6_1A_20MHz_t; dci_alloc->dci_length = sizeof_DCI6_1A_20MHz_t;
...@@ -2335,7 +2351,9 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t * ...@@ -2335,7 +2351,9 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
dlsch0->subframe_tx[(subframe + 2) % 10] = 1; dlsch0->subframe_tx[(subframe + 2) % 10] = 1;
LOG_I(PHY,"PDSCH : resource_block_coding %x\n",rel13->resource_block_coding); LOG_I(PHY,"PDSCH : resource_block_coding %x\n",rel13->resource_block_coding);
conv_eMTC_rballoc (rel13->resource_block_coding, fp->N_RB_DL, dlsch0_harq->rb_alloc); conv_eMTC_rballoc (rel13->mpdcch_narrow_band,rel13->resource_block_coding,
fp->N_RB_DL,
dlsch0_harq->rb_alloc);
dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel13->resource_block_coding & 31]; // this is the 6PRB RIV dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel13->resource_block_coding & 31]; // this is the 6PRB RIV
......
...@@ -19,16 +19,16 @@ ...@@ -19,16 +19,16 @@
* contact@openairinterface.org * contact@openairinterface.org
*/ */
/*! \file PHY/LTE_TRANSPORT/dci.c /*! \file PHY/LTE_TRANSPORT/edci.c
* \brief Implements PDCCH physical channel TX/RX procedures (36.211) and DCI encoding/decoding (36.212/36.213). Current LTE compliance V8.6 2009-03. * \brief Implements M/EPDCCH physical channel TX/RX procedures (36.211).
* \author R. Knopp * \author R. Knopp
* \date 2011 * \date 2011
* \version 0.1 * \version 0.1
* \company Eurecom * \company Eurecom
* \email: knopp@eurecom.fr * \email: knopp@eurecom.fr
* \note * \note
* \warning * \warning
*/ */
#ifdef USER_MODE #ifdef USER_MODE
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
...@@ -56,44 +56,46 @@ void generate_edci_top(PHY_VARS_eNB * eNB, int frame, int subframe) ...@@ -56,44 +56,46 @@ void generate_edci_top(PHY_VARS_eNB * eNB, int frame, int subframe)
void mpdcch_scrambling(LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, uint16_t i, uint8_t * e, uint32_t length) void mpdcch_scrambling(LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, uint16_t i, uint8_t * e, uint32_t length)
{ {
int n; int n;
uint8_t reset; uint8_t reset;
uint32_t x1, x2, s = 0; uint32_t x1, x2, s = 0;
uint8_t Nacc = 4; uint8_t Nacc = 4;
uint16_t j0, j, idelta; uint16_t j0, j, idelta;
uint16_t i0 = mdci->i0; uint16_t i0 = mdci->i0;
// Note: we could actually not do anything if i-i0 < Nacc, save it for later // Note: we could actually not do anything if i-i0 < Nacc, save it for later
reset = 1; reset = 1;
// x1 is set in lte_gold_generic // x1 is set in lte_gold_generic
if ((mdci->rnti == 0xFFFE) || (mdci->ce_mode == 2)) // CEModeB Note: also for mdci->rnti==SC_RNTI if ((mdci->rnti == 0xFFFE) || (mdci->ce_mode == 2)) // CEModeB Note: also for mdci->rnti==SC_RNTI
Nacc = frame_parms->frame_type == FDD ? 4 : 10; Nacc = frame_parms->frame_type == FDD ? 4 : 10;
else else
Nacc = 1; Nacc = 1;
if (frame_parms->frame_type == FDD || Nacc == 1)
idelta = 0;
else
idelta = Nacc - 2;
j0 = (i0 + idelta) / Nacc;
j = (i - i0) / Nacc;
// rule for BL/CE UEs from Section 6.8.B2 in 36.211
x2 = ((((j0 + j) * Nacc) % 10) << 9) + mdci->dmrs_scrambling_init;
LOG_I(PHY,"MPDCCH cinit = %x (mdci->dmrs_scrambling_init = %d), scrambling %d encoded DCI bits\n",
x2,mdci->dmrs_scrambling_init,length);
for (n = 0; n < length; n++) {
if ((n & 0x1f) == 0) {
s = lte_gold_generic(&x1, &x2, reset);
//printf("lte_gold[%d]=%x\n",i,s);
reset = 0;
}
if (frame_parms->frame_type == FDD || Nacc == 1) e[n] = (e[n] & 1) ^ ((s >> (n & 0x1f)) & 1);
idelta = 0;
else
idelta = Nacc - 2;
j0 = (i0 + idelta) / Nacc; }
j = (i - i0) / Nacc;
// rule for BL/CE UEs from Section 6.8.B2 in 36.211
x2 = ((((j0 + j) * Nacc) % 10) << 9) + mdci->dmrs_scrambling_init;
LOG_I(PHY,"MPDCCH cinit = %x (mdci->dmrs_scrambling_init = %d)\n",
x2,mdci->dmrs_scrambling_init);
for (n = 0; n < length; n++) {
if ((i & 0x1f) == 0) {
s = lte_gold_generic(&x1, &x2, reset);
//printf("lte_gold[%d]=%x\n",i,s);
reset = 0;
}
e[i] = (e[i] & 1) ^ ((s >> (i & 0x1f)) & 1);
}
} }
// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108 // this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
...@@ -101,33 +103,27 @@ void mpdcch_scrambling(LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, ui ...@@ -101,33 +103,27 @@ void mpdcch_scrambling(LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, ui
// 9 symbols without DMRS = 9*12*6 REs = 648 REs // 9 symbols without DMRS = 9*12*6 REs = 648 REs
// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs // 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs
// Total = 648+216 = 864 REs = 1728 bits // Total = 648+216 = 864 REs = 1728 bits
static uint16_t mpdcch5ss1p107108tab[864]; static uint16_t mpdcch5ss1tab[864];
static uint16_t mpdcch5ss1p109110tab[864];
void init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB) void init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB)
{ {
int l, k, kmod, re107108 = 0, re109110 = 0; int l, k, kmod, re=0;
LOG_I(PHY, "Inititalizing mpdcchss15tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n"); LOG_I(PHY, "Inititalizing mpdcchss15tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
for (l = 1; l < 14; l++) { for (l = 1; l < 14; l++) {
for (k = 0; k < 72; k++) { for (k = 0; k < 72; k++) {
kmod = k % 12; kmod = k % 12;
if (((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (kmod == 2) || (kmod == 3) || (kmod == 4) || (kmod == 7) || (kmod == 8) || (kmod == 9)) { if (((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (kmod == 2) || (kmod == 3) || (kmod == 4) || (kmod == 7) || (kmod == 8) || (kmod == 9)) {
mpdcch5ss1p109110tab[re109110] = (l * eNB->frame_parms.ofdm_symbol_size) + k; mpdcch5ss1tab[re] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
mpdcch5ss1p107108tab[re107108] = mpdcch5ss1p109110tab[re109110]; re++;
re107108++; printf("l %d, k %d (kmod %d) => re %d\n", l, k, kmod, re);
re109110++; } else if ((kmod == 0) || (kmod == 5) || (kmod == 10)) {
printf("l %d, k %d (kmod %d) => re %d\n", l, k, kmod, re107108); mpdcch5ss1tab[re++] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
} else if ((kmod == 0) || (kmod == 5) || (kmod == 10)) { }
mpdcch5ss1p109110tab[re109110++] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
} else if ((kmod == 1) || (kmod == 6) || (kmod == 11)) {
mpdcch5ss1p107108tab[re107108++] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
printf("l %d, k %d (kmod %d) => re %d\n", l, k, kmod, re107108);
}
}
} }
AssertFatal(re107108 == 864, "RE count not equal to 864 (%d)\n", re107108); }
AssertFatal(re == 864, "RE count not equal to 864 (%d)\n", re);
} }
// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108 // this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
...@@ -135,38 +131,31 @@ void init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB) ...@@ -135,38 +131,31 @@ void init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB)
// 8 symbols without DMRS = 8*12*6 REs = 576 REs // 8 symbols without DMRS = 8*12*6 REs = 576 REs
// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs // 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs
// Total = 576+216 = 792 REs = 1584 bits // Total = 576+216 = 792 REs = 1584 bits
static uint16_t mpdcch5ss2p107108tab[792]; static uint16_t mpdcch5ss2tab[792];
static uint16_t mpdcch5ss2p109110tab[792];
void init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB) void init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB)
{ {
int l, k, kmod, re107108 = 0, re109110 = 0; int l, k, kmod, re=0;
int nushift = eNB->frame_parms.Nid_cell % 6; int nushift = eNB->frame_parms.Nid_cell % 6;
int nushiftp3 = (eNB->frame_parms.Nid_cell+3) % 6; int nushiftp3 = (eNB->frame_parms.Nid_cell+3) % 6;
// NOTE : THIS IS FOR TM1 ONLY FOR NOW!!!!!!! // NOTE : THIS IS FOR TM1 ONLY FOR NOW!!!!!!!
LOG_I(PHY, "Inititalizing mpdcch5ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n"); LOG_I(PHY, "Inititalizing mpdcch5ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
for (l = 2; l < 14; l++) { for (l = 2; l < 14; l++) {
for (k = 0; k < 72; k++) { for (k = 0; k < 72; k++) {
kmod = k % 12; kmod = k % 12;
if ((((l == 4)||(l==11)) && (kmod != nushiftp3) && (kmod != (nushiftp3+6))) || if ((((l == 4)||(l==11)) && (kmod != nushiftp3) && (kmod != (nushiftp3+6))) ||
((l == 7) && (kmod != nushift) &&(kmod != (nushift+6)))) { // CS RS ((l == 7) && (kmod != nushift) &&(kmod != (nushift+6)))) { // CS RS
mpdcch5ss2p109110tab[re109110] = (l * eNB->frame_parms.ofdm_symbol_size) + k; mpdcch5ss2tab[re] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
mpdcch5ss2p107108tab[re107108] = mpdcch5ss2p109110tab[re109110]; re++;
re107108++; }
re109110++; if (((l!=4)&&(l!=7)&&(l!=11)) &&
printf("CSRS: l %d, k %d (kmod %d) => re %d\n", l, k, kmod, re107108); (((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (kmod == 2) || (kmod == 3) || (kmod == 4) || (kmod == 7) || (kmod == 8) || (kmod == 9))) {
mpdcch5ss2tab[re] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
} re++;
if (((l!=4)&&(l!=7)&&(l!=11)) && }
(((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (kmod == 2) || (kmod == 3) || (kmod == 4) || (kmod == 7) || (kmod == 8) || (kmod == 9))) {
mpdcch5ss2p109110tab[re109110] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
mpdcch5ss2p107108tab[re107108] = mpdcch5ss2p109110tab[re109110];
re107108++;
re109110++;
printf("l %d, k %d (kmod %d) => re %d\n", l, k, kmod, re107108);
}
}
} }
AssertFatal(re107108 == 684, "RE count not equal to 684\n"); }
AssertFatal(re == 684, "RE count not equal to 684\n");
} }
// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108 // this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
...@@ -174,31 +163,24 @@ void init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB) ...@@ -174,31 +163,24 @@ void init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB)
// 7 symbols without DMRS = 7*12*6 REs = 504 REs // 7 symbols without DMRS = 7*12*6 REs = 504 REs
// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs // 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs
// Total = 504+216 = 720 REs = 1440 bits // Total = 504+216 = 720 REs = 1440 bits
static uint16_t mpdcch5ss3p107108tab[720]; static uint16_t mpdcch5ss3tab[720];
static uint16_t mpdcch5ss3p109110tab[720];
void init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB) void init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB)
{ {
int l, k, kmod, re107108 = 0, re109110 = 0; int l, k, kmod, re=0;
LOG_I(PHY, "Inititalizing mpdcch5ss3tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n"); LOG_I(PHY, "Inititalizing mpdcch5ss3tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
for (l = 3; l < 14; l++) { for (l = 3; l < 14; l++) {
for (k = 0; k < 72; k++) { for (k = 0; k < 72; k++) {
kmod = k % 12; kmod = k % 12;
if (((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (kmod == 2) || (kmod == 3) || (kmod == 4) || (kmod == 7) || (kmod == 8) || (kmod == 9)) { if (((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (kmod == 2) || (kmod == 3) || (kmod == 4) || (kmod == 7) || (kmod == 8) || (kmod == 9)) {
mpdcch5ss3p109110tab[re109110] = (l * eNB->frame_parms.ofdm_symbol_size) + k; mpdcch5ss3tab[re] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
mpdcch5ss3p107108tab[re107108] = mpdcch5ss3p109110tab[re109110]; re++;
re107108++; } else if ((kmod == 0) || (kmod == 5) || (kmod == 10)) {
re109110++; mpdcch5ss3tab[re++] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
printf("l %d, k %d (kmod %d) => re %d\n", l, k, kmod, re107108); }
} else if ((kmod == 0) || (kmod == 5) || (kmod == 10)) {
mpdcch5ss3p109110tab[re109110++] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
} else if ((kmod == 1) || (kmod == 6) || (kmod == 11)) {
mpdcch5ss3p107108tab[re107108++] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
printf("l %d, k %d (kmod %d) => re %d\n", l, k, kmod, re107108);
}
}
} }
AssertFatal(re107108 == 720, "RE count not equal to 792\n"); }
AssertFatal(re == 720, "RE count not equal to 792\n");
} }
// this table is the allocation of modulated MPDCCH format 3 symbols to REs, antenna ports 107,108 // this table is the allocation of modulated MPDCCH format 3 symbols to REs, antenna ports 107,108
...@@ -206,25 +188,23 @@ void init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB) ...@@ -206,25 +188,23 @@ void init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB)
// 8 symbols without DMRS = 9*12*4 REs = 432 REs // 8 symbols without DMRS = 9*12*4 REs = 432 REs
// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*4 REs = 144 REs // 4 symbols with DMRS (3 REs stolen per symbol = 4*9*4 REs = 144 REs
// Total = 432+144 = 576 = 16CCE*36RE/CCE // Total = 432+144 = 576 = 16CCE*36RE/CCE
static uint16_t mpdcch3ss1p107108tab[576]; static uint16_t mpdcch3ss1tab[576];
static uint16_t mpdcch3ss1p109110tab[576];
void init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB) void init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB)
{ {
int l, k, kmod, re; int l, k, kmod, re=0;
LOG_I(PHY, "Inititalizing mpdcch3ss1tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n"); LOG_I(PHY, "Inititalizing mpdcch3ss1tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
for (l = 1, re = 0; l < 14; l++) { for (l = 1, re = 0; l < 14; l++) {
for (k = 0; k < 48; k++) { for (k = 0; k < 48; k++) {
kmod = k % 12; kmod = k % 12;
if (((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (((l == 5) || (l == 6) || (l == 12) || (l == 13)) && (kmod != 0) && (kmod != 5) && (kmod != 10))) { if (((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (((l == 5) || (l == 6) || (l == 12) || (l == 13)) && (kmod != 0) && (kmod != 5) && (kmod != 10))) {
mpdcch3ss1p109110tab[re] = (l * eNB->frame_parms.ofdm_symbol_size) + k; mpdcch3ss1tab[re] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
mpdcch3ss1p107108tab[re] = 1 + mpdcch3ss1p109110tab[re]; re++;
re++; }
}
}
} }
AssertFatal(re == 576, "RE count not equal to 864\n"); }
AssertFatal(re == 576, "RE count not equal to 864\n");
} }
// this table is the allocation of modulated MPDCCH format 2 symbols to REs, antenna ports 107,108 // this table is the allocation of modulated MPDCCH format 2 symbols to REs, antenna ports 107,108
...@@ -232,30 +212,29 @@ void init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB) ...@@ -232,30 +212,29 @@ void init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB)
// 8 symbols without DMRS = 9*12*2 REs = 216 REs // 8 symbols without DMRS = 9*12*2 REs = 216 REs
// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*2 REs = 72 REs // 4 symbols with DMRS (3 REs stolen per symbol = 4*9*2 REs = 72 REs
// Total = 216+72 = 288 = 8CCE*36RE/CCE // Total = 216+72 = 288 = 8CCE*36RE/CCE
static uint16_t mpdcch2ss1p107108tab[288]; static uint16_t mpdcch2ss1tab[288];
static uint16_t mpdcch2ss1p109110tab[288];
void init_mpdcch2ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB) void init_mpdcch2ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB)
{ {
int l, k, kmod, re; int l, k, kmod, re=0;
LOG_I(PHY, "Inititalizing mpdcch2ss1tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n"); LOG_I(PHY, "Inititalizing mpdcch2ss1tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
for (l = 1, re = 0; l < 14; l++) { for (l = 1, re = 0; l < 14; l++) {
for (k = 0; k < 24; k++) { for (k = 0; k < 24; k++) {
kmod = k % 12; kmod = k % 12;
if (((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (((l == 5) || (l == 6) || (l == 12) || (l == 13)) && (kmod != 0) && (kmod != 5) && (kmod != 10))) { if (((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (((l == 5) || (l == 6) || (l == 12) || (l == 13)) && (kmod != 0) && (kmod != 5) && (kmod != 10))) {
mpdcch2ss1p109110tab[re] = (l * eNB->frame_parms.ofdm_symbol_size) + k; mpdcch2ss1tab[re] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
mpdcch2ss1p107108tab[re] = 1 + mpdcch2ss1p109110tab[re]; re++;
re++; }
}
}
} }
AssertFatal(re == 288, "RE count not equal to 288\n"); }
AssertFatal(re == 288, "RE count not equal to 288\n");
} }
extern uint8_t *generate_dci0(uint8_t * dci, uint8_t * e, uint8_t DCI_LENGTH, uint8_t bitsperCCE, uint8_t aggregation_level, uint16_t rnti); extern uint8_t *generate_dci0(uint8_t * dci, uint8_t * e, uint8_t DCI_LENGTH, uint16_t coded_bits, uint16_t rnti);
uint16_t mpdcch_dmrs_tab[12 * 6]; uint16_t mpdcch_dmrs_tab[12 * 6];
...@@ -263,219 +242,246 @@ uint16_t mpdcch_dmrs_tab[12 * 6]; ...@@ -263,219 +242,246 @@ uint16_t mpdcch_dmrs_tab[12 * 6];
void init_mpdcch_dmrs_tab(uint16_t oss) void init_mpdcch_dmrs_tab(uint16_t oss)
{ {
int re = 5 * oss; int re = 5 * oss;
int pos = 0; int pos = 0;
for (int symb = 0; symb < 4; symb++) { for (int symb = 0; symb < 4; symb++) {
for (int prb = 0; prb < 6; prb++, re += 12) { for (int prb = 0; prb < 6; prb++, re += 12) {
mpdcch_dmrs_tab[pos++] = re; mpdcch_dmrs_tab[pos++] = re;
mpdcch_dmrs_tab[pos++] = re + 5; mpdcch_dmrs_tab[pos++] = re + 5;
mpdcch_dmrs_tab[pos++] = re + 10; mpdcch_dmrs_tab[pos++] = re + 10;
}
if (symb == 0)
re = 6 * oss;
else if (symb == 1)
re = 12 * oss;
else if (symb == 2)
re = 13 * oss;
} }
if (symb == 0)
re = 6 * oss;
else if (symb == 1)
re = 12 * oss;
else if (symb == 2)
re = 13 * oss;
}
} }
void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int32_t ** txdataF) void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int32_t ** txdataF)
{ {
LTE_eNB_MPDCCH *mpdcch = &eNB->mpdcch_vars[subframe & 1]; LTE_eNB_MPDCCH *mpdcch = &eNB->mpdcch_vars[subframe & 1];
mDCI_ALLOC_t *mdci; mDCI_ALLOC_t *mdci;
int coded_bits; int coded_bits;
LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms;
int i; int i;
int gain_lin_QPSK; int gain_lin_QPSK;
uint8_t bitsperCCE; uint8_t bitsperCCE;
uint16_t *mpdcchtab; uint16_t *mpdcchtab;
uint32_t x1, x2, s = 0; uint32_t x1, x2, s = 0;
uint8_t Nacc = 4; uint8_t Nacc = 4;
uint16_t j0, j, idelta; uint16_t j0, j, idelta;
uint16_t i0; uint16_t i0;
int off; int off;
// Assumption: only handle a single MPDCCH per narrowband // Assumption: only handle a single MPDCCH per narrowband
int nsymb = (fp->Ncp==0) ? 14:12; int nsymb = (fp->Ncp==0) ? 14:12;
int symbol_offset = (uint32_t)fp->ofdm_symbol_size*(subframe*nsymb); int symbol_offset = (uint32_t)fp->ofdm_symbol_size*(subframe*nsymb);
LOG_I(PHY, "generate_mdci_top: num_dci %d\n", mpdcch->num_dci); int wp[2][4] = {{1,1,1,1},{1,-1,1,-1}};
int *w;
for (i = 0; i < mpdcch->num_dci; i++) {
mdci = &mpdcch->mdci_alloc[i]; LOG_I(PHY, "generate_mdci_top: num_dci %d\n", mpdcch->num_dci);
AssertFatal(fp->frame_type == FDD, "TDD is not yet supported for MPDCCH\n"); for (i = 0; i < mpdcch->num_dci; i++) {
AssertFatal(fp->Ncp == NORMAL, "Extended Prefix not yet supported for MPDCCH\n"); mdci = &mpdcch->mdci_alloc[i];
AssertFatal(mdci->L <= 24, "L is %d\n", mdci->L);
AssertFatal(fp->N_RB_DL == 50 || fp->N_RB_DL == 100, "Only N_RB_DL=50,100 for MPDCCH\n"); AssertFatal(fp->frame_type == FDD, "TDD is not yet supported for MPDCCH\n");
// Force MPDDCH format 5 AssertFatal(fp->Ncp == NORMAL, "Extended Prefix not yet supported for MPDCCH\n");
AssertFatal(mdci->number_of_prb_pairs == 6, "2 or 4 PRB pairs not support yet for MPDCCH\n"); AssertFatal(mdci->L <= 24, "L is %d\n", mdci->L);
AssertFatal(fp->N_RB_DL == 50 || fp->N_RB_DL == 100, "Only N_RB_DL=50,100 for MPDCCH\n");
// These are to avoid unimplemented things // Force MPDDCH format 5
AssertFatal(mdci->ce_mode == 1, "CE mode (%d) B not activated yet\n", mdci->ce_mode); AssertFatal(mdci->number_of_prb_pairs == 6, "2 or 4 PRB pairs not support yet for MPDCCH\n");
AssertFatal(mdci->L == 24, "Only 2+4 and aggregation 24 for now\n");
int a_index = mdci->rnti & 3; // These are to avoid unimplemented things
LOG_I(PHY, "mdci %d, length %d: rnti %x, L %d, prb_pairs %d, ce_mode %d, i0 %d, ss %d Ant %d\n", i, mdci->dci_length,mdci->rnti, mdci->L, mdci->number_of_prb_pairs, mdci->ce_mode, mdci->i0, mdci->start_symbol,(a_index<2)?107:109); AssertFatal(mdci->ce_mode == 1, "CE mode (%d) B not activated yet\n", mdci->ce_mode);
i0 = mdci->i0; AssertFatal(mdci->L == 24, "Only 2+4 and aggregation 24 for now\n");
// antenna index int a_index=mdci->rnti & 3;
if ((mdci->start_symbol == 1) && (a_index < 2)) { i0 = mdci->i0;
mpdcchtab = mpdcch5ss1p107108tab; // antenna index
bitsperCCE = 72;
} else if ((mdci->start_symbol == 1) && (a_index > 1)) { if (mdci->start_symbol == 1) {
mpdcchtab = mpdcch5ss1p109110tab; mpdcchtab = mpdcch5ss1tab;
bitsperCCE = 72; coded_bits = 756*2;
} else if ((mdci->start_symbol == 2) && (a_index < 2)) { } else if (mdci->start_symbol == 2) {
mpdcchtab = mpdcch5ss2p107108tab; mpdcchtab = mpdcch5ss2tab;
bitsperCCE = 66; coded_bits=684*2;
} else if ((mdci->start_symbol == 2) && (a_index > 1)) { } else if (mdci->start_symbol == 3) {
mpdcchtab = mpdcch5ss2p109110tab; mpdcchtab = mpdcch5ss3tab;
bitsperCCE = 66; coded_bits = 612*2;
} else if ((mdci->start_symbol == 3) && (a_index < 2)) { } else
mpdcchtab = mpdcch5ss2p107108tab; AssertFatal(1 == 0, "Illegal combination start_symbol %d, a_index %d\n", mdci->start_symbol, a_index);
bitsperCCE = 60;
} else if ((mdci->start_symbol == 3) && (a_index < 2)) { LOG_I(PHY, "mdci %d, length %d: rnti %x, L %d, prb_pairs %d, ce_mode %d, i0 %d, ss %d ,coded_bits %d\n",
mpdcchtab = mpdcch5ss2p109110tab; i, mdci->dci_length,mdci->rnti,
bitsperCCE = 60; mdci->L, mdci->number_of_prb_pairs,
} else mdci->ce_mode, mdci->i0, mdci->start_symbol,
AssertFatal(1 == 0, "Illegal combination start_symbol %d, a_index %d\n", mdci->start_symbol, a_index); coded_bits);
// Note: We only have to run this every Nacc subframes during repetitions, data and scrambling are constant, but we do it for now to simplify during testing
// Note: We only have to run this every Nacc subframes during repetitions, data and scrambling are constant, but we do it for now to simplify during testing
generate_dci0(mdci->dci_pdu, mpdcch->e, mdci->dci_length, coded_bits, mdci->rnti);
generate_dci0(mdci->dci_pdu, mpdcch->e + (bitsperCCE * mdci->firstCCE), mdci->dci_length, mdci->L, bitsperCCE, mdci->rnti);
coded_bits = bitsperCCE * mdci->L; // scrambling
uint16_t absSF = (frame * 10) + subframe;
// scrambling
uint16_t absSF = (frame * 10) + subframe; AssertFatal(absSF < 10240, "Absolute subframe %d = %d*10 + %d > 10239\n", absSF, frame, subframe);
AssertFatal(absSF < 10240, "Absolute subframe %d = %d*10 + %d > 10239\n", absSF, frame, subframe); mpdcch_scrambling(fp, mdci, absSF, mpdcch->e, coded_bits);
mpdcch_scrambling(fp, mdci, absSF, mpdcch->e + (bitsperCCE * mdci->firstCCE), coded_bits); // Modulation for PDCCH
if (fp->nb_antenna_ports_eNB == 1)
// Modulation for PDCCH gain_lin_QPSK = (int16_t) ((amp * ONE_OVER_SQRT2_Q15) >> 15);
if (fp->nb_antenna_ports_eNB == 1) else
gain_lin_QPSK = (int16_t) ((amp * ONE_OVER_SQRT2_Q15) >> 15); gain_lin_QPSK = amp / 2;
else
gain_lin_QPSK = amp / 2; uint8_t *e_ptr = mpdcch->e;
uint8_t *e_ptr = mpdcch->e; // if (mdci->transmission_type==0) nprime=mdci->rnti&3; // for Localized 2+4 we use 6.8B.5 rule
// map directly to one antenna port for now
// if (mdci->transmission_type==0) nprime=mdci->rnti&3; // for Localized 2+4 we use 6.8B.5 rule // Note: aside from the antenna port mapping, there is no difference between localized and distributed transmission for MPDCCH format 5
// map directly to one antenna port for now
// Note: aside from the antenna port mapping, there is no difference between localized and distributed transmission for MPDCCH format 5 // first RE of narrowband
// mpdcchtab5 below contains the mapping from each coded symbol to relative RE avoiding the DMRS
// first RE of narrowband
// mpdcchtab5 below contains the mapping from each coded symbol to relative RE avoiding the DMRS int nb_i0;
switch (fp->N_RB_DL) {
int nb_i0;
switch (fp->N_RB_DL) { case 6:
case 25:
case 6: nb_i0 = 0;
case 25: break;
nb_i0 = 0; case 15:
break; case 50:
case 15: case 75:
case 50: nb_i0 = 1;
case 75: break;
nb_i0 = 1; case 100:
break; nb_i0 = 2;
case 100: break;
nb_i0 = 2; default:
break; AssertFatal(1 == 0, "Illegal N_RB_DL %d\n", fp->N_RB_DL);
default: break;
AssertFatal(1 == 0, "Illegal N_RB_DL %d\n", fp->N_RB_DL);
break;
}
int re_offset = fp->first_carrier_offset + (12 * nb_i0) + mdci->narrowband * 12 * 6;
if (re_offset > fp->ofdm_symbol_size)
re_offset -= (fp->ofdm_symbol_size - 1);
int32_t *txF = &txdataF[0][symbol_offset+re_offset];
int32_t yIQ;
for (i = 0; i < (coded_bits >> 1); i++) {
// QPSK modulation to yIQ
((int16_t *) & yIQ)[0] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
e_ptr++;
((int16_t *) & yIQ)[1] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
e_ptr++;
txF[mpdcchtab[i + ((bitsperCCE >> 1) * mdci->firstCCE)]] = yIQ;
//LOG_I(PHY,"Frame %d, subframe %d: mpdcch pos %d: %d => (%d,%d)\n",
// frame,subframe,i,mpdcchtab[i + ((bitsperCCE>>2) * mdci->firstCCE)],((int16_t *) & yIQ)[0],((int16_t *) & yIQ)[1]);
}
if (a_index > 1)
off = 0;
else
off = 1;
// pilot scrambling initiatlization (note: this is for a single repetition)
// x1 is set in lte_gold_generic
// rule for BL/CE UEs from Section 6.10.3A.1 in 36.211
if ((mdci->rnti == 0xFFFE) || (mdci->ce_mode == 2)) // CEModeB Note: also for mdci->rnti==SC_RNTI
Nacc = fp->frame_type == FDD ? 4 : 10;
else
Nacc = 1;
if (fp->frame_type == FDD || Nacc == 1)
idelta = 0;
else
idelta = Nacc - 2;
j0 = (i0 + idelta) / Nacc;
j = (absSF - i0) / Nacc;
uint32_t a = ((((j0 + j) * Nacc) % 10) + 1);
uint32_t b = ((mdci->dmrs_scrambling_init << 1) + 1) << 16;
x2 = a * b;
x2 = x2 + 2;
LOG_I(PHY, "mpdcch_dmrs cinit %x (a=%d,b=%d,i0=%d,j0=%d)\n", x2,a,b,i0,j0);
// add MPDCCH pilots
int reset = 1;
gain_lin_QPSK*=2;
for (i = 0; i < (24 * 6); i += 2) {
if ((i & 0x1f) == 0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
((int16_t *) & yIQ)[0] = (((s >> (i & 0x1f)) & 1) == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
((int16_t *) & yIQ)[1] = (((s >> ((i + 1) & 0x1f)) & 1) == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
txF[mpdcch_dmrs_tab[(i >> 1)]] = yIQ;
txF[1+mpdcch_dmrs_tab[(i >> 1)]] = yIQ;
LOG_D(PHY, "mpdcch_dmrs pos %d: %d => (%d,%d)\n", i, off + mpdcch_dmrs_tab[(i >> 1)], ((int16_t *) & yIQ)[0], ((int16_t *) & yIQ)[1]);
}
} }
int re_offset = fp->first_carrier_offset + (12 * nb_i0) + (mdci->narrowband * 12 * 6);
if (re_offset > fp->ofdm_symbol_size)
re_offset -= (fp->ofdm_symbol_size - 1);
int32_t *txF = &txdataF[0][symbol_offset+re_offset];
int32_t yIQ;
for (i = 0; i < (coded_bits >> 1); i++) {
// QPSK modulation to yIQ
((int16_t *) & yIQ)[0] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
e_ptr++;
((int16_t *) & yIQ)[1] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
e_ptr++;
txF[mpdcchtab[i]] = yIQ;
LOG_D(PHY,"Frame %d, subframe %d: mpdcch pos %d (%d,%d) => (%d,%d)\n",
frame,subframe,i,mpdcchtab[i]+re_offset,mpdcchtab[i]/fp->ofdm_symbol_size,
((int16_t *) & yIQ)[0],((int16_t *) & yIQ)[1]);
}
if (mdci->transmission_type == 1) w=0; // distributed
else w = wp[a_index&1];
// pilot scrambling initiatlization (note: this is for a single repetition)
// x1 is set in lte_gold_generic
// rule for BL/CE UEs from Section 6.10.3A.1 in 36.211
if ((mdci->rnti == 0xFFFE) || (mdci->ce_mode == 2)) // CEModeB Note: also for mdci->rnti==SC_RNTI
Nacc = fp->frame_type == FDD ? 4 : 10;
else
Nacc = 1;
if (fp->frame_type == FDD || Nacc == 1)
idelta = 0;
else
idelta = Nacc - 2;
j0 = (i0 + idelta) / Nacc;
j = (absSF - i0) / Nacc;
uint32_t a = ((((j0 + j) * Nacc) % 10) + 1);
uint32_t b = ((mdci->dmrs_scrambling_init << 1) + 1) << 16;
x2 = a * b;
x2 = x2 + 2;
LOG_I(PHY, "mpdcch_dmrs cinit %x (a=%d,b=%d,i0=%d,j0=%d)\n", x2,a,b,i0,j0);
// add MPDCCH pilots
int reset = 1;
int first_prb = (mdci->narrowband*6) + nb_i0;
int last_prb = (mdci->narrowband*6) + nb_i0 + 5;
int soffset[4] = {5,6,12,13};
for (int lprime=0,i=0;lprime<4;lprime++) {
for (int nprb=0;nprb<110;nprb++) {
if (nprb<fp->N_RB_DL) {
re_offset = fp->first_carrier_offset + (12 * nprb);
if (re_offset > fp->ofdm_symbol_size)
re_offset -= (fp->ofdm_symbol_size - 1);
txF = &txdataF[0][symbol_offset + re_offset + fp->ofdm_symbol_size*soffset[lprime]];
}
for (int mprime=0;mprime<3;mprime++,i++) {
if ((i & 0x1f) == 0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
// select PRBs corresponding to narrowband
if ((nprb>= first_prb) &&
(nprb<= last_prb)) {
((int16_t *) & yIQ)[0] = (((s >> (i & 0x1f)) & 1) == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
((int16_t *) & yIQ)[1] = (((s >> ((i + 1) & 0x1f)) & 1) == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
if (mdci->transmission_type==1) { // same thing on both 107 and 109
txF[(5*mprime)] = yIQ;
txF[1+(5*mprime)] = yIQ;
}
else { // put on selected antenna port with w sequence
if (((mprime+nprb)&1) == 0)
txF[off+(5*mprime)] = yIQ*w[lprime];
else
txF[off+(5*mprime)] = yIQ*w[3-lprime];
}
LOG_I(PHY, "mpdcch_dmrs pos (dist %d, l %d,nprb %d,mprime %d) %d => (%d,%d)\n",
mdci->transmission_type, soffset[lprime],nprb,mprime,
re_offset + fp->ofdm_symbol_size*soffset[lprime]+(5*mprime),
((int16_t *) & yIQ)[0], ((int16_t *) & yIQ)[1]);
} // narrowband condition
} // RE (m') loop
} // nprb loop
} // symbol (l') loop
} // num_dci loop
} }
void init_mpdcch(PHY_VARS_eNB * eNB) void init_mpdcch(PHY_VARS_eNB * eNB)
{ {
init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL(eNB); init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL(eNB);
init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL(eNB); init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL(eNB);
init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL(eNB); init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL(eNB);
init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL(eNB); init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL(eNB);
init_mpdcch2ss1tab_normal_regular_subframe_evenNRBDL(eNB); init_mpdcch2ss1tab_normal_regular_subframe_evenNRBDL(eNB);
init_mpdcch_dmrs_tab(eNB->frame_parms.ofdm_symbol_size); init_mpdcch_dmrs_tab(eNB->frame_parms.ofdm_symbol_size);
} }
#endif #endif
...@@ -135,7 +135,7 @@ typedef struct DCI6_0A_10MHz DCI6_0A_10MHz_t; ...@@ -135,7 +135,7 @@ typedef struct DCI6_0A_10MHz DCI6_0A_10MHz_t;
/// basic DCI Format Type 6-1A (10 MHz, FDD primary carrier, 24 bits, 5 bit format, TM!=9,TM!=6, no scheduling enhancement) /// basic DCI Format Type 6-1A (10 MHz, FDD primary carrier, 24 bits, 5 bit format, TM!=9,TM!=6, no scheduling enhancement)
struct DCI6_1A_10MHz { struct DCI6_1A_10MHz {
/// padding to fill 32-bit word /// padding to fill 32-bit word
uint32_t padding:4; uint32_t padding:3;
/// DCI subframe repetition number /// DCI subframe repetition number
uint32_t dci_rep:2; uint32_t dci_rep:2;
/// HARQ-ACK resource offset /// HARQ-ACK resource offset
...@@ -154,8 +154,10 @@ struct DCI6_1A_10MHz { ...@@ -154,8 +154,10 @@ struct DCI6_1A_10MHz {
uint32_t rep:2; uint32_t rep:2;
/// Modulation and Coding Scheme and Redundancy Version /// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:4; uint32_t mcs:4;
/// Resource block assignment (assignment flag = 0 for 10 MHz, ceil(log2(floor(N_RB_DL/6)))+5) /// Resource block assignment
uint32_t rballoc:8; uint32_t rballoc:5;
/// narroband index log2(floor(N_RB_DL/6))) bits
uint32_t narrowband:3;
/// Frequency hopping flag /// Frequency hopping flag
uint32_t hopping:1; uint32_t hopping:1;
/// 0/1A differentiator /// 0/1A differentiator
......
...@@ -904,7 +904,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, ...@@ -904,7 +904,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
//#ifdef DEBUG_ULSCH_DECODING //#ifdef DEBUG_ULSCH_DECODING
LOG_D(PHY,"Frame %d, Subframe %d: ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): A %d, round %d, RV %d, O_r1 %d, O_RI %d, O_ACK %d, G %d\n", LOG_I(PHY,"Frame %d, Subframe %d: ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): A %d, round %d, RV %d, O_r1 %d, O_RI %d, O_ACK %d, G %d\n",
proc->frame_rx,subframe, proc->frame_rx,subframe,
frame_parms->Nid_cell,ulsch->rnti,x2, frame_parms->Nid_cell,ulsch->rnti,x2,
A, A,
......
...@@ -76,11 +76,11 @@ pmch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, PHY_VARS_RN * rn, r ...@@ -76,11 +76,11 @@ pmch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, PHY_VARS_RN * rn, r
// if mcch is active, send regardless of the node type: eNB or RN // if mcch is active, send regardless of the node type: eNB or RN
// when mcch is active, MAC sched does not allow MCCH and MTCH multiplexing // when mcch is active, MAC sched does not allow MCCH and MTCH multiplexing
/* /*
mch_pduP = mac_xface->get_mch_sdu(eNB->Mod_id, mch_pduP = mac_xface->get_mch_sdu(eNB->Mod_id,
eNB->CC_id, eNB->CC_id,
proc->frame_tx, proc->frame_tx,
subframe); subframe);
*/ */
switch (r_type) { switch (r_type) {
case no_relay: case no_relay:
if ((mch_pduP->Pdu_size > 0) && (mch_pduP->sync_area == 0)) // TEST: only transmit mcch for sync area 0 if ((mch_pduP->Pdu_size > 0) && (mch_pduP->sync_area == 0)) // TEST: only transmit mcch for sync area 0
...@@ -212,23 +212,7 @@ pdsch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, int harq_pid, LTE_ ...@@ -212,23 +212,7 @@ pdsch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, int harq_pid, LTE_
LOG_I (PHY, LOG_I (PHY,
"[eNB %" PRIu8 "][PDSCH %" PRIx16 "/%" PRIu8 "] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %" PRIu16 ", pdsch_start %d, G %d, nb_rb %" PRIu16 ", rb0 %x, rb1 %x, TBS %" "[eNB %" PRIu8 "][PDSCH %" PRIx16 "/%" PRIu8 "] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %" PRIu16 ", pdsch_start %d, G %d, nb_rb %" PRIu16 ", rb0 %x, rb1 %x, TBS %"
PRIu16 ", pmi_alloc %" PRIx64 ", rv %" PRIu8 " (round %" PRIu8 ")\n", eNB->Mod_id, dlsch->rnti, harq_pid, frame, subframe, input_buffer_length, dlsch_harq->pdsch_start, get_G (fp, PRIu16 ", pmi_alloc %" PRIx64 ", rv %" PRIu8 " (round %" PRIu8 ")\n", eNB->Mod_id, dlsch->rnti, harq_pid, frame, subframe, input_buffer_length, dlsch_harq->pdsch_start, get_G(fp,dlsch_harq->nb_rb,dlsch_harq->rb_alloc,dlsch_harq->Qm,dlsch_harq->Nl,dlsch_harq->pdsch_start,frame,subframe,dlsch_harq->mimo_mode == TM7 ? 7 : 0),dlsch_harq->nb_rb, dlsch_harq->rb_alloc[0], dlsch_harq->rb_alloc[1], dlsch_harq->TBS, pmi2hex_2Ar1 (dlsch_harq->pmi_alloc), dlsch_harq->rvidx, dlsch_harq->round);
dlsch_harq->
nb_rb,
dlsch_harq->
rb_alloc,
dlsch_harq->
Qm,
dlsch_harq->
Nl,
dlsch_harq->
pdsch_start,
frame,
subframe,
dlsch_harq->
mimo_mode ==
TM7 ? 7 : 0),
dlsch_harq->nb_rb, dlsch_harq->rb_alloc[0], dlsch_harq->rb_alloc[1], dlsch_harq->TBS, pmi2hex_2Ar1 (dlsch_harq->pmi_alloc), dlsch_harq->rvidx, dlsch_harq->round);
} }
#if defined(MESSAGE_CHART_GENERATOR_PHY) #if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_TX_MESSAGE (MSC_PHY_ENB, MSC_PHY_UE, MSC_LOG_TX_MESSAGE (MSC_PHY_ENB, MSC_PHY_UE,
...@@ -397,11 +381,12 @@ phy_procedures_eNB_TX (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, relaying_type ...@@ -397,11 +381,12 @@ phy_procedures_eNB_TX (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, relaying_type
#ifdef Rel14 #ifdef Rel14
num_mdci = eNB->mpdcch_vars[subframe &1].num_dci; num_mdci = eNB->mpdcch_vars[subframe &1].num_dci;
if (num_mdci > 0) { if (num_mdci > 0) {
LOG_I (PHY, "[eNB %" PRIu8 "] Frame %d, subframe %d: Calling generate_mdci_top (mpdcch) (num_dci %" PRIu8 ")\n", eNB->Mod_id, frame, subframe, num_mdci); LOG_I (PHY, "[eNB %" PRIu8 "] Frame %d, subframe %d: Calling generate_mdci_top (mpdcch) (num_dci %" PRIu8 ")\n", eNB->Mod_id, frame, subframe, num_mdci);
generate_mdci_top (eNB, frame, subframe, AMP*3/4, eNB->common_vars.txdataF); generate_mdci_top (eNB, frame, subframe, AMP, eNB->common_vars.txdataF);
//write_output("/tmp/mpdcch.m","mpdcch_txF",(void*)&eNB->common_vars.txdataF[0][subframe*14*1024],14*1024,1,1);
//exit(-1); /* write_output("/tmp/mpdcch.m","mpdcch_txF",(void*)&eNB->common_vars.txdataF[0][subframe*14*1024],14*1024,1,1);
exit(-1);*/
} }
#endif #endif
// Now scan UE specific DLSCH // Now scan UE specific DLSCH
...@@ -415,19 +400,19 @@ phy_procedures_eNB_TX (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, relaying_type ...@@ -415,19 +400,19 @@ phy_procedures_eNB_TX (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, relaying_type
// get harq_pid // get harq_pid
harq_pid = dlsch0->harq_ids[subframe]; harq_pid = dlsch0->harq_ids[subframe];
if (harq_pid >=0 && harq_pid < 8) { if (harq_pid >=0 && harq_pid < 8) {
// generate pdsch // generate pdsch
if ((dlsch0->rnti !=0xFFFF)) { if ((dlsch0->rnti !=0xFFFF)) {
LOG_I(PHY,"SFN %d.%d: DLSCH %d for rnti %x is active, harq_pid %d => SFN %d.%d\n", LOG_I(PHY,"SFN %d.%d: DLSCH %d for rnti %x is active, harq_pid %d => SFN %d.%d\n",
frame, frame,
subframe, subframe,
UE_id, UE_id,
dlsch0->rnti, dlsch0->rnti,
harq_pid, harq_pid,
dlsch0->harq_processes[harq_pid]->frame, dlsch0->harq_processes[harq_pid]->frame,
dlsch0->harq_processes[harq_pid]->subframe); dlsch0->harq_processes[harq_pid]->subframe);
} }
if ((dlsch0->harq_processes[harq_pid]->status == ACTIVE) && (dlsch0->harq_processes[harq_pid]->frame == frame) && (dlsch0->harq_processes[harq_pid]->subframe == subframe)) if ((dlsch0->harq_processes[harq_pid]->status == ACTIVE) && (dlsch0->harq_processes[harq_pid]->frame == frame) && (dlsch0->harq_processes[harq_pid]->subframe == subframe))
pdsch_procedures (eNB, proc, harq_pid, dlsch0, dlsch1, &eNB->UE_stats[(uint32_t) UE_id], 0); pdsch_procedures (eNB, proc, harq_pid, dlsch0, dlsch1, &eNB->UE_stats[(uint32_t) UE_id], 0);
} }
...@@ -456,7 +441,7 @@ prach_procedures (PHY_VARS_eNB * eNB, ...@@ -456,7 +441,7 @@ prach_procedures (PHY_VARS_eNB * eNB,
#ifdef Rel14 #ifdef Rel14
int br_flag int br_flag
#endif #endif
) )
{ {
uint16_t max_preamble[4], max_preamble_energy[4], max_preamble_delay[4]; uint16_t max_preamble[4], max_preamble_energy[4], max_preamble_delay[4];
uint16_t i; uint16_t i;
...@@ -471,13 +456,13 @@ prach_procedures (PHY_VARS_eNB * eNB, ...@@ -471,13 +456,13 @@ prach_procedures (PHY_VARS_eNB * eNB,
pthread_mutex_unlock (&eNB->UL_INFO_mutex); pthread_mutex_unlock (&eNB->UL_INFO_mutex);
} else } else
#endif #endif
{ {
pthread_mutex_lock (&eNB->UL_INFO_mutex); pthread_mutex_lock (&eNB->UL_INFO_mutex);
eNB->UL_INFO.rach_ind.number_of_preambles = 0; eNB->UL_INFO.rach_ind.number_of_preambles = 0;
pthread_mutex_unlock (&eNB->UL_INFO_mutex); pthread_mutex_unlock (&eNB->UL_INFO_mutex);
subframe = eNB->proc.subframe_prach; subframe = eNB->proc.subframe_prach;
frame = eNB->proc.frame_prach; frame = eNB->proc.frame_prach;
} }
RU_t *ru; RU_t *ru;
int aa = 0; int aa = 0;
int ru_aa; int ru_aa;
...@@ -505,7 +490,7 @@ prach_procedures (PHY_VARS_eNB * eNB, ...@@ -505,7 +490,7 @@ prach_procedures (PHY_VARS_eNB * eNB,
#ifdef Rel14 #ifdef Rel14
, br_flag , br_flag
#endif #endif
); );
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
LOG_I (PHY, "[RAPROC] Frame %d, subframe %d : Most likely preamble %d, energy %d dB delay %d\n", frame, subframe, max_preamble[0], max_preamble_energy[0] / 10, max_preamble_delay[0]); LOG_I (PHY, "[RAPROC] Frame %d, subframe %d : Most likely preamble %d, energy %d dB delay %d\n", frame, subframe, max_preamble[0], max_preamble_energy[0] / 10, max_preamble_delay[0]);
...@@ -528,7 +513,7 @@ prach_procedures (PHY_VARS_eNB * eNB, ...@@ -528,7 +513,7 @@ prach_procedures (PHY_VARS_eNB * eNB,
(eNB->prach_vars_br.repetition_number[ce_level]== (eNB->prach_vars_br.repetition_number[ce_level]==
eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[ce_level])) { eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[ce_level])) {
*/ */
if (eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] == 1) { if (eNB->frame_parms.prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] == 1) {
if ((eNB->prach_energy_counter == 100) && (max_preamble_energy[0] > eNB->measurements.prach_I0 + 200)) { if ((eNB->prach_energy_counter == 100) && (max_preamble_energy[0] > eNB->measurements.prach_I0 + 200)) {
...@@ -548,46 +533,46 @@ prach_procedures (PHY_VARS_eNB * eNB, ...@@ -548,46 +533,46 @@ prach_procedures (PHY_VARS_eNB * eNB,
eNB->preamble_list_br[ind].preamble_rel8.preamble, eNB->preamble_list_br[ind].preamble_rel8.rnti, eNB->preamble_list_br[ind].preamble_rel13.rach_resource_type); eNB->preamble_list_br[ind].preamble_rel8.preamble, eNB->preamble_list_br[ind].preamble_rel8.rnti, eNB->preamble_list_br[ind].preamble_rel13.rach_resource_type);
} }
/* /*
ind++; ind++;
} }
} */// ce_level } */// ce_level
} }
} else } else
#endif #endif
{ {
if ((eNB->prach_energy_counter == 100) && (max_preamble_energy[0] > eNB->measurements.prach_I0 + 200)) { if ((eNB->prach_energy_counter == 100) && (max_preamble_energy[0] > eNB->measurements.prach_I0 + 200)) {
LOG_D (PHY, "[eNB %d/%d][RAPROC] Frame %d, subframe %d Initiating RA procedure with preamble %d, energy %d.%d dB, delay %d\n", LOG_D (PHY, "[eNB %d/%d][RAPROC] Frame %d, subframe %d Initiating RA procedure with preamble %d, energy %d.%d dB, delay %d\n",
eNB->Mod_id, eNB->CC_id, frame, subframe, max_preamble[0], max_preamble_energy[0] / 10, max_preamble_energy[0] % 10, max_preamble_delay[0]); eNB->Mod_id, eNB->CC_id, frame, subframe, max_preamble[0], max_preamble_energy[0] / 10, max_preamble_energy[0] % 10, max_preamble_delay[0]);
T (T_ENB_PHY_INITIATE_RA_PROCEDURE, T_INT (eNB->Mod_id), T_INT (frame), T_INT (subframe), T_INT (max_preamble[0]), T_INT (max_preamble_energy[0]), T_INT (max_preamble_delay[0])); T (T_ENB_PHY_INITIATE_RA_PROCEDURE, T_INT (eNB->Mod_id), T_INT (frame), T_INT (subframe), T_INT (max_preamble[0]), T_INT (max_preamble_energy[0]), T_INT (max_preamble_delay[0]));
pthread_mutex_lock (&eNB->UL_INFO_mutex); pthread_mutex_lock (&eNB->UL_INFO_mutex);
eNB->UL_INFO.rach_ind.number_of_preambles = 1; eNB->UL_INFO.rach_ind.number_of_preambles = 1;
eNB->UL_INFO.rach_ind.preamble_list = eNB->preamble_list; eNB->UL_INFO.rach_ind.preamble_list = eNB->preamble_list;
eNB->preamble_list[0].preamble_rel8.timing_advance = max_preamble_delay[0]; eNB->preamble_list[0].preamble_rel8.timing_advance = max_preamble_delay[0];
eNB->preamble_list[0].preamble_rel8.preamble = max_preamble[0]; eNB->preamble_list[0].preamble_rel8.preamble = max_preamble[0];
eNB->preamble_list[0].preamble_rel8.rnti = 1 + subframe; // note: fid is implicitly 0 here eNB->preamble_list[0].preamble_rel8.rnti = 1 + subframe; // note: fid is implicitly 0 here
eNB->preamble_list[0].preamble_rel13.rach_resource_type = 0; eNB->preamble_list[0].preamble_rel13.rach_resource_type = 0;
eNB->preamble_list[0].instance_length = 0; //don't know exactly what this is eNB->preamble_list[0].instance_length = 0; //don't know exactly what this is
LOG_D (PHY, "Filling NFAPI indication for RACH : TA %d, Preamble %d, rnti %x, rach_resource_type %d\n", LOG_D (PHY, "Filling NFAPI indication for RACH : TA %d, Preamble %d, rnti %x, rach_resource_type %d\n",
eNB->preamble_list[0].preamble_rel8.timing_advance, eNB->preamble_list[0].preamble_rel8.timing_advance,
eNB->preamble_list[0].preamble_rel8.preamble, eNB->preamble_list[0].preamble_rel8.rnti, eNB->preamble_list[0].preamble_rel13.rach_resource_type); eNB->preamble_list[0].preamble_rel8.preamble, eNB->preamble_list[0].preamble_rel8.rnti, eNB->preamble_list[0].preamble_rel13.rach_resource_type);
pthread_mutex_unlock (&eNB->UL_INFO_mutex); pthread_mutex_unlock (&eNB->UL_INFO_mutex);
} // max_preamble_energy > prach_I0 + 100 } // max_preamble_energy > prach_I0 + 100
else { else {
eNB->measurements.prach_I0 = ((eNB->measurements.prach_I0 * 900) >> 10) + ((max_preamble_energy[0] * 124) >> 10); eNB->measurements.prach_I0 = ((eNB->measurements.prach_I0 * 900) >> 10) + ((max_preamble_energy[0] * 124) >> 10);
if (frame == 0) if (frame == 0)
LOG_I (PHY, "prach_I0 = %d.%d dB\n", eNB->measurements.prach_I0 / 10, eNB->measurements.prach_I0 % 10); LOG_I (PHY, "prach_I0 = %d.%d dB\n", eNB->measurements.prach_I0 / 10, eNB->measurements.prach_I0 % 10);
if (eNB->prach_energy_counter < 100) if (eNB->prach_energy_counter < 100)
eNB->prach_energy_counter++; eNB->prach_energy_counter++;
} }
} // else br_flag } // else br_flag
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX, 0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PRACH_RX, 0);
} }
...@@ -652,7 +637,7 @@ uci_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc) ...@@ -652,7 +637,7 @@ uci_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc)
{ {
LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms; LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms;
uint8_t SR_payload = 0, pucch_b0b1[4][2] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} }, harq_ack[4] = { uint8_t SR_payload = 0, pucch_b0b1[4][2] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} }, harq_ack[4] = {
0, 0, 0, 0}; 0, 0, 0, 0};
int32_t metric[4] = { 0, 0, 0, 0 }, metric_SR = 0, max_metric; int32_t metric[4] = { 0, 0, 0, 0 }, metric_SR = 0, max_metric;
const int subframe = proc->subframe_rx; const int subframe = proc->subframe_rx;
const int frame = proc->frame_rx; const int frame = proc->frame_rx;
...@@ -1130,8 +1115,11 @@ pusch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc) ...@@ -1130,8 +1115,11 @@ pusch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc)
fill_crc_indication (eNB, i, frame, subframe, 1); // indicate NAK to MAC fill_crc_indication (eNB, i, frame, subframe, 1); // indicate NAK to MAC
fill_rx_indication (eNB, i, frame, subframe); // indicate SDU to MAC fill_rx_indication (eNB, i, frame, subframe); // indicate SDU to MAC
LOG_D (PHY, "[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n", LOG_I (PHY, "[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n",
eNB->Mod_id, harq_pid, frame, subframe, i, ulsch_harq->round - 1, ulsch->Mlimit, ulsch_harq->o_ACK[0], ulsch_harq->o_ACK[1]); eNB->Mod_id, harq_pid, frame, subframe, i, ulsch_harq->round - 1, ulsch->Mlimit, ulsch_harq->o_ACK[0], ulsch_harq->o_ACK[1]);
dump_ulsch(eNB,frame,subframe,i);
exit(-1);
if (ulsch_harq->round >= 3) { if (ulsch_harq->round >= 3) {
ulsch_harq->status = SCH_IDLE; ulsch_harq->status = SCH_IDLE;
ulsch_harq->handled = 0; ulsch_harq->handled = 0;
...@@ -1329,8 +1317,8 @@ release_harq (PHY_VARS_eNB * eNB, int UE_id, int tb, uint16_t frame, uint8_t sub ...@@ -1329,8 +1317,8 @@ release_harq (PHY_VARS_eNB * eNB, int UE_id, int tb, uint16_t frame, uint8_t sub
dlsch0_harq->status = SCH_IDLE; dlsch0_harq->status = SCH_IDLE;
/*if ((dlsch1_harq == NULL)|| /*if ((dlsch1_harq == NULL)||
((dlsch1_harq!=NULL)&& ((dlsch1_harq!=NULL)&&
(dlsch1_harq->status == SCH_IDLE))) */ (dlsch1_harq->status == SCH_IDLE))) */
dlsch0->harq_mask &= ~(1 << harq_pid); dlsch0->harq_mask &= ~(1 << harq_pid);
LOG_D (PHY, "Frame %d, subframe %d: Releasing harq %d for UE %x\n", frame, subframe, harq_pid, dlsch0->rnti); LOG_D (PHY, "Frame %d, subframe %d: Releasing harq %d for UE %x\n", frame, subframe, harq_pid, dlsch0->rnti);
......
...@@ -247,7 +247,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -247,7 +247,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
reps = (rmax <= 8) ? (1 << rep) : (rmax >> (3 - rep)); reps = (rmax <= 8) ? (1 << rep) : (rmax >> (3 - rep));
// get narrowband according to higher-layer config // get narrowband according to higher-layer config
num_nb = p[RA_template->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.count; num_nb = p[RA_template->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.count;
RA_template->msg2_narrowband = *p[RA_template->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.array[RA_template->preamble_index % num_nb]; RA_template->msg2_narrowband = *p[RA_template->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.array[RA_template->preamble_index % num_nb]-1;
first_rb = narrowband_to_first_rb (&cc[CC_idP], RA_template->msg2_narrowband); first_rb = narrowband_to_first_rb (&cc[CC_idP], RA_template->msg2_narrowband);
if ((RA_template->msg2_mpdcch_repetition_cnt == 0) && (mpdcch_sf_condition (eNB, CC_idP, frameP, subframeP, rmax, TYPE2, -1) > 0)) { if ((RA_template->msg2_mpdcch_repetition_cnt == 0) && (mpdcch_sf_condition (eNB, CC_idP, frameP, subframeP, rmax, TYPE2, -1) > 0)) {
...@@ -274,8 +274,9 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -274,8 +274,9 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6) | (RA_template->msg2_narrowband<<5); dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = RA_template->msg2_narrowband;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 1; // adjust according to size of RAR, 208 bits with N1A_PRB=3 dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6);
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 0; // adjust according to size of RAR, 208 bits with N1A_PRB=3
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0;
...@@ -286,7 +287,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -286,7 +287,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 0; // N1A_PRB=2 (36.212); dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1; // N1A_PRB=3 (36.212) => 56 bits
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0;
...@@ -371,7 +372,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -371,7 +372,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.drms_table_flag = 0; dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.drms_table_flag = 0;
dl_req->number_pdu++; dl_req->number_pdu++;
fill_rar_br (eNB, CC_idP, RA_template, frameP, subframeP, cc[CC_idP].RAR_pdu.payload, RA_template->rach_resource_type - 1) ; fill_rar_br (eNB, CC_idP, RA_template, frameP, subframeP, cc[CC_idP].RAR_pdu.payload, RA_template->rach_resource_type - 1) ;
// Program UL processing for Msg3, same as regular LTE // Program UL processing for Msg3, same as regular LTE
get_Msg3alloc (&cc[CC_idP], subframeP, frameP, &RA_template->Msg3_frame, &RA_template->Msg3_subframe); get_Msg3alloc (&cc[CC_idP], subframeP, frameP, &RA_template->Msg3_frame, &RA_template->Msg3_subframe);
add_msg3 (module_idP, CC_idP, RA_template, frameP, subframeP); add_msg3 (module_idP, CC_idP, RA_template, frameP, subframeP);
...@@ -628,7 +629,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -628,7 +629,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6); // check if not getRIV(N_RB_DL,first_rb,6); dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6); // check if not getRIV(N_RB_DL,first_rb,6);
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 4; // adjust according to size of Msg4, 208 bits with N1A_PRB=3 dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 0; // adjust according to size of Msg4, 208 bits with N1A_PRB=3
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0;
...@@ -639,7 +640,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -639,7 +640,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1; // N1A_PRB=3; => 208 bits dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1; // N1A_PRB=3; =>
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0;
...@@ -1160,13 +1161,14 @@ initiate_ra_proc (module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t ...@@ -1160,13 +1161,14 @@ initiate_ra_proc (module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d\n", module_idP, CC_id, frameP, subframeP, preamble_index); LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d\n", module_idP, CC_id, frameP, subframeP, preamble_index);
#ifdef Rel14 #ifdef Rel14
LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d PRACH resource type %d\n", module_idP, CC_id, frameP, subframeP, rach_resource_type); LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d PRACH resource type %d\n", module_idP, CC_id, frameP, subframeP, rach_resource_type);
#endif
if (prach_ParametersListCE_r13 && prach_ParametersListCE_r13->list.count < rach_resource_type) { if (prach_ParametersListCE_r13 && prach_ParametersListCE_r13->list.count < rach_resource_type) {
LOG_E (MAC, "[eNB %d][RAPROC] CC_id %d Received impossible PRACH resource type %d, only %d CE levels configured\n", LOG_E (MAC, "[eNB %d][RAPROC] CC_id %d Received impossible PRACH resource type %d, only %d CE levels configured\n",
module_idP, CC_id, rach_resource_type, (int) prach_ParametersListCE_r13->list.count); module_idP, CC_id, rach_resource_type, (int) prach_ParametersListCE_r13->list.count);
return; return;
} }
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0);
......
...@@ -139,7 +139,7 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB, ...@@ -139,7 +139,7 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB,
uint8_t *rar = (uint8_t *)(dlsch_buffer+1); uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
int i; int i;
uint8_t nb,rballoc,reps; uint8_t rballoc,reps;
uint8_t mcs,TPC,ULdelay,cqireq,mpdcch_nb_index; uint8_t mcs,TPC,ULdelay,cqireq,mpdcch_nb_index;
int input_buffer_length; int input_buffer_length;
...@@ -158,7 +158,7 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB, ...@@ -158,7 +158,7 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB,
// Copy the Msg2 narrowband // Copy the Msg2 narrowband
RA_template->msg34_narrowband = RA_template->msg2_narrowband; RA_template->msg34_narrowband = RA_template->msg2_narrowband;
RA_template->msg3_first_rb = ce_level; RA_template->msg3_first_rb = 0;
RA_template->msg3_nb_rb = 2; RA_template->msg3_nb_rb = 2;
if (ce_level<2) { //CE Level 0,1, CEmodeA if (ce_level<2) { //CE Level 0,1, CEmodeA
...@@ -170,24 +170,24 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB, ...@@ -170,24 +170,24 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB,
rar[5] = (uint8_t)(RA_template->rnti&0xff); rar[5] = (uint8_t)(RA_template->rnti&0xff);
//cc->RA_template[ra_idx].timing_offset = 0; //cc->RA_template[ra_idx].timing_offset = 0;
nb = 0;
reps = 0; reps = 0;
mcs = 7; RA_template->msg3_mcs = 7;
TPC = 3; // no power increase TPC = 3; // no power increase
ULdelay = 0; ULdelay = 0;
cqireq = 0; cqireq = 0;
mpdcch_nb_index = 0; mpdcch_nb_index = 0;
rballoc = mac_computeRIV(6,RA_template->msg3_first_rb,RA_template->msg3_nb_rb); // one PRB only for UL Grant in position 1+ce_level within Narrowband rballoc = mac_computeRIV(6,RA_template->msg3_first_rb,RA_template->msg3_nb_rb);
unsigned int buffer = 0; unsigned int buffer = 0;
buffer |= N_NB_index << (16 + (4 - N_NB_index)); buffer |= RA_template->msg34_narrowband << (16 + (4 - N_NB_index));
buffer |= ((rballoc & 0xFF) << (12 + (4 - N_NB_index))); buffer |= ((rballoc & 0xFF) << (12 + (4 - N_NB_index)));
buffer |= ((reps & 0x03) << (10 + (4 - N_NB_index))); buffer |= ((reps & 0x03) << (10 + (4 - N_NB_index)));
buffer |= ((mcs & 0x07) << (7 + (4 - N_NB_index))); buffer |= ((RA_template->msg3_mcs & 0x07) << (7 + (4 - N_NB_index)));
buffer |= ((TPC & 0x07) << (4 + (4 - N_NB_index))); buffer |= ((TPC & 0x07) << (4 + (4 - N_NB_index)));
buffer |= ((cqireq & 0x01) << (3 + (4 - N_NB_index))); buffer |= ((cqireq & 0x01) << (3 + (4 - N_NB_index)));
buffer |= ((ULdelay & 0x01) << (2 + (4 - N_NB_index))); buffer |= ((ULdelay & 0x01) << (2 + (4 - N_NB_index)));
buffer |= ((ULdelay & 0x01) << (4 - N_NB_index)); buffer |= (mpdcch_nb_index << (4 - N_NB_index));
rar[1] = (buffer>>12) & 0x0F; rar[1] = (buffer>>16) & 0x0F;
rar[2] = (buffer>>8) & 0xFF; rar[2] = (buffer>>8) & 0xFF;
rar[3] = buffer&0xFF; rar[3] = buffer&0xFF;
} }
......
...@@ -256,7 +256,7 @@ eNBs = ...@@ -256,7 +256,7 @@ eNBs =
numRepetitionPerPreambleAttempt_r13 = "n1"; #0 numRepetitionPerPreambleAttempt_r13 = "n1"; #0
mpdcch_NumRepetition_RA_r13 = "r1"; #0 mpdcch_NumRepetition_RA_r13 = "r1"; #0
prach_HoppingConfig_r13 = "off"; #1 prach_HoppingConfig_r13 = "off"; #1
max_available_narrow_band = [2]; max_available_narrow_band = [3];
} }
); );
...@@ -355,7 +355,7 @@ eNBs = ...@@ -355,7 +355,7 @@ eNBs =
////////// MME parameters: ////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26"; mme_ip_address = ( { ipv4 = "127.0.0.3";
ipv6 = "192:168:30::17"; ipv6 = "192:168:30::17";
active = "yes"; active = "yes";
preference = "ipv4"; preference = "ipv4";
...@@ -365,10 +365,10 @@ eNBs = ...@@ -365,10 +365,10 @@ eNBs =
NETWORK_INTERFACES : NETWORK_INTERFACES :
{ {
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0"; ENB_INTERFACE_NAME_FOR_S1_MME = "lo";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.150/24"; ENB_IPV4_ADDRESS_FOR_S1_MME = "127.0.0.2/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0"; ENB_INTERFACE_NAME_FOR_S1U = "lo";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.150/24"; ENB_IPV4_ADDRESS_FOR_S1U = "127.0.0.4/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152 ENB_PORT_FOR_S1U = 2152; # Spec 2152
}; };
......
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