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Commit dd695beb authored by Raymond Knopp's avatar Raymond Knopp
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functions up to Msg3 reception. Still a bug in decoding, signal is perfect,... 

functions up to Msg3 reception. Still a bug in decoding, signal is perfect, but decoding fails. probably an issue in the descrambling
parent 7db69e3a
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openair1/PHY/LTE_TRANSPORT/dci.c
View file @ dd695beb
...@@ -177,9 +177,9 @@ void dci_encoding(uint8_t *a, ...@@ -177,9 +177,9 @@ void dci_encoding(uint8_t *a,
#endif #endif
// encode dci // encode dci
#ifdef DEBUG_DCI_ENCODING //#ifdef DEBUG_DCI_ENCODING
printf("Doing DCI encoding for %d bits, e %p, rnti %x\n",A,e,rnti); if (E>1000) printf("Doing DCI encoding for %d bits, e %p, rnti %x\n",A,e,rnti);
#endif //#endif
memset((void *)d,LTE_NULL,96); memset((void *)d,LTE_NULL,96);
...@@ -197,42 +197,25 @@ void dci_encoding(uint8_t *a, ...@@ -197,42 +197,25 @@ void dci_encoding(uint8_t *a,
#endif #endif
RCC = sub_block_interleaving_cc(D,d+96,w); RCC = sub_block_interleaving_cc(D,d+96,w);
#ifdef DEBUG_DCI_ENCODING //#ifdef DEBUG_DCI_ENCODING
printf("Doing DCI rate matching for %d channel bits, RCC %d, e %p\n",E,RCC,e); if (E>1000) printf("Doing DCI rate matching for %d channel bits, RCC %d, e %p\n",E,RCC,e);
#endif //#endif
lte_rate_matching_cc(RCC,E,w,e); lte_rate_matching_cc(RCC,E,w,e);
} }
uint8_t *generate_dci0(uint8_t *dci, uint8_t *generate_dci0(uint8_t *dci,
uint8_t *e, uint8_t *e,
uint8_t DCI_LENGTH, uint8_t DCI_LENGTH,
uint8_t aggregation_level, uint16_t coded_bits,
uint8_t bitsperCCE,
uint16_t rnti) uint16_t rnti)
{ {
uint16_t coded_bits;
uint8_t dci_flip[8]; uint8_t dci_flip[8];
AssertFatal((aggregation_level==1) ||
(aggregation_level==2) ||
(aggregation_level==4) ||
(aggregation_level==8)
#ifdef Rel14 // Added for EPDCCH/MPDCCH
||
(aggregation_level==16) ||
(aggregation_level==24) ||
(aggregation_level==32)
#endif
,
"generate_dci FATAL, illegal aggregation_level %d\n",aggregation_level);
coded_bits = bitsperCCE * aggregation_level;
/* /*
#ifdef DEBUG_DCI_ENCODING #ifdef DEBUG_DCI_ENCODING
...@@ -2293,8 +2276,7 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols, ...@@ -2293,8 +2276,7 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
e_ptr = generate_dci0(dci_alloc[i].dci_pdu, e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
e+(72*dci_alloc[i].firstCCE), e+(72*dci_alloc[i].firstCCE),
dci_alloc[i].dci_length, dci_alloc[i].dci_length,
dci_alloc[i].L, 72*dci_alloc[i].L,
72,
dci_alloc[i].rnti); dci_alloc[i].rnti);
} }
} }
......
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ dd695beb
...@@ -164,12 +164,11 @@ int8_t delta_PUSCH_acc[4] = { -1, 0, 1, 3 }; ...@@ -164,12 +164,11 @@ int8_t delta_PUSCH_acc[4] = { -1, 0, 1, 3 };
int8_t *delta_PUCCH_lut = delta_PUSCH_acc; int8_t *delta_PUCCH_lut = delta_PUSCH_acc;
void void
conv_eMTC_rballoc (uint16_t resource_block_coding, uint32_t N_RB_DL, uint32_t * rb_alloc) conv_eMTC_rballoc (uint8_t narrowband,uint16_t resource_block_coding, uint32_t N_RB_DL, uint32_t * rb_alloc)
{ {
int narrowband = resource_block_coding >> 5; int RIV = resource_block_coding;
int RIV = resource_block_coding & 31;
int N_NB_DL = N_RB_DL / 6; int N_NB_DL = N_RB_DL / 6;
int i0 = (N_RB_DL >> 1) - (3 * N_NB_DL); int i0 = (N_RB_DL >> 1) - (3 * N_NB_DL);
int first_rb = (6 * narrowband) + i0; int first_rb = (6 * narrowband) + i0;
...@@ -177,6 +176,8 @@ conv_eMTC_rballoc (uint16_t resource_block_coding, uint32_t N_RB_DL, uint32_t * ...@@ -177,6 +176,8 @@ conv_eMTC_rballoc (uint16_t resource_block_coding, uint32_t N_RB_DL, uint32_t *
int ind = first_rb >> 5; int ind = first_rb >> 5;
int ind_mod = first_rb & 31; int ind_mod = first_rb & 31;
AssertFatal(RIV<32,"RIV is %d > 31\n");
if (((N_RB_DL & 1) > 0) && (narrowband >= (N_NB_DL >> 1))) if (((N_RB_DL & 1) > 0) && (narrowband >= (N_NB_DL >> 1)))
first_rb++; first_rb++;
rb_alloc[0] = 0; rb_alloc[0] = 0;
...@@ -2208,6 +2209,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t * ...@@ -2208,6 +2209,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
((DCI6_1A_10MHz_t *) dci_pdu)->type = 1; ((DCI6_1A_10MHz_t *) dci_pdu)->type = 1;
((DCI6_1A_10MHz_t *) dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag; ((DCI6_1A_10MHz_t *) dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag;
((DCI6_1A_10MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding; ((DCI6_1A_10MHz_t *) dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_1A_10MHz_t *) dci_pdu)->narrowband = rel13->mpdcch_narrow_band;
((DCI6_1A_10MHz_t *) dci_pdu)->mcs = rel13->mcs; ((DCI6_1A_10MHz_t *) dci_pdu)->mcs = rel13->mcs;
((DCI6_1A_10MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels); ((DCI6_1A_10MHz_t *) dci_pdu)->rep = (rel13->pdsch_reptition_levels);
((DCI6_1A_10MHz_t *) dci_pdu)->harq_pid = rel13->harq_process; ((DCI6_1A_10MHz_t *) dci_pdu)->harq_pid = rel13->harq_process;
...@@ -2218,8 +2220,22 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t * ...@@ -2218,8 +2220,22 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
((DCI6_1A_10MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset; ((DCI6_1A_10MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
((DCI6_1A_10MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number; ((DCI6_1A_10MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number;
LOG_I(PHY,"Frame %d, Subframe %d : Programming Format 6-1A DCI, mcs %d, rballoc %x, dci_rep r%d, L %d, narrowband %d, start_symbol %d, TPC %d, ra_flag %d, dci_type %d\n", LOG_I(PHY,"Frame %d, Subframe %d : Programming Format 6-1A DCI, type %d, hopping %d, narrowband %d, rballoc %x, mcs %d, rep %d, harq_pid %d, ndi %d, rv %d, TPC %d, srs_req %d, harq_ack_off %d, dci_rep r%d => %x\n",
frame,subframe,rel13->mcs,rel13->resource_block_coding,1+rel13->dci_subframe_repetition_number,rel13->aggregation_level,rel13->mpdcch_narrow_band,dci_alloc->start_symbol,rel13->tpc,dci_alloc->ra_flag,rel13->rnti_type); frame,subframe,
((DCI6_1A_10MHz_t *) dci_pdu)->type,
((DCI6_1A_10MHz_t *) dci_pdu)->hopping,
((DCI6_1A_10MHz_t *) dci_pdu)->narrowband,
((DCI6_1A_10MHz_t *) dci_pdu)->rballoc,
((DCI6_1A_10MHz_t *) dci_pdu)->mcs,
((DCI6_1A_10MHz_t *) dci_pdu)->rep,
((DCI6_1A_10MHz_t *) dci_pdu)->harq_pid,
((DCI6_1A_10MHz_t *) dci_pdu)->ndi,
((DCI6_1A_10MHz_t *) dci_pdu)->rv,
((DCI6_1A_10MHz_t *) dci_pdu)->TPC,
((DCI6_1A_10MHz_t *) dci_pdu)->srs_req,
((DCI6_1A_10MHz_t *) dci_pdu)->harq_ack_off,
((DCI6_1A_10MHz_t *) dci_pdu)->dci_rep,
((uint32_t*)dci_pdu)[0]);
break; break;
case 100: case 100:
dci_alloc->dci_length = sizeof_DCI6_1A_20MHz_t; dci_alloc->dci_length = sizeof_DCI6_1A_20MHz_t;
...@@ -2335,7 +2351,9 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t * ...@@ -2335,7 +2351,9 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
dlsch0->subframe_tx[(subframe + 2) % 10] = 1; dlsch0->subframe_tx[(subframe + 2) % 10] = 1;
LOG_I(PHY,"PDSCH : resource_block_coding %x\n",rel13->resource_block_coding); LOG_I(PHY,"PDSCH : resource_block_coding %x\n",rel13->resource_block_coding);
conv_eMTC_rballoc (rel13->resource_block_coding, fp->N_RB_DL, dlsch0_harq->rb_alloc); conv_eMTC_rballoc (rel13->mpdcch_narrow_band,rel13->resource_block_coding,
fp->N_RB_DL,
dlsch0_harq->rb_alloc);
dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel13->resource_block_coding & 31]; // this is the 6PRB RIV dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel13->resource_block_coding & 31]; // this is the 6PRB RIV
......
openair1/PHY/LTE_TRANSPORT/edci.c
View file @ dd695beb
This diff is collapsed.
openair1/PHY/LTE_TRANSPORT/mdci.h
View file @ dd695beb
...@@ -135,7 +135,7 @@ typedef struct DCI6_0A_10MHz DCI6_0A_10MHz_t; ...@@ -135,7 +135,7 @@ typedef struct DCI6_0A_10MHz DCI6_0A_10MHz_t;
/// basic DCI Format Type 6-1A (10 MHz, FDD primary carrier, 24 bits, 5 bit format, TM!=9,TM!=6, no scheduling enhancement) /// basic DCI Format Type 6-1A (10 MHz, FDD primary carrier, 24 bits, 5 bit format, TM!=9,TM!=6, no scheduling enhancement)
struct DCI6_1A_10MHz { struct DCI6_1A_10MHz {
/// padding to fill 32-bit word /// padding to fill 32-bit word
uint32_t padding:4; uint32_t padding:3;
/// DCI subframe repetition number /// DCI subframe repetition number
uint32_t dci_rep:2; uint32_t dci_rep:2;
/// HARQ-ACK resource offset /// HARQ-ACK resource offset
...@@ -154,8 +154,10 @@ struct DCI6_1A_10MHz { ...@@ -154,8 +154,10 @@ struct DCI6_1A_10MHz {
uint32_t rep:2; uint32_t rep:2;
/// Modulation and Coding Scheme and Redundancy Version /// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:4; uint32_t mcs:4;
/// Resource block assignment (assignment flag = 0 for 10 MHz, ceil(log2(floor(N_RB_DL/6)))+5) /// Resource block assignment
uint32_t rballoc:8; uint32_t rballoc:5;
/// narroband index log2(floor(N_RB_DL/6))) bits
uint32_t narrowband:3;
/// Frequency hopping flag /// Frequency hopping flag
uint32_t hopping:1; uint32_t hopping:1;
/// 0/1A differentiator /// 0/1A differentiator
......
openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c
View file @ dd695beb
...@@ -904,7 +904,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, ...@@ -904,7 +904,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
//#ifdef DEBUG_ULSCH_DECODING //#ifdef DEBUG_ULSCH_DECODING
LOG_D(PHY,"Frame %d, Subframe %d: ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): A %d, round %d, RV %d, O_r1 %d, O_RI %d, O_ACK %d, G %d\n", LOG_I(PHY,"Frame %d, Subframe %d: ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): A %d, round %d, RV %d, O_r1 %d, O_RI %d, O_ACK %d, G %d\n",
proc->frame_rx,subframe, proc->frame_rx,subframe,
frame_parms->Nid_cell,ulsch->rnti,x2, frame_parms->Nid_cell,ulsch->rnti,x2,
A, A,
......
openair1/SCHED/phy_procedures_lte_eNb.c
View file @ dd695beb
...@@ -212,23 +212,7 @@ pdsch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, int harq_pid, LTE_ ...@@ -212,23 +212,7 @@ pdsch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, int harq_pid, LTE_
LOG_I (PHY, LOG_I (PHY,
"[eNB %" PRIu8 "][PDSCH %" PRIx16 "/%" PRIu8 "] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %" PRIu16 ", pdsch_start %d, G %d, nb_rb %" PRIu16 ", rb0 %x, rb1 %x, TBS %" "[eNB %" PRIu8 "][PDSCH %" PRIx16 "/%" PRIu8 "] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %" PRIu16 ", pdsch_start %d, G %d, nb_rb %" PRIu16 ", rb0 %x, rb1 %x, TBS %"
PRIu16 ", pmi_alloc %" PRIx64 ", rv %" PRIu8 " (round %" PRIu8 ")\n", eNB->Mod_id, dlsch->rnti, harq_pid, frame, subframe, input_buffer_length, dlsch_harq->pdsch_start, get_G (fp, PRIu16 ", pmi_alloc %" PRIx64 ", rv %" PRIu8 " (round %" PRIu8 ")\n", eNB->Mod_id, dlsch->rnti, harq_pid, frame, subframe, input_buffer_length, dlsch_harq->pdsch_start, get_G(fp,dlsch_harq->nb_rb,dlsch_harq->rb_alloc,dlsch_harq->Qm,dlsch_harq->Nl,dlsch_harq->pdsch_start,frame,subframe,dlsch_harq->mimo_mode == TM7 ? 7 : 0),dlsch_harq->nb_rb, dlsch_harq->rb_alloc[0], dlsch_harq->rb_alloc[1], dlsch_harq->TBS, pmi2hex_2Ar1 (dlsch_harq->pmi_alloc), dlsch_harq->rvidx, dlsch_harq->round);
dlsch_harq->
nb_rb,
dlsch_harq->
rb_alloc,
dlsch_harq->
Qm,
dlsch_harq->
Nl,
dlsch_harq->
pdsch_start,
frame,
subframe,
dlsch_harq->
mimo_mode ==
TM7 ? 7 : 0),
dlsch_harq->nb_rb, dlsch_harq->rb_alloc[0], dlsch_harq->rb_alloc[1], dlsch_harq->TBS, pmi2hex_2Ar1 (dlsch_harq->pmi_alloc), dlsch_harq->rvidx, dlsch_harq->round);
} }
#if defined(MESSAGE_CHART_GENERATOR_PHY) #if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_TX_MESSAGE (MSC_PHY_ENB, MSC_PHY_UE, MSC_LOG_TX_MESSAGE (MSC_PHY_ENB, MSC_PHY_UE,
...@@ -399,9 +383,10 @@ phy_procedures_eNB_TX (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, relaying_type ...@@ -399,9 +383,10 @@ phy_procedures_eNB_TX (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, relaying_type
if (num_mdci > 0) { if (num_mdci > 0) {
LOG_I (PHY, "[eNB %" PRIu8 "] Frame %d, subframe %d: Calling generate_mdci_top (mpdcch) (num_dci %" PRIu8 ")\n", eNB->Mod_id, frame, subframe, num_mdci); LOG_I (PHY, "[eNB %" PRIu8 "] Frame %d, subframe %d: Calling generate_mdci_top (mpdcch) (num_dci %" PRIu8 ")\n", eNB->Mod_id, frame, subframe, num_mdci);
generate_mdci_top (eNB, frame, subframe, AMP*3/4, eNB->common_vars.txdataF); generate_mdci_top (eNB, frame, subframe, AMP, eNB->common_vars.txdataF);
//write_output("/tmp/mpdcch.m","mpdcch_txF",(void*)&eNB->common_vars.txdataF[0][subframe*14*1024],14*1024,1,1);
//exit(-1); /* write_output("/tmp/mpdcch.m","mpdcch_txF",(void*)&eNB->common_vars.txdataF[0][subframe*14*1024],14*1024,1,1);
exit(-1);*/
} }
#endif #endif
// Now scan UE specific DLSCH // Now scan UE specific DLSCH
...@@ -1130,8 +1115,11 @@ pusch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc) ...@@ -1130,8 +1115,11 @@ pusch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc)
fill_crc_indication (eNB, i, frame, subframe, 1); // indicate NAK to MAC fill_crc_indication (eNB, i, frame, subframe, 1); // indicate NAK to MAC
fill_rx_indication (eNB, i, frame, subframe); // indicate SDU to MAC fill_rx_indication (eNB, i, frame, subframe); // indicate SDU to MAC
LOG_D (PHY, "[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n", LOG_I (PHY, "[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n",
eNB->Mod_id, harq_pid, frame, subframe, i, ulsch_harq->round - 1, ulsch->Mlimit, ulsch_harq->o_ACK[0], ulsch_harq->o_ACK[1]); eNB->Mod_id, harq_pid, frame, subframe, i, ulsch_harq->round - 1, ulsch->Mlimit, ulsch_harq->o_ACK[0], ulsch_harq->o_ACK[1]);
dump_ulsch(eNB,frame,subframe,i);
exit(-1);
if (ulsch_harq->round >= 3) { if (ulsch_harq->round >= 3) {
ulsch_harq->status = SCH_IDLE; ulsch_harq->status = SCH_IDLE;
ulsch_harq->handled = 0; ulsch_harq->handled = 0;
......
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @ dd695beb
...@@ -247,7 +247,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -247,7 +247,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
reps = (rmax <= 8) ? (1 << rep) : (rmax >> (3 - rep)); reps = (rmax <= 8) ? (1 << rep) : (rmax >> (3 - rep));
// get narrowband according to higher-layer config // get narrowband according to higher-layer config
num_nb = p[RA_template->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.count; num_nb = p[RA_template->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.count;
RA_template->msg2_narrowband = *p[RA_template->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.array[RA_template->preamble_index % num_nb]; RA_template->msg2_narrowband = *p[RA_template->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.array[RA_template->preamble_index % num_nb]-1;
first_rb = narrowband_to_first_rb (&cc[CC_idP], RA_template->msg2_narrowband); first_rb = narrowband_to_first_rb (&cc[CC_idP], RA_template->msg2_narrowband);
if ((RA_template->msg2_mpdcch_repetition_cnt == 0) && (mpdcch_sf_condition (eNB, CC_idP, frameP, subframeP, rmax, TYPE2, -1) > 0)) { if ((RA_template->msg2_mpdcch_repetition_cnt == 0) && (mpdcch_sf_condition (eNB, CC_idP, frameP, subframeP, rmax, TYPE2, -1) > 0)) {
...@@ -274,8 +274,9 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -274,8 +274,9 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6) | (RA_template->msg2_narrowband<<5); dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = RA_template->msg2_narrowband;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 1; // adjust according to size of RAR, 208 bits with N1A_PRB=3 dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6);
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 0; // adjust according to size of RAR, 208 bits with N1A_PRB=3
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0;
...@@ -286,7 +287,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -286,7 +287,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 0; // N1A_PRB=2 (36.212); dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1; // N1A_PRB=3 (36.212) => 56 bits
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0;
...@@ -628,7 +629,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -628,7 +629,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6); // check if not getRIV(N_RB_DL,first_rb,6); dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6); // check if not getRIV(N_RB_DL,first_rb,6);
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 4; // adjust according to size of Msg4, 208 bits with N1A_PRB=3 dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 0; // adjust according to size of Msg4, 208 bits with N1A_PRB=3
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0;
...@@ -639,7 +640,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s ...@@ -639,7 +640,7 @@ generate_Msg4 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1; // N1A_PRB=3; => 208 bits dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1; // N1A_PRB=3; =>
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0;
...@@ -1160,13 +1161,14 @@ initiate_ra_proc (module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t ...@@ -1160,13 +1161,14 @@ initiate_ra_proc (module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d\n", module_idP, CC_id, frameP, subframeP, preamble_index); LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d\n", module_idP, CC_id, frameP, subframeP, preamble_index);
#ifdef Rel14 #ifdef Rel14
LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d PRACH resource type %d\n", module_idP, CC_id, frameP, subframeP, rach_resource_type); LOG_I (MAC, "[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d PRACH resource type %d\n", module_idP, CC_id, frameP, subframeP, rach_resource_type);
#endif
if (prach_ParametersListCE_r13 && prach_ParametersListCE_r13->list.count < rach_resource_type) { if (prach_ParametersListCE_r13 && prach_ParametersListCE_r13->list.count < rach_resource_type) {
LOG_E (MAC, "[eNB %d][RAPROC] CC_id %d Received impossible PRACH resource type %d, only %d CE levels configured\n", LOG_E (MAC, "[eNB %d][RAPROC] CC_id %d Received impossible PRACH resource type %d, only %d CE levels configured\n",
module_idP, CC_id, rach_resource_type, (int) prach_ParametersListCE_r13->list.count); module_idP, CC_id, rach_resource_type, (int) prach_ParametersListCE_r13->list.count);
return; return;
} }
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME (VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0);
......
openair2/LAYER2/MAC/rar_tools.c
View file @ dd695beb
...@@ -139,7 +139,7 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB, ...@@ -139,7 +139,7 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB,
uint8_t *rar = (uint8_t *)(dlsch_buffer+1); uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
int i; int i;
uint8_t nb,rballoc,reps; uint8_t rballoc,reps;
uint8_t mcs,TPC,ULdelay,cqireq,mpdcch_nb_index; uint8_t mcs,TPC,ULdelay,cqireq,mpdcch_nb_index;
int input_buffer_length; int input_buffer_length;
...@@ -158,7 +158,7 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB, ...@@ -158,7 +158,7 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB,
// Copy the Msg2 narrowband // Copy the Msg2 narrowband
RA_template->msg34_narrowband = RA_template->msg2_narrowband; RA_template->msg34_narrowband = RA_template->msg2_narrowband;
RA_template->msg3_first_rb = ce_level; RA_template->msg3_first_rb = 0;
RA_template->msg3_nb_rb = 2; RA_template->msg3_nb_rb = 2;
if (ce_level<2) { //CE Level 0,1, CEmodeA if (ce_level<2) { //CE Level 0,1, CEmodeA
...@@ -170,24 +170,24 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB, ...@@ -170,24 +170,24 @@ unsigned short fill_rar_br(eNB_MAC_INST *eNB,
rar[5] = (uint8_t)(RA_template->rnti&0xff); rar[5] = (uint8_t)(RA_template->rnti&0xff);
//cc->RA_template[ra_idx].timing_offset = 0; //cc->RA_template[ra_idx].timing_offset = 0;
nb = 0;
reps = 0; reps = 0;
mcs = 7; RA_template->msg3_mcs = 7;
TPC = 3; // no power increase TPC = 3; // no power increase
ULdelay = 0; ULdelay = 0;
cqireq = 0; cqireq = 0;
mpdcch_nb_index = 0; mpdcch_nb_index = 0;
rballoc = mac_computeRIV(6,RA_template->msg3_first_rb,RA_template->msg3_nb_rb); // one PRB only for UL Grant in position 1+ce_level within Narrowband rballoc = mac_computeRIV(6,RA_template->msg3_first_rb,RA_template->msg3_nb_rb);
unsigned int buffer = 0; unsigned int buffer = 0;
buffer |= N_NB_index << (16 + (4 - N_NB_index)); buffer |= RA_template->msg34_narrowband << (16 + (4 - N_NB_index));
buffer |= ((rballoc & 0xFF) << (12 + (4 - N_NB_index))); buffer |= ((rballoc & 0xFF) << (12 + (4 - N_NB_index)));
buffer |= ((reps & 0x03) << (10 + (4 - N_NB_index))); buffer |= ((reps & 0x03) << (10 + (4 - N_NB_index)));
buffer |= ((mcs & 0x07) << (7 + (4 - N_NB_index))); buffer |= ((RA_template->msg3_mcs & 0x07) << (7 + (4 - N_NB_index)));
buffer |= ((TPC & 0x07) << (4 + (4 - N_NB_index))); buffer |= ((TPC & 0x07) << (4 + (4 - N_NB_index)));
buffer |= ((cqireq & 0x01) << (3 + (4 - N_NB_index))); buffer |= ((cqireq & 0x01) << (3 + (4 - N_NB_index)));
buffer |= ((ULdelay & 0x01) << (2 + (4 - N_NB_index))); buffer |= ((ULdelay & 0x01) << (2 + (4 - N_NB_index)));
buffer |= ((ULdelay & 0x01) << (4 - N_NB_index)); buffer |= (mpdcch_nb_index << (4 - N_NB_index));
rar[1] = (buffer>>12) & 0x0F; rar[1] = (buffer>>16) & 0x0F;
rar[2] = (buffer>>8) & 0xFF; rar[2] = (buffer>>8) & 0xFF;
rar[3] = buffer&0xFF; rar[3] = buffer&0xFF;
} }
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band13.tm1.50PRB.emtc.conf
View file @ dd695beb
...@@ -256,7 +256,7 @@ eNBs = ...@@ -256,7 +256,7 @@ eNBs =
numRepetitionPerPreambleAttempt_r13 = "n1"; #0 numRepetitionPerPreambleAttempt_r13 = "n1"; #0
mpdcch_NumRepetition_RA_r13 = "r1"; #0 mpdcch_NumRepetition_RA_r13 = "r1"; #0
prach_HoppingConfig_r13 = "off"; #1 prach_HoppingConfig_r13 = "off"; #1
max_available_narrow_band = [2]; max_available_narrow_band = [3];
} }
); );
...@@ -355,7 +355,7 @@ eNBs = ...@@ -355,7 +355,7 @@ eNBs =
////////// MME parameters: ////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26"; mme_ip_address = ( { ipv4 = "127.0.0.3";
ipv6 = "192:168:30::17"; ipv6 = "192:168:30::17";
active = "yes"; active = "yes";
preference = "ipv4"; preference = "ipv4";
...@@ -365,10 +365,10 @@ eNBs = ...@@ -365,10 +365,10 @@ eNBs =
NETWORK_INTERFACES : NETWORK_INTERFACES :
{ {
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0"; ENB_INTERFACE_NAME_FOR_S1_MME = "lo";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.150/24"; ENB_IPV4_ADDRESS_FOR_S1_MME = "127.0.0.2/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0"; ENB_INTERFACE_NAME_FOR_S1U = "lo";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.150/24"; ENB_IPV4_ADDRESS_FOR_S1U = "127.0.0.4/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152 ENB_PORT_FOR_S1U = 2152; # Spec 2152
}; };
......
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