Commit ef4adce1 authored by Francesco Mani's avatar Francesco Mani

using cell id as scrambling id for csi-rs

parent e7a3cb29
...@@ -196,7 +196,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -196,7 +196,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
} }
} }
nr_init_csi_rs(gNB, 0); // TODO scramblingID currently hardcoded to 0, to be taken from higher layer parameter scramblingID when implemented nr_init_csi_rs(gNB, cfg->cell_config.phy_cell_id.value); // TODO scramblingID currently hardcoded to 0, to be taken from higher layer parameter scramblingID when implemented
/// Transport init necessary for NR synchro /// Transport init necessary for NR synchro
init_nr_transport(gNB); init_nr_transport(gNB);
......
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
#include "PHY/NR_TRANSPORT/nr_transport_proto.h" #include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/MODULATION/nr_modulation.h" #include "PHY/MODULATION/nr_modulation.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#define NR_CSIRS_DEBUG #define NR_CSIRS_DEBUG
...@@ -29,12 +30,13 @@ ...@@ -29,12 +30,13 @@
void nr_generate_csi_rs(PHY_VARS_gNB *gNB, void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
int16_t amp, int16_t amp,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params, nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params,
uint16_t cell_id,
int slot){ int slot){
NR_DL_FRAME_PARMS frame_parms=gNB->frame_parms; NR_DL_FRAME_PARMS frame_parms=gNB->frame_parms;
uint32_t **gold_csi_rs = gNB->nr_gold_csi_rs[slot];
int32_t **txdataF = gNB->common_vars.txdataF; int32_t **txdataF = gNB->common_vars.txdataF;
int txdataF_offset = (slot%2)*frame_parms.samples_per_slot_wCP; int txdataF_offset = (slot%2)*frame_parms.samples_per_slot_wCP;
uint32_t **gold_csi_rs = gNB->nr_gold_csi_rs[slot];
int16_t mod_csi[frame_parms.symbols_per_slot][NR_MAX_CSI_RS_LENGTH>>1]; int16_t mod_csi[frame_parms.symbols_per_slot][NR_MAX_CSI_RS_LENGTH>>1];
uint16_t b = csi_params.freq_domain; uint16_t b = csi_params.freq_domain;
uint16_t n, csi_bw, csi_start, p, k, l, mprime, na, kpn, csi_length; uint16_t n, csi_bw, csi_start, p, k, l, mprime, na, kpn, csi_length;
...@@ -48,6 +50,22 @@ void nr_generate_csi_rs(PHY_VARS_gNB *gNB, ...@@ -48,6 +50,22 @@ void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
AssertFatal(b!=0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n"); AssertFatal(b!=0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n");
// pre-computed for scrambling id equel to cell id
// if the scrambling id is not the cell id we need to re-initialize the rs
if (csi_params.scramb_id != cell_id) {
uint8_t reset;
uint32_t x1, x2;
uint32_t Nid = csi_params.scramb_id;
for (uint8_t symb=0; symb<frame_parms.symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<10) * (frame_parms.symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
gold_csi_rs[symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
switch (csi_params.row) { switch (csi_params.row) {
// implementation of table 7.4.1.5.3-1 of 38.211 // implementation of table 7.4.1.5.3-1 of 38.211
// lprime and kprime are the max value of l' and k' // lprime and kprime are the max value of l' and k'
......
...@@ -329,6 +329,7 @@ void free_nr_ru_prach_entry(RU_t *ru, int prach_id); ...@@ -329,6 +329,7 @@ void free_nr_ru_prach_entry(RU_t *ru, int prach_id);
void nr_generate_csi_rs(PHY_VARS_gNB *gNB, void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
int16_t amp, int16_t amp,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params, nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params,
uint16_t cell_id,
int slot); int slot);
void nr_decode_pucch1(int32_t **rxdataF, void nr_decode_pucch1(int32_t **rxdataF,
......
...@@ -205,7 +205,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -205,7 +205,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
(csirs->slot == slot) ) { (csirs->slot == slot) ) {
LOG_D(PHY, "CSI-RS generation started in frame %d.%d\n",frame,slot); LOG_D(PHY, "CSI-RS generation started in frame %d.%d\n",frame,slot);
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params = csirs->csirs_pdu.csi_rs_pdu_rel15; nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params = csirs->csirs_pdu.csi_rs_pdu_rel15;
nr_generate_csi_rs(gNB, AMP, csi_params, slot); nr_generate_csi_rs(gNB, AMP, csi_params, gNB->gNB_config.cell_config.phy_cell_id.value, slot);
csirs->active = 0; csirs->active = 0;
} }
} }
......
...@@ -2038,7 +2038,7 @@ uint16_t nr_get_csi_bitlen(int Mod_idP, ...@@ -2038,7 +2038,7 @@ uint16_t nr_get_csi_bitlen(int Mod_idP,
csi_bitlen = ((CSI_report_bitlen->cri_ssbri_bitlen * CSI_report_bitlen->nb_ssbri_cri) + csi_bitlen = ((CSI_report_bitlen->cri_ssbri_bitlen * CSI_report_bitlen->nb_ssbri_cri) +
CSI_report_bitlen->rsrp_bitlen +(CSI_report_bitlen->diff_rsrp_bitlen * CSI_report_bitlen->rsrp_bitlen +(CSI_report_bitlen->diff_rsrp_bitlen *
(CSI_report_bitlen->nb_ssbri_cri -1 )) *UE_info->csi_report_template[UE_id][csi_report_id].nb_of_csi_ssb_report); (CSI_report_bitlen->nb_ssbri_cri -1 )) *UE_info->csi_report_template[UE_id][csi_report_id].nb_of_csi_ssb_report);
printf("%d\n",csi_bitlen);
return csi_bitlen; return csi_bitlen;
} }
......
...@@ -1073,7 +1073,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -1073,7 +1073,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
nzpcsi0->powerControlOffset = 0; nzpcsi0->powerControlOffset = 0;
nzpcsi0->powerControlOffsetSS=calloc(1,sizeof(*nzpcsi0->powerControlOffsetSS)); nzpcsi0->powerControlOffsetSS=calloc(1,sizeof(*nzpcsi0->powerControlOffsetSS));
*nzpcsi0->powerControlOffsetSS = NR_NZP_CSI_RS_Resource__powerControlOffsetSS_db0; *nzpcsi0->powerControlOffsetSS = NR_NZP_CSI_RS_Resource__powerControlOffsetSS_db0;
nzpcsi0->scramblingID = 50; nzpcsi0->scramblingID = *servingcellconfigcommon->physCellId;
nzpcsi0->periodicityAndOffset = calloc(1,sizeof(*nzpcsi0->periodicityAndOffset)); nzpcsi0->periodicityAndOffset = calloc(1,sizeof(*nzpcsi0->periodicityAndOffset));
nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320; nzpcsi0->periodicityAndOffset->present = NR_CSI_ResourcePeriodicityAndOffset_PR_slots320;
nzpcsi0->periodicityAndOffset->choice.slots320 = 0; nzpcsi0->periodicityAndOffset->choice.slots320 = 0;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment