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OpenXG-RAN
Commit f16d6127 authored by Guy De Souza's avatar Guy De Souza
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Merge branch 'develop-nr' of https://gitlab.eurecom.fr/oai/openairinterface5g into develop-nr

parents 89d0971d 241f57d8
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Showing with 2319 additions and 1656 deletions
cmake_targets/CMakeLists.txt
View file @ f16d6127
......@@ -1296,6 +1296,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c
${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_ue.c
#${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_common_ue.c
${OPENAIR1_DIR}/SCHED_NR_UE/fapi_nr_ue_l1.c
${PHY_POLARSRC}
)
......@@ -1321,6 +1322,7 @@ add_library(PHY_RU ${PHY_SRC_RU})
set(MAC_DIR ${OPENAIR2_DIR}/LAYER2/MAC)
set(NR_UE_MAC_DIR ${OPENAIR2_DIR}/LAYER2/NR_MAC_UE)
set(PHY_INTERFACE_DIR ${OPENAIR2_DIR}/PHY_INTERFACE)
set(NR_UE_PHY_INTERFACE_DIR ${OPENAIR2_DIR}/NR_UE_PHY_INTERFACE)
set(RLC_DIR ${OPENAIR2_DIR}/LAYER2/RLC)
set(RLC_UM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/UM_v9.3.0)
set(RLC_AM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/AM_v9.3.0)
......@@ -1440,6 +1442,7 @@ set (MAC_SRC
${MAC_DIR}/config_ue.c
)
set (MAC_SRC_UE
${MAC_DIR}/main_ue.c
${MAC_DIR}/ue_procedures.c
......@@ -1447,11 +1450,16 @@ set (MAC_SRC_UE
${MAC_DIR}/l1_helpers.c
${MAC_DIR}/rar_tools_ue.c
${MAC_DIR}/config_ue.c
)
set (MAC_NR_SRC_UE
${NR_UE_PHY_INTERFACE_DIR}/NR_IF_Module.c
${NR_UE_MAC_DIR}/config_ue.c
${NR_UE_MAC_DIR}/mac_vars.c
${NR_UE_MAC_DIR}/main_ue_nr.c
${NR_UE_MAC_DIR}/nr_ue_procedures.c
)
)
set (ENB_APP_SRC
${OPENAIR2_DIR}/ENB_APP/enb_app.c
......@@ -1468,8 +1476,10 @@ add_library(L2
add_library(L2_UE
${L2_SRC_UE}
${MAC_SRC_UE}
${MAC_NR_SRC_UE}
)
include_directories(${NR_UE_PHY_INTERFACE_DIR})
include_directories(${NFAPI_USER_DIR})
......
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_ue_interface.h → nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h 100644 → 100755
View file @ f16d6127
......@@ -15,18 +15,20 @@
*/
#ifndef _NFAPI_NR_INTERFACE_NR_EXTENSION_H_
#define _NFAPI_NR_INTERFACE_NR_EXTENSION_H_
#define _NFAPI_NR_INTERFACE_H_
#ifndef _FAPI_NR_INTERFACE_NR_EXTENSION_H_
#define _FAPI_NR_INTERFACE_NR_EXTENSION_H_
#define _FAPI_NR_INTERFACE_H_
#include "stddef.h"
#define NFAPI_NR_MAX_NUM_DL_ALLOCATIONS 16
#define NFAPI_NR_MAX_NUM_UL_ALLOCATIONS 16
#define NFAPI_NR_MAX_NUM_SERVING_CELLS 32
#define NFAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET 16
#define FAPI_NR_MAX_NUM_DL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_UL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_SERVING_CELLS 32
#define FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET 16
#define FAPI_NR_MAX_NUM_CANDIDATE_BEAMS 16
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
typedef unsigned int uint32_t;
typedef unsigned short uint16_t;
......@@ -35,12 +37,19 @@ typedef signed int int32_t;
typedef signed short int16_t;
typedef signed char int8_t;
typedef enum {
FAPI_NR_RX_PDU_BCCH_BCH_TYPE = 0,
FAPI_NR_RX_PDU_BCCH_DLSCH_TYPE
} fapi_nr_rx_pdu_type_e;
typedef struct {
uint16_t phy_id;
uint16_t message_id;
uint16_t message_length;
uint16_t spare;
} nfapi_nr_p4_p5_message_header_t;
} fapi_nr_p4_p5_message_header_t;
typedef struct {
uint16_t phy_id;
......@@ -49,20 +58,16 @@ typedef struct {
uint16_t m_segment_sequence; /* This consists of 3 fields - namely, M, Segement & Sequence number*/
uint32_t checksum;
uint32_t transmit_timestamp;
} nfapi_nr_p7_message_header_t;
} fapi_nr_p7_message_header_t;
typedef struct {
uint16_t tag;
uint16_t length;
} nfapi_nr_tl_t;
#define NFAPI_NR_TAG_LENGTH_PACKED_LEN 4
} fapi_nr_tl_t;
#define FAPI_NR_TAG_LENGTH_PACKED_LEN 4
typedef struct {
nfapi_nr_tl_t tl;
fapi_nr_tl_t tl;
// common C-RNTI
uint8_t dci_format;
uint8_t frequency_domain_resouce_assignment; // 38.214 chapter 5.1.2.2
......@@ -80,8 +85,8 @@ typedef struct {
uint8_t carrier_indicator;
uint8_t bwp_indndicator;
uint8_t vrb_to_prb_mapping;
uint8_t downlink_assignment_index_1;
uint8_t downlink_assignment_index_2;
uint8_t downlink_assignment_index1;
uint8_t downlink_assignment_index2;
uint8_t srs_resource_indicator;
uint8_t precoding_information;
uint8_t antenna_ports;
......@@ -116,11 +121,11 @@ typedef struct {
uint8_t dci2_3_srs_request; // 38.212 table 7.3.1.1.2-5
uint8_t dci2_3_tpc_command;
} nfapi_nr_dci_pdu_rel15_t;
#define NFAPI_NR_HI_DCI0_REQUEST_DCI_PDU_REL8_TAG 0x2020
} fapi_nr_dci_pdu_rel15_t;
#define FAPI_NR_HI_DCI0_REQUEST_DCI_PDU_REL8_TAG 0x2020
typedef struct {
nfapi_nr_tl_t tl;
fapi_nr_tl_t tl;
uint8_t uci_format;
uint8_t uci_channel;
uint8_t harq_ack_bits;
......@@ -129,13 +134,12 @@ typedef struct {
uint32_t csi;
uint8_t sr_bits;
uint32_t sr;
} nfapi_nr_uci_pdu_rel15_t;
} fapi_nr_uci_pdu_rel15_t;
//
// Top level NFAPI messages
// Top level FAPI messages
//
......@@ -148,105 +152,103 @@ typedef struct {
uint16_t rnti;
uint8_t dci_type;
uint8_t dci_size;
nfapi_nr_dci_pdu_rel15_t dci;
}nfapi_nr_dci_indication_pdu_t;
fapi_nr_dci_pdu_rel15_t dci;
}fapi_nr_dci_indication_pdu_t;
typedef struct {
nfapi_nr_tl_t tl;
fapi_nr_tl_t tl;
uint16_t number_of_dcis;
nfapi_nr_dci_indication_pdu_t* dci_list;
} nfapi_nr_dci_indication_body_t;
fapi_nr_dci_indication_pdu_t* dci_list;
} fapi_nr_dci_indication_body_t;
///
typedef struct {
nfapi_nr_p7_message_header_t header;
fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot;
nfapi_nr_dci_indication_body_t dci_indication_body;
} nfapi_nr_dci_indication_t;
fapi_nr_dci_indication_body_t dci_indication_body;
} fapi_nr_dci_indication_t;
#define NFAPI_NR_TX_MAX_PDU 100
#define FAPI_NR_TX_MAX_PDU 100
typedef struct {
nfapi_nr_tl_t tl;
uint8_t* data;
} nfapi_nr_rx_request_body_t;
#define NFAPI_NR_TX_REQUEST_BODY_TAG 0x2022
fapi_nr_tl_t tl;
uint32_t pdu_index;
uint32_t pdu_length;
uint8_t* pdu;
} fapi_nr_rx_request_body_t;
#define FAPI_NR_TX_REQUEST_BODY_TAG 0x2022
///
typedef struct {
nfapi_nr_p7_message_header_t header;
fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot;
nfapi_nr_rx_request_body_t rx_request_body;
} nfapi_nr_rx_indication_t;
fapi_nr_rx_request_body_t rx_request_body;
} fapi_nr_rx_indication_t;
typedef struct {
nfapi_nr_tl_t tl;
fapi_nr_tl_t tl;
uint8_t ul_cqi;
uint16_t timing_advance;
} nfapi_nr_tx_indication_t;
uint16_t rnti;
} fapi_nr_tx_config_t;
#define NFAPI_NR_TX_MAX_SEGMENTS 32
#define FAPI_NR_TX_MAX_SEGMENTS 32
typedef struct {
uint16_t pdu_length;
uint16_t pdu_index;
uint8_t num_segments;
struct {
uint32_t segment_length;
uint8_t* segment_data;
} segments[NFAPI_NR_TX_MAX_SEGMENTS];
uint8_t* pdu;
} fapi_nr_tx_request_pdu_t;
} nfapi_nr_tx_indication_pdu_t;
#define NFAPI_NR_RX_IND_MAX_PDU 100
#define FAPI_NR_RX_IND_MAX_PDU 100
typedef struct {
nfapi_nr_tl_t tl;
nfapi_nr_tx_indication_t tx_indication;
fapi_nr_tl_t tl;
fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus;
nfapi_nr_tx_indication_pdu_t* tx_pdu_list;
} nfapi_nr_tx_indication_body_t;
#define NFAPI_NR_RX_INDICATION_BODY_TAG 0x2023
fapi_nr_tx_request_pdu_t* tx_pdu_list;
} fapi_nr_tx_request_body_t;
#define FAPI_NR_RX_INDICATION_BODY_TAG 0x2023
///
typedef struct {
nfapi_nr_p7_message_header_t header;
fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot;
nfapi_nr_tx_indication_body_t tx_indication_body;
} nfapi_nr_tx_request_t;
fapi_nr_tx_request_body_t tx_request_body;
} fapi_nr_tx_request_t;
typedef struct {
uint8_t pdu_type;
uint8_t pdu_size;
union {
/*nfapi_nr_ul_config_ulsch_pdu ulsch_pdu;
nfapi_nr_ul_config_ulsch_cqi_ri_pdu ulsch_cqi_ri_pdu;
nfapi_nr_ul_config_ulsch_harq_pdu ulsch_harq_pdu;
nfapi_nr_ul_config_ulsch_cqi_harq_ri_pdu ulsch_cqi_harq_ri_pdu;
nfapi_nr_ul_config_uci_cqi_pdu uci_cqi_pdu;
nfapi_nr_ul_config_uci_sr_pdu uci_sr_pdu;
nfapi_nr_ul_config_uci_harq_pdu uci_harq_pdu;
nfapi_nr_ul_config_uci_sr_harq_pdu uci_sr_harq_pdu;
nfapi_nr_ul_config_uci_cqi_harq_pdu uci_cqi_harq_pdu;
nfapi_nr_ul_config_uci_cqi_sr_pdu uci_cqi_sr_pdu;
nfapi_nr_ul_config_uci_cqi_sr_harq_pdu uci_cqi_sr_harq_pdu;
nfapi_nr_ul_config_srs_pdu srs_pdu;
nfapi_nr_ul_config_harq_buffer_pdu harq_buffer_pdu;
nfapi_nr_ul_config_ulsch_uci_csi_pdu ulsch_uci_csi_pdu;
nfapi_nr_ul_config_ulsch_uci_harq_pdu ulsch_uci_harq_pdu;
nfapi_nr_ul_config_ulsch_csi_uci_harq_pdu ulsch_csi_uci_harq_pdu;*/
/*fapi_nr_ul_config_ulsch_pdu ulsch_pdu;
fapi_nr_ul_config_ulsch_cqi_ri_pdu ulsch_cqi_ri_pdu;
fapi_nr_ul_config_ulsch_harq_pdu ulsch_harq_pdu;
fapi_nr_ul_config_ulsch_cqi_harq_ri_pdu ulsch_cqi_harq_ri_pdu;
fapi_nr_ul_config_uci_cqi_pdu uci_cqi_pdu;
fapi_nr_ul_config_uci_sr_pdu uci_sr_pdu;
fapi_nr_ul_config_uci_harq_pdu uci_harq_pdu;
fapi_nr_ul_config_uci_sr_harq_pdu uci_sr_harq_pdu;
fapi_nr_ul_config_uci_cqi_harq_pdu uci_cqi_harq_pdu;
fapi_nr_ul_config_uci_cqi_sr_pdu uci_cqi_sr_pdu;
fapi_nr_ul_config_uci_cqi_sr_harq_pdu uci_cqi_sr_harq_pdu;
fapi_nr_ul_config_srs_pdu srs_pdu;
fapi_nr_ul_config_harq_buffer_pdu harq_buffer_pdu;
fapi_nr_ul_config_ulsch_uci_csi_pdu ulsch_uci_csi_pdu;
fapi_nr_ul_config_ulsch_uci_harq_pdu ulsch_uci_harq_pdu;
fapi_nr_ul_config_ulsch_csi_uci_harq_pdu ulsch_csi_uci_harq_pdu;*/
};
} nfapi_nr_ul_config_request_pdu_t;
} fapi_nr_ul_config_request_pdu_t;
typedef struct {
nfapi_nr_tl_t tl;
nfapi_nr_ul_config_request_pdu_t ul_config_pdu_list;
} nfapi_nr_ul_config_request_body_t;
fapi_nr_tl_t tl;
fapi_nr_ul_config_request_pdu_t ul_config_pdu_list;
} fapi_nr_ul_config_request_body_t;
///
typedef struct {
nfapi_nr_p7_message_header_t header;
fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot;
nfapi_nr_ul_config_request_body_t ul_config_request_body;
} nfapi_nr_ul_config_request_t;
fapi_nr_ul_config_request_body_t ul_config_request_body;
} fapi_nr_ul_config_request_t;
......@@ -254,19 +256,17 @@ typedef struct {
uint8_t pdu_type;
uint8_t pdu_size;
union {
/*nfapi_nr_dl_config_dlsch_pdu dlsch_pdu;
nfapi_nr_dl_config_prs_pdu prs_pdu;
nfapi_nr_dl_config_csi_rs_pdu csi_rs_pdu;*/
/*fapi_nr_dl_config_dlsch_pdu dlsch_pdu;
fapi_nr_dl_config_prs_pdu prs_pdu;
fapi_nr_dl_config_csi_rs_pdu csi_rs_pdu;*/
};
} nfapi_nr_dl_config_request_pdu_t;
} fapi_nr_dl_config_request_pdu_t;
///
typedef struct {
nfapi_nr_p7_message_header_t header;
fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot;
nfapi_nr_dl_config_request_pdu_t dl_config_request_body;
} nfapi_nr_dl_config_request_t;
fapi_nr_dl_config_request_pdu_t dl_config_request_body;
} fapi_nr_dl_config_request_t;
//
......@@ -282,12 +282,13 @@ typedef struct {
uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
uint8_t precoder_granularity;
uint8_t tci_state_pdcch;
uint8_t tci_present_in_dci;
uint16_t pdcch_dmrs_scrambling_id;
} nfapi_nr_coreset_t;
} fapi_nr_coreset_t;
typedef struct {
nfapi_nr_coreset_t coreset;
fapi_nr_coreset_t coreset;
uint8_t monitoring_slot_peridicity;
uint8_t monitoring_slot_offset;
......@@ -299,26 +300,26 @@ typedef struct {
uint8_t dci_2_3_monitorying_periodicity;
uint8_t dci_2_3_number_of_candidates;
} nfapi_nr_search_space_t;
} fapi_nr_search_space_t;
typedef struct {
nfapi_nr_search_space_t search_space_sib1;
nfapi_nr_search_space_t search_space_others_sib;
nfapi_nr_search_space_t search_space_paging;
nfapi_nr_coreset_t coreset_ra; // common coreset
nfapi_nr_search_space_t search_space_ra;
} nfapi_nr_pdcch_config_common_t;
fapi_nr_search_space_t search_space_sib1;
fapi_nr_search_space_t search_space_others_sib;
fapi_nr_search_space_t search_space_paging;
fapi_nr_coreset_t coreset_ra; // common coreset
fapi_nr_search_space_t search_space_ra;
} fapi_nr_pdcch_config_common_t;
typedef struct {
uint8_t k0;
uint8_t mapping_type;
uint8_t symbol_starting;
uint8_t symbol_length;
} nfapi_nr_pdsch_time_domain_resource_allocation_t;
} fapi_nr_pdsch_time_domain_resource_allocation_t;
typedef struct {
nfapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[NFAPI_NR_MAX_NUM_DL_ALLOCATIONS];
} nfapi_nr_pdsch_config_common_t;
fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
} fapi_nr_pdsch_config_common_t;
typedef struct {
uint8_t prach_configuration_index;
......@@ -345,28 +346,28 @@ typedef struct {
uint8_t msg1_subcarrier_spacing;
uint8_t restrictedset_config;
uint8_t msg3_transform_precoding;
} nfapi_nr_rach_config_common_t;
} fapi_nr_rach_config_common_t;
typedef struct {
uint8_t k2;
uint8_t mapping_type;
uint8_t symbol_starting;
uint8_t symbol_length;
} nfapi_nr_pusch_time_domain_resource_allocation_t;
} fapi_nr_pusch_time_domain_resource_allocation_t;
typedef struct {
uint8_t group_hopping_enabled_transform_precoding;
nfapi_nr_pusch_time_domain_resource_allocation_t allocation_list[NFAPI_NR_MAX_NUM_UL_ALLOCATIONS];
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
uint8_t msg3_delta_preamble;
uint8_t p0_nominal_with_grant;
} nfapi_nr_pusch_config_common_t;
} fapi_nr_pusch_config_common_t;
typedef struct {
uint8_t pucch_resource_common;
uint8_t pucch_group_hopping;
uint8_t hopping_id;
uint8_t p0_nominal;
} nfapi_nr_pucch_config_common_t;
} fapi_nr_pucch_config_common_t;
typedef struct {
uint8_t subcarrier_spacing_common;
......@@ -375,15 +376,15 @@ typedef struct {
uint8_t pdcch_config_sib1;
uint8_t cell_barred;
uint8_t intra_frquency_reselection;
} nfapi_nr_pbch_config_t;
} fapi_nr_pbch_config_t;
typedef struct {
nfapi_nr_tl_t tl;
fapi_nr_tl_t tl;
nfapi_nr_pdcch_config_common_t pdcch_config_common;
nfapi_nr_pdsch_config_common_t pdsch_config_common;
fapi_nr_pdcch_config_common_t pdcch_config_common;
fapi_nr_pdsch_config_common_t pdsch_config_common;
} nfapi_nr_dl_bwp_common_config_t;
} fapi_nr_dl_bwp_common_config_t;
......@@ -391,44 +392,44 @@ typedef struct {
uint16_t int_rnti;
uint8_t time_frequency_set;
uint8_t dci_payload_size;
uint8_t serving_cell_id[NFAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
uint8_t position_in_dci[NFAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
} nfapi_nr_downlink_preemption_t;
uint8_t serving_cell_id[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
uint8_t position_in_dci[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
} fapi_nr_downlink_preemption_t;
typedef struct {
uint8_t tpc_index;
uint8_t tpc_index_sul;
uint8_t target_cell;
} nfapi_nr_pusch_tpc_command_config_t;
} fapi_nr_pusch_tpc_command_config_t;
typedef struct {
uint8_t tpc_index_pcell;
uint8_t tpc_index_pucch_scell;
} nfapi_nr_pucch_tpc_command_config_t;
} fapi_nr_pucch_tpc_command_config_t;
typedef struct {
uint8_t starting_bit_of_format_2_3;
uint8_t feild_type_format_2_3;
} nfapi_nr_srs_tpc_command_config_t;
} fapi_nr_srs_tpc_command_config_t;
typedef struct {
nfapi_nr_downlink_preemption_t downlink_preemption;
nfapi_nr_pusch_tpc_command_config_t tpc_pusch;
nfapi_nr_pucch_tpc_command_config_t tpc_pucch;
nfapi_nr_srs_tpc_command_config_t tpc_srs;
} nfapi_nr_pdcch_config_dedicated_t;
fapi_nr_downlink_preemption_t downlink_preemption;
fapi_nr_pusch_tpc_command_config_t tpc_pusch;
fapi_nr_pucch_tpc_command_config_t tpc_pucch;
fapi_nr_srs_tpc_command_config_t tpc_srs;
} fapi_nr_pdcch_config_dedicated_t;
typedef struct {
uint8_t dmrs_type;
uint8_t dmrs_addition_position;
uint8_t max_length;
uint16_t scrambling_id_0;
uint16_t scrambling_id_1;
uint16_t scrambling_id0;
uint16_t scrambling_id1;
uint8_t ptrs_frequency_density[2]; // phase tracking rs
uint8_t ptrs_time_density[3]; // phase tracking rs
uint8_t ptrs_epre_ratio; // phase tracking rs
uint8_t ptrs_resource_element_offset; // phase tracking rs
} nfapi_nr_dmrs_downlink_config_t;
} fapi_nr_dmrs_downlink_config_t;
typedef struct {
uint8_t bwp_or_cell_level;
......@@ -439,11 +440,11 @@ typedef struct {
uint8_t periodic; // bitmaps type
uint32_t pattern[2]; // bitmaps type 2/4/5/8/10/20/40 bits
nfapi_nr_coreset_t coreset; // coreset
fapi_nr_coreset_t coreset; // coreset
uint8_t subcarrier_spacing;
uint8_t mode;
} nfapi_nr_rate_matching_pattern_group_t;
} fapi_nr_rate_matching_pattern_group_t;
typedef struct {
// resource mapping
......@@ -462,26 +463,26 @@ typedef struct {
// periodicityAndOffset
uint8_t periodicity; // slot4/5/8/10/16/20/32/40/64/80/160/320/640
uint32_t offset; // 0..639 bits
} nfapi_nr_zp_csi_rs_resource_t;
} fapi_nr_zp_csi_rs_resource_t;
typedef struct {
uint16_t data_scrambling_id_pdsch;
nfapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a;
nfapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b;
fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a;
fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b;
uint8_t vrb_to_prb_interleaver;
uint8_t resource_allocation;
nfapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[NFAPI_NR_MAX_NUM_DL_ALLOCATIONS];
fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
uint8_t pdsch_aggregation_factor;
nfapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1;
nfapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2;
fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1;
fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2;
uint8_t rbg_size;
uint8_t mcs_table;
uint8_t max_num_of_code_word_scheduled_by_dci;
uint8_t bundle_size; // prb_bundling static
uint8_t bundle_size_set1; // prb_bundling dynamic
uint8_t bundle_size_set2; // prb_bundling dynamic
nfapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[NFAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET];
} nfapi_nr_pdsch_config_dedicated_t;
fapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET];
} fapi_nr_pdsch_config_dedicated_t;
typedef struct {
uint16_t starting_prb;
......@@ -495,33 +496,33 @@ typedef struct {
uint8_t number_of_prbs;
uint8_t occ_length;
uint8_t occ_index;
} nfapi_nr_pucch_resource_t;
} fapi_nr_pucch_resource_t;
typedef struct {
uint8_t periodicity;
uint8_t number_of_harq_process;
nfapi_nr_pucch_resource_t n1_pucch_an;
} nfapi_nr_sps_config_t;
fapi_nr_pucch_resource_t n1_pucch_an;
} fapi_nr_sps_config_t;
typedef struct {
uint8_t beam_failure_instance_max_count;
uint8_t beam_failure_detection_timer;
} nfapi_nr_radio_link_monitoring_config_t;
} fapi_nr_radio_link_monitoring_config_t;
typedef struct {
nfapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated;
nfapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
nfapi_nr_sps_config_t sps_config;
nfapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
fapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated;
fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
fapi_nr_sps_config_t sps_config;
fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
} nfapi_nr_dl_bwp_dedicated_config_t;
} fapi_nr_dl_bwp_dedicated_config_t;
typedef struct {
nfapi_nr_rach_config_common_t rach_config_common;
nfapi_nr_pusch_config_common_t pusch_config_common;
nfapi_nr_pucch_config_common_t pucch_config_common;
fapi_nr_rach_config_common_t rach_config_common;
fapi_nr_pusch_config_common_t pusch_config_common;
fapi_nr_pucch_config_common_t pucch_config_common;
} nfapi_nr_ul_bwp_common_config_t;
} fapi_nr_ul_bwp_common_config_t;
typedef struct {
uint8_t inter_slot_frequency_hopping;
......@@ -530,14 +531,14 @@ typedef struct {
uint8_t number_of_slots;
uint8_t pi2bpsk;
uint8_t simultaneous_harq_ack_csi;
} nfapi_nr_pucch_format_config_t;
} fapi_nr_pucch_format_config_t;
typedef struct {
nfapi_nr_pucch_format_config_t format1;
nfapi_nr_pucch_format_config_t format2;
nfapi_nr_pucch_format_config_t format3;
nfapi_nr_pucch_format_config_t format4;
nfapi_nr_pucch_resource_t multi_csi_pucch_resources[2];
fapi_nr_pucch_format_config_t format1;
fapi_nr_pucch_format_config_t format2;
fapi_nr_pucch_format_config_t format3;
fapi_nr_pucch_format_config_t format4;
fapi_nr_pucch_resource_t multi_csi_pucch_resources[2];
uint8_t dl_data_to_ul_ack[8];
// pucch power control
uint8_t deltaF_pucch_f0;
......@@ -546,20 +547,187 @@ typedef struct {
uint8_t deltaF_pucch_f3;
uint8_t deltaF_pucch_f4;
uint8_t two_pucch_pc_adjusment_states;
} nfapi_nr_ul_bwp_dedicated_config_t;
} fapi_nr_pucch_config_dedicated_t;
typedef struct {
uint8_t dmrs_type;
uint8_t dmrs_addition_position;
uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
uint16_t ptrs_frequency_density[2];
uint8_t ptrs_time_density[3];
uint8_t ptrs_max_number_of_ports;
uint8_t ptrs_resource_element_offset;
uint8_t ptrs_power;
uint16_t ptrs_sample_density[5];
uint8_t ptrs_time_density_transform_precoding;
uint8_t max_length;
uint16_t scrambling_id0;
uint16_t scrambling_id1;
uint8_t npusch_identity;
uint8_t disable_sequence_group_hopping;
uint8_t sequence_hopping_enable;
} fapi_nr_dmrs_uplink_config_t;
typedef struct {
uint8_t tpc_accmulation;
uint8_t msg3_alpha;
uint8_t p0_nominal_with_grant;
uint8_t two_pusch_pc_adjustments_states;
uint8_t delta_mcs;
} fapi_nr_pusch_power_control_t;
typedef struct {
uint16_t data_scrambling_identity;
uint8_t tx_config;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
fapi_nr_pusch_power_control_t pusch_power_control;
uint8_t frequency_hopping;
uint16_t frequency_hopping_offset_lists[4];
uint8_t resource_allocation;
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
uint8_t pusch_aggregation_factor;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
uint8_t transform_precoder;
uint8_t codebook_subset;
uint8_t max_rank;
uint8_t rbg_size;
//uci-OnPUSCH
uint8_t uci_on_pusch_type; //dynamic, semi-static
uint8_t beta_offset_ack_index1[4];
uint8_t beta_offset_ack_index2[4];
uint8_t beta_offset_ack_index3[4];
uint8_t beta_offset_csi_part1_index1[4];
uint8_t beta_offset_csi_part1_index2[4];
uint8_t beta_offset_csi_part2_index1[4];
uint8_t beta_offset_csi_part2_index2[4];
uint8_t tp_pi2BPSK;
} fapi_nr_pusch_config_dedicated_t;
typedef struct {
uint8_t frequency_hopping;
fapi_nr_dmrs_uplink_config_t cg_dmrs_configuration;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
//uci-OnPUSCH
uint8_t uci_on_pusch_type; //dynamic, semi-static
uint8_t beta_offset_ack_index1[4];
uint8_t beta_offset_ack_index2[4];
uint8_t beta_offset_ack_index3[4];
uint8_t beta_offset_csi_part1_index1[4];
uint8_t beta_offset_csi_part1_index2[4];
uint8_t beta_offset_csi_part2_index1[4];
uint8_t beta_offset_csi_part2_index2[4];
uint8_t resource_allocation;
// rgb-Size structure missing in spec.
uint8_t power_control_loop_to_use;
// p0-PUSCH-Alpha
uint8_t p0;
uint8_t alpha;
uint8_t transform_precoder;
uint8_t number_of_harq_process;
uint8_t rep_k;
uint8_t rep_k_rv;
uint8_t periodicity;
uint8_t configured_grant_timer;
// rrc-ConfiguredUplinkGrant
uint16_t time_domain_offset;
uint8_t time_domain_allocation;
uint32_t frequency_domain_allocation;
uint8_t antenna_ports;
uint8_t dmrs_seq_initialization;
uint8_t precoding_and_number_of_layers;
uint8_t srs_resource_indicator;
uint8_t mcs_and_tbs;
uint8_t frequency_hopping_offset;
uint8_t path_loss_reference_index;
} fapi_nr_configured_grant_config_t;
typedef struct {
uint8_t qcl_type1_serving_cell_index;
uint8_t qcl_type1_bwp_id;
uint8_t qcl_type1_rs_type; // csi-rs or ssb
uint8_t qcl_type1_nzp_csi_rs_resource_id;
uint8_t qcl_type1_ssb_index;
uint8_t qcl_type1_type;
uint8_t qcl_type2_serving_cell_index;
uint8_t qcl_type2_bwp_id;
uint8_t qcl_type2_rs_type; // csi-rs or ssb
uint8_t qcl_type2_nzp_csi_rs_resource_id;
uint8_t qcl_type2_ssb_index;
uint8_t qcl_type2_type;
} fapi_nr_tci_state_t;
typedef struct {
uint8_t root_sequence_index;
// rach genertic
uint8_t prach_configuration_index;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t preamble_received_target_power;
uint8_t preamble_transmission_max;
uint8_t power_ramping_step;
uint8_t ra_window_size;
uint8_t rsrp_threshold_ssb;
// PRACH-ResourceDedicatedBFR
uint8_t bfr_ssb_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_ssb_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
// NZP-CSI-RS-Resource
uint8_t bfr_csi_rs_nzp_resource_mapping[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_power_control_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_power_control_offset_ss[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint16_t bfr_csi_rs_scrambling_id[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_resource_periodicity[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint16_t bfr_csi_rs_resource_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
fapi_nr_tci_state_t qcl_infomation_periodic_csi_rs[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csirs_ra_occasions[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csirs_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS][FAPI_NR_MAX_RA_OCCASION_PER_CSIRS];
uint8_t ssb_per_rach_occasion;
uint8_t ra_ssb_occasion_mask_index;
fapi_nr_search_space_t recovery_search_space;
// RA-Prioritization
uint8_t power_ramping_step_high_priority;
uint8_t scaling_factor_bi;
uint8_t beam_failure_recovery_timer;
} fapi_nr_beam_failure_recovery_config_t;
typedef struct {
fapi_nr_pucch_config_dedicated_t pucch_config_dedicated;
fapi_nr_pusch_config_dedicated_t pusch_config_dedicated;
fapi_nr_configured_grant_config_t configured_grant_config;
// SRS-Config
uint8_t srs_tpc_accumulation;
fapi_nr_beam_failure_recovery_config_t beam_failure_recovery_config;
} fapi_nr_ul_bwp_dedicated_config_t;
typedef struct {
nfapi_nr_p4_p5_message_header_t header;
fapi_nr_p4_p5_message_header_t header;
uint8_t num_tlv;
nfapi_nr_pbch_config_t pbch_config_common; // MIB
fapi_nr_pbch_config_t pbch_config_common; // MIB
nfapi_nr_dl_bwp_common_config_t dl_bwp_common;
nfapi_nr_dl_bwp_dedicated_config_t dl_bwp_dedicated;
fapi_nr_dl_bwp_common_config_t dl_bwp_common;
fapi_nr_dl_bwp_dedicated_config_t dl_bwp_dedicated;
nfapi_nr_ul_bwp_common_config_t ul_bwp_common;
nfapi_nr_ul_bwp_dedicated_config_t ul_bwp_dedicated;
fapi_nr_ul_bwp_common_config_t ul_bwp_common;
fapi_nr_ul_bwp_dedicated_config_t ul_bwp_dedicated;
} nfapi_nr_config_request_t;
} fapi_nr_config_request_t;
#endif /* _NFAPI_INTERFACE_H_ */
#endif /* _FAPI_INTERFACE_H_ */
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @ f16d6127
......@@ -2142,6 +2142,14 @@ short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
mmtmpPD1 = _mm_shufflelo_epi16(dl_ch128[0], _MM_SHUFFLE(2,3,0,1));
mmtmpPD1 = _mm_shufflehi_epi16(mmtmpPD1, _MM_SHUFFLE(2,3,0,1));
mmtmpPD1 = _mm_sign_epi16(mmtmpPD1, *(__m128i * )&conjugate[0]);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_channel_compensation)-> conjugate\t ### \t");
for (int conjugate_index=0 ; conjugate_index< 8 ; conjugate_index++)
printf("conjugate[%d]=%d",conjugate_index,conjugate[conjugate_index]);
printf("\n");
#endif
// print_ints("im",&mmtmpPD1);
mmtmpPD1 = _mm_madd_epi16(mmtmpPD1, rxdataF128[0]); // mmtmpPD1 contains imag part of 4 consecutive outputs (32-bit)
mmtmpPD0 = _mm_srai_epi32(mmtmpPD0, output_shift);
......@@ -3940,37 +3948,26 @@ int get_nCCE_offset_l1(int *CCE_table,
#ifdef NR_PDCCH_DCI_RUN
void nr_dci_decoding_procedure0(int s,
int p,
NR_UE_PDCCH **pdcch_vars,
int do_common,
//dci_detect_mode_t mode,
uint8_t nr_tti_rx,
NR_DCI_ALLOC_t *dci_alloc,
// uint8_t nr_tti_rx, NR_DCI_ALLOC_t *dci_alloc,
int16_t eNB_id,
uint8_t current_thread_id,
NR_DL_FRAME_PARMS *frame_parms,
void nr_dci_decoding_procedure0(int s, //x
int p, //x
NR_UE_PDCCH **pdcch_vars, //x
int do_common, //x
//dci_detect_mode_t mode, //not sure if necessary
uint8_t nr_tti_rx, //x
NR_DCI_ALLOC_t *dci_alloc, //x
int16_t eNB_id, //x
uint8_t current_thread_id, //x
NR_DL_FRAME_PARMS *frame_parms, //x
uint8_t mi,
uint16_t si_rnti,
uint16_t ra_rnti,
uint16_t p_rnti,
uint16_t tc_rnti,
uint16_t int_rnti,
uint16_t sfi_rnti,
uint16_t tpc_pusch_rnti,
uint16_t tpc_pucch_rnti,
uint16_t tpc_srs_rnti,
uint16_t crc_scrambled_values[13], //x
uint8_t L,
uint8_t format_si,
uint8_t format_p,
uint8_t format_ra,
uint8_t format_c,
NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t format_css,
NR_UE_SEARCHSPACE_USS_DCI_FORMAT_t format_uss,
uint8_t sizeof_bits,
uint8_t sizeof_bytes,
uint8_t *dci_cnt,
uint8_t *format0_found,
uint8_t *format_c_found,
crc_scrambled_t *crc_scrambled,
format_found_t *format_found,
uint32_t *CCEmap0,
uint32_t *CCEmap1,
uint32_t *CCEmap2) {
......@@ -3991,15 +3988,15 @@ void nr_dci_decoding_procedure0(int s,
int coreset_nbr_cce_per_symbol=0;
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> \n");
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> format_found is %d \n", *format_found);
#endif
// if (mode == NO_DCI) {
// #ifdef NR_PDCCH_DCI_DEBUG
// printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> skip DCI decoding: expect no DCIs at nr_tti_rx %d in current searchSpace\n", nr_tti_rx);
// #endif
// return;
// }
//if (mode == NO_DCI) {
// #ifdef NR_PDCCH_DCI_DEBUG
// printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> skip DCI decoding: expect no DCIs at nr_tti_rx %d in current searchSpace\n", nr_tti_rx);
// #endif
// return;
//}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> frequencyDomainResources=%llx, duration=%d\n",
......@@ -4093,7 +4090,7 @@ void nr_dci_decoding_procedure0(int s,
// compute Yk
Yk = (unsigned int) pdcch_vars[eNB_id]->crnti;
for (i = 0; i <= nr_tti_rx; i++)
Yk = (Yk * A[p]) % 65537;
Yk = (Yk * A[p%3]) % 65537;
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> L2(%d) | nCCE[%d](%d) | Yk(%d) | nb_candidates(%d)\n",L2,p,nCCE[p],Yk,nb_candidates);
......@@ -4105,7 +4102,7 @@ void nr_dci_decoding_procedure0(int s,
// nb_candidates = nCCE[p] / L2;
// In the next code line there is maybe a bug. The spec is not comparing Table 10.1-2 with nb_candidates, but with total number of candidates for all s and all p
int m_p_s_L_max = (m_max_slot_pdcch_Table10_1_2[L]<=nb_candidates ? m_max_slot_pdcch_Table10_1_2[L] : nb_candidates);
int m_p_s_L_max = (m_max_slot_pdcch_Table10_1_2[1]<=nb_candidates ? m_max_slot_pdcch_Table10_1_2[1] : nb_candidates);
if (L==4) m_p_s_L_max=1; // Table 10.1-2 is not defined for L=4
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> m_max_slot_pdcch_Table10_1_2(%d)=%d\n",L,m_max_slot_pdcch_Table10_1_2[L]);
......@@ -4183,18 +4180,74 @@ void nr_dci_decoding_procedure0(int s,
*/
crc = (crc16(&dci_decoded_output[current_thread_id][0], sizeof_bits) >> 16) ^ extract_crc(&dci_decoded_output[current_thread_id][0], sizeof_bits);
#ifdef NR_PDCCH_DCI_DEBUG
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we end function dci_decoding() with crc=%d\n",crc);
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we end function dci_decoding() with crc=%x\n",crc);
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we have to replace this part of the code by polar decoding\n");
#endif
#ifdef DEBUG_DCI_DECODING
printf("crc =>%x\n",crc);
#endif //uint16_t tc_rnti, uint16_t int_rnti, uint16_t sfi_rnti, uint16_t tpc_pusch_rnti, uint16_t tpc_pucch_rnti, uint16_t tpc_srs__rnti
#ifdef NR_PDCCH_DCI_DEBUG
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> format_found=%d\n",*format_found);
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> crc_scrambled=%d\n",*crc_scrambled);
#endif
if ((crc == si_rnti) || (crc == p_rnti) || (crc == ra_rnti) || (crc == tc_rnti)
|| (crc == int_rnti) || (crc == sfi_rnti) || (crc == tpc_pusch_rnti) || (crc == tpc_pucch_rnti) || (crc == tpc_srs_rnti)
|| (crc == pdcch_vars[eNB_id]->crnti)) {
/* if (((L > 1) && ((crc == si_rnti) || (crc == p_rnti) || (crc == ra_rnti)))
|| (crc == pdcch_vars[eNB_id]->crnti)) {*/
if (crc == crc_scrambled_values[_C_RNTI_]) {
*crc_scrambled =_c_rnti;
*format_found=1;
}
if (crc == crc_scrambled_values[_CS_RNTI_]) {
*crc_scrambled =_cs_rnti;
*format_found=1;
}
if (crc == crc_scrambled_values[_NEW_RNTI_]) {
*crc_scrambled =_new_rnti;
*format_found=1;
}
if (crc == crc_scrambled_values[_TC_RNTI_]) {
*crc_scrambled =_tc_rnti;
*format_found=_format_1_0_found;
}
if (crc == crc_scrambled_values[_P_RNTI_]) {
*crc_scrambled =_p_rnti;
*format_found=_format_1_0_found;
}
if (crc == crc_scrambled_values[_SI_RNTI_]) {
*crc_scrambled =_si_rnti;
*format_found=_format_1_0_found;
}
if (crc == crc_scrambled_values[_RA_RNTI_]) {
*crc_scrambled =_ra_rnti;
*format_found=_format_1_0_found;
}
if (crc == crc_scrambled_values[_SP_CSI_RNTI_]) {
*crc_scrambled =_sp_csi_rnti;
*format_found=_format_0_1_found;
}
if (crc == crc_scrambled_values[_SFI_RNTI_]) {
*crc_scrambled =_sfi_rnti;
*format_found=_format_2_0_found;
}
if (crc == crc_scrambled_values[_INT_RNTI_]) {
*crc_scrambled =_int_rnti;
*format_found=_format_2_1_found;
}
if (crc == crc_scrambled_values[_TPC_PUSCH_RNTI_]) {
*crc_scrambled =_tpc_pusch_rnti;
*format_found=_format_2_2_found;
}
if (crc == crc_scrambled_values[_TPC_PUCCH_RNTI_]) {
*crc_scrambled =_tpc_pucch_rnti;
*format_found=_format_2_2_found;
}
if (crc == crc_scrambled_values[_TPC_SRS_RNTI_]) {
*crc_scrambled =_tpc_srs_rnti;
*format_found=_format_2_3_found;
}
#ifdef NR_PDCCH_DCI_DEBUG
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> format_found=%d %d %d\n",*format_found, format_found, &format_found);
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> crc_scrambled=%d\n",*crc_scrambled);
#endif
if (*format_found!=255) {
#ifdef NR_PDCCH_DCI_DEBUG
printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> rnti matches -> DCI FOUND !!! crc =>%x, sizeof_bits %d, sizeof_bytes %d \n",crc, sizeof_bits, sizeof_bytes);
#endif
......@@ -4220,7 +4273,9 @@ void nr_dci_decoding_procedure0(int s,
dci_alloc[*dci_cnt].dci_pdu[4] = dci_decoded_output[current_thread_id][3];
dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][4];
dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][5];
dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][7];
dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][6];
dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][7];
// MAX_DCI_SIZE_BITS has to be redefined for dci_decoded_output FIXME
// format2_0, format2_1 can be longer than 8 bytes. FIXME
#ifdef DEBUG_DCI_DECODING
printf("DCI => %x,%x,%x,%x,%x,%x,%x,%x\n",
......@@ -4228,37 +4283,45 @@ void nr_dci_decoding_procedure0(int s,
dci_decoded_output[current_thread_id][4],dci_decoded_output[current_thread_id][5],dci_decoded_output[current_thread_id][6],dci_decoded_output[current_thread_id][7]);
#endif
}
if (crc == si_rnti) {
if ((format_css == cformat0_0_and_1_0) || (format_uss == uformat0_0_and_1_0)){
if ((crc_scrambled == _p_rnti) || (crc_scrambled == _si_rnti) || (crc_scrambled == _ra_rnti)){
dci_alloc[*dci_cnt].format = format1_0;
*dci_cnt = *dci_cnt + 1;
} else if (crc == p_rnti) {
dci_alloc[*dci_cnt].format = format1_0;
format_found=_format_1_0_found;
} else {
if ((dci_decoded_output[current_thread_id][7]>>(sizeof_bits-1))&1 == 0){
dci_alloc[*dci_cnt].format = format0_0;
*dci_cnt = *dci_cnt + 1;
} else if (crc == ra_rnti) {
format_found=_format_0_0_found;
}
if ((dci_decoded_output[current_thread_id][7]>>(sizeof_bits-1))&1 == 1){
dci_alloc[*dci_cnt].format = format1_0;
*dci_cnt = *dci_cnt + 1;
} else if (crc == tc_rnti) {
dci_alloc[*dci_cnt].format = cformat0_0_and_1_0; // this tc-rnti scrambled crc can contain formats 0_0 or 0_1. FIXME
*dci_cnt = *dci_cnt + 1;
} else if (crc == int_rnti) {
dci_alloc[*dci_cnt].format = format2_1;
*dci_cnt = *dci_cnt + 1;
} else if (crc == sfi_rnti) {
format_found=_format_1_0_found;
}
}
}
if (format_css == cformat2_0){
dci_alloc[*dci_cnt].format = format2_0;
*dci_cnt = *dci_cnt + 1;
} else if (crc == tpc_pusch_rnti) {
dci_alloc[*dci_cnt].format = format2_2;
}
if (format_css == cformat2_1){
dci_alloc[*dci_cnt].format = format2_1;
*dci_cnt = *dci_cnt + 1;
} else if (crc == tpc_pucch_rnti) {
}
if (format_css == cformat2_2){
dci_alloc[*dci_cnt].format = format2_2;
*dci_cnt = *dci_cnt + 1;
} else if (crc == tpc_srs_rnti) {
}
if (format_css == cformat2_3){
dci_alloc[*dci_cnt].format = format2_3;
*dci_cnt = *dci_cnt + 1;
} else if (crc == pdcch_vars[eNB_id]->crnti) {
dci_alloc[*dci_cnt].format = uformat0_0_and_1_0; // or uformat0_1_and_1_1. FIXME
*dci_cnt = *dci_cnt + 1;
}
if (format_uss == uformat0_1_and_1_1){
// Not implemented yet FIXME
}
// store first nCCE of group for PUCCH transmission of ACK/NAK
pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
/* if (crc == si_rnti) {
dci_alloc[*dci_cnt].format = format_si;
*dci_cnt = *dci_cnt + 1;
......@@ -4345,6 +4408,7 @@ void nr_dci_decoding_procedure0(int s,
/*void dci_decoding_procedure0(NR_UE_PDCCH **pdcch_vars,
int do_common,
dci_detect_mode_t mode,
......@@ -4793,137 +4857,173 @@ uint16_t dci_CRNTI_decoding_procedure(PHY_VARS_NR_UE *ue,
*/
#ifdef NR_PDCCH_DCI_RUN
uint16_t nr_dci_format_size (NR_DCI_format_t format,
uint16_t nr_dci_format_size (crc_scrambled_t crc_scrambled,
uint8_t pusch_alloc_list,
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS]){
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS]){
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size)-> \n");
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size)-> crc_scrambled=%d, pusch_alloc_list=%d, n_RB_ULBWP=%d, n_RB_DLBWP=%d\n",crc_scrambled,pusch_alloc_list,n_RB_ULBWP,n_RB_DLBWP);
#endif
/*
* Formats 0_1, not completely implemented. See (*)
*/
// format {0_0,0_1,1_0,1_1,2_0,2_1,2_2,2_3} according to 38.212 Section 7.3.1
/*#define NBR_NR_FORMATS 8
#define NBR_NR_DCI FIELDS 48
#define CARRIER_IND 0
#define SUL_IND_0_1 1
#define IDENTIFIER_DCI_FORMATS 2
/*
#define NBR_NR_FORMATS 8
#define NBR_NR_DCI_FIELDS 56
#define IDENTIFIER_DCI_FORMATS 0
#define CARRIER_IND 1
#define SUL_IND_0_1 2
#define SLOT_FORMAT_IND 3
#define PRE_EMPTION_IND 4
#define TPC_CMD_NUMBER 5
#define BLOCK_NUMBER 6
#define BANDWIDTH_PART_IND 7
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 8
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 9
#define TIME_DOM_RESOURCE_ASSIGNMENT 10
#define VRB_TO_PRB_MAPPING 11
#define PRB_BUNDLING_SIZE_IND 12
#define RATE_MATCHING_IND 13
#define ZP_CSI_RS_TRIGGER 14
#define FREQ_HOPPING_FLAG 15
#define TB1_MCS 16
#define TB1_NDI 17
#define TB1_RV 18
#define TB2_MCS 19
#define TB2_NDI 20
#define TB2_RV 21
#define MCS 22
#define NDI 23
#define RV 24
#define HARQ_PROCESS_NUMBER 25
#define DAI 26
#define FIRST_DAI 27
#define SECOND_DAI 28
#define TPC_PUSCH 29
#define TPC_PUCCH 30
#define PUCCH_RESOURCE_IND 31
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 32
#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 34
#define PRECOD_NBR_LAYERS 35
#define ANTENNA_PORTS 36
#define TCI 37
#define SRS_REQUEST 38
#define TPC_CMD_NUMBER_FORMAT2_3 39
#define CSI_REQUEST 40
#define CBGTI 41
#define CBGFI 42
#define PTRS_DMRS 43
#define BETA_OFFSET_IND 44
#define DMRS_SEQ_INI 45
#define SUL_IND_0_0 46
#define PADDING 47*/
#define SHORT_MESSAGE_IND 8
#define SHORT_MESSAGES 9
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 10
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 11
#define TIME_DOM_RESOURCE_ASSIGNMENT 12
#define VRB_TO_PRB_MAPPING 13
#define PRB_BUNDLING_SIZE_IND 14
#define RATE_MATCHING_IND 15
#define ZP_CSI_RS_TRIGGER 16
#define FREQ_HOPPING_FLAG 17
#define TB1_MCS 18
#define TB1_NDI 19
#define TB1_RV 20
#define TB2_MCS 21
#define TB2_NDI 22
#define TB2_RV 23
#define MCS 24
#define NDI 25
#define RV 26
#define HARQ_PROCESS_NUMBER 27
#define DAI_ 28
#define FIRST_DAI 29
#define SECOND_DAI 30
#define TB_SCALING 31
#define TPC_PUSCH 32
#define TPC_PUCCH 33
#define PUCCH_RESOURCE_IND 34
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35
//#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 36
#define PRECOD_NBR_LAYERS 37
#define ANTENNA_PORTS 38
#define TCI 39
#define SRS_REQUEST 40
#define TPC_CMD_NUMBER_FORMAT2_3 41
#define CSI_REQUEST 42
#define CBGTI 43
#define CBGFI 44
#define PTRS_DMRS 45
#define BETA_OFFSET_IND 46
#define DMRS_SEQ_INI 47
#define UL_SCH_IND 48
#define PADDING_NR_DCI 49
#define SUL_IND_0_0 50
#define RA_PREAMBLE_INDEX 51
#define SUL_IND_1_0 52
#define SS_PBCH_INDEX 53
#define PRACH_MASK_INDEX 54
#define RESERVED_NR_DCI 55
*/
//uint8_t pusch_alloc_list=1;
uint8_t n_zp = 1; // number of ZP CSI-RS resource sets in the higher layer parameter [ZP-CSI-RS-ResourceConfigList].
// number of ZP CSI-RS resource sets in the higher layer parameter [ZP-CSI-RS-ResourceConfigList]
uint8_t n_zp = 1;
uint8_t n_SRS=1;
// for PUSCH hopping with resource allocation type 1
// n_UL_hopping = 1 if the higher layer parameter frequencyHoppingOffsetLists contains two offset values
// n_UL_hopping = 2 if the higher layer parameter frequencyHoppingOffsetLists contains four offset values
uint8_t n_UL_hopping=0;
uint8_t dci_field_size_table [NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = { // This table contains the number of bits for each field (row) contained in each dci format (column).
// The values of the variables indicate field sizes in number of bits
//Format0_0 Format0_1 Format1_0 Format1_1 Formats2_0/1/2/3
{0, 3, 0, 3, 0,0,0,0}, // 0 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
{0, 0, 0, 0, 0,0,0,0}, // 1 SUL_IND_0_1:
{1, 1, 1, 1, 1,1,1,1}, // 2 IDENTIFIER_DCI_FORMATS:
{1, 1, (((crc_scrambled == _p_rnti) || (crc_scrambled == _si_rnti) || (crc_scrambled == _ra_rnti)) ? 0:1),
1, 0,0,0,0}, // 0 IDENTIFIER_DCI_FORMATS:
{0, 3, 0, 3, 0,0,0,0}, // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
{0, 0, 0, 0, 0,0,0,0}, // 2 SUL_IND_0_1:
{0, 0, 0, 0, 1,0,0,0}, // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
{0, 0, 0, 0, 0,1,0,0}, // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
{0, 0, 0, 0, 0,0,1,0}, // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
{0, 0, 0, 0, 0,0,0,1}, // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
{0, ceil(log2(n_RB_ULBWP)), 0, ceil(log2(n_RB_ULBWP)), 0,0,0,0}, // 7 BANDWIDTH_PART_IND:
{ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)),ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)),0, 0, 0,0,0,0}, // 8 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
{0, 0, ((crc_scrambled == _p_rnti) ? 2:0),
0, 0,0,0,0}, // 8 SHORT_MESSAGE_IND 2 bits if crc scrambled with P-RNTI
{0, 0, ((crc_scrambled == _p_rnti) ? 8:0),
0, 0,0,0,0}, // 9 SHORT_MESSAGES 8 bit8 if crc scrambled with P-RNTI
{(ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)))-n_UL_hopping,
(ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)))-n_UL_hopping,
0, 0, 0,0,0,0}, // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
{0, 0, ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)),ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)),0,0,0,0}, // 9 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
{log2(pusch_alloc_list), log2(pusch_alloc_list), log2(pusch_alloc_list), log2(pusch_alloc_list), 0,0,0,0}, // 10 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
{0, 0, ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)),
ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)),
0,0,0,0}, // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
{4, log2(pusch_alloc_list), 4, log2(pusch_alloc_list), 0,0,0,0}, // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
{0, 1, 1, 1, 0,0,0,0}, // 11 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
{0, 0, 0, 1, 0,0,0,0}, // 12 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
{0, 0, 0, 2, 0,0,0,0}, // 13 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
{0, 0, 0, log2(n_zp)+1, 0,0,0,0}, // 14 ZP_CSI_RS_TRIGGER:
{1, 1, 0, 0, 0,0,0,0}, // 15 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
{0, 0, 0, 5, 0,0,0,0}, // 16 TB1_MCS:
{0, 0, 0, 1, 0,0,0,0}, // 17 TB1_NDI:
{0, 0, 0, 2, 0,0,0,0}, // 18 TB1_RV:
{0, 0, 0, 5, 0,0,0,0}, // 19 TB2_MCS:
{0, 0, 0, 1, 0,0,0,0}, // 20 TB2_NDI:
{0, 0, 0, 2, 0,0,0,0}, // 21 TB2_RV:
{5, 5, 5, 0, 0,0,0,0}, // 22 MCS:
{1, 1, 1, 0, 0,0,0,0}, // 23 NDI:
{2, 2, 2, 0, 0,0,0,0}, // 24 RV:
{4, 4, 4, 4, 0,0,0,0}, // 25 HARQ_PROCESS_NUMBER:
{0, 0, 2, 4, 0,0,0,0}, // 26 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
{0, 1, 1, 1, 0,0,0,0}, // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
{0, 0, 0, 1, 0,0,0,0}, // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
{0, 0, 0, 2, 0,0,0,0}, // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
{0, 0, 0, log2(n_zp)+1, 0,0,0,0}, // 16 ZP_CSI_RS_TRIGGER:
{1, 1, 0, 0, 0,0,0,0}, // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
{0, 0, 0, 5, 0,0,0,0}, // 18 TB1_MCS:
{0, 0, 0, 1, 0,0,0,0}, // 19 TB1_NDI:
{0, 0, 0, 2, 0,0,0,0}, // 20 TB1_RV:
{0, 0, 0, 5, 0,0,0,0}, // 21 TB2_MCS:
{0, 0, 0, 1, 0,0,0,0}, // 22 TB2_NDI:
{0, 0, 0, 2, 0,0,0,0}, // 23 TB2_RV:
{5, 5, 5, 0, 0,0,0,0}, // 24 MCS:
{1, 1, (crc_scrambled == _c_rnti)?1:0,0, 0,0,0,0}, // 25 NDI:
{2, 2, (((crc_scrambled == _c_rnti) || (crc_scrambled == _si_rnti)) ? 2:0),
0, 0,0,0,0}, // 26 RV:
{4, 4, (crc_scrambled == _c_rnti)?4:0,4, 0,0,0,0}, // 27 HARQ_PROCESS_NUMBER:
{0, 0, (crc_scrambled == _c_rnti)?2:0,2, 0,0,0,0}, // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
{0, 2, 0, 0, 0,0,0,0}, // 27 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK // 2 bits for dynamic HARQ-ACK codebook with single HARQ-ACK codebook
{0, 2, 0, 0, 0,0,0,0}, // 28 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks // 0 bits otherwise
{2, 2, 0, 0, 0,0,0,0}, // 29 TPC_PUSCH:
{0, 0, 2, 2, 0,0,0,0}, // 30 TPC_PUCCH:
{0, 0, 3, 3, 0,0,0,0}, // 31 PUCCH_RESOURCE_IND:
{0, 0, 3, 3, 0,0,0,0}, // 32 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
{0, 0, 0, 0, 0,0,0,0}, // 33 SHORT_MESSAGE_IND: 1 bit if crc scrambled with P-RNTI
// not implemented at the moment
{0, log2(n_SRS), 0, 0, 0,0,0,0}, // 34 SRS_RESOURCE_IND:
{0, 0, 0, 0, 0,0,0,0}, // 35 PRECOD_NBR_LAYERS:
{0, 0, 0, 0, 0,0,0,0}, // 36 ANTENNA_PORTS:
{0, 0, 0, 3, 0,0,0,0}, // 37 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
{0, 3, 0, 0, 0,0,0,2}, // 38 SRS_REQUEST:
{0, 0, 0, 0, 0,0,0,2}, // 39 TPC_CMD_NUMBER_FORMAT2_3:
{0, 6, 0, 0, 0,0,0,0}, // 40 CSI_REQUEST:
{0, 8, 0, 8, 0,0,0,0}, // 41 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
{0, 0, 0, 1, 0,0,0,0}, // 42 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
{0, 2, 0, 0, 0,0,0,0}, // 43 PTRS_DMRS:
{0, 2, 0, 0, 0,0,0,0}, // 44 BETA_OFFSET_IND:
{0, 1, 0, 1, 0,0,0,0}, // 45 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
//is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
{0, 0, 0, 0, 0,0,0,0}, // 46 SUL_IND_0_0:
{0, 0, 0, 0, 0,0,0,0} // 47 PADDING: (Note 2) If DCI format 0_0 is monitored in common search space
{0, 2, 0, 0, 0,0,0,0}, // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK // 2 bits for dynamic HARQ-ACK codebook with single HARQ-ACK codebook
{0, 2, 0, 0, 0,0,0,0}, // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks // 0 bits otherwise
{0, 0, (((crc_scrambled == _p_rnti) || (crc_scrambled == _ra_rnti)) ? 2:0),
0, 0,0,0,0}, // 31 TB_SCALING
{2, 2, 0, 0, 0,0,0,0}, // 32 TPC_PUSCH:
{0, 0, (crc_scrambled == _c_rnti)?2:0,2, 0,0,0,0}, // 33 TPC_PUCCH:
{0, 0, (crc_scrambled == _c_rnti)?3:0,3, 0,0,0,0}, // 34 PUCCH_RESOURCE_IND:
{0, 0, (crc_scrambled == _c_rnti)?3:0,3, 0,0,0,0}, // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
{0, log2(n_SRS), 0, 0, 0,0,0,0}, // 36 SRS_RESOURCE_IND:
{0, 0, 0, 0, 0,0,0,0}, // 37 PRECOD_NBR_LAYERS:
{0, 0, 0, 0, 0,0,0,0}, // 38 ANTENNA_PORTS:
{0, 0, 0, 3, 0,0,0,0}, // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
{0, 3, 0, 0, 0,0,0,2}, // 40 SRS_REQUEST:
{0, 0, 0, 0, 0,0,0,2}, // 41 TPC_CMD_NUMBER_FORMAT2_3:
{0, 6, 0, 0, 0,0,0,0}, // 42 CSI_REQUEST:
{0, 8, 0, 8, 0,0,0,0}, // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
{0, 0, 0, 1, 0,0,0,0}, // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
{0, 2, 0, 0, 0,0,0,0}, // 45 PTRS_DMRS:
{0, 2, 0, 0, 0,0,0,0}, // 46 BETA_OFFSET_IND:
{0, 1, 0, 1, 0,0,0,0}, // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
{0, 1, 0, 0, 0,0,0,0}, // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
{0, 0, 0, 0, 0,0,0,0}, // 49 PADDING_NR_DCI:
// (NOTE 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
{0, 0, 0, 0, 0,0,0,0}, // 50 SUL_IND_0_0:
{0, 0, 0, 0, 0,0,0,0}, // 51 RA_PREAMBLE_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
{0, 0, 0, 0, 0,0,0,0}, // 52 SUL_IND_1_0 (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
{0, 0, 0, 0, 0,0,0,0}, // 53 SS_PBCH_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
{0, 0, 0, 0, 0,0,0,0}, // 54 PRACH_MASK_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
{0, 0, ((crc_scrambled == _p_rnti)?6:(((crc_scrambled == _si_rnti) || (crc_scrambled == _ra_rnti))?16:0)),
0, 0,0,0,0} // 55 RESERVED_NR_DCI
};
// NOTE 1: adjustments in freq_dom_resource_assignment_UL to be done if necessary
......@@ -4932,60 +5032,76 @@ uint16_t nr_dci_format_size (NR_DCI_format_t format,
uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
for (int i=0 ; i<NBR_NR_FORMATS ; i++) {
//#ifdef NR_PDCCH_DCI_DEBUG
// printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size)-> i=%d, j=%d\n", i, j);
//#endif
for (int j=0; j<NBR_NR_DCI_FIELDS; j++) {
#ifdef NR_PDCCH_DCI_DEBUG
//printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size)-> i=%d, j=%d\n", i, j);
#endif
dci_size [i] = dci_size [i] + dci_field_size_table[j][i]; // dci_size[i] contains the size in bits of the dci pdu format i
if (i==(int)format) { // (int)format indicates the position of each format in the table (e.g. format1_0=2 -> position in table is 2)
dci_fields_sizes[j] = dci_field_size_table[j][i]; // dci_fields_sizes[j] contains the sizes of each field (j) for a determined format i
}
//if (i==(int)format-15) { // (int)format-15 indicates the position of each format in the table (e.g. format1_0=17 -> position in table is 2)
dci_fields_sizes[j][i] = dci_field_size_table[j][i]; // dci_fields_sizes[j] contains the sizes of each field (j) for a determined format i
//}
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_size[%d]=%d for n_RB_ULBWP=%d\n",
i,dci_size[i],n_RB_ULBWP);
#endif
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_field_size_table[%d] = { ",format);
for (int j=0; j<NBR_NR_DCI_FIELDS; j++) printf("%d, ",dci_field_size_table[j][(int)format-15]);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_fields_sizes[][] = { \n");
for (int j=0; j<NBR_NR_DCI_FIELDS; j++){
printf("\t\t");
for (int i=0; i<NBR_NR_FORMATS ; i++) printf("%d\t",dci_fields_sizes[j][i]);
printf("\n");
}
printf(" }\n");
#endif
printf("\n\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_size[0]=%d, dci_size[2]=%d\n",dci_size[0],dci_size[2]);
#endif
if ((format == format0_0) || (format == format1_0)) {
// if ((format == format0_0) || (format == format1_0)) {
// According to Section 7.3.1.1.1 in TS 38.212
// If DCI format 0_0 is monitored in common search space and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space for scheduling the same serving cell,
// zeros shall be appended to the DCI format 0_0 until the payload size equals that of the DCI format 1_0.
if (dci_size[0] < dci_size[2]) { // '0' corresponding to index for format0_0 and '2' corresponding to index of format1_0
if (format == format0_0) {
dci_fields_sizes[PADDING] = dci_size[2] - dci_size[0];
//if (format == format0_0) {
dci_fields_sizes[PADDING_NR_DCI][0] = dci_size[2] - dci_size[0];
dci_size[0] = dci_size[2];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) new dci_size[format0_0]=%d\n",dci_size[0]);
#endif
}
//}
}
// If DCI format 0_0 is monitored in common search space and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space for scheduling the same serving cell,
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0 is reduced
// such that the size of DCI format 0_0 equals to the size of the DCI format 1_0..
if (dci_size[0] > dci_size[2]) {
if (format == format0_0) {
dci_fields_sizes[BANDWIDTH_PART_IND] -= (dci_size[0] - dci_size[2]);
//if (format == format0_0) {
dci_fields_sizes[FREQ_DOM_RESOURCE_ASSIGNMENT_UL][0] -= (dci_size[0] - dci_size[2]);
dci_size[0] = dci_size[2];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) new dci_size[format0_0]=%d\n",dci_size[0]);
#endif
//}
}
// }
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_fields_sizes[][] = { \n");
for (int j=0; j<NBR_NR_DCI_FIELDS; j++){
printf("\t\t");
for (int i=0; i<NBR_NR_FORMATS ; i++) printf("%d\t",dci_fields_sizes[j][i]);
printf("\n");
}
}
printf(" }\n");
#endif
return dci_size[(int)format];
return dci_size[0];
}
#endif
#ifdef NR_PDCCH_DCI_RUN
uint8_t nr_dci_decoding_procedure(int s,
int p,
PHY_VARS_NR_UE *ue,
......@@ -4993,11 +5109,17 @@ uint8_t nr_dci_decoding_procedure(int s,
int do_common,
int16_t eNB_id,
uint8_t nr_tti_rx,
uint8_t dci_fields_sizes[48],
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP) {
uint16_t n_RB_DLBWP,
crc_scrambled_t *crc_scrambled,
format_found_t *format_found) {
crc_scrambled_t crc_scrambled_ = *crc_scrambled;
format_found_t format_found_ = *format_found;
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure) nr_tti_rx=%d\n",nr_tti_rx);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure) nr_tti_rx=%d and format_found=%d %d\n",nr_tti_rx,*format_found,format_found_);
#endif
uint8_t dci_cnt = 0, old_dci_cnt = 0;
uint32_t CCEmap0 = 0, CCEmap1 = 0, CCEmap2 = 0;
......@@ -5005,39 +5127,25 @@ uint8_t nr_dci_decoding_procedure(int s,
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]];
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
uint8_t mi;// = get_mi(&ue->frame_parms, nr_tti_rx);
uint16_t ra_rnti = 99;
uint16_t tc_rnti = 1; // FIXME
uint16_t int_rnti = 1; // FIXME
uint16_t sfi_rnti = 1; // FIXME
uint16_t tpc_pusch_rnti =1; // FIXME
uint16_t tpc_pucch_rnti = 1; // FIXME
uint16_t tpc_srs_rnti = 1; // FIXME
uint8_t format0_found = 0, format_c_found = 0;
// we need to initialize this values as crc is going to be compared with them
uint16_t c_rnti=pdcch_vars[eNB_id]->crnti;
uint16_t cs_rnti,new_rnti,tc_rnti;
uint16_t p_rnti=P_RNTI;
uint16_t si_rnti=SI_RNTI;
uint16_t ra_rnti=99;
uint16_t sp_csi_rnti,sfi_rnti,int_rnti,tpc_pusch_rnti,tpc_pucch_rnti,tpc_srs_rnti; //FIXME
uint16_t crc_scrambled_values[13] = {c_rnti,cs_rnti,new_rnti,tc_rnti,p_rnti,si_rnti,ra_rnti,sp_csi_rnti,sfi_rnti,int_rnti,tpc_pusch_rnti,tpc_pucch_rnti,tpc_srs_rnti};
//uint8_t format0_found = 0, format_c_found = 0;
uint8_t tmode = ue->transmission_mode[eNB_id];
uint8_t frame_type = frame_parms->frame_type;
//uint8_t dci_fields_sizes[48];
uint8_t format0_0_size_bits = 0, format0_0_size_bytes = 0; //FIXME
uint8_t format0_1_size_bits = 0, format0_1_size_bytes = 0; //FIXME
uint8_t format1_0_size_bits = 0, format1_0_size_bytes = 0; //FIXME
uint8_t format1_1_size_bits = 0, format1_1_size_bytes = 0; //FIXME
uint8_t format2_0_size_bits = 0, format2_0_size_bytes = 0; //FIXME
uint8_t format2_1_size_bits = 0, format2_1_size_bytes = 0; //FIXME
uint8_t format2_2_size_bits = 0, format2_2_size_bytes = 0; //FIXME
uint8_t format2_3_size_bits = 0, format2_3_size_bytes = 0; //FIXME
/*
* the following variables have to be removed
*/
uint8_t format1A_size_bits = 0, format1A_size_bytes = 0;
uint8_t format1C_size_bits = 0, format1C_size_bytes = 0;
uint8_t format0_size_bits = 0, format0_size_bytes = 0;
uint8_t format1_size_bits = 0, format1_size_bytes = 0;
uint8_t format2_size_bits = 0, format2_size_bytes = 0;
uint8_t format2A_size_bits = 0, format2A_size_bytes = 0;
/*
*
*/
uint8_t format_0_0_1_0_size_bits = 0, format_0_0_1_0_size_bytes = 0; //FIXME
uint8_t format_0_1_1_1_size_bits = 0, format_0_1_1_1_size_bytes = 0; //FIXME
uint8_t format_2_0_size_bits = 0, format_2_0_size_bytes = 0; //FIXME
uint8_t format_2_1_size_bits = 0, format_2_1_size_bytes = 0; //FIXME
uint8_t format_2_2_size_bits = 0, format_2_2_size_bytes = 0; //FIXME
uint8_t format_2_3_size_bits = 0, format_2_3_size_bytes = 0; //FIXME
/*
*
* The implementation of this function will depend on the information given by the searchSpace IE
......@@ -5104,237 +5212,298 @@ uint8_t nr_dci_decoding_procedure(int s,
// blind decoding (Type0-PDCCH,Type0A-PDCCH,Type1-PDCCH,Type2-PDCCH)
// for format0_0 => we are NOT implementing format0_0 for common search spaces. FIXME!
// for format1_0, first we calculate dci pdu size
format1_0_size_bits = nr_dci_format_size(format1_0,1,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
// the second parameter '1' is the pusch_alloc_list used to calculate size of field TIME_DOM_RESOURCE_ASSIGNMENT
//format1_0_size_bits = nr_dci_format_size(2,1,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format1_0_size_bytes = (format1_0_size_bits%8 == 0) ? (uint8_t)floor(format1_0_size_bits/8) : (uint8_t)(floor(format1_0_size_bits/8) + 1);
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_0_1_0_size_bits = nr_dci_format_size(_c_rnti,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format1_0_size_bits=%d, format1_0_size_bytes=%d\n",
css_dci_format,format1_0_size_bits,format1_0_size_bytes);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
// for aggregation level 4. The number of candidates (L2=4) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<2));
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 2,
cformat0_0_and_1_0, format1A, format1A, format0,
format1_0_size_bits, format1A_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 2,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
format_0_0_1_0_size_bits = nr_dci_format_size(crc_scrambled_,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// for aggregation level 8. The number of candidates (L2=8) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<3));
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 3,
cformat0_0_and_1_0, format1A, format1A, format0,
format1_0_size_bits, format1A_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 3,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
format_0_0_1_0_size_bits = nr_dci_format_size(crc_scrambled_,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// for aggregation level 16. The number of candidates (L2=16) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<4));
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 4,
cformat0_0_and_1_0, format1A, format1A, format0,
format1_0_size_bits, format1A_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 4,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
format_0_0_1_0_size_bits = nr_dci_format_size(crc_scrambled_,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
}
// Type3-PDCCH common search space for a DCI format with CRC scrambled by INT-RNTI, or SFI-RNTI,
// or TPC-PUSCH-RNTI, or TPC-PUCCH-RNTI, or TPC-SRS-RNTI, or C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
if (css_dci_format == cformat2_0) {
// for format2_0, first we calculate dci pdu size
format2_0_size_bits = nr_dci_format_size(format2_0,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format2_0_size_bytes = (format2_0_size_bits%8 == 0) ? (uint8_t)floor(format2_0_size_bits/8) : (uint8_t)(floor(format2_0_size_bits/8) + 1);
format_2_0_size_bits = nr_dci_format_size(_sfi_rnti,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_2_0_size_bytes = (format_2_0_size_bits%8 == 0) ? (uint8_t)floor(format_2_0_size_bits/8) : (uint8_t)(floor(format_2_0_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_0_size_bits=%d, format2_0_size_bytes=%d\n",
css_dci_format,format2_0_size_bits,format2_0_size_bytes);
css_dci_format,format_2_0_size_bits,format_2_0_size_bytes);
#endif
// for aggregation level 1. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 0,
format1A, format1A, format1A, format0,
format1A_size_bits, format1A_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 0,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// for aggregation level 2. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 1,
format1A, format1A, format1A, format0,
format1A_size_bits, format1A_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 1,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// for aggregation level 4. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 2,
format1A, format1A, format1A, format0,
format1A_size_bits, format1A_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 2,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// for aggregation level 8. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 3,
format1A, format1A, format1A, format0,
format1A_size_bits, format1A_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 3,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// for aggregation level 16. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 4,
format1A, format1A, format1A, format0,
format1A_size_bits, format1A_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 4,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
}
if (css_dci_format == cformat2_1) {
// for format2_1, first we calculate dci pdu size
format2_1_size_bits = nr_dci_format_size(format2_1,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format2_1_size_bytes = (format2_1_size_bits%8 == 0) ? (uint8_t)floor(format2_1_size_bits/8) : (uint8_t)(floor(format2_1_size_bits/8) + 1);
format_2_1_size_bits = nr_dci_format_size(_int_rnti,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_2_1_size_bytes = (format_2_1_size_bits%8 == 0) ? (uint8_t)floor(format_2_1_size_bits/8) : (uint8_t)(floor(format_2_1_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_1_size_bits=%d, format2_1_size_bytes=%d\n",
css_dci_format,format2_1_size_bits,format2_1_size_bytes);
css_dci_format,format_2_1_size_bits,format_2_1_size_bytes);
#endif
}
if (css_dci_format == cformat2_2) {
// for format2_2, first we calculate dci pdu size
format2_2_size_bits = nr_dci_format_size(format2_2,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format2_2_size_bytes = (format2_2_size_bits%8 == 0) ? (uint8_t)floor(format2_2_size_bits/8) : (uint8_t)(floor(format2_2_size_bits/8) + 1);
format_2_2_size_bits = nr_dci_format_size(_tpc_pucch_rnti,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_2_2_size_bytes = (format_2_2_size_bits%8 == 0) ? (uint8_t)floor(format_2_2_size_bits/8) : (uint8_t)(floor(format_2_2_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_2_size_bits=%d, format2_2_size_bytes=%d\n",
css_dci_format,format2_2_size_bits,format2_2_size_bytes);
css_dci_format,format_2_2_size_bits,format_2_2_size_bytes);
#endif
}
if (css_dci_format == cformat2_3) {
// for format2_1, first we calculate dci pdu size
format2_3_size_bits = nr_dci_format_size(format2_3,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format2_3_size_bytes = (format2_3_size_bits%8 == 0) ? (uint8_t)floor(format2_3_size_bits/8) : (uint8_t)(floor(format2_3_size_bits/8) + 1);
format_2_3_size_bits = nr_dci_format_size(_tpc_srs_rnti,0,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_2_3_size_bytes = (format_2_3_size_bits%8 == 0) ? (uint8_t)floor(format_2_3_size_bits/8) : (uint8_t)(floor(format_2_3_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_3_size_bits=%d, format2_3_size_bytes=%d\n",
css_dci_format,format2_3_size_bits,format2_3_size_bytes);
css_dci_format,format_2_3_size_bits,format_2_3_size_bytes);
#endif
}
} else { // UE-SPECIFIC SearchSpaceType assigned to current SearchSpace/CORESET
// UE-specific search space for a DCI format with CRC scrambled by C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
if (uss_dci_format == uformat0_0_and_1_0) {
// for format0_0, first we calculate dci pdu size
format0_0_size_bits = nr_dci_format_size(format0_0,1,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format0_0_size_bytes = (format0_0_size_bits%8 == 0) ? (uint8_t)floor(format0_0_size_bits/8) : (uint8_t)(floor(format0_0_size_bits/8) + 1);
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_0_1_0_size_bits = nr_dci_format_size(_c_rnti,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format0_0_size_bits=%d, format0_0_size_bytes=%d\n",
css_dci_format,format0_0_size_bits,format0_0_size_bytes);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
// blind decoding format0_0 for aggregation level 1. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 1, format0_0_size_bits=%d, format0_0_size_bytes=%d\n",
uss_dci_format,format0_0_size_bits,format0_0_size_bytes);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 1, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
old_dci_cnt = dci_cnt;
/*
* To be removed, just for unitary testing
*/
//#ifdef NR_PDCCH_DCI_DEBUG
// printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ### WE PROVOKE DCI DETECTION !!! ### old_dci_cnt=%d and dci_cnt=%d\n",
// old_dci_cnt,dci_cnt);
// dci_cnt++;
//#endif
/*
* To be removed until here
*/
nr_dci_decoding_procedure0(s,p,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 0,
format1A, format1A, format1A, format0,
format0_0_size_bits, format0_0_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 0,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++){
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
/*
* To be removed, just for unitary testing
*/
//#ifdef NR_PDCCH_DCI_DEBUG
// printf("dci_fields_sizes_cnt(%d,0,1][%d][%d]=(%d,%d,%d)\t\tdci_fields_sizes[%d][%d]=(%d)\n",
// dci_cnt-1,i,j,dci_fields_sizes_cnt[dci_cnt-1][i][j],dci_fields_sizes_cnt[0][i][j],dci_fields_sizes_cnt[1][i][j],i,j,dci_fields_sizes[i][j]);
//#endif
/*
* To be removed until here
*/
}
}
// blind decoding format0_0 for aggregation level 2. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 2, format0_0_size_bits=%d, format0_0_size_bytes=%d\n",
uss_dci_format,format0_0_size_bits,format0_0_size_bytes);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 2, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 1,
format1A, format1A, format1A, format0,
format0_0_size_bits, format0_0_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 1,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// blind decoding format0_0 for aggregation level 4. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 4, format0_0_size_bits=%d, format0_0_size_bytes=%d\n",
uss_dci_format,format0_0_size_bits,format0_0_size_bytes);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 4, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 2,
format1A, format1A, format1A, format0,
format0_0_size_bits, format0_0_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 2,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// blind decoding format0_0 for aggregation level 8. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 8, format0_0_size_bits=%d, format0_0_size_bytes=%d\n",
uss_dci_format,format0_0_size_bits,format0_0_size_bytes);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 8, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 3,
format1A, format1A, format1A, format0,
format0_0_size_bits, format0_0_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
crc_scrambled_values, 3,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
// blind decoding format0_0 for aggregation level 16. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 16, format0_0_size_bits=%d, format0_0_size_bytes=%d\n",
uss_dci_format,format0_0_size_bits,format0_0_size_bytes);
#endif
nr_dci_decoding_procedure0(s,p,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 4,
format1A, format1A, format1A, format0,
format0_0_size_bits, format0_0_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
// for format1_0, first we calculate dci pdu size
format1_0_size_bits = nr_dci_format_size(format1_0,1,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format1_0_size_bytes = (format1_0_size_bits%8 == 0) ? (uint8_t)floor(format1_0_size_bits/8) : (uint8_t)(floor(format1_0_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format1_0_size_bits=%d, format1_0_size_bytes=%d\n",
css_dci_format,format1_0_size_bits,format1_0_size_bytes);
#endif
// blind decoding format1_0 for aggregation level 1. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 1, format1_0_size_bits=%d, format1_0_size_bytes=%d\n",
uss_dci_format,format1_0_size_bits,format1_0_size_bytes);
#endif
nr_dci_decoding_procedure0(s,p,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 0,
format1A, format1A, format1A, format0,
format1_0_size_bits, format1_0_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
// blind decoding format1_0 for aggregation level 2. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 2, format1_0_size_bits=%d, format1_0_size_bytes=%d\n",
uss_dci_format,format1_0_size_bits,format1_0_size_bytes);
#endif
nr_dci_decoding_procedure0(s,p,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 1,
format1A, format1A, format1A, format0,
format1_0_size_bits, format1_0_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
// blind decoding format1_0 for aggregation level 4. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 4, format1_0_size_bits=%d, format1_0_size_bytes=%d\n",
uss_dci_format,format1_0_size_bits,format1_0_size_bytes);
#endif
nr_dci_decoding_procedure0(s,p,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 2,
format1A, format1A, format1A, format0,
format1_0_size_bits, format1_0_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
// blind decoding format1_0 for aggregation level 8. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 8, format1_0_size_bits=%d, format1_0_size_bytes=%d\n",
uss_dci_format,format1_0_size_bits,format1_0_size_bytes);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 16, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 3,
format1A, format1A, format1A, format0,
format1_0_size_bits, format1_0_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
// blind decoding format1_0 for aggregation level 16. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> ue-Specific searchSpaces with format uss_dci_format=%d and aggregation level 16, format1_0_size_bits=%d, format1_0_size_bytes=%d\n",
uss_dci_format,format1_0_size_bits,format1_0_size_bytes);
#endif
nr_dci_decoding_procedure0(s,p,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0), ra_rnti, P_RNTI, tc_rnti, int_rnti, sfi_rnti, tpc_pusch_rnti, tpc_pucch_rnti, tpc_srs_rnti, 4,
format1A, format1A, format1A, format0,
format1_0_size_bits, format1_0_size_bytes, &dci_cnt,
&format0_found, &format_c_found, &CCEmap0, &CCEmap1, &CCEmap2);
}
if (uss_dci_format == uformat0_1_and_1_1) { // Not implemented yet. FIXME!!!
crc_scrambled_values, 4,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
&crc_scrambled_, &format_found_, &CCEmap0, &CCEmap1, &CCEmap2);
if (dci_cnt != old_dci_cnt){
old_dci_cnt = dci_cnt;
for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
for (int j=0; j<NBR_NR_FORMATS; j++)
dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
}
}
*crc_scrambled = crc_scrambled_;
*format_found = format_found_;
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> at the end crc_scrambled=%d and format_found=%d\n",*crc_scrambled,*format_found);
#endif
/*if (uss_dci_format == uformat0_1_and_1_1) { // Not implemented yet. FIXME!!!
// for format0_1, first we calculate dci pdu size
format0_1_size_bits = nr_dci_format_size(format0_1,1,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format0_1_size_bits = nr_dci_format_size(format0_1,c_rnti,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format0_1_size_bytes = (format0_1_size_bits%8 == 0) ? (uint8_t)floor(format0_1_size_bits/8) : (uint8_t)(floor(format0_1_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format0_1_size_bits=%d, format0_1_size_bytes=%d\n",
......@@ -5347,7 +5516,7 @@ uint8_t nr_dci_decoding_procedure(int s,
// blind decoding format0_1 for aggregation level 16. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
// for format1_1, first we calculate dci pdu size
format1_1_size_bits = nr_dci_format_size(format1_1,1,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format1_1_size_bits = nr_dci_format_size(format1_1,c_rnti,16,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes);
format1_1_size_bytes = (format1_1_size_bits%8 == 0) ? (uint8_t)floor(format1_1_size_bits/8) : (uint8_t)(floor(format1_1_size_bits/8) + 1);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format1_1_size_bits=%d, format1_1_size_bytes=%d\n",
......@@ -5358,10 +5527,17 @@ uint8_t nr_dci_decoding_procedure(int s,
// blind decoding format1_1 for aggregation level 4. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
// blind decoding format1_1 for aggregation level 8. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
// blind decoding format1_1 for aggregation level 16. The number of candidates (nrofCandidates) will be calculated in function nr_dci_decoding_procedure0
}*/
}
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> at the end dci_cnt=%d \n",dci_cnt);
#endif
return(dci_cnt);
}
#endif
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.h
View file @ f16d6127
......@@ -42,70 +42,80 @@
#define NR_PDCCH_DCI_H
#ifdef NR_PDCCH_DCI_H
struct NR_DCI_INFO_EXTRACTED {
uint8_t carrier_ind ; // 0 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 1 SUL_IND_0_1:
uint8_t identifier_dci_formats ; // 2 IDENTIFIER_DCI_FORMATS:
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint16_t freq_dom_resource_assignment_UL; // 8 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 9 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 10 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 11 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 12 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 13 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 14 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 15 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 16 TB1_MCS:
uint8_t tb1_ndi ; // 17 TB1_NDI:
uint8_t tb1_rv ; // 18 TB1_RV:
uint8_t tb2_mcs ; // 19 TB2_MCS:
uint8_t tb2_ndi ; // 20 TB2_NDI:
uint8_t tb2_rv ; // 21 TB2_RV:
uint8_t mcs ; // 22 MCS:
uint8_t ndi ; // 23 NDI:
uint8_t rv ; // 24 RV:
uint8_t harq_process_number ; // 25 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 26 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 27 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 28 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tpc_pusch ; // 29 TPC_PUSCH:
uint8_t tpc_pucch ; // 30 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 31 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 32 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t short_message_ind ; // 33 SHORT_MESSAGE_IND: 1 bit if crc scrambled with P-RNTI
uint8_t srs_resource_ind ; // 34 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 35 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 36 ANTENNA_PORTS:
uint8_t tci ; // 37 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 38 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 39 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t csi_request ; // 40 CSI_REQUEST:
uint8_t cbgti ; // 41 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 42 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 43 PTRS_DMRS:
uint8_t beta_offset_ind ; // 44 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 45 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t sul_ind_0_0 ; // 46 SUL_IND_0_0:
uint16_t padding ; // 47 PADDING: (Note 2) If DCI format 0_0 is monitored in common search space
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
};
typedef struct NR_DCI_INFO_EXTRACTED NR_DCI_INFO_EXTRACTED_t;
#endif
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
View file @ f16d6127
......@@ -3951,25 +3951,23 @@ int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci)
}
#endif //(0)
#ifdef NR_PDCCH_DCI_TOOLS
int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
lte_frame_type_t frame_type,
uint8_t dci_length,
uint16_t rnti,
void *dci_pdu,
NR_DCI_INFO_EXTRACTED_t *nr_pdci_info_extracted,
uint8_t dci_fields_sizes[48],
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
NR_DL_UE_HARQ_t *pdlsch0_harq,
NR_UE_DLSCH_t *pdlsch0,
NR_UE_ULSCH_t *ulsch0,
NR_DCI_format_t dci_format,
uint8_t nr_tti_rx,
uint16_t rnti,
uint16_t si_rnti,
uint16_t p_rnti,
uint16_t ra_rnti,
uint16_t tc_rnti,
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP)
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES])
{
/*
* This function will extract the different elements of the dci pdu and interpret the values extracted to update correctly the parameters in:
......@@ -3979,7 +3977,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
* We need to know the dci length and the dci_fields_sizes (array containing each field size in number of bits)
* In order to get the value of a specific field we will proceed as follows (let's have a look to an example:
* If the length of the pdu is 38 bits and the content of the dci_pdu is 0x3A8900789A (pdu is 11 1010 1000 1001 0000 0000 0111 1000 1001 1010)
* If the dci_fields_sizes is {0 0 1 0 0 0 0 0 0 13 0 1 0 0 0 0 0 0 0 0 0 0 5 1 2 4 2 0 0 0 2 3 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0}
* If the dci_fields_sizes is {0 0 1 0 0 0 0 0 0 13 0 1 0 0 0 0 0 0 0 0 0 0 5 1 2 4 2 0 0 0 2 3 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ...}
* This means:
* number bits for carrier_ind field is 0
* number bits for sul_ind_0_1 field is 0
......@@ -3997,33 +3995,39 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
*
* At the moment we have implemented:
* Format 0_0, that contains the following fields according to Specification 38.212 V15.1.1 Section 7.3.1
* 2 IDENTIFIER_DCI_FORMATS:
* 8 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
* 10 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 15 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
* 22 MCS:
* 23 NDI:
* 24 RV:
* 25 HARQ_PROCESS_NUMBER:
* 29 TPC_PUSCH:
* 46 SUL_IND_0_0:
* 47 PADDING: (Note 2) If DCI format 0_0 is monitored in common search space
* 0 IDENTIFIER_DCI_FORMATS:
* 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
* 24 MCS:
* 25 NDI:
* 26 RV:
* 27 HARQ_PROCESS_NUMBER:
* 32 TPC_PUSCH:
* 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
* 50 SUL_IND_0_0:
*
* Format 1_0, that contains the following fields
* 2 IDENTIFIER_DCI_FORMATS:
* 9 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 10 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 11 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 22 MCS:
* 23 NDI:
* 24 RV:
* 25 HARQ_PROCESS_NUMBER:
* 26 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
* 30 TPC_PUCCH:
* 31 PUCCH_RESOURCE_IND:
* 32 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
* 33 SHORT_MESSAGE_IND: 1 bit if crc scrambled with P-RNTI
* 47 PADDING: (Note 2) If DCI format 0_0 is monitored in common search space
* 0 IDENTIFIER_DCI_FORMATS:
* 8 SHORT_MESSAGE_IND
* 9 SHORT_MESSAGES
* 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
* 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 5.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
* 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
* 24 MCS:
* 25 NDI:
* 26 RV:
* 27 HARQ_PROCESS_NUMBER:
* 28 DAI_: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
* 31 TB_SCALING
* 33 TPC_PUCCH:
* 34 PUCCH_RESOURCE_IND:
* 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
* 51 RA_PREAMBLE_INDEX:
* 52 SUL_IND_1_0:
* 53 SS_PBCH_INDEX:
* 54 PRACH_MASK_INDEX:
* 55 RESERVED_NR_DCI
*
*/
uint64_t pdu_bitmap = 0xFFFFFFFFFFFFFFFF;
......@@ -4031,12 +4035,13 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
uint8_t dci_field=0;
uint8_t sizes_count=0;
uint8_t left_shift=0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> Entering function nr_extract_dci_info() with dci_pdu=%llx with pdu_bitmap=%llx dci_length=%d\n",(*(uint64_t *)dci_pdu), pdu_bitmap, dci_length);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> dci_fields_sizes {");
for (int i=0; i<NBR_NR_DCI_FIELDS; i++) printf("%d ",dci_fields_sizes[i]);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> for format %d, dci_fields_sizes {",dci_format-15);
for (int i=0; i<NBR_NR_DCI_FIELDS; i++) printf("%d ",dci_fields_sizes[i][dci_format-15]);
printf("}\n");
#endif
#endif
uint8_t prev_ndi = pdlsch0_harq->DCINdi;
uint16_t l_RB;
uint16_t start_RB;
......@@ -4045,12 +4050,13 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
uint16_t start_symbol;
uint16_t tmp_symbol;
/*
* Some dci fields need to be interpreted before the others.
*/
if (dci_fields_sizes[HARQ_PROCESS_NUMBER] != 0) { // E.g: 25 HARQ_PROCESS_NUMBER (25 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i];
nr_pdci_info_extracted->harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER]));
if (dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15] != 0) { // E.g: 27 HARQ_PROCESS_NUMBER (27 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i][dci_format-15];
nr_pdci_info_extracted->harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]));
left_shift = 0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->harq_process_number=%x\n",nr_pdci_info_extracted->harq_process_number);
......@@ -4058,11 +4064,11 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
}
if ((dci_format == format1_0) || (dci_format == format1_1)) {
if (rnti==si_rnti) {
if (rnti==crc_scrambled_values[_SI_RNTI_]) {
ue->dlsch_SI[eNB_id]->active = 1;
} else if (rnti==p_rnti) {
} else if (rnti==crc_scrambled_values[_P_RNTI_]) {
ue->dlsch_p[eNB_id]->active = 1;
} else if (rnti==ra_rnti) {
} else if (rnti==crc_scrambled_values[_RA_RNTI_]) {
ue->dlsch_ra[eNB_id]->active = 1;
} else {
pdlsch0->active = 1;
......@@ -4073,7 +4079,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
// pdlsch0_harq->mimo_mode = frame_parms->mode1_flag == 1 ?SISO : ALAMOUTI;
pdlsch0_harq->dl_power_off = 1; //no power offset
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) {
if ((rnti==crc_scrambled_values[_SI_RNTI_]) || (rnti==crc_scrambled_values[_P_RNTI_]) || (rnti==crc_scrambled_values[_RA_RNTI_])) {
pdlsch0_harq->round = 0;
pdlsch0_harq->status = ACTIVE;
} else {
......@@ -4081,77 +4087,91 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
}
for (dci_field=0; dci_field<NBR_NR_DCI_FIELDS; dci_field++) {
left_shift = left_shift + dci_fields_sizes[dci_field];
if (dci_fields_sizes[dci_field] != 0){
sizes_count = dci_fields_sizes[dci_field];
left_shift = left_shift + dci_fields_sizes[dci_field][dci_format-15];
if (dci_fields_sizes[dci_field][dci_format-15] != 0){
sizes_count = dci_fields_sizes[dci_field][dci_format-15];
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> sizes_count = dci_fields_sizes[%d] = %d\n",dci_field,sizes_count);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> sizes_count = dci_fields_sizes[%d][%d] = %d\n",dci_field,dci_format-15,sizes_count);
#endif
switch (dci_field){
case 0: // 0 CARRIER_IND: (field defined for -,format0_1,-,format1_1,-,-,-,-)
case IDENTIFIER_DCI_FORMATS: // 0 IDENTIFIER_DCI_FORMATS: (field defined for format0_0,format0_1,format1_0,format1_1,format2_0,format2_1,format2_2,format2_3)
// if format 0_0: The value of this bit field is always set to 0, indicating an UL DCI format (TS38.212 Section 7.3.1.1.1)
// if format 1_0: The value of this bit field is always set to 1, indicating a DL DCI format (TS38.212 Section 7.3.1.2.1)
nr_pdci_info_extracted->identifier_dci_formats = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->identifier_dci_formats=%x\n",nr_pdci_info_extracted->identifier_dci_formats);
#endif
break;
case CARRIER_IND: // 1 CARRIER_IND: (field defined for -,format0_1,-,format1_1,-,-,-,-)
// 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
nr_pdci_info_extracted->carrier_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->carrier_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->carrier_ind=%x\n",nr_pdci_info_extracted->carrier_ind);
#endif
break;
case 1: // 1 SUL_IND_0_1: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->sul_ind_0_1 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case SUL_IND_0_1: // 2 SUL_IND_0_1: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->sul_ind_0_1 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->sul_ind_0_1=%x\n",nr_pdci_info_extracted->sul_ind_0_1);
#endif
break;
case 2: // 2 IDENTIFIER_DCI_FORMATS: (field defined for format0_0,format0_1,format1_0,format1_1,format2_0,format2_1,format2_2,format2_3)
// if format 0_0: The value of this bit field is always set to 0, indicating an UL DCI format (TS38.212 Section 7.3.1.1.1)
// if format 1_0: The value of this bit field is always set to 1, indicating a DL DCI format (TS38.212 Section 7.3.1.2.1)
nr_pdci_info_extracted->identifier_dci_formats = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->identifier_dci_formats=%x\n",nr_pdci_info_extracted->identifier_dci_formats);
#endif
break;
case 3: // 3 SLOT_FORMAT_IND: (field defined for -,-,-,-,format2_0,-,-,-)
case SLOT_FORMAT_IND: // 3 SLOT_FORMAT_IND: (field defined for -,-,-,-,format2_0,-,-,-)
// size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
nr_pdci_info_extracted->slot_format_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->slot_format_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->slot_format_ind=%x\n",nr_pdci_info_extracted->slot_format_ind);
#endif
break;
case 4: // 4 PRE_EMPTION_IND: (field defined for -,-,-,-,-,format2_1,-,-)
case PRE_EMPTION_IND: // 4 PRE_EMPTION_IND: (field defined for -,-,-,-,-,format2_1,-,-)
// size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
nr_pdci_info_extracted->pre_emption_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->pre_emption_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->pre_emption_ind=%x\n",nr_pdci_info_extracted->pre_emption_ind);
#endif
break;
case 5: // 5 TPC_CMD_NUMBER: (field defined for -,-,-,-,-,-,format2_2,-)
case TPC_CMD_NUMBER: // 5 TPC_CMD_NUMBER: (field defined for -,-,-,-,-,-,format2_2,-)
// The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
nr_pdci_info_extracted->tpc_cmd_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->tpc_cmd_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tpc_cmd_number=%x\n",nr_pdci_info_extracted->tpc_cmd_number);
#endif
break;
case 6: // 6 BLOCK_NUMBER: (field defined for -,-,-,-,-,-,-,format2_3)
case BLOCK_NUMBER: // 6 BLOCK_NUMBER: (field defined for -,-,-,-,-,-,-,format2_3)
// starting position of a block is determined by the parameter startingBitOfFormat2_3
nr_pdci_info_extracted->block_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->block_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->block_number=%x\n",nr_pdci_info_extracted->block_number);
#endif
break;
case 7: // 7 BANDWIDTH_PART_IND: (field defined for -,format0_1,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->bandwidth_part_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case BANDWIDTH_PART_IND: // 7 BANDWIDTH_PART_IND: (field defined for -,format0_1,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->bandwidth_part_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->bandwidth_part_ind=%x\n",nr_pdci_info_extracted->bandwidth_part_ind);
#endif
break;
case 8: // 8 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: (field defined for format0_0,format0_1,-,-,-,-,-,-)
case SHORT_MESSAGE_IND: // 8 SHORT_MESSAGE_IND: (field defined for -,-,format1_0,format1_1,-,-,-,-)
nr_pdci_info_extracted->short_message_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->short_message_ind=%x\n",nr_pdci_info_extracted->short_message_ind);
#endif
break;
case SHORT_MESSAGES: // 9 SHORT_MESSAGES: (field defined for -,-,format1_0,format1_1,-,-,-,-)
nr_pdci_info_extracted->short_messages = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->short_messages=%x\n",nr_pdci_info_extracted->short_messages);
#endif
break;
case FREQ_DOM_RESOURCE_ASSIGNMENT_UL: // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: (field defined for format0_0,format0_1,-,-,-,-,-,-)
// PUSCH hopping with resource allocation type 1 not considered
// According to 38.214 V15.1.0 Section 6.1.2.2 Two uplink resource allocation schemes, type 0 and type 1, are supported.
// The UE shall assume that when the scheduling PDCCH is received with DCI format 0_0, then uplink resource allocation type 1 is used.
nr_pdci_info_extracted->freq_dom_resource_assignment_UL = (uint16_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->freq_dom_resource_assignment_UL = (uint16_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (dci_format == format0_1){ // uplink resource allocation type 0 or 1 can be used
}
if (dci_format == format0_0){ // only uplink resource allocation type 1
......@@ -4177,10 +4197,10 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
break;
case 9: // 9 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: (field defined for -,-,format1_0,format1_1,-,-,-,-)
case FREQ_DOM_RESOURCE_ASSIGNMENT_DL: // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: (field defined for -,-,format1_0,format1_1,-,-,-,-)
// According to 38.214 V15.1.0 Section 5.1.2.2 Two downlink resource allocation schemes, type 0 and type 1, are supported.
// The UE shall assume that when the scheduling grant is received with DCI format 1_0, then downlink resource allocation type 1 is used.
nr_pdci_info_extracted->freq_dom_resource_assignment_DL = (uint16_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->freq_dom_resource_assignment_DL = (uint16_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (dci_format == format1_1){ // uplink resource allocation type 0 or 1 can be used
}
if (dci_format == format1_0){ // only uplink resource allocation type 1
......@@ -4205,6 +4225,19 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->freq_dom_resource_assignment_DL=%x, RIV = %d\n",nr_pdci_info_extracted->freq_dom_resource_assignment_DL,nr_pdci_info_extracted->freq_dom_resource_assignment_DL);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> l_RB=%d, start_RB=%d, n_RB_DLBWP=%d\n",l_RB,start_RB,n_RB_DLBWP);
/*
* According to TC 38.212 Subclause 7.3.1.2.1 (V15.2.0) (not implemented FIXME!!!)
* If the CRC of the DCI format 1_0 is scrambled by C-RNTI
* and the "Frequency domain resource assignment" field are of all ones,
* the DCI format 1_0 is for random access procedure initiated by a PDCCH order,
* with all remaining fields set as follows:
* - Random Access Preamble index (6 bits)
* - UL/SUL indicator (1 bit)
* - SS/PBCH index (6 bits)
* - PRACH Mask index (4 bits)
* - Reserved bits (10 bits)
*
*/
/*
* The following commented code is used to verify that l_RB and start_RB are correctly calculated
*
......@@ -4235,13 +4268,13 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
break;
case 10: // 10 TIME_DOM_RESOURCE_ASSIGNMENT: (field defined for format0_0,format0_1,format1_0,format1_1,-,-,-,-)
case TIME_DOM_RESOURCE_ASSIGNMENT: // 12 TIME_DOM_RESOURCE_ASSIGNMENT: (field defined for format0_0,format0_1,format1_0,format1_1,-,-,-,-)
// 0, 1, 2, 3, or 4 bits as defined in:
// Subclause 6.1.2.1 of [6, TS 38.214] for formats format0_0,format0_1
// Subclause 5.1.2.1 of [6, TS 38.214] for formats format1_0,format1_1
// The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
nr_pdci_info_extracted->time_dom_resource_assignment = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->time_dom_resource_assignment = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (dci_format == format0_0 || dci_format == format0_1){ // Subclause 6.1.2.1 of [6, TS 38.214]
}
......@@ -4254,13 +4287,13 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
break;
case 11: // 11 VRB_TO_PRB_MAPPING: (field defined for -,format0_1,format1_0,format1_1,-,-,-,-)
case VRB_TO_PRB_MAPPING: // 13 VRB_TO_PRB_MAPPING: (field defined for -,format0_1,format1_0,format1_1,-,-,-,-)
//0 bit if resource allocation type 0
//1 bit if resource allocation type 1
//Table 7.3.1.1.2-33: VRB-to-PRB mapping
// 0 Non-interleaved
// 1 Interleaved
nr_pdci_info_extracted->vrb_to_prb_mapping = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->vrb_to_prb_mapping = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (nr_pdci_info_extracted->vrb_to_prb_mapping == 0) { // Non-interleaved
} else { // Interleaved
// format 0_1 defined in TS 38.211 Section 6.3.1.7
......@@ -4271,31 +4304,31 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
break;
case 12: // 12 PRB_BUNDLING_SIZE_IND: (field defined for -,-,-,format1_1,-,-,-,-)
case PRB_BUNDLING_SIZE_IND: // 14 PRB_BUNDLING_SIZE_IND: (field defined for -,-,-,format1_1,-,-,-,-)
// 0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
nr_pdci_info_extracted->prb_bundling_size_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->prb_bundling_size_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->prb_bundling_size_ind=%x\n",nr_pdci_info_extracted->prb_bundling_size_ind);
#endif
break;
case 13: // 13 RATE_MATCHING_IND: (field defined for -,-,-,format1_1,-,-,-,-)
case RATE_MATCHING_IND: // 15 RATE_MATCHING_IND: (field defined for -,-,-,format1_1,-,-,-,-)
// 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
nr_pdci_info_extracted->rate_matching_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->rate_matching_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->rate_matching_ind=%x\n",nr_pdci_info_extracted->rate_matching_ind);
#endif
break;
case 14: // 14 ZP_CSI_RS_TRIGGER: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->zp_csi_rs_trigger = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case ZP_CSI_RS_TRIGGER: // 16 ZP_CSI_RS_TRIGGER: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->zp_csi_rs_trigger = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->zp_csi_rs_trigger=%x\n",nr_pdci_info_extracted->zp_csi_rs_trigger);
#endif
break;
case 15: // 15 FREQ_HOPPING_FLAG: (field defined for format0_0,format0_1,-,-,-,-,-,-)
case FREQ_HOPPING_FLAG: // 17 FREQ_HOPPING_FLAG: (field defined for format0_0,format0_1,-,-,-,-,-,-)
// 0 bit if only resource allocation type 0
// 1 bit otherwise, only applicable to resource allocation type 1, as defined in Subclause 6.3 of [6, TS 38.214]
nr_pdci_info_extracted->freq_hopping_flag = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->freq_hopping_flag = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (nr_pdci_info_extracted->freq_hopping_flag != 0) { // PUSCH frequency hopping is performed (only resource allocation type 1)
} else { // PUSCH frequency hopping is not performed (only resource allocation type 1)
......@@ -4306,51 +4339,51 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
break;
case 16: // 16 TB1_MCS: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb1_mcs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case TB1_MCS: // 18 TB1_MCS: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb1_mcs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (nr_pdci_info_extracted->mcs < 29) pdlsch0_harq->mcs = nr_pdci_info_extracted->tb1_mcs;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb1_mcs=%x\n",nr_pdci_info_extracted->tb1_mcs);
#endif
break;
case 17: // 17 TB1_NDI: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb1_ndi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case TB1_NDI: // 19 TB1_NDI: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb1_ndi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
pdlsch0_harq->DCINdi = nr_pdci_info_extracted->tb1_ndi;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb1_ndi=%x\n",nr_pdci_info_extracted->tb1_ndi);
#endif
break;
case 18: // 18 TB1_RV: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb1_rv = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case TB1_RV: // 20 TB1_RV: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb1_rv = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
pdlsch0_harq->rvidx = nr_pdci_info_extracted->tb1_rv;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb1_rv=%x\n",nr_pdci_info_extracted->tb1_rv);
#endif
break;
case 19: // 19 TB2_MCS: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb2_mcs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case TB2_MCS: // 21 TB2_MCS: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb2_mcs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (nr_pdci_info_extracted->mcs < 29) pdlsch0_harq->mcs = nr_pdci_info_extracted->tb2_mcs;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb2_mcs=%x\n",nr_pdci_info_extracted->tb2_mcs);
#endif
break;
case 20: // 20 TB2_NDI: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb2_ndi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case TB2_NDI: // 22 TB2_NDI: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb2_ndi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
pdlsch0_harq->DCINdi = nr_pdci_info_extracted->tb2_ndi;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb2_ndi=%x\n",nr_pdci_info_extracted->tb2_ndi);
#endif
break;
case 21: // 21 TB2_RV: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb2_rv = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case TB2_RV: // 23 TB2_RV: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb2_rv = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
pdlsch0_harq->rvidx = nr_pdci_info_extracted->tb2_rv;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb2_rv=%x\n",nr_pdci_info_extracted->tb2_rv);
#endif
break;
case 22: // 22 MCS: (field defined for format0_0,format0_1,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->mcs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case MCS: // 24 MCS: (field defined for format0_0,format0_1,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->mcs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (nr_pdci_info_extracted->mcs < 29) {
if (dci_format == format0_0 || dci_format == format0_1)
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->mcs = nr_pdci_info_extracted->mcs;
......@@ -4364,8 +4397,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
break;
case 23: // 23 NDI: (field defined for format0_0,format0_1,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->ndi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case NDI: // 25 NDI: (field defined for format0_0,format0_1,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->ndi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (dci_format == format0_0 || dci_format == format0_1) {
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->DCINdi = nr_pdci_info_extracted->ndi;
if (ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->first_tx==1) {
......@@ -4379,7 +4412,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
}
}
} else {
if (rnti == tc_rnti) { //fix for standalone Contention Resolution Id
if (rnti == crc_scrambled_values[_TC_RNTI_]) { //fix for standalone Contention Resolution Id
pdlsch0_harq->DCINdi = (uint8_t)-1;
} else {
if ((prev_ndi != nr_pdci_info_extracted->ndi) || (pdlsch0_harq->first_tx==1)) {
......@@ -4395,8 +4428,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
break;
case 24: // 24 RV: (field defined for format0_0,format0_1,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->rv = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case RV: // 26 RV: (field defined for format0_0,format0_1,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->rv = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (dci_format == format0_0 || dci_format == format0_1)
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->rvidx = nr_pdci_info_extracted->rv;
else
......@@ -4420,44 +4453,52 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
break;
case 25: // 25 HARQ_PROCESS_NUMBER: (field defined for format0_0,format0_1,format1_0,format1_1,-,-,-,-)
nr_pdci_info_extracted->harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case HARQ_PROCESS_NUMBER: // 27 HARQ_PROCESS_NUMBER: (field defined for format0_0,format0_1,format1_0,format1_1,-,-,-,-)
nr_pdci_info_extracted->harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
pdlsch0->current_harq_pid = nr_pdci_info_extracted->harq_process_number;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->harq_process_number=%x\n",nr_pdci_info_extracted->harq_process_number);
#endif
break;
case 26: // 26 DAI: (field defined for -,-,format1_0,format1_1,-,-,-,-)
case DAI_: // 28 DAI_: (field defined for -,-,format1_0,format1_1,-,-,-,-)
// For format1_0: 2 bits as defined in Subclause 9.1.3 at TS 38.213
// For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
nr_pdci_info_extracted->dai = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->dai = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
pdlsch0->harq_ack[nr_tti_rx].vDAI_DL = nr_pdci_info_extracted->dai+1;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->dai=%x\n",nr_pdci_info_extracted->dai);
#endif
break;
case 27: // 27 FIRST_DAI: (field defined for -,format0_1,-,-,-,-,-,-)
case FIRST_DAI: // 29 FIRST_DAI: (field defined for -,format0_1,-,-,-,-,-,-)
// (1 or 2 bits) 1 bit for semi-static HARQ-ACK
nr_pdci_info_extracted->first_dai = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->first_dai = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->first_dai=%x\n",nr_pdci_info_extracted->first_dai);
#endif
break;
case 28: // 28 SECOND_DAI: (field defined for -,format0_1,-,-,-,-,-,-)
case SECOND_DAI: // 30 SECOND_DAI: (field defined for -,format0_1,-,-,-,-,-,-)
// (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
nr_pdci_info_extracted->second_dai = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->second_dai = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->second_dai=%x\n",nr_pdci_info_extracted->second_dai);
#endif
break;
case 29: // 29 TPC_PUSCH: (field defined for format0_0,format0_1,-,-,-,-,-,-)
case TB_SCALING: // 31 TB_SCALING: (field defined for -,format0_1,-,-,-,-,-,-)
// (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
nr_pdci_info_extracted->tb_scaling = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb_scaling=%x\n",nr_pdci_info_extracted->tb_scaling);
#endif
break;
case TPC_PUSCH: // 32 TPC_PUSCH: (field defined for format0_0,format0_1,-,-,-,-,-,-)
// defined in Subclause 7.1.1 TS 38.213
nr_pdci_info_extracted->tpc_pusch = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->tpc_pusch = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->TPC = nr_pdci_info_extracted->tpc_pusch;
if (ue->ul_power_control_dedicated[eNB_id].accumulationEnabled == 1) {
ulsch0->f_pusch += delta_PUSCH_acc[ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->TPC];
......@@ -4469,133 +4510,167 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
break;
case 30: // 30 TPC_PUCCH: (field defined for -,-,format1_0,format1_1,-,-,-,-)
case TPC_PUCCH: // 33 TPC_PUCCH: (field defined for -,-,format1_0,format1_1,-,-,-,-)
// defined in Subclause 7.2.1 TS 38.213
nr_pdci_info_extracted->tpc_pucch = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->tpc_pucch = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
pdlsch0_harq->delta_PUCCH = delta_PUCCH_lut[nr_pdci_info_extracted->tpc_pucch &3];
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tpc_pucch=%x\n",nr_pdci_info_extracted->tpc_pucch);
#endif
break;
case 31: // 31 PUCCH_RESOURCE_IND: (field defined for -,-,format1_0,format1_1,-,-,-,-)
case PUCCH_RESOURCE_IND: // 34 PUCCH_RESOURCE_IND: (field defined for -,-,format1_0,format1_1,-,-,-,-)
// defined in Subclause 9.2.3 TS 38.213
// PUCCH_RESOURCE_IND points to PUCCH-ResourceId, but PUCCH-ResourceId is not defined yet
nr_pdci_info_extracted->pucch_resource_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->pucch_resource_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->pucch_resource_ind=%x\n",nr_pdci_info_extracted->pucch_resource_ind);
#endif
break;
case 32: // 32 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: (field defined for -,-,format1_0,format1_1,-,-,-,-)
case PDSCH_TO_HARQ_FEEDBACK_TIME_IND: // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: (field defined for -,-,format1_0,format1_1,-,-,-,-)
// defined in Subclause 9.2.3 TS 38.213
// PDSCH_TO_HARQ_FEEDBACK_TIME_IND points to DL-data-DL-acknowledgement, but DL-data-DL-acknowledgement is not defined yet
nr_pdci_info_extracted->pdsch_to_harq_feedback_time_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->pdsch_to_harq_feedback_time_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->pdsch_to_harq_feedback_time_ind=%x\n",nr_pdci_info_extracted->pdsch_to_harq_feedback_time_ind);
#endif
break;
case 33: // 33 SHORT_MESSAGE_IND: (field defined for -,-,format1_0,-,-,-,-,-)
// 1 bit if crc scrambled with P-RNTI
if (rnti == p_rnti) {
nr_pdci_info_extracted->short_message_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
// short message indication flag not implemented in NR_UE_DLSCH_t
}
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->short_message_ind=%x\n",nr_pdci_info_extracted->short_message_ind);
#endif
break;
case 34: // 34 SRS_RESOURCE_IND: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->srs_resource_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case SRS_RESOURCE_IND: // 36 SRS_RESOURCE_IND: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->srs_resource_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->srs_resource_ind=%x\n",nr_pdci_info_extracted->srs_resource_ind);
#endif
break;
case 35: // 35 PRECOD_NBR_LAYERS: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->precod_nbr_layers = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case PRECOD_NBR_LAYERS: // 37 PRECOD_NBR_LAYERS: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->precod_nbr_layers = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->precod_nbr_layers=%x\n",nr_pdci_info_extracted->precod_nbr_layers);
#endif
break;
case 36: // 36 ANTENNA_PORTS: (field defined for -,format0_1,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->antenna_ports = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case ANTENNA_PORTS: // 38 ANTENNA_PORTS: (field defined for -,format0_1,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->antenna_ports = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->antenna_ports=%x\n",nr_pdci_info_extracted->antenna_ports);
#endif
break;
case 37: // 37 TCI: (field defined for -,-,-,format1_1,-,-,-,-)
case TCI: // 39 TCI: (field defined for -,-,-,format1_1,-,-,-,-)
// 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
nr_pdci_info_extracted->tci = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->tci = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tci=%x\n",nr_pdci_info_extracted->tci);
#endif
break;
case 38: // 38 SRS_REQUEST: (field defined for -,format0_1,-,format1_1,-,-,-,format2_3)
nr_pdci_info_extracted->srs_request = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case SRS_REQUEST: // 40 SRS_REQUEST: (field defined for -,format0_1,-,format1_1,-,-,-,format2_3)
nr_pdci_info_extracted->srs_request = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->srs_request=%x\n",nr_pdci_info_extracted->srs_request);
#endif
break;
case 39: // 39 TPC_CMD_NUMBER_FORMAT2_3: (field defined for -,-,-,-,-,-,-,format2_3)
nr_pdci_info_extracted->tpc_cmd_number_format2_3 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case TPC_CMD_NUMBER_FORMAT2_3: // 41 TPC_CMD_NUMBER_FORMAT2_3: (field defined for -,-,-,-,-,-,-,format2_3)
nr_pdci_info_extracted->tpc_cmd_number_format2_3 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tpc_cmd_number_format2_3=%x\n",nr_pdci_info_extracted->tpc_cmd_number_format2_3);
#endif
break;
case 40: // 40 CSI_REQUEST: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->csi_request = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case CSI_REQUEST: // 42 CSI_REQUEST: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->csi_request = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->csi_request=%x\n",nr_pdci_info_extracted->csi_request);
#endif
break;
case 41: // 41 CBGTI: (field defined for -,format0_1,-,format1_1,-,-,-,-)
case CBGTI: // 43 CBGTI: (field defined for -,format0_1,-,format1_1,-,-,-,-)
// 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
nr_pdci_info_extracted->cbgti = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->cbgti = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->cbgti=%x\n",nr_pdci_info_extracted->cbgti);
#endif
break;
case 42: // 42 CBGFI: (field defined for -,-,-,format1_1,-,-,-,-)
case CBGFI: // 44 CBGFI: (field defined for -,-,-,format1_1,-,-,-,-)
// 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
nr_pdci_info_extracted->cbgfi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->cbgfi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->cbgfi=%x\n",nr_pdci_info_extracted->cbgfi);
#endif
break;
case 43: // 43 PTRS_DMRS: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->ptrs_dmrs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case PTRS_DMRS: // 45 PTRS_DMRS: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->ptrs_dmrs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->ptrs_dmrs=%x\n",nr_pdci_info_extracted->ptrs_dmrs);
#endif
break;
case 44: // 44 BETA_OFFSET_IND: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->beta_offset_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case BETA_OFFSET_IND: // 46 BETA_OFFSET_IND: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->beta_offset_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->beta_offset_ind=%x\n",nr_pdci_info_extracted->beta_offset_ind);
#endif
break;
case 45: // 45 DMRS_SEQ_INI: (field defined for -,format0_1,-,format1_1,-,-,-,-)
case DMRS_SEQ_INI: // 47 DMRS_SEQ_INI: (field defined for -,format0_1,-,format1_1,-,-,-,-)
// 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
nr_pdci_info_extracted->dmrs_seq_ini = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->dmrs_seq_ini = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->dmrs_seq_ini=%x\n",nr_pdci_info_extracted->dmrs_seq_ini);
#endif
break;
case 46: // 46 SUL_IND_0_0: (field defined for format0_0,-,-,-,-,-,-,-)
nr_pdci_info_extracted->sul_ind_0_0 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
case UL_SCH_IND: // 48 UL_SCH_IND: (field defined for -,format0_1,-,-,-,-,-,-)
// value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
nr_pdci_info_extracted->ul_sch_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->sul_ind_0_0=%x\n",nr_pdci_info_extracted->sul_ind_0_0);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->dmrs_seq_ini=%x\n",nr_pdci_info_extracted->ul_sch_ind);
#endif
break;
case 47: // 47 PADDING: (field defined for format0_0,-,format1_0,-,-,-,-,-)
case PADDING_NR_DCI: // 49 PADDING_NR_DCI: (field defined for format0_0,-,format1_0,-,-,-,-,-)
// (Note 2) If DCI format 0_0 is monitored in common search space
nr_pdci_info_extracted->padding = (uint16_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field]));
nr_pdci_info_extracted->padding_nr_dci = (uint16_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->padding=%x\n",nr_pdci_info_extracted->padding_nr_dci);
#endif
break;
case SUL_IND_0_0: // 50 SUL_IND_0_0: (field defined for format0_0,-,-,-,-,-,-,-)
nr_pdci_info_extracted->sul_ind_0_0 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->sul_ind_0_0=%x\n",nr_pdci_info_extracted->sul_ind_0_0);
#endif
break;
case RA_PREAMBLE_INDEX: // 51 RA_PREAMBLE_INDEX: (field defined for format0_0,-,-,-,-,-,-,-)
nr_pdci_info_extracted->ra_preamble_index = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->ra_preamble_index=%x\n",nr_pdci_info_extracted->ra_preamble_index);
#endif
break;
case SUL_IND_1_0: // 52 SUL_IND_1_0: (field defined for -,-,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->sul_ind_1_0 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->sul_ind_1_0=%x\n",nr_pdci_info_extracted->sul_ind_1_0);
#endif
break;
case SS_PBCH_INDEX: // 53 SS_PBCH_INDEX: (field defined for -,-,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->ss_pbch_index = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->padding=%x\n",nr_pdci_info_extracted->padding);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->ss_pbch_index=%x\n",nr_pdci_info_extracted->ss_pbch_index);
#endif
break;
case PRACH_MASK_INDEX: // 54 PRACH_MASK_INDEX: (field defined for -,-,-,format1_0,-,-,-,-)
nr_pdci_info_extracted->prach_mask_index = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->prach_mask_index=%x\n",nr_pdci_info_extracted->prach_mask_index);
#endif
break;
case RESERVED_NR_DCI: // 55 RESERVED_NR_DCI: (field defined for -,-,-,format1_0,-,-,-,-)
nr_pdci_info_extracted->reserved_nr_dci = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->reserved_nr_dci=%x\n",nr_pdci_info_extracted->reserved_nr_dci);
#endif
break;
}
}
}
......@@ -4604,6 +4679,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
#endif
return(1);
}
#endif
#if 0
......@@ -6698,12 +6774,14 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
#endif //(0)
#ifdef NR_PDCCH_DCI_TOOLS
int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
int frame,
uint8_t nr_tti_rx,
void *dci_pdu,
uint16_t rnti,
uint8_t dci_length,
NR_DCI_format_t dci_format,
NR_UE_PDCCH *pdcch_vars,
NR_UE_PDSCH *pdsch_vars,
......@@ -6711,15 +6789,11 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
uint16_t si_rnti,
uint16_t ra_rnti,
uint16_t p_rnti,
uint8_t beamforming_mode,
uint16_t tc_rnti,
uint8_t dci_length,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS],
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP)
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES])
{
/*
* Note only format0_0 and format1_0 are implemented
......@@ -6738,14 +6812,16 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
dlsch0 = dlsch[0];
dlsch0->active = 0;
if (dci_fields_sizes[HARQ_PROCESS_NUMBER] != 0) { // 25 HARQ_PROCESS_NUMBER (25 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i];
nr_dci_info_extracted.harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER]));
if (dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15] != 0) { // 27 HARQ_PROCESS_NUMBER (27 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i][dci_format-15];
nr_dci_info_extracted.harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]));
left_shift = 0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> nr_dci_info_extracted->harq_process_number=%x\n",nr_dci_info_extracted.harq_process_number);
#endif
}
dlsch0_harq = dlsch[0]->harq_processes[nr_dci_info_extracted.harq_process_number];
ulsch0 = ulsch;
/* printf("nr_dci_info_extracted.harq_process_number = %d\n",nr_dci_info_extracted.harq_process_number);
......@@ -6757,16 +6833,17 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
memset(&nr_dci_info_extracted,0,sizeof(nr_dci_info_extracted));
// printf("we reach this point\n");
switch (dci_format) {
// switch (dci_format) {
case format0_0:
// case format0_0:
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> Entering function nr_extract_dci_info(dci_format=%d) for PUSCH allocation\n",dci_format);
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> Entering function nr_extract_dci_info(dci_format=%d) \n",dci_format);
#endif
status = nr_extract_dci_info(ue,
eNB_id,
frame_type,
dci_length,
rnti,
dci_pdu,
&nr_dci_info_extracted,
dci_fields_sizes,
......@@ -6775,13 +6852,9 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
ulsch0,
dci_format,
nr_tti_rx,
rnti,
si_rnti,
p_rnti,
ra_rnti,
tc_rnti,
n_RB_ULBWP,
n_RB_DLBWP);
n_RB_DLBWP,
crc_scrambled_values);
//status = check_dci_format1_1a_coherency(format1_1, frame_parms->N_RB_DL, rnti, tc_rnti, si_rnti, ra_rnti, p_rnti,frame,nr_tti_rx, &nr_dci_info_extracted, dlsch0_harq);
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
if(status == 0)
......@@ -6790,8 +6863,8 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
return(-1);
}
#endif
break;
// break;
/*
case format0_1:
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> format %d not implemented yet\n",dci_format);
......@@ -6806,7 +6879,7 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
eNB_id,
frame_type,
dci_length,
dci_pdu,
dci_pdu,rnti,
&nr_dci_info_extracted,
dci_fields_sizes,
dlsch0_harq,
......@@ -6814,13 +6887,8 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
ulsch0,
dci_format,
nr_tti_rx,
rnti,
si_rnti,
p_rnti,
ra_rnti,
tc_rnti,
n_RB_ULBWP,
n_RB_DLBWP);
n_RB_DLBWP,crc_scrambled_values);
//status = check_dci_format1_1a_coherency(format1_1, frame_parms->N_RB_DL, rnti, tc_rnti, si_rnti, ra_rnti, p_rnti,frame,nr_tti_rx, &nr_dci_info_extracted, dlsch0_harq);
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
if(status == 0)
......@@ -6866,12 +6934,16 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
//LOG_E(PHY,"format %d not yet implemented\n",dci_format);
return(-1);
break;
}
}*/
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> Ending function nr_extract_dci_info()\n");
#endif
return(0);
}
#endif
#if 0
int generate_ue_dlsch_params_from_dci(int frame,
......
openair1/PHY/defs_nr_UE.h
View file @ f16d6127
......@@ -578,57 +578,109 @@ typedef struct {
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearchSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#ifdef NR_PDCCH_DEFS_NR_UE
#define MAX_NR_DCI_DECODED_SLOT 10
#define NBR_NR_FORMATS 8
#define NBR_NR_DCI_FIELDS 48
// The following parameters define 'position' of each DCI field described in TS 38.212
#define CARRIER_IND 0
#define SUL_IND_0_1 1
#define IDENTIFIER_DCI_FORMATS 2
#define NBR_NR_DCI_FIELDS 56
#define IDENTIFIER_DCI_FORMATS 0
#define CARRIER_IND 1
#define SUL_IND_0_1 2
#define SLOT_FORMAT_IND 3
#define PRE_EMPTION_IND 4
#define TPC_CMD_NUMBER 5
#define BLOCK_NUMBER 6
#define BANDWIDTH_PART_IND 7
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 8
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 9
#define TIME_DOM_RESOURCE_ASSIGNMENT 10
#define VRB_TO_PRB_MAPPING 11
#define PRB_BUNDLING_SIZE_IND 12
#define RATE_MATCHING_IND 13
#define ZP_CSI_RS_TRIGGER 14
#define FREQ_HOPPING_FLAG 15
#define TB1_MCS 16
#define TB1_NDI 17
#define TB1_RV 18
#define TB2_MCS 19
#define TB2_NDI 20
#define TB2_RV 21
#define MCS 22
#define NDI 23
#define RV 24
#define HARQ_PROCESS_NUMBER 25
#define DAI_ 26
#define FIRST_DAI 27
#define SECOND_DAI 28
#define TPC_PUSCH 29
#define TPC_PUCCH 30
#define PUCCH_RESOURCE_IND 31
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 32
#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 34
#define PRECOD_NBR_LAYERS 35
#define ANTENNA_PORTS 36
#define TCI 37
#define SRS_REQUEST 38
#define TPC_CMD_NUMBER_FORMAT2_3 39
#define CSI_REQUEST 40
#define CBGTI 41
#define CBGFI 42
#define PTRS_DMRS 43
#define BETA_OFFSET_IND 44
#define DMRS_SEQ_INI 45
#define SUL_IND_0_0 46
#define PADDING 47
#define SHORT_MESSAGE_IND 8
#define SHORT_MESSAGES 9
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 10
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 11
#define TIME_DOM_RESOURCE_ASSIGNMENT 12
#define VRB_TO_PRB_MAPPING 13
#define PRB_BUNDLING_SIZE_IND 14
#define RATE_MATCHING_IND 15
#define ZP_CSI_RS_TRIGGER 16
#define FREQ_HOPPING_FLAG 17
#define TB1_MCS 18
#define TB1_NDI 19
#define TB1_RV 20
#define TB2_MCS 21
#define TB2_NDI 22
#define TB2_RV 23
#define MCS 24
#define NDI 25
#define RV 26
#define HARQ_PROCESS_NUMBER 27
#define DAI_ 28
#define FIRST_DAI 29
#define SECOND_DAI 30
#define TB_SCALING 31
#define TPC_PUSCH 32
#define TPC_PUCCH 33
#define PUCCH_RESOURCE_IND 34
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35
//#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 36
#define PRECOD_NBR_LAYERS 37
#define ANTENNA_PORTS 38
#define TCI 39
#define SRS_REQUEST 40
#define TPC_CMD_NUMBER_FORMAT2_3 41
#define CSI_REQUEST 42
#define CBGTI 43
#define CBGFI 44
#define PTRS_DMRS 45
#define BETA_OFFSET_IND 46
#define DMRS_SEQ_INI 47
#define UL_SCH_IND 48
#define PADDING_NR_DCI 49
#define SUL_IND_0_0 50
#define RA_PREAMBLE_INDEX 51
#define SUL_IND_1_0 52
#define SS_PBCH_INDEX 53
#define PRACH_MASK_INDEX 54
#define RESERVED_NR_DCI 55
typedef enum {
_format_0_0_found=0,
_format_0_1_found=1,
_format_1_0_found=2,
_format_1_1_found=3,
_format_2_0_found=4,
_format_2_1_found=5,
_format_2_2_found=6,
_format_2_3_found=7} format_found_t;
#define TOTAL_NBR_SCRAMBLED_VALUES 13
#define _C_RNTI_ 0
#define _CS_RNTI_ 1
#define _NEW_RNTI_ 2
#define _TC_RNTI_ 3
#define _P_RNTI_ 4
#define _SI_RNTI_ 5
#define _RA_RNTI_ 6
#define _SP_CSI_RNTI_ 7
#define _SFI_RNTI_ 8
#define _INT_RNTI_ 9
#define _TPC_PUSCH_RNTI_ 10
#define _TPC_PUCCH_RNTI_ 11
#define _TPC_SRS_RNTI_ 12
typedef enum {
_c_rnti = _C_RNTI_,
_cs_rnti = _CS_RNTI_,
_new_rnti = _NEW_RNTI_,
_tc_rnti = _TC_RNTI_,
_p_rnti = _P_RNTI_,
_si_rnti = _SI_RNTI_,
_ra_rnti = _RA_RNTI_,
_sp_csi_rnti = _SP_CSI_RNTI_,
_sfi_rnti = _SFI_RNTI_,
_int_rnti = _INT_RNTI_,
_tpc_pusch_rnti = _TPC_PUSCH_RNTI_,
_tpc_pucch_rnti = _TPC_PUCCH_RNTI_,
_tpc_srs_rnti = _TPC_SRS_RNTI_} crc_scrambled_t;
typedef enum {bundle_n2=2,bundle_n3=3,bundle_n6=6} NR_UE_CORESET_REG_bundlesize_t;
......
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c 0 → 100755
View file @ f16d6127
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file fapi_nr_ue_l1.c
* \brief functions for NR UE FAPI-like interface
* \author R. Knopp
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#include "fapi_nr_ue_interface.h"
#include "fapi_nr_ue_l1.h"
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
return 0;
}
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
return 0;
}
\ No newline at end of file
openair1/SCHED_NR_UE/fapi_nr_ue_l1.h 0 → 100755
View file @ f16d6127
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file fapi_nr_ue_l1.c
* \brief functions for FAPI L1 interface
* \author R. Knopp
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#ifndef __FAPI_NR_UE_L1_H__
#define __FAPI_NR_UE_L1_H__
#include "NR_IF_Module.h"
/**\brief NR UE FAPI-like P7 messages, scheduled response from L2 indicating L1
\param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response);
/**\brief NR UE FAPI-like P5 message, physical configuration from L2 to configure L1
\param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config);
#endif
\ No newline at end of file
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ f16d6127
......@@ -3089,6 +3089,7 @@ void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *pro
#endif //(0)
#ifdef NR_PDCCH_SCHED
int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t abstraction_flag)
{
......@@ -3103,6 +3104,11 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
// this table contains dci_fields_sizes for each time a dci is decoded in the slot. Each element represents the size in bits for each dci field
// each time a dci is decode at dci_cnt, the values of the table dci_fields_sizes[i][j] will be copied at table dci_fields_sizes_cnt[dci_cnt-1][i][j]
// table dci_fields_sizes_cnt[dci_cnt-1][i][j] will then be used in function nr_extract_dci_info
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
uint16_t tc_rnti = 1; // FIXME
uint16_t int_rnti = 1; // FIXME
uint16_t sfi_rnti = 1; // FIXME
......@@ -3137,6 +3143,25 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
* For PDCCH monitoring when overlap with SS/PBCH according to 38.213 v15.1.0 Section 10
* To be implemented LATER !!!
*/
int _offset,_index,_M;
int searchSpace_id = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceId;
if (searchSpace_id == 0){ // Implementing TS 38.213 subclause 13, UE procedure for monitoring Type0-PDCCH common search space
/*
* according to TS 38.213 subclause 13
* For the SS/PBCH block and control resource set (CORESET) multiplexing pattern 1,
* a UE monitors PDCCH in the Type0-PDCCH common search space over two consecutive slots starting from slot n0
*/
if (frame_rx%2 == 0) {
if ((((_offset*2+((_index*_M)/20))%2) != 0) || ((((_offset*2)+(_index*_M))%20) != nr_tti_rx) || ((((_offset*2)+(_index*_M))%20) != nr_tti_rx-1)){
do_pdcch_monitoring_current_slot = 0;
}
}
if (frame_rx%2 == 1) {
if ((((_offset*2+((_index*_M)/20))%2) != 1) || ((((_offset*2)+(_index*_M))%20) != nr_tti_rx) || ((((_offset*2)+(_index*_M))%20) != nr_tti_rx-1)){
do_pdcch_monitoring_current_slot = 0;
}
}
}
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> nb_searchspace_active=%d do_pdcch_monitoring_current_slot=%d\n",
nb_searchspace_active,
......@@ -3146,7 +3171,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
if (do_pdcch_monitoring_current_slot) {
// the searchSpace indicates that we need to monitor PDCCH in current nr_tti_rx
// get the parameters describing the current SEARCHSPACE
int searchSpace_id = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceId;
// the CORESET id applicable to the current SearchSpace
int searchSpace_coreset_id = pdcch_vars2->searchSpace[nb_searchspace_active].controlResourceSetId;
// FIXME this variable is a bit string (14 bits) identifying every OFDM symbol in a slot.
......@@ -3165,8 +3189,8 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
while ((searchSpace_coreset_id != pdcch_vars2->coreset[nb_coreset_active].controlResourceSetId) && (nb_coreset_active<nb_coreset_total)) {
// we need to identify the CORESET associated to the active searchSpace
nb_coreset_active++;
}
if (nb_coreset_active >= nb_coreset_total) return 0; // the coreset_id could not be found. There is a problem
}
unsigned int dci_cnt=0, i;
......@@ -3181,8 +3205,8 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
int tci_present = pdcch_vars2->coreset[nb_coreset_active].tciPresentInDCI;
uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[nb_coreset_active].pdcchDMRSScramblingID;
// this table contains 48 (NBR_NR_DCI_FIELDS) elements for each dci field described in TS 38.212. Each element represents the size in bits for each dci field
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS] = {0};
// this table contains 56 (NBR_NR_DCI_FIELDS) elements for each dci field and format described in TS 38.212. Each element represents the size in bits for each dci field
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
// this is the UL bandwidth part. FIXME! To be defined where this value comes from
uint16_t n_RB_ULBWP = 100;
// this is the DL bandwidth part. FIXME! To be defined where this value comes from
......@@ -3235,7 +3259,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
proc->frame_rx,
nr_tti_rx,
eNB_id,
//(ue->frame_parms.mode1_flag == 1) ? SISO : ALAMOUTI, // NR_DL_FRAME_PARMS struct has been modified, and 'mode1_flag' needs to be included
//(ue->frame_parms.mode1_flag == 1) ? SISO : ALAMOUTI,
SISO,
ue->high_speed_flag,
ue->is_secondary_ue,
......@@ -3276,6 +3300,9 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
nr_tti_rx);
}
*/ //removed for nr_ue_pdcch_procedures
crc_scrambled_t crc_scrambled;
format_found_t format_found=255;
if (searchSpaceType == common) { // search all possible dci's for COMMON SEARCH SPACES according to the current SEARCHSPACE configuration
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_dci_decoding_procedure(searchSpaceType=%d, nb_searchspace_active=%d, nb_coreset_active=%d) -> dci_cnt=%d\n",
......@@ -3292,9 +3319,11 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
// later when we need paging or RA during connection, update this ...
eNB_id,
nr_tti_rx,
dci_fields_sizes,
dci_fields_sizes,dci_fields_sizes_cnt,
n_RB_ULBWP,
n_RB_DLBWP);
n_RB_DLBWP,
&crc_scrambled,
&format_found);
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%d\n",dci_cnt);
#endif
......@@ -3315,9 +3344,11 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
// later when we need paging or RA during connection, update this ...
eNB_id,
nr_tti_rx,
dci_fields_sizes,
dci_fields_sizes,dci_fields_sizes_cnt,
n_RB_ULBWP,
n_RB_DLBWP);
n_RB_DLBWP,
&crc_scrambled,
&format_found);
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%d\n",dci_cnt);
#endif
......@@ -3332,7 +3363,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PHICH, VCD_FUNCTION_OUT);
}*/ //removed for nr_ue_pdcch_procedures
}
#if 0
#ifdef PHY_ABSTRACTION
else {
for (i=0; i<NB_eNB_INST; i++) {
......@@ -3346,7 +3377,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
if (i==NB_eNB_INST) {
LOG_E(PHY,"[UE %d] phy_procedures_lte_ue.c: FATAL : Could not find attached eNB for DCI emulation (Nid_cell %d)!!!!\n",ue->Mod_id,ue->frame_parms.Nid_cell);
//mac_xface->macphy_exit("Could not find attached eNB for DCI emulation");
mac_xface->macphy_exit("Could not find attached eNB for DCI emulation");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(-1);
}
......@@ -3359,26 +3390,28 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
dci_alloc_rx,
eNB_id);
// printf("DCI: dci_cnt %d\n",dci_cnt);
UE_id = (uint32_t)nr_find_ue((int16_t)ue->pdcch_vars[nr_tti_rx&1][eNB_id]->crnti,PHY_vars_eNB_g[i][CC_id]);
UE_id = (uint32_t)find_ue((int16_t)ue->pdcch_vars[nr_tti_rx&1][eNB_id]->crnti,PHY_vars_eNB_g[i][CC_id]);
if (UE_id>=0) {
// printf("Checking PHICH for UE %d (eNB %d)\n",UE_id,i);
//if (is_phich_subframe(&ue->frame_parms,nr_tti_rx)) {
//harq_pid = phich_subframe_to_harq_pid(&ue->frame_parms,frame_rx,nr_tti_rx);
//if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->status == ACTIVE) {
//ue->ulsch[eNB_id]->harq_processes[harq_pid]->phich_ACK=1;
//ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag =0;
//ue->ulsch[eNB_id]->harq_processes[harq_pid]->status = IDLE;
//ue->ulsch_Msg3_active[eNB_id] = 0;
//ue->ulsch[eNB_id]->harq_processes[harq_pid]->round = 0;
//LOG_D(PHY,"Msg3 inactive\n");
//} // harq_pid is ACTIVE
//} // This is a PHICH nr_tti_rx
if (is_phich_subframe(&ue->frame_parms,nr_tti_rx)) {
harq_pid = phich_subframe_to_harq_pid(&ue->frame_parms,frame_rx,nr_tti_rx);
if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->status == ACTIVE) {
// ue->ulsch[eNB_id]->harq_processes[harq_pid]->phich_ACK=1;
ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag =0;
ue->ulsch[eNB_id]->harq_processes[harq_pid]->status = IDLE;
ue->ulsch_Msg3_active[eNB_id] = 0;
ue->ulsch[eNB_id]->harq_processes[harq_pid]->round = 0;
LOG_D(PHY,"Msg3 inactive\n");
} // harq_pid is ACTIVE
} // This is a PHICH nr_tti_rx
} // UE_id exists
}
#endif
#endif
uint8_t *nCCE_current = &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->nCCE[nr_tti_rx];
uint8_t *nCCE_dest = &ue->pdcch_vars[next1_thread_id][eNB_id]->nCCE[nr_tti_rx];
uint8_t *nCCE_dest1 = &ue->pdcch_vars[next2_thread_id][eNB_id]->nCCE[nr_tti_rx];
......@@ -3403,81 +3436,41 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
/*
* This is the NR part
*/
if ((dci_alloc_rx[i].rnti == SI_RNTI) && (dci_alloc_rx[i].format == format1_0)){
nr_generate_ue_ul_dlsch_params_from_dci(ue,
eNB_id,
frame_rx,
nr_tti_rx,
(void *)&dci_alloc_rx[i].dci_pdu,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
dci_alloc_rx[i].dci_length,
dci_alloc_rx[i].format,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->ulsch[eNB_id],
&ue->frame_parms,
ue->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI,
ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
ue->pdcch_vars[0%RX_NB_TH][eNB_id]->crnti_is_temporary? ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti: 0,
&dci_fields_sizes,
n_RB_ULBWP,
n_RB_DLBWP);
ue->dlsch_SI_received[eNB_id]++;
}
uint16_t c_rnti=pdcch_vars[eNB_id]->crnti;
uint16_t cs_rnti,new_rnti,tc_rnti;
uint16_t p_rnti=P_RNTI;
uint16_t si_rnti=SI_RNTI;
uint16_t ra_rnti=99;
uint16_t sp_csi_rnti,sfi_rnti,int_rnti,tpc_pusch_rnti,tpc_pucch_rnti,tpc_srs_rnti; //FIXME
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES] =
{c_rnti,cs_rnti,new_rnti,tc_rnti,p_rnti,si_rnti,ra_rnti,sp_csi_rnti,sfi_rnti,int_rnti,tpc_pusch_rnti,tpc_pucch_rnti,tpc_srs_rnti};
if ((dci_alloc_rx[i].rnti == P_RNTI) && (dci_alloc_rx[i].format == format1_0)){
ue->dlsch_p_received[eNB_id]++;
if ((dci_alloc_rx[i].format == format0_0))
if ((dci_alloc_rx[i].format == format1_0) &&
(dci_alloc_rx[i].rnti != crc_scrambled_values[_P_RNTI_]) &&
(dci_alloc_rx[i].rnti != crc_scrambled_values[_SI_RNTI_]) &&
(dci_alloc_rx[i].rnti != crc_scrambled_values[_RA_RNTI_])) ue->dlsch_received[eNB_id]++;
if ((dci_alloc_rx[i].rnti == crc_scrambled_values[_SI_RNTI_]) && (dci_alloc_rx[i].format == format1_0)) ue->dlsch_SI_received[eNB_id]++;
if ((dci_alloc_rx[i].rnti == crc_scrambled_values[_P_RNTI_]) && (dci_alloc_rx[i].format == format1_0)) ue->dlsch_p_received[eNB_id]++;
if ((dci_alloc_rx[i].rnti == crc_scrambled_values[_RA_RNTI_]) && (dci_alloc_rx[i].format == format1_0)) ue->dlsch_ra_received[eNB_id]++;
if ((dci_alloc_rx[i].format == format2_0)){
}
if ((dci_alloc_rx[i].rnti == ue->prach_resources[eNB_id]->ra_RNTI) && (dci_alloc_rx[i].format == format1_0)){
nr_generate_ue_ul_dlsch_params_from_dci(ue,
eNB_id,
frame_rx,
nr_tti_rx,
(void *)&dci_alloc_rx[i].dci_pdu,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
dci_alloc_rx[i].dci_length,
dci_alloc_rx[i].format,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->ulsch[eNB_id],
&ue->frame_parms,
ue->pdsch_config_dedicated,
SI_RNTI,
ue->prach_resources[eNB_id]->ra_RNTI,
P_RNTI,
ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
ue->pdcch_vars[0%RX_NB_TH][eNB_id]->crnti_is_temporary? ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti: 0,
&dci_fields_sizes,
n_RB_ULBWP,
n_RB_DLBWP);
ue->dlsch_ra_received[eNB_id]++;
if ((dci_alloc_rx[i].format == format2_1)){
}
if ((dci_alloc_rx[i].rnti == sfi_rnti) && (dci_alloc_rx[i].format == format2_0)){
if ((dci_alloc_rx[i].format == format2_2)){
}
if ((dci_alloc_rx[i].rnti == int_rnti) && (dci_alloc_rx[i].format == format2_1)){
if ((dci_alloc_rx[i].format == format2_3)){
}
if ((dci_alloc_rx[i].rnti == tpc_pusch_rnti) && (dci_alloc_rx[i].format == format2_2)){
if ((dci_alloc_rx[i].format == format0_1)){ // This format not implemented at a first time. FIXME
}
if ((dci_alloc_rx[i].rnti == tpc_srs_rnti) && (dci_alloc_rx[i].format == format2_3)){
if ((dci_alloc_rx[i].format == format1_1)){ // This format not implemented at a first time. FIXME
}
if ((dci_alloc_rx[i].rnti == ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti) && (dci_alloc_rx[i].format == format0_0)){
nr_generate_ue_ul_dlsch_params_from_dci(ue,
eNB_id,
frame_rx,
nr_tti_rx,
(void *)&dci_alloc_rx[i].dci_pdu,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
dci_alloc_rx[i].rnti,
dci_alloc_rx[i].dci_length,
dci_alloc_rx[i].format,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
......@@ -3486,52 +3479,16 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
ue->ulsch[eNB_id],
&ue->frame_parms,
ue->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI,
ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
ue->pdcch_vars[0%RX_NB_TH][eNB_id]->crnti_is_temporary? ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti: 0,
&dci_fields_sizes,
dci_fields_sizes_cnt[i],
n_RB_ULBWP,
n_RB_DLBWP);
}
n_RB_DLBWP,
crc_scrambled_values);
if ((dci_alloc_rx[i].rnti == ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti) && (dci_alloc_rx[i].format == format0_1)){ // This format not implemented at a first time. FIXME
}
if ((dci_alloc_rx[i].rnti == ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti) && (dci_alloc_rx[i].format == format1_0)){
nr_generate_ue_ul_dlsch_params_from_dci(ue,
eNB_id,
frame_rx,
nr_tti_rx,
(void *)&dci_alloc_rx[i].dci_pdu,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
dci_alloc_rx[i].dci_length,
dci_alloc_rx[i].format,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->ulsch[eNB_id],
&ue->frame_parms,
ue->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI,
ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
ue->pdcch_vars[0%RX_NB_TH][eNB_id]->crnti_is_temporary? ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti: 0,
&dci_fields_sizes,
n_RB_ULBWP,
n_RB_DLBWP);
ue->dlsch_received[eNB_id]++;
}
if ((dci_alloc_rx[i].rnti == ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti) && (dci_alloc_rx[i].format == format1_1)){ // This format not implemented at a first time. FIXME
}
#if 0
/*
* This is the LTE part to be removed
*/
if ((ue->UE_mode[eNB_id]>PRACH) && (dci_alloc_rx[i].rnti == ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti) && (dci_alloc_rx[i].format != format0)) {
LOG_D(PHY,"[UE %d][DCI][PDSCH %x] AbsSubframe %d.%d: format %d, num_pdcch_symbols %d, nCCE %d, total CCEs %d\n",
......@@ -3732,9 +3689,9 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
0)==0)) {
#if T_TRACER
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
uint8_t harq_pid = nr_subframe2harq_pid(frame_parms,
nr_pdcch_alloc2ul_frame(frame_parms,proc->frame_rx,proc->nr_tti_rx),
nr_pdcch_alloc2ul_subframe(frame_parms,proc->nr_tti_rx));
uint8_t harq_pid = subframe2harq_pid(frame_parms,
pdcch_alloc2ul_frame(frame_parms,proc->frame_rx,proc->nr_tti_rx),
pdcch_alloc2ul_subframe(frame_parms,proc->nr_tti_rx));
T(T_UE_PHY_ULSCH_UE_DCI, T_INT(eNB_id), T_INT(proc->frame_rx%1024), T_INT(proc->nr_tti_rx), T_INT(ue->Mod_id),
T_INT(dci_alloc_rx[i].rnti), T_INT(harq_pid),
......@@ -3759,7 +3716,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
/*
if (((frame_rx%100) == 0) || (frame_rx < 20))
dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
*/
#endif
ue->ulsch_no_allocation_counter[eNB_id] = 0;
......@@ -3795,10 +3752,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
// dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
#endif
}
#endif //(0)
}*/
} // end for loop dci_cnt
#if UE_TIMING_TRACE
......@@ -3807,9 +3761,12 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
} // end if do_pdcch_monitoring_current_slot
} // end for loop nb_searchspacet_active
} // end for loop nb_searchspace_active
return(0);
}
#endif
#if 0
......
openair2/LAYER2/NR_MAC_UE/config_ue.c 100644 → 100755
View file @ f16d6127
......@@ -48,7 +48,7 @@ nr_rrc_mac_config_req_ue(
// TODO do something FAPI-like P5 L1/L2 config interface in config_si, config_mib, etc.
if(mibP != NULL){
;
mac->mib = mibP; // update by every reception
}
if(mac_cell_group_configP != NULL){
......
openair2/LAYER2/NR_MAC_UE/defs.h 100644 → 100755
View file @ f16d6127
......@@ -73,6 +73,8 @@ typedef struct {
NR_RNTI_Value_t *cs_RNTI; /* OPTIONAL */
NR_MIB_t *mib;
} NR_UE_MAC_INST_t;
/*@}*/
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c 100644 → 100755
View file @ f16d6127
......@@ -31,19 +31,37 @@
#include "proto.h"
#include "RRC/NR_UE/rrc_proto.h"
void
nr_ue_decode_mib(
int8_t nr_ue_decode_mib(
module_id_t module_id,
int CC_id,
uint8_t gNB_index,
uint8_t extra_bits,
uint32_t ssb_index,
uint32_t *frameP,
void *pduP,
uint8_t extra_bits, // 8bits 38.212 c7.1.1
uint32_t l_ssb_equal_64,
uint32_t *ssb_index, // from decoded MIB
uint32_t *frameP, // 10 bits = 6(in decoded MIB)+4(in extra bits from L1)
void *pduP, // encoded MIB
uint16_t pdu_len){
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
nr_mac_rrc_data_ind_ue( module_id, CC_id, gNB_index, frameP,
NR_BCCH_BCH, (uint8_t *) pduP, pdu_len );
// frame calculation
uint32_t frame = mac->mib->systemFrameNumber.buf[0];
uint32_t frame_number_4lsb = (uint32_t)(extra_bits & 0xf);
uint32_t ssb_subcarrier_offset_msb = (uint32_t)(( extra_bits >> 4 ) & 0x1 );
frame = frame << 4;
frame = frame | frame_number_4lsb;
*frameP = frame;
if(l_ssb_equal_64){
*ssb_index = (( extra_bits >> 4 ) & 0x7 );
}
return 0;
}
openair2/LAYER2/NR_MAC_UE/proto.h 100644 → 100755
View file @ f16d6127
......@@ -36,11 +36,12 @@
\param CC_id component carrier id
\param gNB_index gNB index
\param extra_bits extra bits for frame calculation
\param l_ssb_equal_64 check if ssb number of candicate is equal 64, 1=equal; 0=non equal. Reference 38.212 c7.1.1
\param ssb_index SSB index for frame calculation
\param frameP pointer to frame for revising after frame calculation
\param pduP pointer to pdu
\param pdu_length length of pdu*/
void nr_ue_decode_mib(module_id_t module_id, int CC_id, uint8_t gNB_index, uint8_t extra_bits, uint32_t ssb_index, uint32_t *frameP, void *pduP, uint16_t pdu_len);
int8_t nr_ue_decode_mib(module_id_t module_id, int CC_id, uint8_t gNB_index, uint8_t extra_bits, uint32_t l_ssb_equal_64, uint32_t *ssb_index, uint32_t *frameP, void *pduP, uint16_t pdu_len);
/**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config)
......
openair2/NR_UE_PHY_INTERFACE/IF_Module.c deleted 100644 → 0
View file @ 89d0971d
#include "openair1/PHY/defs.h"
#include "openair2/PHY_INTERFACE/IF_Module.h"
#include "openair1/PHY/extern.h"
#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/proto.h"
#include "common/ran_context.h"
#define MAX_IF_MODULES 100
IF_Module_t *if_inst[MAX_IF_MODULES];
Sched_Rsp_t Sched_INFO[MAX_IF_MODULES][MAX_NUM_CCs];
extern int oai_nfapi_harq_indication(nfapi_harq_indication_t *harq_ind);
extern int oai_nfapi_crc_indication(nfapi_crc_indication_t *crc_ind);
extern int oai_nfapi_cqi_indication(nfapi_cqi_indication_t *cqi_ind);
extern int oai_nfapi_sr_indication(nfapi_sr_indication_t *ind);
extern int oai_nfapi_rx_ind(nfapi_rx_indication_t *ind);
extern uint8_t nfapi_mode;
extern uint16_t sf_ahead;
void handle_rach(UL_IND_t *UL_info) {
int i;
if (UL_info->rach_ind.rach_indication_body.number_of_preambles>0) {
AssertFatal(UL_info->rach_ind.rach_indication_body.number_of_preambles==1,"More than 1 preamble not supported\n");
UL_info->rach_ind.rach_indication_body.number_of_preambles=0;
LOG_D(MAC,"UL_info[Frame %d, Subframe %d] Calling initiate_ra_proc RACH:SFN/SF:%d\n",UL_info->frame,UL_info->subframe, NFAPI_SFNSF2DEC(UL_info->rach_ind.sfn_sf));
initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rach_ind.sfn_sf),
NFAPI_SFNSF2SF(UL_info->rach_ind.sfn_sf),
UL_info->rach_ind.rach_indication_body.preamble_list[0].preamble_rel8.preamble,
UL_info->rach_ind.rach_indication_body.preamble_list[0].preamble_rel8.timing_advance,
UL_info->rach_ind.rach_indication_body.preamble_list[0].preamble_rel8.rnti
#ifdef Rel14
,0
#endif
);
}
#ifdef Rel14
if (UL_info->rach_ind_br.rach_indication_body.number_of_preambles>0) {
AssertFatal(UL_info->rach_ind_br.rach_indication_body.number_of_preambles<5,"More than 4 preambles not supported\n");
for (i=0;i<UL_info->rach_ind_br.rach_indication_body.number_of_preambles;i++) {
AssertFatal(UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type>0,
"Got regular PRACH preamble, not BL/CE\n");
LOG_D(MAC,"Frame %d, Subframe %d Calling initiate_ra_proc (CE_level %d)\n",UL_info->frame,UL_info->subframe,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type-1);
initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.preamble,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.timing_advance,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.rnti,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type);
}
UL_info->rach_ind_br.rach_indication_body.number_of_preambles=0;
}
#endif
}
void handle_sr(UL_IND_t *UL_info) {
int i;
if (nfapi_mode == 1) // PNF
{
if (UL_info->sr_ind.sr_indication_body.number_of_srs>0)
{
oai_nfapi_sr_indication(&UL_info->sr_ind);
}
}
else
{
for (i=0;i<UL_info->sr_ind.sr_indication_body.number_of_srs;i++)
SR_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].rx_ue_information.rnti,
UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].ul_cqi_information.ul_cqi);
}
UL_info->sr_ind.sr_indication_body.number_of_srs=0;
}
void handle_cqi(UL_IND_t *UL_info) {
int i;
if (nfapi_mode == 1)
{
if (UL_info->cqi_ind.number_of_cqis>0)
{
LOG_D(PHY,"UL_info->cqi_ind.number_of_cqis:%d\n", UL_info->cqi_ind.number_of_cqis);
nfapi_cqi_indication_t ind;
ind.header.message_id = NFAPI_RX_CQI_INDICATION;
ind.sfn_sf = UL_info->frame<<4 | UL_info->subframe;
ind.cqi_indication_body = UL_info->cqi_ind;
oai_nfapi_cqi_indication(&ind);
UL_info->cqi_ind.number_of_cqis=0;
}
}
else
{
for (i=0;i<UL_info->cqi_ind.number_of_cqis;i++)
cqi_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->cqi_ind.cqi_pdu_list[i].rx_ue_information.rnti,
&UL_info->cqi_ind.cqi_pdu_list[i].cqi_indication_rel9,
UL_info->cqi_ind.cqi_raw_pdu_list[i].pdu,
&UL_info->cqi_ind.cqi_pdu_list[i].ul_cqi_information);
UL_info->cqi_ind.number_of_cqis=0;
}
}
void handle_harq(UL_IND_t *UL_info) {
int i;
if (nfapi_mode == 1 && UL_info->harq_ind.harq_indication_body.number_of_harqs>0) // PNF
{
//LOG_D(PHY, "UL_info->harq_ind.harq_indication_body.number_of_harqs:%d Send to VNF\n", UL_info->harq_ind.harq_indication_body.number_of_harqs);
int retval = oai_nfapi_harq_indication(&UL_info->harq_ind);
if (retval!=0)
{
LOG_E(PHY, "Failed to encode NFAPI HARQ_IND retval:%d\n", retval);
}
UL_info->harq_ind.harq_indication_body.number_of_harqs = 0;
}
else
{
for (i=0;i<UL_info->harq_ind.harq_indication_body.number_of_harqs;i++)
harq_indication(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->harq_ind.sfn_sf),
NFAPI_SFNSF2SF(UL_info->harq_ind.sfn_sf),
&UL_info->harq_ind.harq_indication_body.harq_pdu_list[i]);
UL_info->harq_ind.harq_indication_body.number_of_harqs=0;
}
}
void handle_ulsch(UL_IND_t *UL_info) {
int i,j;
if(nfapi_mode == 1)
{
if (UL_info->crc_ind.crc_indication_body.number_of_crcs>0)
{
//LOG_D(PHY,"UL_info->crc_ind.crc_indication_body.number_of_crcs:%d CRC_IND:SFN/SF:%d\n", UL_info->crc_ind.crc_indication_body.number_of_crcs, NFAPI_SFNSF2DEC(UL_info->crc_ind.sfn_sf));
oai_nfapi_crc_indication(&UL_info->crc_ind);
UL_info->crc_ind.crc_indication_body.number_of_crcs = 0;
}
if (UL_info->rx_ind.rx_indication_body.number_of_pdus>0)
{
//LOG_D(PHY,"UL_info->rx_ind.number_of_pdus:%d RX_IND:SFN/SF:%d\n", UL_info->rx_ind.rx_indication_body.number_of_pdus, NFAPI_SFNSF2DEC(UL_info->rx_ind.sfn_sf));
oai_nfapi_rx_ind(&UL_info->rx_ind);
UL_info->rx_ind.rx_indication_body.number_of_pdus = 0;
}
}
else
{
if (UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->crc_ind.crc_indication_body.number_of_crcs>0) {
for (i=0;i<UL_info->rx_ind.rx_indication_body.number_of_pdus;i++) {
for (j=0;j<UL_info->crc_ind.crc_indication_body.number_of_crcs;j++) {
// find crc_indication j corresponding rx_indication i
LOG_D(PHY,"UL_info->crc_ind.crc_indication_body.crc_pdu_list[%d].rx_ue_information.rnti:%04x UL_info->rx_ind.rx_indication_body.rx_pdu_list[%d].rx_ue_information.rnti:%04x\n", j, UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].rx_ue_information.rnti, i, UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti);
if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].rx_ue_information.rnti ==
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti) {
LOG_D(PHY, "UL_info->crc_ind.crc_indication_body.crc_pdu_list[%d].crc_indication_rel8.crc_flag:%d\n", j, UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag);
if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag == 1) { // CRC error indication
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->subframe,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
(uint8_t *)NULL,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
else {
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->subframe);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->subframe,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].data,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
break;
} //if (UL_info->crc_ind.crc_pdu_list[j].rx_ue_information.rnti ==
// UL_info->rx_ind.rx_pdu_list[i].rx_ue_information.rnti)
} // for (j=0;j<UL_info->crc_ind.crc_indication_body.number_of_crcs;j++)
} // for (i=0;i<UL_info->rx_ind.number_of_pdus;i++)
UL_info->crc_ind.crc_indication_body.number_of_crcs=0;
UL_info->rx_ind.rx_indication_body.number_of_pdus = 0;
} // UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->subframe && UL_info->crc_ind.crc_indication_body.number_of_crcs>0
else if (UL_info->rx_ind.rx_indication_body.number_of_pdus!=0 || UL_info->crc_ind.crc_indication_body.number_of_crcs!=0) {
LOG_E(PHY,"hoping not to have mis-match between CRC ind and RX ind - hopefully the missing message is coming shortly rx_ind:%d(SFN/SF:%05d) crc_ind:%d(SFN/SF:%05d) UL_info(SFN/SF):%04d%d\n",
UL_info->rx_ind.rx_indication_body.number_of_pdus, NFAPI_SFNSF2DEC(UL_info->rx_ind.sfn_sf),
UL_info->crc_ind.crc_indication_body.number_of_crcs, NFAPI_SFNSF2DEC(UL_info->crc_ind.sfn_sf),
UL_info->frame, UL_info->subframe);
}
}
}
/****************************************************************************/
/* debug utility functions begin */
/****************************************************************************/
//#define DUMP_FAPI
#ifdef DUMP_FAPI
#define C do { size = 0; put(0); } while (0)
#define A(...) do { char t[4096]; sprintf(t, __VA_ARGS__); append_string(t); } while (0)
#if 0
/* eats lots of ms at startup, disrupts realtime */
static char *s;
static int size;
static int maxsize;
static void put(char x)
{
if (size == maxsize) {
maxsize += 32768;
s = realloc(s, maxsize); if (s == NULL) abort();
}
s[size++] = x;
}
#else
/* eats nothing at startup, but fixed size */
#define SMAX 65536
static char s[SMAX];
static int size;
static int maxsize = SMAX;
static void put(char x)
{
if (size == maxsize) { printf("incrase SMAX\n"); exit(1); }
s[size++] = x;
}
#endif
static void append_string(char *t)
{
size--;
while (*t) put(*t++);
put(0);
}
static void dump_ul(UL_IND_t *u)
{
int i;
C;
A("XXXX UL mod %d CC %d f.sf %d.%d\n",
u->module_id, u->CC_id, u->frame, u->subframe);
A("XXXX harq_ind %d\n", u->harq_ind.harq_indication_body.number_of_harqs);
for (i = 0; i < u->harq_ind.harq_indication_body.number_of_harqs; i++) {
nfapi_harq_indication_pdu_t *v = &u->harq_ind.harq_indication_body.harq_pdu_list[i];
A("XXXX harq ind %d\n", i);
A("XXXX rnti %d\n", v->rx_ue_information.rnti);
A("XXXX tb1 %d tb2 %d\n", v->harq_indication_fdd_rel8.harq_tb1,
v->harq_indication_fdd_rel8.harq_tb2);
A("XXXX number_of_ack_nack %d\n",
v->harq_indication_fdd_rel9.number_of_ack_nack);
A("XXXX harq[0] = %d\n",
v->harq_indication_fdd_rel9.harq_tb_n[0]);
A("XXXX harq ul_cqi %d channel %d\n", v->ul_cqi_information.ul_cqi,
v->ul_cqi_information.channel);
}
A("XXXX crc_ind %d\n", u->crc_ind.crc_indication_body.number_of_crcs);
A("XXXX sr_ind %d\n", u->sr_ind.sr_indication_body.number_of_srs);
A("XXXX cqi_ind %d\n", u->cqi_ind.number_of_cqis);
for (i = 0; i < u->cqi_ind.number_of_cqis; i++) {
nfapi_cqi_indication_pdu_t *v = &u->cqi_ind.cqi_pdu_list[i];
A("XXXX cqi ind %d\n", i);
A("XXXX cqi ul_cqi %d channel %d\n", v->ul_cqi_information.ul_cqi,
v->ul_cqi_information.channel);
}
A("XXXX rach_ind %d\n", u->rach_ind.rach_indication_body.number_of_preambles);
A("XXXX rx_ind %d\n", u->rx_ind.rx_indication_body.number_of_pdus);
for (i = 0; i < u->rx_ind.rx_indication_body.number_of_pdus; i++) {
nfapi_rx_indication_pdu_t *v = &u->rx_ind.rx_indication_body.rx_pdu_list[i];
A("XXXX rx ind %d\n", i);
A("XXXX timing_advance %d\n",
v->rx_indication_rel8.timing_advance);
A("XXXX rx ul_cqi %d\n", v->rx_indication_rel8.ul_cqi);
}
LOG_I(PHY, "XXXX UL\nXXXX UL\n%s", s);
}
static char *DL_PDU_TYPE(int x)
{
switch (x) {
case NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE: return "NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE";
case NFAPI_DL_CONFIG_BCH_PDU_TYPE: return "NFAPI_DL_CONFIG_BCH_PDU_TYPE";
case NFAPI_DL_CONFIG_MCH_PDU_TYPE: return "NFAPI_DL_CONFIG_MCH_PDU_TYPE";
case NFAPI_DL_CONFIG_DLSCH_PDU_TYPE: return "NFAPI_DL_CONFIG_DLSCH_PDU_TYPE";
case NFAPI_DL_CONFIG_PCH_PDU_TYPE: return "NFAPI_DL_CONFIG_PCH_PDU_TYPE";
case NFAPI_DL_CONFIG_PRS_PDU_TYPE: return "NFAPI_DL_CONFIG_PRS_PDU_TYPE";
case NFAPI_DL_CONFIG_CSI_RS_PDU_TYPE: return "NFAPI_DL_CONFIG_CSI_RS_PDU_TYPE";
case NFAPI_DL_CONFIG_EPDCCH_DL_PDU_TYPE: return "NFAPI_DL_CONFIG_EPDCCH_DL_PDU_TYPE";
case NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE: return "NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE";
case NFAPI_DL_CONFIG_NBCH_PDU_TYPE: return "NFAPI_DL_CONFIG_NBCH_PDU_TYPE";
case NFAPI_DL_CONFIG_NPDCCH_PDU_TYPE: return "NFAPI_DL_CONFIG_NPDCCH_PDU_TYPE";
case NFAPI_DL_CONFIG_NDLSCH_PDU_TYPE: return "NFAPI_DL_CONFIG_NDLSCH_PDU_TYPE";
}
return "UNKNOWN";
}
static char *UL_PDU_TYPE(int x)
{
switch (x) {
case NFAPI_UL_CONFIG_ULSCH_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_CQI_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_CQI_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_CQI_SR_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_CQI_SR_PDU_TYPE";
case NFAPI_UL_CONFIG_UCI_CQI_SR_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_UCI_CQI_SR_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_SRS_PDU_TYPE: return "NFAPI_UL_CONFIG_SRS_PDU_TYPE";
case NFAPI_UL_CONFIG_HARQ_BUFFER_PDU_TYPE: return "NFAPI_UL_CONFIG_HARQ_BUFFER_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_UCI_CSI_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_UCI_CSI_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_UCI_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_UCI_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_ULSCH_CSI_UCI_HARQ_PDU_TYPE: return "NFAPI_UL_CONFIG_ULSCH_CSI_UCI_HARQ_PDU_TYPE";
case NFAPI_UL_CONFIG_NULSCH_PDU_TYPE: return "NFAPI_UL_CONFIG_NULSCH_PDU_TYPE";
case NFAPI_UL_CONFIG_NRACH_PDU_TYPE: return "NFAPI_UL_CONFIG_NRACH_PDU_TYPE";
}
return "UNKNOWN";
}
static char *HI_DCI0_PDU_TYPE(int x)
{
switch (x) {
case NFAPI_HI_DCI0_HI_PDU_TYPE: return "NFAPI_HI_DCI0_HI_PDU_TYPE";
case NFAPI_HI_DCI0_DCI_PDU_TYPE: return "NFAPI_HI_DCI0_DCI_PDU_TYPE";
case NFAPI_HI_DCI0_EPDCCH_DCI_PDU_TYPE: return "NFAPI_HI_DCI0_EPDCCH_DCI_PDU_TYPE";
case NFAPI_HI_DCI0_MPDCCH_DCI_PDU_TYPE: return "NFAPI_HI_DCI0_MPDCCH_DCI_PDU_TYPE";
case NFAPI_HI_DCI0_NPDCCH_DCI_PDU_TYPE: return "NFAPI_HI_DCI0_NPDCCH_DCI_PDU_TYPE";
}
return "UNKNOWN";
}
static void dump_dl(Sched_Rsp_t *d)
{
int i;
C;
A("XXXX DL mod %d CC %d f.sf %d.%d\n",
d->module_id, d->CC_id, d->frame, d->subframe);
if (d->DL_req != NULL) {
nfapi_dl_config_request_body_t *v=&d->DL_req->dl_config_request_body;
nfapi_dl_config_request_pdu_t *p = v->dl_config_pdu_list;
A("XXXX DL_req sfnsf %d\n", d->DL_req->sfn_sf);
A("XXXX PDCCH size %d\n", v->number_pdcch_ofdm_symbols);
A("XXXX DCIs %d\n", v->number_dci);
A("XXXX PDUs %d\n", v->number_pdu);
A("XXXX rntis %d\n", v->number_pdsch_rnti);
A("XXXX pcfich power %d\n", v->transmission_power_pcfich);
for (i = 0; i < v->number_pdu; i++) {
A("XXXX pdu %d\n", i);
A("XXXX type %d %s\n", p[i].pdu_type, DL_PDU_TYPE(p[i].pdu_type));
switch (p[i].pdu_type) {
case NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE: {
nfapi_dl_config_dci_dl_pdu_rel8_t *q =
&p[i].dci_dl_pdu.dci_dl_pdu_rel8;
A("XXXX dci format %d\n", q->dci_format);
A("XXXX cce idx %d\n", q->cce_idx);
A("XXXX agg lvl %d\n", q->aggregation_level);
A("XXXX rnti %d\n", q->rnti);
A("XXXX rb coding %8.8x\n", q->resource_block_coding);
A("XXXX mcs_1 %d\n", q->mcs_1);
A("XXXX rv_1 %d\n", q->redundancy_version_1);
A("XXXX ndi_1 %d\n", q->new_data_indicator_1);
A("XXXX harq pid %d\n", q->harq_process);
A("XXXX tpc %d\n", q->tpc);
A("XXXX tbs idx %d\n", q->transport_block_size_index);
A("XXXX dl pow off %d\n", q->downlink_power_offset);
A("XXXX rnti type %d\n", q->rnti_type);
A("XXXX xmit pow %d\n", q->transmission_power);
break;
}
case NFAPI_DL_CONFIG_DLSCH_PDU_TYPE: {
nfapi_dl_config_dlsch_pdu_rel8_t *q =
&p[i].dlsch_pdu.dlsch_pdu_rel8;
A("XXXX pdu_index %d\n", q->pdu_index);
A("XXXX rnti %d\n", q->rnti);
A("XXXX rv %d\n", q->redundancy_version);
A("XXXX mcs %d\n", q->modulation);
A("XXXX pa %d\n", q->pa);
break;
}}
}
}
if (d->HI_DCI0_req != NULL) {
nfapi_hi_dci0_request_body_t *v=&d->HI_DCI0_req->hi_dci0_request_body;
A("XXXX up HI_DCI0_req sfnsf %d (%d.%d)\n", d->HI_DCI0_req->sfn_sf,
d->HI_DCI0_req->sfn_sf/16, d->HI_DCI0_req->sfn_sf%16);
A("XXXX up sfnsf %d\n", v->sfnsf);
A("XXXX up DCIs %d\n", v->number_of_dci);
A("XXXX up HIs %d\n", v->number_of_hi);
for (i = 0; i < v->number_of_dci + v->number_of_hi; i++) {
nfapi_hi_dci0_request_pdu_t *p = &v->hi_dci0_pdu_list[i];
A("XXXX up pdu %d\n", i);
A("XXXX up type %d %s\n",p->pdu_type,HI_DCI0_PDU_TYPE(p->pdu_type));
if (p->pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) {
nfapi_hi_dci0_dci_pdu_rel8_t *q = &p->dci_pdu.dci_pdu_rel8;
A("XXXX up dci_format %d\n", q->dci_format);
A("XXXX up cce_index %d\n", q->cce_index);
A("XXXX up aggregation_level %d\n", q->aggregation_level);
A("XXXX up rnti %d\n", q->rnti);
A("XXXX up rb start %d\n", q->resource_block_start);
A("XXXX up # rb %d\n", q->number_of_resource_block);
A("XXXX up mcs_1 %d\n", q->mcs_1);
A("XXXX up cshift_2_for_drms %d\n", q->cyclic_shift_2_for_drms);
A("XXXX up freq hop enabled %d\n", q->frequency_hopping_enabled_flag);
A("XXXX up fre hop bits %d\n", q->frequency_hopping_bits);
A("XXXX up NDI_1 %d\n", q->new_data_indication_1);
A("XXXX up tx_antenna_seleciton %d\n", q->ue_tx_antenna_seleciton);
A("XXXX up tpc %d\n", q->tpc);
A("XXXX up cqi_csi_request %d\n", q->cqi_csi_request);
A("XXXX up ul_index %d\n", q->ul_index);
A("XXXX up dl_assignment_index %d\n", q->dl_assignment_index);
A("XXXX up tpc_bitmap %d\n", q->tpc_bitmap);
A("XXXX up transmission_power %d\n", q->transmission_power);
}
if (p->pdu_type == NFAPI_HI_DCI0_HI_PDU_TYPE) {
nfapi_hi_dci0_hi_pdu_rel8_t *q = &p->hi_pdu.hi_pdu_rel8;
A("XXXX up rb start %d\n", q->resource_block_start);
A("XXXX up cs2_drms %d\n", q->cyclic_shift_2_for_drms);
A("XXXX up ack %d\n", q->hi_value);
A("XXXX up i_phich %d\n", q->i_phich);
A("XXXX up power %d\n", q->transmission_power);
}
}
}
if (d->UL_req != NULL) {
nfapi_ul_config_request_body_t *v=&d->UL_req->ul_config_request_body;
A("XXXX UL_req sfnsf %d (%d.%d)\n", d->UL_req->sfn_sf,
d->UL_req->sfn_sf/16, d->UL_req->sfn_sf%16);
A("XXXX PDUs %d\n", v->number_of_pdus);
A("XXXX ra freq %d\n", v->rach_prach_frequency_resources);
A("XXXX srs? %d\n", v->srs_present);
for (i = 0; i < v->number_of_pdus; i++) {
nfapi_ul_config_request_pdu_t *p = &v->ul_config_pdu_list[i];
A("XXXX pdu %d\n", i);
A("XXXX type %d %s\n", p->pdu_type, UL_PDU_TYPE(p->pdu_type));
switch(p->pdu_type) {
case NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE: {
nfapi_ul_config_uci_harq_pdu *q = &p->uci_harq_pdu;
nfapi_ul_config_harq_information_rel9_fdd_t *h =
&q->harq_information.harq_information_rel9_fdd;
A("XXXX rnti %d\n",
q->ue_information.ue_information_rel8.rnti);
A("XXXX harq size %d\n", h->harq_size);
A("XXXX ack_nack_mode %d\n", h->ack_nack_mode);
A("XXXX # pucch res %d\n", h->number_of_pucch_resources);
A("XXXX n_pucch_1_0 %d\n", h->n_pucch_1_0);
A("XXXX n_pucch_1_1 %d\n", h->n_pucch_1_1);
A("XXXX n_pucch_1_2 %d\n", h->n_pucch_1_2);
A("XXXX n_pucch_1_3 %d\n", h->n_pucch_1_3);
break;
}
case NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE: {
nfapi_ul_config_uci_sr_pdu *q = &p->uci_sr_pdu;
nfapi_ul_config_sr_information_rel8_t *h =
&q->sr_information.sr_information_rel8;
A("XXXX rnti %d\n",
q->ue_information.ue_information_rel8.rnti);
A("XXXX pucch_index %d\n", h->pucch_index);
}}
}
}
LOG_I(PHY, "XXXX DL\nXXXX DL\n%s", s);
}
#undef C
#undef A
#endif /* DUMP_FAPI */
/****************************************************************************/
/* debug utility functions end */
/****************************************************************************/
void UL_indication(UL_IND_t *UL_info)
{
AssertFatal(UL_info!=NULL,"UL_INFO is null\n");
#ifdef DUMP_FAPI
dump_ul(UL_info);
#endif
module_id_t module_id = UL_info->module_id;
int CC_id = UL_info->CC_id;
Sched_Rsp_t *sched_info = &Sched_INFO[module_id][CC_id];
IF_Module_t *ifi = if_inst[module_id];
eNB_MAC_INST *mac = RC.mac[module_id];
LOG_D(PHY,"SFN/SF:%d%d module_id:%d CC_id:%d UL_info[rx_ind:%d harqs:%d crcs:%d cqis:%d preambles:%d sr_ind:%d]\n",
UL_info->frame,UL_info->subframe,
module_id,CC_id,
UL_info->rx_ind.rx_indication_body.number_of_pdus, UL_info->harq_ind.harq_indication_body.number_of_harqs, UL_info->crc_ind.crc_indication_body.number_of_crcs, UL_info->cqi_ind.number_of_cqis, UL_info->rach_ind.rach_indication_body.number_of_preambles, UL_info->sr_ind.sr_indication_body.number_of_srs);
if (nfapi_mode != 1)
{
if (ifi->CC_mask==0) {
ifi->current_frame = UL_info->frame;
ifi->current_subframe = UL_info->subframe;
}
else {
AssertFatal(UL_info->frame != ifi->current_frame,"CC_mask %x is not full and frame has changed\n",ifi->CC_mask);
AssertFatal(UL_info->subframe != ifi->current_subframe,"CC_mask %x is not full and subframe has changed\n",ifi->CC_mask);
}
ifi->CC_mask |= (1<<CC_id);
}
// clear DL/UL info for new scheduling round
clear_nfapi_information(RC.mac[module_id],CC_id,
UL_info->frame,UL_info->subframe);
handle_rach(UL_info);
handle_sr(UL_info);
handle_cqi(UL_info);
handle_harq(UL_info);
// clear HI prior to handling ULSCH
mac->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi = 0;
handle_ulsch(UL_info);
if (nfapi_mode != 1)
{
if (ifi->CC_mask == ((1<<MAX_NUM_CCs)-1)) {
eNB_dlsch_ulsch_scheduler(module_id,
(UL_info->frame+((UL_info->subframe>(9-sf_ahead))?1:0)) % 1024,
(UL_info->subframe+sf_ahead)%10);
ifi->CC_mask = 0;
sched_info->module_id = module_id;
sched_info->CC_id = CC_id;
sched_info->frame = (UL_info->frame + ((UL_info->subframe>(9-sf_ahead)) ? 1 : 0)) % 1024;
sched_info->subframe = (UL_info->subframe+sf_ahead)%10;
sched_info->DL_req = &mac->DL_req[CC_id];
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
(is_UL_sf(&mac->common_channels[CC_id],(sched_info->subframe+sf_ahead)%10)>0))
sched_info->UL_req = &mac->UL_req[CC_id];
else
sched_info->UL_req = NULL;
sched_info->TX_req = &mac->TX_req[CC_id];
#ifdef DUMP_FAPI
dump_dl(sched_info);
#endif
if (ifi->schedule_response)
{
AssertFatal(ifi->schedule_response!=NULL,
"schedule_response is null (mod %d, cc %d)\n",
module_id,
CC_id);
ifi->schedule_response(sched_info);
}
LOG_D(PHY,"Schedule_response: SFN_SF:%d%d dl_pdus:%d\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->dl_config_request_body.number_pdu);
}
}
}
IF_Module_t *IF_Module_init(int Mod_id){
AssertFatal(Mod_id<MAX_MODULES,"Asking for Module %d > %d\n",Mod_id,MAX_IF_MODULES);
LOG_D(PHY,"Installing callbacks for IF_Module - UL_indication\n");
if (if_inst[Mod_id]==NULL) {
if_inst[Mod_id] = (IF_Module_t*)malloc(sizeof(IF_Module_t));
memset((void*)if_inst[Mod_id],0,sizeof(IF_Module_t));
if_inst[Mod_id]->CC_mask=0;
if_inst[Mod_id]->UL_indication = UL_indication;
AssertFatal(pthread_mutex_init(&if_inst[Mod_id]->if_mutex,NULL)==0,
"allocation of if_inst[%d]->if_mutex fails\n",Mod_id);
}
return if_inst[Mod_id];
}
void IF_Module_kill(int Mod_id) {
AssertFatal(Mod_id>MAX_MODULES,"Asking for Module %d > %d\n",Mod_id,MAX_IF_MODULES);
if (if_inst[Mod_id]!=NULL) free(if_inst[Mod_id]);
}
openair2/NR_UE_PHY_INTERFACE/IF_Module.h deleted 100644 → 0
View file @ 89d0971d
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file openair2/PHY_INTERFACE/IF_Module.h
* \brief data structures for PHY/MAC interface modules
* \author EURECOM/NTUST
* \date 2017
* \version 0.1
* \company Eurecom
* \email: raymond.knopp@eurecom.fr
* \note
* \warning
*/
#ifndef __IF_MODULE__H__
#define __IF_MODULE__H__
#include <stdint.h>
#include "openair1/PHY/LTE_TRANSPORT/defs.h"
#include "nfapi_interface.h"
#define MAX_NUM_DL_PDU 100
#define MAX_NUM_UL_PDU 100
#define MAX_NUM_HI_DCI0_PDU 100
#define MAX_NUM_TX_REQUEST_PDU 100
#define MAX_NUM_HARQ_IND 100
#define MAX_NUM_CRC_IND 100
#define MAX_NUM_SR_IND 100
#define MAX_NUM_CQI_IND 100
#define MAX_NUM_RACH_IND 100
#define MAX_NUM_SRS_IND 100
typedef struct{
/// Module ID
module_id_t module_id;
/// CC ID
int CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// harq indication list
nfapi_harq_indication_t harq_ind;
/// crc indication list
nfapi_crc_indication_t crc_ind;
/// SR indication list
nfapi_sr_indication_t sr_ind;
/// CQI indication list
nfapi_cqi_indication_body_t cqi_ind;
/// RACH indication list
nfapi_rach_indication_t rach_ind;
#ifdef Rel14
/// RACH indication list for BR UEs
nfapi_rach_indication_t rach_ind_br;
#endif
/// SRS indication list
nfapi_srs_indication_body_t srs_ind;
/// RX indication
nfapi_rx_indication_t rx_ind;
} UL_IND_t;
// Downlink subframe P7
typedef struct{
/// Module ID
module_id_t module_id;
/// CC ID
uint8_t CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// nFAPI DL Config Request
nfapi_dl_config_request_t *DL_req;
/// nFAPI UL Config Request
nfapi_ul_config_request_t *UL_req;
/// nFAPI HI_DCI Request
nfapi_hi_dci0_request_t *HI_DCI0_req;
/// Pointers to DL SDUs
nfapi_tx_request_t *TX_req;
}Sched_Rsp_t;
typedef struct {
uint8_t Mod_id;
int CC_id;
nfapi_config_request_t *cfg;
}PHY_Config_t;
typedef struct IF_Module_s{
//define the function pointer
void (*UL_indication)(UL_IND_t *UL_INFO);
void (*schedule_response)(Sched_Rsp_t *Sched_INFO);
void (*PHY_config_req)(PHY_Config_t* config_INFO);
uint32_t CC_mask;
uint16_t current_frame;
uint8_t current_subframe;
pthread_mutex_t if_mutex;
}IF_Module_t;
/*Initial */
IF_Module_t *IF_Module_init(int Mod_id);
void IF_Module_kill(int Mod_id);
/*Interface for uplink, transmitting the Preamble(list), ULSCH SDU, NAK, Tick (trigger scheduler)
*/
void UL_indication(UL_IND_t *UL_INFO);
/*Interface for Downlink, transmitting the DLSCH SDU, DCI SDU*/
void Schedule_Response(Sched_Rsp_t *Sched_INFO);
#endif
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c 0 → 100755
View file @ f16d6127
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file NR_IF_Module.c
* \brief functions for NR UE FAPI-like interface
* \author R. Knopp
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#include "NR_IF_Module.h"
#include "LAYER2/NR_MAC_UE/proto.h"
#define MAX_IF_MODULES 100
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
int8_t handle_bcch_bch(uint32_t pdu_len, uint8_t *pduP){
// pdu_len = 4, 32bits
uint8_t extra_bits = pduP[3];
uint32_t ssb_index;
uint32_t frame;
nr_ue_decode_mib( (module_id_t)0,
0,
0,
extra_bits,
0, // Lssb = 64 is not support
&ssb_index,
&frame,
pduP,
3 );
return 0;
}
int8_t handle_bcch_dlsch(uint32_t pdu_len, uint8_t *pduP){
return 0;
}
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
if(dl_info->rx_ind != NULL){
switch(dl_info->rx_ind->rx_request_body.pdu_index){
case FAPI_NR_RX_PDU_BCCH_BCH_TYPE:
handle_bcch_bch(dl_info->rx_ind->rx_request_body.pdu_length, dl_info->rx_ind->rx_request_body.pdu);
break;
case FAPI_NR_RX_PDU_BCCH_DLSCH_TYPE:
handle_bcch_dlsch(dl_info->rx_ind->rx_request_body.pdu_length, dl_info->rx_ind->rx_request_body.pdu);
break;
default:
break;
}
}
if(dl_info->dci_ind != NULL){
}
return 0;
}
nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id){
if (nr_ue_if_module_inst[module_id] == NULL) {
nr_ue_if_module_inst[module_id] = (nr_ue_if_module_t*)malloc(sizeof(nr_ue_if_module_t));
memset((void*)nr_ue_if_module_inst[module_id],0,sizeof(nr_ue_if_module_t));
nr_ue_if_module_inst[module_id]->CC_mask=0;
nr_ue_if_module_register_dl_indication(module_id, nr_ue_dl_indication);
}
return nr_ue_if_module_inst[module_id];
}
int8_t nr_ue_if_module_register_dl_indication(uint32_t module_id, nr_ue_dl_indication_f *f){
if (nr_ue_if_module_inst[module_id] == NULL) {
nr_ue_if_module_inst[module_id]->dl_indication = f;
}else{
return -1;
}
return 0;
}
int8_t nr_ue_if_module_register_phy_config_request(uint32_t module_id, nr_ue_phy_config_request_f *f){
if (nr_ue_if_module_inst[module_id] == NULL) {
nr_ue_if_module_inst[module_id]->phy_config_request = f;
}else{
return -1;
}
return 0;
}
int8_t nr_ue_if_module_register_scheduled_response(uint32_t module_id, nr_ue_scheduled_response_f *f){
if (nr_ue_if_module_inst[module_id] == NULL) {
nr_ue_if_module_inst[module_id]->scheduled_response = f;
}else{
return -1;
}
return 0;
}
int8_t nr_ue_if_module_kill(uint32_t module_id) {
if (nr_ue_if_module_inst[module_id] != NULL){
free(nr_ue_if_module_inst[module_id]);
}
return 0;
}
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h 0 → 100755
View file @ f16d6127
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file openair2/PHY_INTERFACE/IF_Module.h
* \brief data structures for PHY/MAC interface modules
* \author EURECOM/NTUST
* \date 2018
* \version 0.1
* \company Eurecom
* \email: raymond.knopp@eurecom.fr
* \note
* \warning
*/
#ifndef __NR_IF_MODULE_H__
#define __NR_IF_MODULE_H__
#include "platform_types.h"
#include "fapi_nr_ue_interface.h"
typedef struct {
/// module id
module_id_t module_id;
/// component carrier id
int CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// slot
uint8_t slot;
/// NR UE FAPI-like P7 message, direction: L1 to L2
/// data reception indication structure
fapi_nr_rx_indication_t *rx_ind;
/// dci reception indication structure
fapi_nr_dci_indication_t *dci_ind;
} nr_downlink_indication_t;
// Downlink subframe P7
typedef struct {
/// module id
module_id_t module_id;
/// component carrier id
uint8_t CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// slot
uint8_t slot;
/// NR UE FAPI-like P7 message, direction: L2 to L1
/// downlink transmission configuration request structure
fapi_nr_dl_config_request_t *dl_config;
/// uplink transmission configuration request structure
fapi_nr_ul_config_request_t *ul_config;
/// data transmission request structure
fapi_nr_tx_request_t *tx_request;
} nr_scheduled_response_t;
typedef struct {
/// module id
uint8_t Mod_id;
/// component carrier id
uint8_t CC_id;
/// NR UE FAPI-like P5 message
/// physical layer configuration request structure
fapi_nr_config_request_t *config_req;
} nr_phy_config_t;
/*
* Generic type of an application-defined callback to return various
* types of data to the application.
* EXPECTED RETURN VALUES:
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int8_t(nr_ue_scheduled_response_f)(nr_scheduled_response_t *scheduled_response);
/*
* Generic type of an application-defined callback to return various
* types of data to the application.
* EXPECTED RETURN VALUES:
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int8_t(nr_ue_phy_config_request_f)(nr_phy_config_t *phy_config);
/*
* Generic type of an application-defined callback to return various
* types of data to the application.
* EXPECTED RETURN VALUES:
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int8_t(nr_ue_dl_indication_f)(nr_downlink_indication_t *dl_info);
// TODO check this stuff can be reuse of need modification
typedef struct IF_Module_s {
nr_ue_scheduled_response_f *scheduled_response;
nr_ue_phy_config_request_f *phy_config_request;
nr_ue_dl_indication_f *dl_indication;
uint32_t CC_mask;
uint16_t current_frame;
uint8_t current_subframe;
//pthread_mutex_t nr_if_mutex;
} nr_ue_if_module_t;
/**\brief reserved one of the interface(if) module instantce from pointer pool and done memory allocation by module_id.
\param module_id module id*/
nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id);
/**\brief done free of memory allocation by module_id and release to pointer pool.
\param module_id module id*/
int8_t nr_ue_if_module_kill(uint32_t module_id);
/**\brief interface between L1/L2, indicating the downlink related information, like dci_ind and rx_req
\param dl_info including dci_ind and rx_request messages*/
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
/**\brief register dl_indication into certain if_module_inst by module_id
\param f function pointer to dl_indication*/
int8_t nr_ue_if_module_register_dl_indication(uint32_t module_id, nr_ue_dl_indication_f *f);
/**\brief register phy_config_request into certain if_module_inst by module_id
\param f function pointer to phy_config_request*/
int8_t nr_ue_if_module_register_phy_config_request(uint32_t module_id, nr_ue_phy_config_request_f *f);
/**\brief register scheduled_response into certain if_module_inst by module_id
\param f function pointer to scheduled_response*/
int8_t nr_ue_if_module_register_scheduled_response(uint32_t module_id, nr_ue_scheduled_response_f *f);
/**\brief handle BCCH-BCH message from dl_indication
\param pdu_len length(bytes) of pdu
\param pduP pointer to pdu*/
int8_t handle_bcch_bch(uint32_t pdu_len, uint8_t *pduP);
/**\brief handle BCCH-DL-SCH message from dl_indication
\param pdu_len length(bytes) of pdu
\param pduP pointer to pdu*/
int8_t handle_bcch_dlsch(uint32_t pdu_len, uint8_t *pduP);
#endif
openair2/RRC/NR_UE/rrc_UE.c 100644 → 100755
View file @ f16d6127
......@@ -287,6 +287,10 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
NR_BCCH_BCH_Message_t *bcch_message = NULL;
NR_MIB_t *mib = NR_UE_rrc_inst->mib;
if(mib != NULL){
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)mib, 1 );
}
asn_dec_rval_t dec_rval = uper_decode_complete( NULL,
&asn_DEF_NR_BCCH_BCH_Message,
(void **)&bcch_message,
......@@ -307,10 +311,11 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
return -1;
}
// copy into rrc instance
memcpy( (void *)mib,
(void *)&bcch_message->message.choice.mib,
sizeof(NR_MIB_t) );
// link to rrc instance
mib = &bcch_message->message.choice.mib;
//memcpy( (void *)mib,
// (void *)&bcch_message->message.choice.mib,
// sizeof(NR_MIB_t) );
nr_rrc_mac_config_req_ue( 0, 0, 0, mib, NULL, NULL, NULL);
......
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