Commit f5433cb0 authored by masayuki.harada's avatar masayuki.harada Committed by Haruki NAOI

Add statistics logs.

(cherry picked from commit cf8f14edf4a261e1df72579423786d39ba6d97f9)
parent 33cf7a27
......@@ -359,12 +359,19 @@ int wake_eNB_rxtx(PHY_VARS_eNB *eNB, uint16_t sfn, uint16_t sf) {
exit_fun( "error locking mutex_rxtx" );
return(-1);
}
static int busy_log_cnt=0;
if(L1_proc->instance_cnt < 0){
++L1_proc->instance_cnt;
if(busy_log_cnt!=0){
LOG_E(MAC,"RCC singal to rxtx frame %d subframe %d busy end %d (frame %d subframe %d)\n",L1_proc->frame_rx,L1_proc->subframe_rx,busy_log_cnt,proc->frame_rx,proc->subframe_rx);
}
busy_log_cnt=0;
}else{
if(busy_log_cnt==0){
LOG_E(MAC,"RCC singal to rxtx frame %d subframe %d busy %d (frame %d subframe %d)\n",L1_proc->frame_rx,L1_proc->subframe_rx,L1_proc->instance_cnt,proc->frame_rx,proc->subframe_rx);
}
pthread_mutex_unlock( &L1_proc->mutex );
busy_log_cnt++;
return(0);
}
......
......@@ -829,16 +829,16 @@ typedef struct {
uint8_t periodic_ri_received[NFAPI_CC_MAX];
uint8_t aperiodic_ri_received[NFAPI_CC_MAX];
uint32_t pucch_tpc_accumulated[NFAPI_CC_MAX];
uint8_t pucch1_cqi_update[NFAPI_CC_MAX];
uint8_t pucch1_snr[NFAPI_CC_MAX];
uint8_t pucch2_cqi_update[NFAPI_CC_MAX];
uint8_t pucch2_snr[NFAPI_CC_MAX];
uint8_t pucch3_cqi_update[NFAPI_CC_MAX];
uint8_t pucch3_snr[NFAPI_CC_MAX];
int16_t pucch1_cqi_update[NFAPI_CC_MAX];
int16_t pucch1_snr[NFAPI_CC_MAX];
int16_t pucch2_cqi_update[NFAPI_CC_MAX];
int16_t pucch2_snr[NFAPI_CC_MAX];
int16_t pucch3_cqi_update[NFAPI_CC_MAX];
int16_t pucch3_snr[NFAPI_CC_MAX];
double pusch_cqi_f[NFAPI_CC_MAX];
uint8_t pusch_cqi[NFAPI_CC_MAX];
uint8_t pusch_snr[NFAPI_CC_MAX];
uint8_t pusch_snr_avg[NFAPI_CC_MAX];
int16_t pusch_cqi[NFAPI_CC_MAX];
int16_t pusch_snr[NFAPI_CC_MAX];
int16_t pusch_snr_avg[NFAPI_CC_MAX];
uint64_t pusch_rx_num[NFAPI_CC_MAX];
uint64_t pusch_rx_num_old[NFAPI_CC_MAX];
uint64_t pusch_rx_error_num[NFAPI_CC_MAX];
......
......@@ -637,14 +637,42 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
UE_scheduling_control = &(UE_list->UE_sched_ctrl[UE_id]);
if (((frameP & 127) == 0) && (subframeP == 0)) {
LOG_I(MAC,"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d RLC discard %d\n",
double total_bler;
if(UE_scheduling_control->pusch_rx_num[CC_id] == 0 && UE_scheduling_control->pusch_rx_error_num[CC_id] == 0) {
total_bler = 0;
}
else {
total_bler = (double)UE_scheduling_control->pusch_rx_error_num[CC_id] / (double)(UE_scheduling_control->pusch_rx_error_num[CC_id] + UE_scheduling_control->pusch_rx_num[CC_id]) * 100;
}
LOG_I(MAC,"UE %x : %s, PHR %d DLCQI %d PUSCH %d PUCCH %d RLC disc %d UL-stat rcv %lu err %lu bler %lf mcsoff %d bsr %u sched %u tbs %lu cnt %u , DL-stat tbs %lu cnt %u rb %u buf %u 1st %u ret %u ri %d\n",
rnti,
UE_scheduling_control->ul_out_of_sync == 0 ? "in synch" : "out of sync",
UE_list->UE_template[CC_id][UE_id].phr_info,
UE_scheduling_control->dl_cqi[CC_id],
UE_scheduling_control->pusch_snr_avg[CC_id],
UE_scheduling_control->pucch1_snr[CC_id],
UE_scheduling_control->rlc_out_of_resources_cnt);
UE_scheduling_control->rlc_out_of_resources_cnt,
UE_scheduling_control->pusch_rx_num[CC_id],
UE_scheduling_control->pusch_rx_error_num[CC_id],
total_bler,
UE_scheduling_control->mcs_offset[CC_id],
UE_list->UE_template[CC_id][UE_id].estimated_ul_buffer,
UE_list->UE_template[CC_id][UE_id].scheduled_ul_bytes,
UE_list->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes_rx,
UE_list->eNB_UE_stats[CC_id][UE_id].total_num_pdus_rx,
UE_list->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes,
UE_list->eNB_UE_stats[CC_id][UE_id].total_num_pdus,
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used,
#if defined(PRE_SCD_THREAD)
dl_buffer_total[CC_id][UE_id],
#else
0,
#endif
UE_scheduling_control->first_cnt[CC_id],
UE_scheduling_control->ret_cnt[CC_id],
UE_scheduling_control->aperiodic_ri_received[CC_id]
);
pthread_mutex_lock(&(UE_scheduling_control->rlc_out_of_resources_lock));
UE_scheduling_control->rlc_out_of_resources_cnt = 0;
pthread_mutex_unlock(&(UE_scheduling_control->rlc_out_of_resources_lock));
......
......@@ -1184,8 +1184,10 @@ void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id,
round2 = ue_sched_ctl->round[CC_id][harq_pid][TB2];
if ((round1 != 8) || (round2 != 8)){
Round = cmin(round1,round2);
ue_sched_ctl->ret_cnt[CC_id]++;
} else{
Round = 8;
ue_sched_ctl->first_cnt[CC_id]++;
}
//if (mac_eNB_get_rrc_status(Mod_id, rnti) < RRC_RECONFIGURED || round > 0) {
......
......@@ -2658,7 +2658,8 @@ add_new_ue(module_id_t mod_idP,
UE_list->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0;
UE_list->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[cc_idP] = 0;
UE_list->UE_sched_ctrl[UE_id].pusch_bler[cc_idP] = 0;
UE_list->UE_sched_ctrl[UE_id].mcs_offset[cc_idP] = 0;
UE_list->UE_sched_ctrl[UE_id].ret_cnt[cc_idP] = 0;
UE_list->UE_sched_ctrl[UE_id].first_cnt[cc_idP] = 0;
UE_list->UE_sched_ctrl[UE_id].volte_configured = FALSE;
UE_list->UE_sched_ctrl[UE_id].ul_periodic_timer_exp_flag = FALSE;
......
......@@ -217,7 +217,7 @@ rx_sdu(const module_id_t enb_mod_idP,
}
} else { // sduP == NULL => error
UE_scheduling_control->pusch_rx_error_num[CC_idP]++;
LOG_I(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x\n",
LOG_D(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x\n",
enb_mod_idP,
harq_pid,
CC_idP,
......
......@@ -978,6 +978,8 @@ typedef struct {
/// Current DL harq round per harq_pid on each CC
uint8_t round[NFAPI_CC_MAX][MAX_HARQ_PID][MAX_NUM_TB];
uint32_t ret_cnt[NFAPI_CC_MAX];
uint32_t first_cnt[NFAPI_CC_MAX];
/// Current Active TBs per harq_pid on each CC
uint8_t tbcnt[NFAPI_CC_MAX][MAX_HARQ_PID];
/// Current UL harq round per harq_pid on each CC
......@@ -1004,16 +1006,16 @@ typedef struct {
int32_t phr_received;
uint8_t periodic_ri_received[NFAPI_CC_MAX];
uint8_t aperiodic_ri_received[NFAPI_CC_MAX];
uint8_t pucch1_cqi_update[NFAPI_CC_MAX];
uint8_t pucch1_snr[NFAPI_CC_MAX];
uint8_t pucch2_cqi_update[NFAPI_CC_MAX];
uint8_t pucch2_snr[NFAPI_CC_MAX];
uint8_t pucch3_cqi_update[NFAPI_CC_MAX];
uint8_t pucch3_snr[NFAPI_CC_MAX];
int16_t pucch1_cqi_update[NFAPI_CC_MAX];
int16_t pucch1_snr[NFAPI_CC_MAX];
int16_t pucch2_cqi_update[NFAPI_CC_MAX];
int16_t pucch2_snr[NFAPI_CC_MAX];
int16_t pucch3_cqi_update[NFAPI_CC_MAX];
int16_t pucch3_snr[NFAPI_CC_MAX];
double pusch_cqi_f[NFAPI_CC_MAX];
uint8_t pusch_cqi[NFAPI_CC_MAX];
uint8_t pusch_snr[NFAPI_CC_MAX];
uint8_t pusch_snr_avg[NFAPI_CC_MAX];
int16_t pusch_cqi[NFAPI_CC_MAX];
int16_t pusch_snr[NFAPI_CC_MAX];
int16_t pusch_snr_avg[NFAPI_CC_MAX];
uint64_t pusch_rx_num[NFAPI_CC_MAX];
uint64_t pusch_rx_num_old[NFAPI_CC_MAX];
uint64_t pusch_rx_error_num[NFAPI_CC_MAX];
......
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