Cleanup RA procedure

openair1/PHY/NR_TRANSPORT/nr_prach.c

@@ -37,7 +37,6 @@
 extern uint16_t prach_root_sequence_map_0_3[838];
 extern uint16_t prach_root_sequence_map_abc[138];
 extern uint16_t nr_du[838];
-extern int16_t nr_ru[2*839];
 extern const char *prachfmt[9];
 
 void init_prach_list(PHY_VARS_gNB *gNB) {

openair1/PHY/NR_UE_TRANSPORT/nr_prach.c

@@ -44,18 +44,8 @@
 
 //#define NR_PRACH_DEBUG 1
 
-extern uint16_t NCS_unrestricted_delta_f_RA_125[16];
-extern uint16_t NCS_restricted_TypeA_delta_f_RA_125[15];
-extern uint16_t NCS_restricted_TypeB_delta_f_RA_125[13];
-extern uint16_t NCS_unrestricted_delta_f_RA_5[16];
-extern uint16_t NCS_restricted_TypeA_delta_f_RA_5[16];
-extern uint16_t NCS_restricted_TypeB_delta_f_RA_5[14];
-extern uint16_t NCS_unrestricted_delta_f_RA_15[16];
 extern uint16_t prach_root_sequence_map_0_3[838];
 extern uint16_t prach_root_sequence_map_abc[138];
-extern int64_t table_6_3_3_2_2_prachConfig_Index [256][9];
-extern int64_t table_6_3_3_2_3_prachConfig_Index [256][9];
-extern int64_t table_6_3_3_2_4_prachConfig_Index [256][10];
 extern uint16_t nr_du[838];
 extern int16_t nr_ru[2*839];
 extern const char *prachfmt[9];
@@ -118,7 +108,7 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
   else
     samp_count = (slot%(fp->slots_per_subframe/2)) ? fp->samples_per_slotN0 : fp->samples_per_slot0;
 
-  #if defined (OAI_USRP)
+  #ifdef OAI_USRP
     prach_start = (ue->rx_offset + slot*samp_count - ue->hw_timing_advance - ue->N_TA_offset);
   #else //normal case (simulation)
     prach_start = slot*samp_count - ue->N_TA_offset;
@@ -208,14 +198,17 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
   // now generate PRACH signal
   #ifdef NR_PRACH_DEBUG
     if (NCS>0)
-      LOG_I(PHY, "PRACH [UE %d] generate PRACH for RootSeqIndex %d, Preamble Index %d, PRACH Format %s, NCS %d (N_ZC %d): Preamble_offset %d, Preamble_shift %d\n", Mod_id,
+      LOG_I(PHY, "PRACH [UE %d] generate PRACH in slot %d for RootSeqIndex %d, Preamble Index %d, PRACH Format %s, NCS %d (N_ZC %d): Preamble_offset %d, Preamble_shift %d msg1 frequency start %d\n",
+        Mod_id,
+        slot,
         rootSequenceIndex,
         preamble_index,
         prach_sequence_length == 0 ? prachfmt03[prach_fmt_id]  : prachfmt[prach_fmt_id],
         NCS,
         N_ZC,
         preamble_offset,
-        preamble_shift);
+        preamble_shift,
+        n_ra_prb);
   #endif
 
   //  nsymb = (frame_parms->Ncp==0) ? 14:12;
@@ -383,8 +376,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
 
   } else {
 
-    //LOG_D(PHY, "PRACH [UE %d] in slot %d, format %d, msg1 frequency start %d startSymbol %d \n", Mod_id, slot, prachfmt[prach_fmt_id], n_ra_prb, prachStartSymbol);
-
     switch (prach_fmt_id) {
     case 0: //A1
       Ncp = 288/(1<<mu);
@@ -419,7 +410,9 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
     }
   }
 
+  #ifdef NR_PRACH_DEBUG
     LOG_D(PHY, "PRACH [UE %d] Ncp %d, dftlen %d \n", Mod_id, Ncp, dftlen);
+  #endif
 
   if (fp->N_RB_UL <= 100)
     AssertFatal(1==0,"N_RB_UL %d not supported for NR PRACH yet\n",fp->N_RB_UL);
@@ -844,7 +837,7 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
   //}
   //printf(" \n");
 
-  #if defined(PRACH_WRITE_OUTPUT_DEBUG)
+  #ifdef PRACH_WRITE_OUTPUT_DEBUG
     LOG_M("prach_tx0.m", "prachtx0", prach+(Ncp<<1), prach_len-Ncp, 1, 1);
     LOG_M("Prach_txsig.m","txs",(int16_t*)(&ue->common_vars.txdata[0][prach_start]), 2*(prach_start+prach_len), 1, 1)
   #endif

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c

@@ -42,8 +42,7 @@
 #include "SIMULATION/TOOLS/sim.h" // for taus
 
 extern RAN_CONTEXT_t RC;
-
-const uint8_t nr_slots_per_frame_mac[5] = {10, 20, 40, 80, 160};
+extern const uint8_t nr_slots_per_frame[5];
 
 uint8_t DELTA[4]= {2,3,4,6};
 
@@ -185,7 +184,7 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
     tdd_period_slot++;
 
   // computing start of next period
-  uint8_t start_next_period = (rach_slot-(rach_slot%tdd_period_slot)+tdd_period_slot)%nr_slots_per_frame_mac[mu];
+  uint8_t start_next_period = (rach_slot-(rach_slot%tdd_period_slot)+tdd_period_slot)%nr_slots_per_frame[mu];
   *msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot
   *msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
 
@@ -217,16 +216,16 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
     default:
       AssertFatal(1==0,"Invalid response window value %d\n",response_window);
   }
-  AssertFatal(slot_window<=nr_slots_per_frame_mac[mu],"Msg2 response window needs to be lower or equal to 10ms");
+  AssertFatal(slot_window<=nr_slots_per_frame[mu],"Msg2 response window needs to be lower or equal to 10ms");
 
   // slot and frame limit to transmit msg2 according to response window
-  uint8_t slot_limit = (rach_slot + slot_window)%nr_slots_per_frame_mac[mu];
+  uint8_t slot_limit = (rach_slot + slot_window)%nr_slots_per_frame[mu];
   //uint8_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1);
 
 
   // go to previous slot if the current scheduled slot is beyond the response window
   // and if the slot is not among the PDCCH monitored ones (38.213 10.1)
-  while ((*msg2_slot>slot_limit) || ((*msg2_frame*nr_slots_per_frame_mac[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0))  {
+  while ((*msg2_slot>slot_limit) || ((*msg2_frame*nr_slots_per_frame[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0))  {
     if((*msg2_slot%tdd_period_slot) > 0)
       (*msg2_slot)--;
     else
@@ -397,11 +396,11 @@ void nr_get_Msg3alloc(NR_ServingCellConfigCommon_t *scc,
   uint8_t k2 = *ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->k2;
 
   temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
-  ra->Msg3_slot = temp_slot%nr_slots_per_frame_mac[mu];
-  if (nr_slots_per_frame_mac[mu]>temp_slot)
+  ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
+  if (nr_slots_per_frame[mu]>temp_slot)
     ra->Msg3_frame = current_frame;
   else
-    ra->Msg3_frame = current_frame + (temp_slot/nr_slots_per_frame_mac[mu]);
+    ra->Msg3_frame = current_frame + (temp_slot/nr_slots_per_frame[mu]);
 
   ra->msg3_nb_rb = 18;
   ra->msg3_first_rb = 0;