Commit 0625461f authored by frtabu's avatar frtabu

cleanup in CMakelist.txt and build_oai

parent 1b3c2a32
This diff is collapsed.
...@@ -26,12 +26,14 @@ ...@@ -26,12 +26,14 @@
set -e set -e
# Include helper functions ################################
# include helper functions
################################
ORIGIN_PATH=$PWD ORIGIN_PATH=$PWD
THIS_SCRIPT_PATH=$(dirname $(readlink -f $0)) THIS_SCRIPT_PATH=$(dirname $(readlink -f $0))
source $THIS_SCRIPT_PATH/tools/build_helper source $THIS_SCRIPT_PATH/tools/build_helper
# Set environment variables (OPENAIR_HOME, ...) # set environment variables (OPENAIR_HOME, ...)
set_openair_env set_openair_env
# Variables for UE data generation # Variables for UE data generation
...@@ -44,8 +46,9 @@ UE_EXPANSION="False" ...@@ -44,8 +46,9 @@ UE_EXPANSION="False"
UESIM_EXPANSION="False" UESIM_EXPANSION="False"
PRINT_STATS="False" PRINT_STATS="False"
VCD_TIMING="False" VCD_TIMING="False"
DEADLINE_SCHEDULER_FLAG_USER="" DEADLINE_SCHEDULER_FLAG_USER="False"
CPU_AFFINITY_FLAG_USER="False" #Only valid when low-latency flag is set to False FORCE_DEADLINE_SCHEDULER_FLAG_USER=""
CPU_AFFINITY_FLAG_USER="False" #Only valid when lowlatecy flag is set to False
REL="Rel15" REL="Rel15"
HW="None" HW="None"
TP="None" TP="None"
...@@ -133,7 +136,6 @@ Options ...@@ -133,7 +136,6 @@ Options
Enable deadline scheduler of Linux kernel (>=3.14.x). Enable deadline scheduler of Linux kernel (>=3.14.x).
--disable-cpu-affinity --disable-cpu-affinity
Disables CPU Affinity between UHD/TX/RX Threads (Valid only when deadline scheduler is disabled). By defaulT, CPU Affinity is enabled when not using deadline scheduler. It is enabled only with >2 CPUs. For eNB, CPU_0-> Device library (UHD), CPU_1->TX Threads, CPU_2...CPU_MAX->Rx Threads. For UE, CPU_0->Device Library(UHD), CPU_1..CPU_MAX -> All the UE threads Disables CPU Affinity between UHD/TX/RX Threads (Valid only when deadline scheduler is disabled). By defaulT, CPU Affinity is enabled when not using deadline scheduler. It is enabled only with >2 CPUs. For eNB, CPU_0-> Device library (UHD), CPU_1->TX Threads, CPU_2...CPU_MAX->Rx Threads. For UE, CPU_0->Device Library(UHD), CPU_1..CPU_MAX -> All the UE threads
--enable-cpu-affinity
--disable-T-Tracer --disable-T-Tracer
Disables the T tracer. Disables the T tracer.
--disable-hardware-dependency --disable-hardware-dependency
...@@ -307,10 +309,6 @@ function main() { ...@@ -307,10 +309,6 @@ function main() {
DEADLINE_SCHEDULER_FLAG_USER="True" DEADLINE_SCHEDULER_FLAG_USER="True"
echo_info "Enabling the usage of deadline scheduler" echo_info "Enabling the usage of deadline scheduler"
shift 1;; shift 1;;
--enable-cpu-affinity)
CPU_AFFINITY_FLAG_USER="True"
echo_info "Enabling CPU Affinity (only valid when not using deadline scheduler)"
shift 1;;
--disable-cpu-affinity) --disable-cpu-affinity)
CPU_AFFINITY_FLAG_USER="False" CPU_AFFINITY_FLAG_USER="False"
echo_info "Disabling CPU Affinity (only valid when not using deadline scheduler)" echo_info "Disabling CPU Affinity (only valid when not using deadline scheduler)"
...@@ -428,7 +426,6 @@ function main() { ...@@ -428,7 +426,6 @@ function main() {
;; ;;
esac esac
fi fi
#Disable CPU Affinity for deadline scheduler #Disable CPU Affinity for deadline scheduler
if [ "$DEADLINE_SCHEDULER_FLAG_USER" = "True" ] ; then if [ "$DEADLINE_SCHEDULER_FLAG_USER" = "True" ] ; then
CPU_AFFINITY_FLAG_USER="False" CPU_AFFINITY_FLAG_USER="False"
...@@ -520,15 +517,6 @@ function main() { ...@@ -520,15 +517,6 @@ function main() {
build_dir=ran_build build_dir=ran_build
fi fi
if [ "$gNB" = "1" ] ; then
exec=nr-softmodem
elif [ "$nrUE" = "1" ] ; then
exec=nr-uesoftmodem
elif [ "$eNB" = "1" ] ; then
exec=lte-softmodem
elif [ "$UE" = "1" ] ; then
exec=lte-uesoftmodem
fi
# configuration module libraries, one currently available, using libconfig # configuration module libraries, one currently available, using libconfig
config_libconfig_shlib=params_libconfig config_libconfig_shlib=params_libconfig
...@@ -563,27 +551,29 @@ function main() { ...@@ -563,27 +551,29 @@ function main() {
eval $CMAKE_CMD eval $CMAKE_CMD
fi fi
if [ "$eNB" = "1" -o "$UE" = "1" -o "$gNB" = "1" -o "$nrUE" = "1" ] ; then execlist=""
echo_info "Compiling $exec" if [ "$eNB" = "1" ] ; then
compilations \ execlist="$execlist lte-softmodem"
$build_dir $exec \ fi
$exec $dbin/$exec.$REL if [ "$gNB" = "1" ] ; then
execlist="$execlist nr-softmodem"
# if --eNB --UE are both provided together as build options fi
if [ "$eNB" = "1" -a "$UE" = "1" ] ; then if [ "$UE" = 1 ] ; then
echo_info "Compiling lte-uesoftmodem" execlist="$execlist lte-uesoftmodem"
compilations \ fi
$build_dir lte-uesoftmodem \ if [ "$nrUE" = 1 ] ; then
lte-uesoftmodem $dbin/lte-uesoftmodem.$REL execlist="$execlist nr-uesoftmodem"
fi fi
# if --gNB --nrUE are both provided together as build options for f in $execlist ; do
if [ "$gNB" = "1" -a "$nrUE" = "1" ] ; then echo_info "Compiling $f..."
echo_info "Compiling nr-uesoftmodem"
compilations \ compilations \
$build_dir nr-uesoftmodem \ $build_dir $f \
nr-uesoftmodem $dbin/nr-uesoftmodem.$REL $f $dbin/$f.$REL
fi done
# mandatory shared libraries common to UE and (e/g)NB # mandatory shared libraries common to UE and (e/g)NB
...@@ -603,10 +593,9 @@ function main() { ...@@ -603,10 +593,9 @@ function main() {
$build_dir rb_tool \ $build_dir rb_tool \
rb_tool $dbin/rb_tool rb_tool $dbin/rb_tool
cp $OPENAIR_DIR/cmake_targets/tools/init_nas_nos1 $dbin cp $OPENAIR_DIR/cmake_targets/tools/init_nas_nos1 $dbin
fi
if [ "$UE" = 1 ] ; then if [ "$UE" = 1 ] ; then
# ue_ip driver compilation
echo_info "Compiling UE specific part" echo_info "Compiling UE specific part"
compilations \ compilations \
$build_dir ue_ip \ $build_dir ue_ip \
......
...@@ -18,7 +18,7 @@ ...@@ -18,7 +18,7 @@
* For more information about the OpenAirInterface (OAI) Software Alliance: * For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org * contact@openairinterface.org
*/ */
#include "executables/thread-common.h"
#include "executables/nr-uesoftmodem.h" #include "executables/nr-uesoftmodem.h"
#include "LAYER2/NR_MAC_UE/mac.h" #include "LAYER2/NR_MAC_UE/mac.h"
...@@ -142,10 +142,8 @@ PHY_VARS_NR_UE *init_nr_ue_vars(NR_DL_FRAME_PARMS *frame_parms, ...@@ -142,10 +142,8 @@ PHY_VARS_NR_UE *init_nr_ue_vars(NR_DL_FRAME_PARMS *frame_parms,
ue = (PHY_VARS_NR_UE *)malloc(sizeof(PHY_VARS_NR_UE)); ue = (PHY_VARS_NR_UE *)malloc(sizeof(PHY_VARS_NR_UE));
memset(ue,0,sizeof(PHY_VARS_NR_UE)); memset(ue,0,sizeof(PHY_VARS_NR_UE));
memcpy(&(ue->frame_parms), frame_parms, sizeof(NR_DL_FRAME_PARMS)); memcpy(&(ue->frame_parms), frame_parms, sizeof(NR_DL_FRAME_PARMS));
ue->Mod_id = UE_id; ue->Mod_id = UE_id;
ue->mac_enabled = 1; ue->mac_enabled = 1;
// initialize all signal buffers // initialize all signal buffers
init_nr_ue_signal(ue,1,abstraction_flag); init_nr_ue_signal(ue,1,abstraction_flag);
// intialize transport // intialize transport
...@@ -172,7 +170,6 @@ static void UE_synch(void *arg) { ...@@ -172,7 +170,6 @@ static void UE_synch(void *arg) {
int freq_offset=0; int freq_offset=0;
UE->is_synchronized = 0; UE->is_synchronized = 0;
if (UE->UE_scan == 0) { if (UE->UE_scan == 0) {
get_band(downlink_frequency[CC_id][0], &UE->frame_parms.eutra_band, &uplink_frequency_offset[CC_id][0], &UE->frame_parms.frame_type); get_band(downlink_frequency[CC_id][0], &UE->frame_parms.eutra_band, &uplink_frequency_offset[CC_id][0], &UE->frame_parms.frame_type);
LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu32", UL %"PRIu32" (oai_exit %d, rx_num_channels %d)\n", LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu32", UL %"PRIu32" (oai_exit %d, rx_num_channels %d)\n",
...@@ -353,7 +350,6 @@ static void UE_synch(void *arg) { ...@@ -353,7 +350,6 @@ static void UE_synch(void *arg) {
} }
void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
nr_dcireq_t dcireq; nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response; nr_scheduled_response_t scheduled_response;
uint32_t nb_rb, start_rb; uint32_t nb_rb, start_rb;
...@@ -369,7 +365,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -369,7 +365,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
dcireq.frame = proc->frame_rx; dcireq.frame = proc->frame_rx;
dcireq.slot = proc->nr_tti_rx; dcireq.slot = proc->nr_tti_rx;
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
scheduled_response.dl_config = &dcireq.dl_config_req; scheduled_response.dl_config = &dcireq.dl_config_req;
scheduled_response.ul_config = &dcireq.ul_config_req; scheduled_response.ul_config = &dcireq.ul_config_req;
scheduled_response.tx_request = NULL; scheduled_response.tx_request = NULL;
...@@ -377,7 +372,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -377,7 +372,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
scheduled_response.CC_id = 0; scheduled_response.CC_id = 0;
scheduled_response.frame = proc->frame_rx; scheduled_response.frame = proc->frame_rx;
scheduled_response.slot = proc->nr_tti_rx; scheduled_response.slot = proc->nr_tti_rx;
//--------------------------Temporary configuration-----------------------------// //--------------------------Temporary configuration-----------------------------//
n_rnti = 0x1234; n_rnti = 0x1234;
nb_rb = 50; nb_rb = 50;
...@@ -389,7 +383,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -389,7 +383,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
harq_pid = 0; harq_pid = 0;
rvidx = 0; rvidx = 0;
//------------------------------------------------------------------------------// //------------------------------------------------------------------------------//
scheduled_response.ul_config->sfn_slot = NR_UPLINK_SLOT; scheduled_response.ul_config->sfn_slot = NR_UPLINK_SLOT;
scheduled_response.ul_config->number_pdus = 1; scheduled_response.ul_config->number_pdus = 1;
scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH; scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
...@@ -404,7 +397,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -404,7 +397,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers; scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid; scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid;
nr_ue_scheduled_response(&scheduled_response); nr_ue_scheduled_response(&scheduled_response);
#ifdef UE_SLOT_PARALLELISATION #ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL ); phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else #else
...@@ -413,7 +405,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -413,7 +405,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500); LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n"); //printf(">>> nr_ue_pdcch_procedures ended\n");
#endif #endif
if(IS_SOFTMODEM_NOS1){ //&& proc->nr_tti_rx==1
if(IS_SOFTMODEM_NOS1) { //&& proc->nr_tti_rx==1
//Hardcoded rnti value //Hardcoded rnti value
protocol_ctxt_t ctxt; protocol_ctxt_t ctxt;
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, UE->Mod_id, ENB_FLAG_NO, PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, UE->Mod_id, ENB_FLAG_NO,
...@@ -424,7 +417,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -424,7 +417,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
} }
} }
// no UL for now // no UL for now
/* /*
if (UE->mac_enabled==1) { if (UE->mac_enabled==1) {
...@@ -463,29 +455,24 @@ void UE_processing(void *arg) { ...@@ -463,29 +455,24 @@ void UE_processing(void *arg) {
processSlotRX(UE, proc); processSlotRX(UE, proc);
//printf(">>> mac ended\n"); //printf(">>> mac ended\n");
// Prepare the future Tx data // Prepare the future Tx data
/* /*
#ifndef NO_RAT_NR #ifndef NO_RAT_NR
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_UPLINK_SLOT) if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_UPLINK_SLOT)
#else #else
if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_UL) || if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_UL) ||
(UE->frame_parms.frame_type == FDD) ) (UE->frame_parms.frame_type == FDD) )
#endif #endif
*/ */
if (proc->nr_tti_tx == NR_UPLINK_SLOT || UE->frame_parms.frame_type == FDD){
if (proc->nr_tti_tx == NR_UPLINK_SLOT || UE->frame_parms.frame_type == FDD) {
thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_tx]; thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_tx];
if (UE->mode != loop_through_memory) if (UE->mode != loop_through_memory)
phy_procedures_nrUE_TX(UE,proc,0,thread_id); phy_procedures_nrUE_TX(UE,proc,0,thread_id);
} }
//phy_procedures_UE_TX(UE,proc,0,0,UE->mode,no_relay); //phy_procedures_UE_TX(UE,proc,0,0,UE->mode,no_relay);
#if 0 #if 0
if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_S) && if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_S) &&
...@@ -551,7 +538,6 @@ void trashFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) { ...@@ -551,7 +538,6 @@ void trashFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
} }
void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) { void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode); LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
void *dummy_tx[UE->frame_parms.nb_antennas_tx]; void *dummy_tx[UE->frame_parms.nb_antennas_tx];
...@@ -570,7 +556,6 @@ void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) { ...@@ -570,7 +556,6 @@ void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++) for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
free(dummy_tx[i]); free(dummy_tx[i]);
} }
int computeSamplesShift(PHY_VARS_NR_UE *UE) { int computeSamplesShift(PHY_VARS_NR_UE *UE) {
...@@ -673,7 +658,6 @@ void *UE_thread(void *arg) { ...@@ -673,7 +658,6 @@ void *UE_thread(void *arg) {
continue; continue;
} }
absolute_slot++; absolute_slot++;
// whatever means thread_idx // whatever means thread_idx
// Fix me: will be wrong when slot 1 is slow, as slot 2 finishes // Fix me: will be wrong when slot 1 is slow, as slot 2 finishes
...@@ -696,14 +680,15 @@ void *UE_thread(void *arg) { ...@@ -696,14 +680,15 @@ void *UE_thread(void *arg) {
curMsg->proc.frame_tx = ( (absolute_slot + DURATION_RX_TO_TX) /nb_slot_frame ) % MAX_FRAME_NUMBER; curMsg->proc.frame_tx = ( (absolute_slot + DURATION_RX_TO_TX) /nb_slot_frame ) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1; curMsg->proc.decoded_frame_rx=-1;
//LOG_I(PHY,"Process slot %d thread Idx %d total gain %d\n", slot_nr, thread_idx, UE->rx_total_gain_dB); //LOG_I(PHY,"Process slot %d thread Idx %d total gain %d\n", slot_nr, thread_idx, UE->rx_total_gain_dB);
#ifdef OAI_ADRV9371_ZC706 #ifdef OAI_ADRV9371_ZC706
/*uint32_t total_gain_dB_prev = 0; /*uint32_t total_gain_dB_prev = 0;
if (total_gain_dB_prev != UE->rx_total_gain_dB) { if (total_gain_dB_prev != UE->rx_total_gain_dB) {
total_gain_dB_prev = UE->rx_total_gain_dB; total_gain_dB_prev = UE->rx_total_gain_dB;
openair0_cfg[0].rx_gain[0] = UE->rx_total_gain_dB; openair0_cfg[0].rx_gain[0] = UE->rx_total_gain_dB;
UE->rfdevice.trx_set_gains_func(&UE->rfdevice,&openair0_cfg[0]); UE->rfdevice.trx_set_gains_func(&UE->rfdevice,&openair0_cfg[0]);
}*/ }*/
#endif #endif
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++) for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
...@@ -834,12 +819,10 @@ void init_NR_UE(int nb_inst) { ...@@ -834,12 +819,10 @@ void init_NR_UE(int nb_inst) {
mac_inst->initial_bwp_ul.cyclic_prefix = UE->frame_parms.Ncp; mac_inst->initial_bwp_ul.cyclic_prefix = UE->frame_parms.Ncp;
LOG_I(PHY,"Intializing UE Threads for instance %d (%p,%p)...\n",inst,PHY_vars_UE_g[inst],PHY_vars_UE_g[inst][0]); LOG_I(PHY,"Intializing UE Threads for instance %d (%p,%p)...\n",inst,PHY_vars_UE_g[inst],PHY_vars_UE_g[inst][0]);
threadCreate(&threads[inst], UE_thread, (void *)UE, "UEthread", -1, OAI_PRIORITY_RT_MAX); threadCreate(&threads[inst], UE_thread, (void *)UE, "UEthread", -1, OAI_PRIORITY_RT_MAX);
#ifdef UE_DLSCH_PARALLELISATION #ifdef UE_DLSCH_PARALLELISATION
pthread_t dlsch0_threads; pthread_t dlsch0_threads;
threadCreate(&dlsch0_threads, dlsch_thread, (void *)UE, "DLthread", -1, OAI_PRIORITY_RT_MAX-1); threadCreate(&dlsch0_threads, dlsch_thread, (void *)UE, "DLthread", -1, OAI_PRIORITY_RT_MAX-1);
#endif #endif
} }
printf("UE threads created by %ld\n", gettid()); printf("UE threads created by %ld\n", gettid());
......
...@@ -135,13 +135,6 @@ int pdcp_fifo_flush_sdus(const protocol_ctxt_t *const ctxt_pP) { ...@@ -135,13 +135,6 @@ int pdcp_fifo_flush_sdus(const protocol_ctxt_t *const ctxt_pP) {
} // PDCP_USE_NETLINK } // PDCP_USE_NETLINK
AssertFatal(ret >= 0,"[PDCP_FIFOS] pdcp_fifo_flush_sdus (errno: %d %s)\n", errno, strerror(errno)); AssertFatal(ret >= 0,"[PDCP_FIFOS] pdcp_fifo_flush_sdus (errno: %d %s)\n", errno, strerror(errno));
#if defined(ENABLE_PDCP_PAYLOAD_DEBUG)
LOG_I(PDCP, "Printing first bytes of PDCP SDU before removing it from the list: \n");
for (int i=0; i<30; i++){
LOG_I(PDCP, "%x", sdu_p->data[i]);
}
#endif
list_remove_head (&pdcp_sdu_list); list_remove_head (&pdcp_sdu_list);
free_mem_block (sdu_p, __func__); free_mem_block (sdu_p, __func__);
pdcp_nb_sdu_sent ++; pdcp_nb_sdu_sent ++;
...@@ -173,7 +166,7 @@ int pdcp_fifo_read_input_sdus_fromtun (const protocol_ctxt_t *const ctxt_pP) { ...@@ -173,7 +166,7 @@ int pdcp_fifo_read_input_sdus_fromtun (const protocol_ctxt_t *const ctxt_pP) {
ctxt.rnti=pdcp_eNB_UE_instance_to_rnti[0]; ctxt.rnti=pdcp_eNB_UE_instance_to_rnti[0];
ctxt.enb_flag=ENB_FLAG_YES; ctxt.enb_flag=ENB_FLAG_YES;
ctxt.module_id=0; ctxt.module_id=0;
key = PDCP_COLL_KEY_VALUE(ctxt.module_id, ctxt.rnti, ctxt.enb_flag, rab_id, SRB_FLAG_NO); key = PDCP_COLL_KEY_VALUE(ctxt.module_id, ctxt.rnti, ctxt.enb_flag, rab_id, SRB_FLAG_YES);
h_rc = hashtable_get(pdcp_coll_p, key, (void **)&pdcp_p); h_rc = hashtable_get(pdcp_coll_p, key, (void **)&pdcp_p);
} }
...@@ -688,6 +681,7 @@ void pdcp_fifo_read_input_sdus_frompc5s (const protocol_ctxt_t *const ctxt_pP) ...@@ -688,6 +681,7 @@ void pdcp_fifo_read_input_sdus_frompc5s (const protocol_ctxt_t *const ctxt_pP)
break; break;
} /* end of switch */ } /* end of switch */
}/* end of bytes_received > 0 */ }/* end of bytes_received > 0 */
if (pc5s_header != NULL) { if (pc5s_header != NULL) {
free(pc5s_header); free(pc5s_header);
pc5s_header = NULL; pc5s_header = NULL;
...@@ -722,7 +716,7 @@ void pdcp_fifo_read_input_sdus_from_otg (const protocol_ctxt_t *const ctxt_pP) ...@@ -722,7 +716,7 @@ void pdcp_fifo_read_input_sdus_from_otg (const protocol_ctxt_t *const ctxt_pP)
ctxt_pP->subframe, ctxt_pP->subframe,
ctxt_pP->module_id); ctxt_pP->module_id);
for (dst_id = 0; dst_id<NUMBER_OF_UE_MAX; dst_id++) { for (dst_id = 0; dst_id<MAX_MOBILES_PER_ENB; dst_id++) {
ctxt.rnti = oai_emulation.info.eNB_ue_module_id_to_rnti[ctxt.module_id][dst_id]; ctxt.rnti = oai_emulation.info.eNB_ue_module_id_to_rnti[ctxt.module_id][dst_id];
} }
} }
......
This diff is collapsed.
...@@ -30,9 +30,9 @@ ...@@ -30,9 +30,9 @@
#include <stdio.h> #include <stdio.h>
#include <uhd/version.hpp> #include <uhd/version.hpp>
#if UHD_VERSION < 3110000 #if UHD_VERSION < 3110000
#include <uhd/utils/thread_priority.hpp> #include <uhd/utils/thread_priority.hpp>
#else #else
#include <uhd/utils/thread.hpp> #include <uhd/utils/thread.hpp>
#endif #endif
#include <uhd/usrp/multi_usrp.hpp> #include <uhd/usrp/multi_usrp.hpp>
#include <uhd/version.hpp> #include <uhd/version.hpp>
...@@ -52,15 +52,15 @@ ...@@ -52,15 +52,15 @@
#include <sys/resource.h> #include <sys/resource.h>
#ifdef __SSE4_1__ #ifdef __SSE4_1__
# include <smmintrin.h> #include <smmintrin.h>
#endif #endif
#ifdef __AVX2__ #ifdef __AVX2__
# include <immintrin.h> #include <immintrin.h>
#endif #endif
#ifdef __arm__ #ifdef __arm__
# include <arm_neon.h> #include <arm_neon.h>
#endif #endif
/** @addtogroup _USRP_PHY_RF_INTERFACE_ /** @addtogroup _USRP_PHY_RF_INTERFACE_
...@@ -258,41 +258,41 @@ static int sync_to_gps(openair0_device *device) { ...@@ -258,41 +258,41 @@ static int sync_to_gps(openair0_device *device) {
} }
#if defined(USRP_REC_PLAY) #if defined(USRP_REC_PLAY)
#include "usrp_lib.h" #include "usrp_lib.h"
static FILE *pFile = NULL; static FILE *pFile = NULL;
int mmapfd = 0; int mmapfd = 0;
int iqfd = 0; int iqfd = 0;
int use_mmap = 1; // default is to use mmap int use_mmap = 1; // default is to use mmap
struct stat sb; struct stat sb;
iqrec_t *ms_sample = NULL; // memory for all subframes iqrec_t *ms_sample = NULL; // memory for all subframes
unsigned int nb_samples = 0; unsigned int nb_samples = 0;
unsigned int cur_samples = 0; unsigned int cur_samples = 0;
int64_t wrap_count = 0; int64_t wrap_count = 0;
int64_t wrap_ts = 0; int64_t wrap_ts = 0;
unsigned int u_sf_mode = 0; // 1=record, 2=replay unsigned int u_sf_mode = 0; // 1=record, 2=replay
unsigned int u_sf_record = 0; // record mode unsigned int u_sf_record = 0; // record mode
unsigned int u_sf_replay = 0; // replay mode unsigned int u_sf_replay = 0; // replay mode
char u_sf_filename[1024] = ""; // subframes file path char u_sf_filename[1024] = ""; // subframes file path
unsigned int u_sf_max = DEF_NB_SF; // max number of recorded subframes unsigned int u_sf_max = DEF_NB_SF; // max number of recorded subframes
unsigned int u_sf_loops = DEF_SF_NB_LOOP; // number of loops in replay mode unsigned int u_sf_loops = DEF_SF_NB_LOOP; // number of loops in replay mode
unsigned int u_sf_read_delay = DEF_SF_DELAY_READ; // read delay in replay mode unsigned int u_sf_read_delay = DEF_SF_DELAY_READ; // read delay in replay mode
unsigned int u_sf_write_delay = DEF_SF_DELAY_WRITE; // write delay in replay mode unsigned int u_sf_write_delay = DEF_SF_DELAY_WRITE; // write delay in replay mode
char config_opt_sf_file[] = CONFIG_OPT_SF_FILE; char config_opt_sf_file[] = CONFIG_OPT_SF_FILE;
char config_def_sf_file[] = DEF_SF_FILE; char config_def_sf_file[] = DEF_SF_FILE;
char config_hlp_sf_file[] = CONFIG_HLP_SF_FILE; char config_hlp_sf_file[] = CONFIG_HLP_SF_FILE;
char config_opt_sf_rec[] = CONFIG_OPT_SF_REC; char config_opt_sf_rec[] = CONFIG_OPT_SF_REC;
char config_hlp_sf_rec[] = CONFIG_HLP_SF_REC; char config_hlp_sf_rec[] = CONFIG_HLP_SF_REC;
char config_opt_sf_rep[] = CONFIG_OPT_SF_REP; char config_opt_sf_rep[] = CONFIG_OPT_SF_REP;
char config_hlp_sf_rep[] = CONFIG_HLP_SF_REP; char config_hlp_sf_rep[] = CONFIG_HLP_SF_REP;
char config_opt_sf_max[] = CONFIG_OPT_SF_MAX; char config_opt_sf_max[] = CONFIG_OPT_SF_MAX;
char config_hlp_sf_max[] = CONFIG_HLP_SF_MAX; char config_hlp_sf_max[] = CONFIG_HLP_SF_MAX;
char config_opt_sf_loops[] = CONFIG_OPT_SF_LOOPS; char config_opt_sf_loops[] = CONFIG_OPT_SF_LOOPS;
char config_hlp_sf_loops[] = CONFIG_HLP_SF_LOOPS; char config_hlp_sf_loops[] = CONFIG_HLP_SF_LOOPS;
char config_opt_sf_rdelay[] = CONFIG_OPT_SF_RDELAY; char config_opt_sf_rdelay[] = CONFIG_OPT_SF_RDELAY;
char config_hlp_sf_rdelay[] = CONFIG_HLP_SF_RDELAY; char config_hlp_sf_rdelay[] = CONFIG_HLP_SF_RDELAY;
char config_opt_sf_wdelay[] = CONFIG_OPT_SF_WDELAY; char config_opt_sf_wdelay[] = CONFIG_OPT_SF_WDELAY;
char config_hlp_sf_wdelay[] = CONFIG_HLP_SF_WDELAY; char config_hlp_sf_wdelay[] = CONFIG_HLP_SF_WDELAY;
#endif #endif
...@@ -351,7 +351,6 @@ static void trx_usrp_end(openair0_device *device) { ...@@ -351,7 +351,6 @@ static void trx_usrp_end(openair0_device *device) {
done = 1; done = 1;
if (u_sf_mode != 2) { // not subframes replay if (u_sf_mode != 2) { // not subframes replay
#endif #endif
usrp_state_t *s = (usrp_state_t *)device->priv; usrp_state_t *s = (usrp_state_t *)device->priv;
...@@ -441,20 +440,19 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp, ...@@ -441,20 +440,19 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp,
#endif #endif
usrp_state_t *s = (usrp_state_t *)device->priv; usrp_state_t *s = (usrp_state_t *)device->priv;
int nsamps2; // aligned to upper 32 or 16 byte boundary int nsamps2; // aligned to upper 32 or 16 byte boundary
#if defined(__x86_64) || defined(__i386__) #if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__ #ifdef __AVX2__
nsamps2 = (nsamps+7)>>3; nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[2][nsamps2]; __m256i buff_tx[2][nsamps2];
#else #else
nsamps2 = (nsamps+3)>>2; nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[2][nsamps2]; __m128i buff_tx[2][nsamps2];
#endif #endif
#elif defined(__arm__) #elif defined(__arm__)
nsamps2 = (nsamps+3)>>2; nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[2][nsamps2]; int16x8_t buff_tx[2][nsamps2];
#else #else
#error Unsupported CPU architecture, USRP device cannot be built #error Unsupported CPU architecture, USRP device cannot be built
#endif #endif
// bring RX data into 12 LSBs for softmodem RX // bring RX data into 12 LSBs for softmodem RX
...@@ -1061,8 +1059,8 @@ extern "C" { ...@@ -1061,8 +1059,8 @@ extern "C" {
sscanf(uhd::get_version_string().c_str(),"%d.%d.%d",&vers,&subvers,&subsubvers); sscanf(uhd::get_version_string().c_str(),"%d.%d.%d",&vers,&subvers,&subsubvers);
LOG_I(PHY,"Checking for USRPs : UHD %s (%d.%d.%d)\n", LOG_I(PHY,"Checking for USRPs : UHD %s (%d.%d.%d)\n",
uhd::get_version_string().c_str(),vers,subvers,subsubvers); uhd::get_version_string().c_str(),vers,subvers,subsubvers);
std::string args; std::string args;
if (openair0_cfg[0].sdr_addrs == NULL) { if (openair0_cfg[0].sdr_addrs == NULL) {
args = "type=b200"; args = "type=b200";
} else { } else {
...@@ -1091,6 +1089,7 @@ extern "C" { ...@@ -1091,6 +1089,7 @@ extern "C" {
args += boost::str(boost::format(",master_clock_rate=%f") % usrp_master_clock); args += boost::str(boost::format(",master_clock_rate=%f") % usrp_master_clock);
args += ",num_send_frames=256,num_recv_frames=256, send_frame_size=7680, recv_frame_size=7680" ; args += ",num_send_frames=256,num_recv_frames=256, send_frame_size=7680, recv_frame_size=7680" ;
} }
if (device_adds[0].get("type") == "n3xx") { if (device_adds[0].get("type") == "n3xx") {
printf("Found USRP n300\n"); printf("Found USRP n300\n");
device->type=USRP_X300_DEV; //treat it as X300 for now device->type=USRP_X300_DEV; //treat it as X300 for now
...@@ -1111,11 +1110,11 @@ extern "C" { ...@@ -1111,11 +1110,11 @@ extern "C" {
if (openair0_cfg[0].clock_source == internal) { if (openair0_cfg[0].clock_source == internal) {
s->usrp->set_clock_source("internal"); s->usrp->set_clock_source("internal");
printf("Setting clock source to internal\n"); printf("Setting clock source to internal\n");
} } else {
else {
s->usrp->set_clock_source("external"); s->usrp->set_clock_source("external");
printf("Setting clock source to external\n"); printf("Setting clock source to external\n");
} }
if (device->type==USRP_X300_DEV) { if (device->type==USRP_X300_DEV) {
openair0_cfg[0].rx_gain_calib_table = calib_table_x310; openair0_cfg[0].rx_gain_calib_table = calib_table_x310;
#if defined(USRP_REC_PLAY) #if defined(USRP_REC_PLAY)
......
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