Commit 1c24adee authored by cig's avatar cig

Cleanup NR UE

- focus: defs_nr_UE.h, nr-ue.c, phy_procedures_nr_ue.c, nr_init_ue.c
- removed long-time commented out code
- replaced hardcoded params
- removed unnecessary header inclusions
parent a9cc183c
......@@ -18,41 +18,16 @@
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "executables/thread-common.h"
#include "executables/nr-uesoftmodem.h"
#include "NR_MAC_UE/mac.h"
//#include "RRC/LTE/rrc_extern.h"
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
#include "fapi_nr_ue_l1.h"
#include "executables/nr-uesoftmodem.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "NR_MAC_UE/mac_proto.h"
#include "RRC/NR_UE/rrc_proto.h"
#include "SCHED_NR_UE/phy_frame_config_nr.h"
#include "SCHED_NR_UE/defs.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "common/utils/LOG/log.h"
#include "common/utils/system.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "executables/nr-softmodem.h"
#include "T.h"
#include "PHY_INTERFACE/phy_interface_extern.h"
// Missing stuff?
int next_ra_frame = 0;
module_id_t next_Mod_id = 0;
//static nfapi_nr_config_request_t config_t;
//static nfapi_nr_config_request_t* config =&config_t;
/*
* NR SLOT PROCESSING SEQUENCE
*
......@@ -387,9 +362,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
uint64_t a=rdtsc();
phy_procedures_nrUE_RX( UE, proc, 0, UE->mode);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_slot_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n");
phy_procedures_nrUE_RX(UE, proc, gNB_id, UE->mode);
LOG_D(PHY, "In %s: slot %d, time %lu\n", __FUNCTION__, proc->nr_slot_rx, (rdtsc()-a)/3500);
#endif
if(IS_SOFTMODEM_NOS1){
......@@ -400,23 +374,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
}
}
// no UL for now
/*
if (UE->mac_enabled==1) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_slot_rx;
UE->ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&UE->ul_indication);
}
}
*/
}
/*!
......
......@@ -82,8 +82,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PRACH *const prach_vars = &gNB->prach_vars;
NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars;
/*LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;*/
int i;
int Ptx=cfg->carrier_config.num_tx_ant.value;
......@@ -96,19 +94,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
while(gNB->configured == 0) usleep(10000);
load_dftslib();
/*
LOG_I(PHY,"[gNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d nb_antennas_tx:%u nb_antennas_rx:%u PRACH[rootSequenceIndex:%u prach_Config_enabled:%u configIndex:%u highSpeed:%u zeroCorrelationZoneConfig:%u freqOffset:%u]\n",
gNB->Mod_id,
fp->N_RB_DL,fp->phich_config_common.phich_resource,
fp->phich_config_common.phich_duration,
fp->nb_antennas_tx, fp->nb_antennas_rx,
fp->prach_config_common.rootSequenceIndex,
fp->prach_config_common.prach_Config_enabled,
fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
fp->prach_config_common.prach_ConfigInfo.highSpeedFlag,
fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset
);*/
LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_gNB][MOD %02"PRIu8"][]\n", gNB->Mod_id);
crcTableInit();
init_scrambling_luts();
......
......@@ -41,316 +41,6 @@
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
//uint8_t dmrs1_tab_ue[8] = {0,2,3,4,6,8,9,10};
/*void phy_config_sib1_ue(uint8_t Mod_id,int CC_id,
uint8_t gNB_id,
TDD_Config_t *tdd_Config,
uint8_t SIwindowsize,
uint16_t SIperiod)
{
NR_DL_FRAME_PARMS *fp = &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms;
if (tdd_Config) {
fp->tdd_config = tdd_Config->subframeAssignment;
fp->tdd_config_S = tdd_Config->specialSubframePatterns;
}
fp->SIwindowsize = SIwindowsize;
fp->SIPeriod = SIperiod;
}
void phy_config_sib2_ue(uint8_t Mod_id,int CC_id,
uint8_t gNB_id,
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon,
ARFCN_ValueEUTRA_t *ul_CarrierFreq,
long *ul_Bandwidth,
AdditionalSpectrumEmission_t *additionalSpectrumEmission,
struct MBSFN_SubframeConfigList *mbsfn_SubframeConfigList)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
int i;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_CONFIG_SIB2, VCD_FUNCTION_IN);
LOG_I(PHY,"[UE%d] Applying radioResourceConfigCommon from eNB%d\n",Mod_id,gNB_id);
ue->prach_vars[gNB_id]->prach_pdu.root_seq_id =radioResourceConfigCommon->prach_Config.rootSequenceIndex;
ue->prach_vars[gNB_id]->prach_Config_enabled=1;
//ue->prach_vars[gNB_id]->prach_pdu.prach_ConfigIndex =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_ConfigIndex;
ue->prach_vars[gNB_id]->prach_pdu.restricted_set =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.highSpeedFlag;
ue->prach_vars[gNB_id]->prach_pdu.num_cs =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.zeroCorrelationZoneConfig;
//ue->prach_vars[gNB_id]->prach_pdu.prach_FreqOffset =radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_FreqOffset;
//compute_prach_seq(fp->prach_config_common.rootSequenceIndex,
// fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
// fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
// fp->prach_config_common.prach_ConfigInfo.highSpeedFlag,
// fp->frame_type,ue->X_u);
fp->pucch_config_common.deltaPUCCH_Shift = 1+radioResourceConfigCommon->pucch_ConfigCommon.deltaPUCCH_Shift;
fp->pucch_config_common.nRB_CQI = radioResourceConfigCommon->pucch_ConfigCommon.nRB_CQI;
fp->pucch_config_common.nCS_AN = radioResourceConfigCommon->pucch_ConfigCommon.nCS_AN;
fp->pucch_config_common.n1PUCCH_AN = radioResourceConfigCommon->pucch_ConfigCommon.n1PUCCH_AN;
fp->pdsch_config_common.referenceSignalPower = radioResourceConfigCommon->pdsch_ConfigCommon.referenceSignalPower;
fp->pdsch_config_common.p_b = radioResourceConfigCommon->pdsch_ConfigCommon.p_b;
fp->pusch_config_common.n_SB = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.n_SB;
fp->pusch_config_common.hoppingMode = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.hoppingMode;
fp->pusch_config_common.pusch_HoppingOffset = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.pusch_HoppingOffset;
fp->pusch_config_common.enable64QAM = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.enable64QAM;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupHoppingEnabled;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = dmrs1_tab_ue[radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.cyclicShift];
init_ul_hopping(fp);
fp->soundingrs_ul_config_common.enabled_flag = 0;
if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon.present==SoundingRS_UL_ConfigCommon_PR_setup) {
fp->soundingrs_ul_config_common.enabled_flag = 1;
fp->soundingrs_ul_config_common.srs_BandwidthConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_BandwidthConfig;
fp->soundingrs_ul_config_common.srs_SubframeConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_SubframeConfig;
fp->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.ackNackSRS_SimultaneousTransmission;
if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_MaxUpPts)
fp->soundingrs_ul_config_common.srs_MaxUpPts = 1;
else
fp->soundingrs_ul_config_common.srs_MaxUpPts = 0;
}
fp->ul_power_control_config_common.p0_NominalPUSCH = radioResourceConfigCommon->uplinkPowerControlCommon.p0_NominalPUSCH;
fp->ul_power_control_config_common.alpha = radioResourceConfigCommon->uplinkPowerControlCommon.alpha;
fp->ul_power_control_config_common.p0_NominalPUCCH = radioResourceConfigCommon->uplinkPowerControlCommon.p0_NominalPUCCH;
fp->ul_power_control_config_common.deltaPreambleMsg3 = radioResourceConfigCommon->uplinkPowerControlCommon.deltaPreambleMsg3;
fp->ul_power_control_config_common.deltaF_PUCCH_Format1 = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format1;
fp->ul_power_control_config_common.deltaF_PUCCH_Format1b = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format1b;
fp->ul_power_control_config_common.deltaF_PUCCH_Format2 = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format2;
fp->ul_power_control_config_common.deltaF_PUCCH_Format2a = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format2a;
fp->ul_power_control_config_common.deltaF_PUCCH_Format2b = radioResourceConfigCommon->uplinkPowerControlCommon.deltaFList_PUCCH.deltaF_PUCCH_Format2b;
fp->maxHARQ_Msg3Tx = radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx;
// Now configure some of the Physical Channels
// PUCCH
init_ncs_cell(fp,ue->ncs_cell);
init_ul_hopping(fp);
// PCH
init_ue_paging_info(ue,radioResourceConfigCommon->pcch_Config.defaultPagingCycle,radioResourceConfigCommon->pcch_Config.nB);
// MBSFN
if (mbsfn_SubframeConfigList != NULL) {
fp->num_MBSFN_config = mbsfn_SubframeConfigList->list.count;
for (i=0; i<mbsfn_SubframeConfigList->list.count; i++) {
fp->MBSFN_config[i].radioframeAllocationPeriod = mbsfn_SubframeConfigList->list.array[i]->radioframeAllocationPeriod;
fp->MBSFN_config[i].radioframeAllocationOffset = mbsfn_SubframeConfigList->list.array[i]->radioframeAllocationOffset;
if (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame) {
fp->MBSFN_config[i].fourFrames_flag = 0;
fp->MBSFN_config[i].mbsfn_SubframeConfig = mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[0]; // 6-bit subframe configuration
LOG_I(PHY, "[CONFIG] MBSFN_SubframeConfig[%d] pattern is %d\n", i,
fp->MBSFN_config[i].mbsfn_SubframeConfig);
} else if (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_fourFrames) { // 24-bit subframe configuration
fp->MBSFN_config[i].fourFrames_flag = 1;
fp->MBSFN_config[i].mbsfn_SubframeConfig =
mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[0]|
(mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[1]<<8)|
(mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[2]<<16);
LOG_I(PHY, "[CONFIG] MBSFN_SubframeConfig[%d] pattern is %d\n", i,
fp->MBSFN_config[i].mbsfn_SubframeConfig);
}
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_CONFIG_SIB2, VCD_FUNCTION_OUT);
}
void phy_config_sib13_ue(uint8_t Mod_id,int CC_id,uint8_t gNB_id,int mbsfn_Area_idx,
long mbsfn_AreaId_r9)
{
NR_DL_FRAME_PARMS *fp = &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms;
LOG_I(PHY,"[UE%d] Applying MBSFN_Area_id %ld for index %d\n",Mod_id,mbsfn_AreaId_r9,mbsfn_Area_idx);
if (mbsfn_Area_idx == 0) {
fp->Nid_cell_mbsfn = (uint16_t)mbsfn_AreaId_r9;
LOG_N(PHY,"Fix me: only called when mbsfn_Area_idx == 0)\n");
}
lte_gold_mbsfn(fp,PHY_vars_UE_g[Mod_id][CC_id]->lte_gold_mbsfn_table,fp->Nid_cell_mbsfn);
}*/
/*
* Configures UE MAC and PHY with radioResourceCommon received in mobilityControlInfo IE during Handover
*/
/*void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t gNB_id, MobilityControlInfo_t *mobilityControlInfo, uint8_t ho_failed)
{
if(mobilityControlInfo!=NULL) {
RadioResourceConfigCommon_t *radioResourceConfigCommon = &mobilityControlInfo->radioResourceConfigCommon;
LOG_I(PHY,"radioResourceConfigCommon %p\n", radioResourceConfigCommon);
memcpy((void *)&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms_before_ho,
(void *)&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms,
sizeof(NR_DL_FRAME_PARMS));
PHY_vars_UE_g[Mod_id][CC_id]->ho_triggered = 1;
//PHY_vars_UE_g[UE_id]->UE_mode[0] = PRACH;
NR_DL_FRAME_PARMS *fp = &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms;
// int N_ZC;
// uint8_t prach_fmt;
// int u;
LOG_I(PHY,"[UE%d] Handover triggered: Applying radioResourceConfigCommon from eNB %d\n",
Mod_id,gNB_id);
ue->prach_vars[gNB_id]->prach_pdu.root_seq_id =radioResourceConfigCommon->prach_Config.rootSequenceIndex;
ue->prach_vars[gNB_id]->prach_Config_enabled=1;
//ue->prach_vars[gNB_id]->prach_pdu.prach_ConfigIndex =radioResourceConfigCommon->prach_Config.prach_ConfigInfo->prach_ConfigIndex;
ue->prach_vars[gNB_id]->prach_pdu.restricted_set =radioResourceConfigCommon->prach_Config.prach_ConfigInfo->highSpeedFlag;
ue->prach_vars[gNB_id]->prach_pdu.num_cs =radioResourceConfigCommon->prach_Config.prach_ConfigInfo->zeroCorrelationZoneConfig;
//ue->prach_vars[gNB_id]->prach_pdu.prach_FreqOffset =radioResourceConfigCommon->prach_Config.prach_ConfigInfo->prach_FreqOffset;
// prach_fmt = get_prach_fmt(radioResourceConfigCommon->prach_Config.prach_ConfigInfo->prach_ConfigIndex,fp->frame_type);
// N_ZC = (prach_fmt <4)?839:139;
// u = (prach_fmt < 4) ? prach_root_sequence_map0_3[fp->prach_config_common.rootSequenceIndex] :
// prach_root_sequence_map4[fp->prach_config_common.rootSequenceIndex];
//compute_prach_seq(u,N_ZC, PHY_vars_UE_g[Mod_id]->X_u);
//compute_prach_seq(PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.rootSequenceIndex,
// PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
// PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
// PHY_vars_UE_g[Mod_id][CC_id]->frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag,
// fp->frame_type,
// PHY_vars_UE_g[Mod_id][CC_id]->X_u);
fp->pucch_config_common.deltaPUCCH_Shift = 1+radioResourceConfigCommon->pucch_ConfigCommon->deltaPUCCH_Shift;
fp->pucch_config_common.nRB_CQI = radioResourceConfigCommon->pucch_ConfigCommon->nRB_CQI;
fp->pucch_config_common.nCS_AN = radioResourceConfigCommon->pucch_ConfigCommon->nCS_AN;
fp->pucch_config_common.n1PUCCH_AN = radioResourceConfigCommon->pucch_ConfigCommon->n1PUCCH_AN;
fp->pdsch_config_common.referenceSignalPower = radioResourceConfigCommon->pdsch_ConfigCommon->referenceSignalPower;
fp->pdsch_config_common.p_b = radioResourceConfigCommon->pdsch_ConfigCommon->p_b;
fp->pusch_config_common.n_SB = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.n_SB;
fp->pusch_config_common.hoppingMode = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.hoppingMode;
fp->pusch_config_common.pusch_HoppingOffset = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.pusch_HoppingOffset;
fp->pusch_config_common.enable64QAM = radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.enable64QAM;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupHoppingEnabled;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = radioResourceConfigCommon->pusch_ConfigCommon.ul_ReferenceSignalsPUSCH.cyclicShift;
init_ul_hopping(fp);
fp->soundingrs_ul_config_common.enabled_flag = 0;
if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon->present==SoundingRS_UL_ConfigCommon_PR_setup) {
fp->soundingrs_ul_config_common.enabled_flag = 1;
fp->soundingrs_ul_config_common.srs_BandwidthConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon->choice.setup.srs_BandwidthConfig;
fp->soundingrs_ul_config_common.srs_SubframeConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon->choice.setup.srs_SubframeConfig;
fp->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission = radioResourceConfigCommon->soundingRS_UL_ConfigCommon->choice.setup.ackNackSRS_SimultaneousTransmission;
if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon->choice.setup.srs_MaxUpPts)
fp->soundingrs_ul_config_common.srs_MaxUpPts = 1;
else
fp->soundingrs_ul_config_common.srs_MaxUpPts = 0;
}
fp->ul_power_control_config_common.p0_NominalPUSCH = radioResourceConfigCommon->uplinkPowerControlCommon->p0_NominalPUSCH;
fp->ul_power_control_config_common.alpha = radioResourceConfigCommon->uplinkPowerControlCommon->alpha;
fp->ul_power_control_config_common.p0_NominalPUCCH = radioResourceConfigCommon->uplinkPowerControlCommon->p0_NominalPUCCH;
fp->ul_power_control_config_common.deltaPreambleMsg3 = radioResourceConfigCommon->uplinkPowerControlCommon->deltaPreambleMsg3;
fp->ul_power_control_config_common.deltaF_PUCCH_Format1 = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format1;
fp->ul_power_control_config_common.deltaF_PUCCH_Format1b = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format1b;
fp->ul_power_control_config_common.deltaF_PUCCH_Format2 = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format2;
fp->ul_power_control_config_common.deltaF_PUCCH_Format2a = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format2a;
fp->ul_power_control_config_common.deltaF_PUCCH_Format2b = radioResourceConfigCommon->uplinkPowerControlCommon->deltaFList_PUCCH.deltaF_PUCCH_Format2b;
fp->maxHARQ_Msg3Tx = radioResourceConfigCommon->rach_ConfigCommon->maxHARQ_Msg3Tx;
// Now configure some of the Physical Channels
if (radioResourceConfigCommon->antennaInfoCommon)
fp->nb_antennas_tx = (1<<radioResourceConfigCommon->antennaInfoCommon->antennaPortsCount);
else
fp->nb_antennas_tx = 1;
//PHICH
if (radioResourceConfigCommon->antennaInfoCommon) {
fp->phich_config_common.phich_resource = radioResourceConfigCommon->phich_Config->phich_Resource;
fp->phich_config_common.phich_duration = radioResourceConfigCommon->phich_Config->phich_Duration;
}
//Target CellId
fp->Nid_cell = mobilityControlInfo->targetPhysCellId;
fp->nushift = fp->Nid_cell%6;
// PUCCH
init_ncs_cell(fp,PHY_vars_UE_g[Mod_id][CC_id]->ncs_cell);
init_ul_hopping(fp);
// RNTI
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][gNB_id]->crnti = mobilityControlInfo->newUE_Identity.buf[0]|(mobilityControlInfo->newUE_Identity.buf[1]<<8);
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][gNB_id]->crnti = mobilityControlInfo->newUE_Identity.buf[0]|(mobilityControlInfo->newUE_Identity.buf[1]<<8);
LOG_I(PHY,"SET C-RNTI %x %x\n",PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][gNB_id]->crnti,
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][gNB_id]->crnti);
}
if(ho_failed) {
LOG_D(PHY,"[UE%d] Handover failed, triggering RACH procedure\n",Mod_id);
memcpy((void *)&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms,(void *)&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms_before_ho, sizeof(NR_DL_FRAME_PARMS));
PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[gNB_id] = PRACH;
}
}
void phy_config_meas_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,uint8_t n_adj_cells,unsigned int *adj_cell_id)
{
PHY_NR_MEASUREMENTS *phy_meas = &PHY_vars_UE_g[Mod_id][CC_id]->measurements;
int i;
LOG_I(PHY,"Configuring inter-cell measurements for %d cells, ids: \n",n_adj_cells);
for (i=0; i<n_adj_cells; i++) {
LOG_I(PHY,"%d\n",adj_cell_id[i]);
lte_gold(&PHY_vars_UE_g[Mod_id][CC_id]->frame_parms,PHY_vars_UE_g[Mod_id][CC_id]->lte_gold_table[i+1],adj_cell_id[i]);
}
phy_meas->n_adj_cells = n_adj_cells;
memcpy((void*)phy_meas->adj_cell_id,(void *)adj_cell_id,n_adj_cells*sizeof(unsigned int));
}
*/
#if 0
void phy_config_harq_ue(module_id_t Mod_id,
int CC_id,
......
......@@ -46,9 +46,8 @@
#include "common_lib.h"
#include "msc.h"
#include "fapi_nr_ue_interface.h"
//#include <complex.h>
#include "assertions.h"
#ifdef MEX
#define msg mexPrintf
#else
......@@ -79,9 +78,6 @@
#define openair_free(y,x) free((y))
#define PAGE_SIZE 4096
//#define RX_NB_TH_MAX 3
//#define RX_NB_TH 3
#ifdef NR_UNIT_TEST
#define FILE_NAME " "
#define LINE_FILE (0)
......@@ -92,53 +88,19 @@
#define NR_TST_PHY_PRINTF(...)
#endif
//#ifdef SHRLIBDEV
//extern int rxrescale;
//#define RX_IQRESCALELEN rxrescale
//#else
//#define RX_IQRESCALELEN 15
//#endif
//! \brief Allocate \c size bytes of memory on the heap with alignment 16 and zero it afterwards.
//! If no more memory is available, this function will terminate the program with an assertion error.
/*static inline void* malloc16_clear( size_t size )
{
#ifdef __AVX2__
void* ptr = memalign(32, size);
#else
void* ptr = memalign(16, size);
#endif
DevAssert(ptr);
memset( ptr, 0, size );
return ptr;
}*/
#define PAGE_MASK 0xfffff000
#define virt_to_phys(x) (x)
#define openair_sched_exit() exit(-1)
//#define max(a,b) ((a)>(b) ? (a) : (b))
//#define min(a,b) ((a)<(b) ? (a) : (b))
#define bzero(s,n) (memset((s),0,(n)))
#define cmax(a,b) ((a>b) ? (a) : (b))
#define cmin(a,b) ((a<b) ? (a) : (b))
#define cmax3(a,b,c) ((cmax(a,b)>c) ? (cmax(a,b)) : (c))
/// suppress compiler warning for unused arguments
#define UNUSED(x) (void)x;
#include "impl_defs_top.h"
#include "impl_defs_nr.h"
#include "PHY/TOOLS/time_meas.h"
#include "PHY/CODING/coding_defs.h"
#include "PHY/TOOLS/tools_defs.h"
......@@ -146,16 +108,11 @@
#include "NR_UE_TRANSPORT/nr_transport_ue.h"
#if defined(UPGRADE_RAT_NR)
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#endif
#include "PHY/NR_UE_TRANSPORT/dci_nr.h"
//#include "PHY/LTE_TRANSPORT/defs.h"
//#include "PHY/NR_UE_TRANSPORT/defs_nr.h"
#include <pthread.h>
#include "targets/ARCH/COMMON/common_lib.h"
#ifndef NO_RAT_NR
......@@ -187,9 +144,6 @@ typedef enum {
#define debug_msg if (((mac_xface->frame%100) == 0) || (mac_xface->frame < 50)) msg
typedef struct {
//unsigned int rx_power[NUMBER_OF_CONNECTED_eNB_MAX][NB_ANTENNAS_RX]; //! estimated received signal power (linear)
//unsigned short rx_power_dB[NUMBER_OF_CONNECTED_eNB_MAX][NB_ANTENNAS_RX]; //! estimated received signal power (dB)
//unsigned short rx_avg_power_dB[NUMBER_OF_CONNECTED_eNB_MAX]; //! estimated avg received signal power (dB)
// RRC measurements
uint32_t rssi;
......@@ -859,19 +813,6 @@ typedef struct {
fapi_nr_config_request_t nrUE_config;
// the following structures are not part of PHY_vars_UE anymore as it is not thread safe. They are now on the stack of the functions that actually need them
//nr_downlink_indication_t dl_indication;
//nr_uplink_indication_t ul_indication;
/// UE FAPI DCI request
//nr_dcireq_t dcireq;
// pointers to the next 2 strcutres are also included in dl_indictation
/// UE FAPI indication for DLSCH reception
//fapi_nr_rx_indication_t rx_ind;
/// UE FAPI indication for DCI reception
//fapi_nr_dci_indication_t dci_ind;
t_nrPolar_params *polarList;
NR_UE_PDSCH *pdsch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_eNB_MAX+1]; // two RxTx Threads
NR_UE_PBCH *pbch_vars[NUMBER_OF_CONNECTED_eNB_MAX];
......@@ -1147,7 +1088,6 @@ typedef struct {
} PHY_VARS_NR_UE;
/* this structure is used to pass both UE phy vars and
* proc to the function UE_thread_rxn_txnp4
*/
......@@ -1160,81 +1100,12 @@ typedef struct syncData_s {
UE_nr_rxtx_proc_t proc;
PHY_VARS_NR_UE *UE;
} syncData_t;
/*static inline int wait_on_condition(pthread_mutex_t *mutex,pthread_cond_t *cond,int *instance_cnt,char *name) {
if (pthread_mutex_lock(mutex) != 0) {
LOG_E( PHY, "[SCHED][eNB] error locking mutex for %s\n",name);
exit_fun("nothing to add");
return(-1);
}
while (*instance_cnt < 0) {
// most of the time the thread is waiting here
// proc->instance_cnt_rxtx is -1
pthread_cond_wait(cond,mutex); // this unlocks mutex_rxtx while waiting and then locks it again
}
if (pthread_mutex_unlock(mutex) != 0) {
LOG_E(PHY,"[SCHED][eNB] error unlocking mutex for %s\n",name);
exit_fun("nothing to add");
return(-1);
}
return(0);
}
static inline int wait_on_busy_condition(pthread_mutex_t *mutex,pthread_cond_t *cond,int *instance_cnt,char *name) {
if (pthread_mutex_lock(mutex) != 0) {
LOG_E( PHY, "[SCHED][eNB] error locking mutex for %s\n",name);
exit_fun("nothing to add");
return(-1);
}
while (*instance_cnt == 0) {
// most of the time the thread will skip this
// waits only if proc->instance_cnt_rxtx is 0
pthread_cond_wait(cond,mutex); // this unlocks mutex_rxtx while waiting and then locks it again
}
if (pthread_mutex_unlock(mutex) != 0) {
LOG_E(PHY,"[SCHED][eNB] error unlocking mutex for %s\n",name);
exit_fun("nothing to add");
return(-1);
}
return(0);
}
static inline int release_thread(pthread_mutex_t *mutex,int *instance_cnt,char *name) {
if (pthread_mutex_lock(mutex) != 0) {
LOG_E( PHY, "[SCHED][eNB] error locking mutex for %s\n",name);
exit_fun("nothing to add");
return(-1);
}
*instance_cnt=*instance_cnt-1;
if (pthread_mutex_unlock(mutex) != 0) {
LOG_E( PHY, "[SCHED][eNB] error unlocking mutex for %s\n",name);
exit_fun("nothing to add");
return(-1);
}
return(0);
}
*/
typedef enum {
pss = 0,
pbch = 1,
si = 2
} sync_mode_t;
/*
#include "PHY/INIT/defs.h"
#include "PHY/LTE_REFSIG/defs.h"
#include "PHY/MODULATION/defs.h"
#include "PHY/LTE_TRANSPORT/proto.h"
#include "PHY/LTE_ESTIMATION/defs.h"
*/
#include "SIMULATION/ETH_TRANSPORT/defs.h"
#endif
......@@ -204,6 +204,7 @@ void nr_process_timing_advance_rar(PHY_VARS_NR_UE *ue, int frame_rx, int nr_slot
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id) {
int slot_tx = proc->nr_slot_tx;
int frame_tx = proc->frame_tx;
runmode_t mode = normal_txrx;
......@@ -237,11 +238,9 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
nr_ue_pusch_common_procedures(ue,
slot_tx,
&ue->frame_parms,1);
//ue->ulsch[proc->thread_id][gNB_id][0]->harq_processes[harq_pid]->pusch_pdu.nrOfLayers);
}
//LOG_M("txdata.m","txs",ue->common_vars.txdata[0],1228800,1,1);
/* RACH */
if (get_softmodem_params()->do_ra==1) {
if ((ue->UE_mode[gNB_id] > NOT_SYNCHED && ue->UE_mode[gNB_id] < PUSCH) && (ue->prach_vars[gNB_id]->prach_Config_enabled == 1)) {
nr_ue_prach_procedures(ue, proc, gNB_id, mode);
......@@ -314,11 +313,7 @@ void nr_ue_pbch_procedures(uint8_t gNB_id,
UE_nr_rxtx_proc_t *proc,
uint8_t abstraction_flag)
{
// int i;
//int pbch_tx_ant=0;
int ret = 0;
//static uint8_t first_run = 1;
//uint8_t pbch_trials = 0;
DevAssert(ue);
......
......@@ -152,8 +152,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
mac->phy_config.CC_id = cc_idP;
// carrier config
LOG_I(MAC, "Entering UE Config Common\n");
LOG_D(MAC, "Entering UE Config Common\n");
cfg->carrier_config.dl_bandwidth = config_bandwidth(scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
......
......@@ -1937,575 +1937,6 @@ void ue_contention_resolution(module_id_t module_id, uint8_t gNB_index, int cc_i
}
}
#if 0
uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
uint8_t slot,
int p,
crc_scrambled_t crc_scrambled,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint8_t format) {
LOG_DDD("crc_scrambled=%d, n_RB_ULBWP=%d, n_RB_DLBWP=%d\n",crc_scrambled,n_RB_ULBWP,n_RB_DLBWP);
/*
* function nr_dci_format_size calculates and returns the size in bits of a determined format
* it also returns an bi-dimensional array 'dci_fields_sizes' with x rows and y columns, where:
* x is the number of fields defined in TS 38.212 subclause 7.3.1 (Each field is mapped in the order in which it appears in the description in the specification)
* y is the number of formats
* e.g.: dci_fields_sizes[10][0] contains the size in bits of the field FREQ_DOM_RESOURCE_ASSIGNMENT_UL for format 0_0
*/
// pdsch_config contains the PDSCH-Config IE is used to configure the UE specific PDSCH parameters (TS 38.331)
PDSCH_Config_t pdsch_config = ue->PDSCH_Config;
// pusch_config contains the PUSCH-Config IE is used to configure the UE specific PUSCH parameters (TS 38.331)
PUSCH_Config_t pusch_config = ue->pusch_config;
PUCCH_Config_t pucch_config_dedicated = ue->pucch_config_dedicated_nr[eNB_id];
crossCarrierSchedulingConfig_t crossCarrierSchedulingConfig = ue->crossCarrierSchedulingConfig;
dmrs_UplinkConfig_t dmrs_UplinkConfig = ue->dmrs_UplinkConfig;
dmrs_DownlinkConfig_t dmrs_DownlinkConfig = ue->dmrs_DownlinkConfig;
csi_MeasConfig_t csi_MeasConfig = ue->csi_MeasConfig;
PUSCH_ServingCellConfig_t PUSCH_ServingCellConfig= ue->PUSCH_ServingCellConfig;
PDSCH_ServingCellConfig_t PDSCH_ServingCellConfig= ue->PDSCH_ServingCellConfig;
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[proc->thread_id][eNB_id];
// 1 CARRIER_IN
// crossCarrierSchedulingConfig from higher layers, variable crossCarrierSchedulingConfig indicates if 'cross carrier scheduling' is enabled or not:
// if No cross carrier scheduling: number of bits for CARRIER_IND is 0
// if Cross carrier scheduling: number of bits for CARRIER_IND is 3
// The IE CrossCarrierSchedulingConfig is used to specify the configuration when the cross-carrier scheduling is used in a cell
uint8_t crossCarrierSchedulingConfig_ind = 0;
if (crossCarrierSchedulingConfig.schedulingCellInfo.other.cif_InSchedulingCell !=0 ) crossCarrierSchedulingConfig_ind=1;
// 2 SUL_IND_0_1, // 40 SRS_REQUEST, // 50 SUL_IND_0_0
// UL/SUL indicator (TS 38.331, supplementary uplink is indicated in higher layer parameter ServCellAdd-SUL from IE ServingCellConfig and ServingCellConfigCommon):
// 0 bit for UEs not configured with SUL in the cell or UEs configured with SUL in the cell but only PUCCH carrier in the cell is configured for PUSCH transmission
// 1 bit for UEs configured with SUL in the cell as defined in Table 7.3.1.1.1-1
// sul_ind indicates whether SUL is configured in cell or not
uint8_t sul_ind=ue->supplementaryUplink.supplementaryUplink; // this value will be 0 or 1 depending on higher layer parameter ServCellAdd-SUL. FIXME!!!
// 7 BANDWIDTH_PART_IND
// number of UL BWPs configured by higher layers
uint8_t n_UL_BWP_RRC=1; // initialized to 1 but it has to be initialized by higher layers FIXME!!!
n_UL_BWP_RRC = ((n_UL_BWP_RRC > 3)?n_UL_BWP_RRC:(n_UL_BWP_RRC+1));
// number of DL BWPs configured by higher layers
uint8_t n_DL_BWP_RRC=1; // initialized to 1 but it has to be initialized by higher layers FIXME!!!
n_DL_BWP_RRC = ((n_DL_BWP_RRC > 3)?n_DL_BWP_RRC:(n_DL_BWP_RRC+1));
// 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL
// if format0_0, only resource allocation type 1 is allowed
// if format0_1, then resource allocation type 0 can be configured and N_RBG is defined in TS 38.214 subclause 6.1.2.2.1
// for PUSCH hopping with resource allocation type 1
// n_UL_hopping = 1 if the higher layer parameter frequencyHoppingOffsetLists contains two offset values
// n_UL_hopping = 2 if the higher layer parameter frequencyHoppingOffsetLists contains four offset values
uint8_t n_UL_hopping=pusch_config.n_frequencyHoppingOffsetLists;
if (n_UL_hopping == 2) {
n_UL_hopping = 1;
} else if (n_UL_hopping == 4) {
n_UL_hopping = 2;
} else {
n_UL_hopping = 0;
}
ul_resourceAllocation_t ul_resource_allocation_type = pusch_config.ul_resourceAllocation;
uint8_t ul_res_alloc_type_0 = 0;
uint8_t ul_res_alloc_type_1 = 0;
if (ul_resource_allocation_type == ul_resourceAllocationType0) ul_res_alloc_type_0 = 1;
if (ul_resource_allocation_type == ul_resourceAllocationType1) ul_res_alloc_type_1 = 1;
if (ul_resource_allocation_type == ul_dynamicSwitch) {
ul_res_alloc_type_0 = 1;
ul_res_alloc_type_1 = 1;
}
uint8_t n_bits_freq_dom_res_assign_ul=0,n_ul_RGB_tmp;
if (ul_res_alloc_type_0 == 1) { // implementation of Table 6.1.2.2.1-1 TC 38.214 subclause 6.1.2.2.1
// config1: PUSCH-Config IE contains rbg-Size ENUMERATED {config1 config2}
ul_rgb_Size_t config = pusch_config.ul_rgbSize;
uint8_t nominal_RBG_P = (config==ul_rgb_config1?2:4);
if (n_RB_ULBWP > 36) nominal_RBG_P = (config==ul_rgb_config1?4:8);
if (n_RB_ULBWP > 72) nominal_RBG_P = (config==ul_rgb_config1?8:16);
if (n_RB_ULBWP > 144) nominal_RBG_P = 16;
n_bits_freq_dom_res_assign_ul = (uint8_t)ceil((n_RB_ULBWP+(0%nominal_RBG_P))/nominal_RBG_P); //FIXME!!! what is 0???
n_ul_RGB_tmp = n_bits_freq_dom_res_assign_ul;
}
if (ul_res_alloc_type_1 == 1) n_bits_freq_dom_res_assign_ul = (uint8_t)(ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)))-n_UL_hopping;
if ((ul_res_alloc_type_0 == 1) && (ul_res_alloc_type_1 == 1))
n_bits_freq_dom_res_assign_ul = ((n_bits_freq_dom_res_assign_ul>n_ul_RGB_tmp)?(n_bits_freq_dom_res_assign_ul+1):(n_ul_RGB_tmp+1));
// 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL
// if format1_0, only resource allocation type 1 is allowed
// if format1_1, then resource allocation type 0 can be configured and N_RBG is defined in TS 38.214 subclause 5.1.2.2.1
dl_resourceAllocation_t dl_resource_allocation_type = pdsch_config.dl_resourceAllocation;
uint8_t dl_res_alloc_type_0 = 0;
uint8_t dl_res_alloc_type_1 = 0;
if (dl_resource_allocation_type == dl_resourceAllocationType0) dl_res_alloc_type_0 = 1;
if (dl_resource_allocation_type == dl_resourceAllocationType1) dl_res_alloc_type_1 = 1;
if (dl_resource_allocation_type == dl_dynamicSwitch) {
dl_res_alloc_type_0 = 1;
dl_res_alloc_type_1 = 1;
}
uint8_t n_bits_freq_dom_res_assign_dl=0,n_dl_RGB_tmp;
if (dl_res_alloc_type_0 == 1) { // implementation of Table 5.1.2.2.1-1 TC 38.214 subclause 6.1.2.2.1
// config1: PDSCH-Config IE contains rbg-Size ENUMERATED {config1, config2}
dl_rgb_Size_t config = pdsch_config.dl_rgbSize;
uint8_t nominal_RBG_P = (config==dl_rgb_config1?2:4);
if (n_RB_DLBWP > 36) nominal_RBG_P = (config==dl_rgb_config1?4:8);
if (n_RB_DLBWP > 72) nominal_RBG_P = (config==dl_rgb_config1?8:16);
if (n_RB_DLBWP > 144) nominal_RBG_P = 16;
n_bits_freq_dom_res_assign_dl = (uint8_t)ceil((n_RB_DLBWP+(0%nominal_RBG_P))/nominal_RBG_P); //FIXME!!! what is 0???
n_dl_RGB_tmp = n_bits_freq_dom_res_assign_dl;
}
if (dl_res_alloc_type_1 == 1) n_bits_freq_dom_res_assign_dl = (uint8_t)(ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)));
if ((dl_res_alloc_type_0 == 1) && (dl_res_alloc_type_1 == 1))
n_bits_freq_dom_res_assign_dl = ((n_bits_freq_dom_res_assign_dl>n_dl_RGB_tmp)?(n_bits_freq_dom_res_assign_dl+1):(n_dl_RGB_tmp+1));
// 12 TIME_DOM_RESOURCE_ASSIGNMENT
uint8_t pusch_alloc_list = pusch_config.n_push_alloc_list;
uint8_t pdsch_alloc_list = pdsch_config.n_pdsh_alloc_list;
// 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
static_bundleSize_t static_prb_BundlingType = pdsch_config.prbBundleType.staticBundling;
bundleSizeSet1_t dynamic_prb_BundlingType1 = pdsch_config.prbBundleType.dynamicBundlig.bundleSizeSet1;
bundleSizeSet2_t dynamic_prb_BundlingType2 = pdsch_config.prbBundleType.dynamicBundlig.bundleSizeSet2;
uint8_t prb_BundlingType_size=0;
if ((static_prb_BundlingType==st_n4)||(static_prb_BundlingType==st_wideband)) prb_BundlingType_size=0;
if ((dynamic_prb_BundlingType1==dy_1_n4)||(dynamic_prb_BundlingType1==dy_1_wideband)||(dynamic_prb_BundlingType1==dy_1_n2_wideband)||(dynamic_prb_BundlingType1==dy_1_n4_wideband)||
(dynamic_prb_BundlingType2==dy_2_n4)||(dynamic_prb_BundlingType2==dy_2_wideband)) prb_BundlingType_size=1;
// 15 RATE_MATCHING_IND FIXME!!!
// according to TS 38.212: Rate matching indicator  E0, 1, or 2 bits according to higher layer parameter rateMatchPattern
uint8_t rateMatching_bits = pdsch_config.n_rateMatchPatterns;
// 16 ZP_CSI_RS_TRIGGER FIXME!!!
// 0, 1, or 2 bits as defined in Subclause 5.1.4.2 of [6, TS 38.214].
// is the number of ZP CSI-RS resource sets in the higher layer parameter zp-CSI-RS-Resource
uint8_t n_zp_bits = pdsch_config.n_zp_CSI_RS_ResourceId;
// 17 FREQ_HOPPING_FLAG
// freqHopping is defined by higher layer parameter frequencyHopping from IE PUSCH-Config. Values are ENUMERATED{mode1, mode2}
frequencyHopping_t f_hopping = pusch_config.frequencyHopping;
uint8_t freqHopping = 0;
if ((f_hopping==f_hop_mode1)||(f_hopping==f_hop_mode2)) freqHopping = 1;
// 28 DAI
pdsch_HARQ_ACK_Codebook_t pdsch_HARQ_ACK_Codebook = pdsch_config.pdsch_HARQ_ACK_Codebook;
uint8_t n_dai = 0;
uint8_t n_serving_cell_dl = 1; // this is hardcoded to 1 as we need to get this value from RRC higher layers parameters. FIXME!!!
if ((pdsch_HARQ_ACK_Codebook == dynamic) && (n_serving_cell_dl == 1)) n_dai = 2;
if ((pdsch_HARQ_ACK_Codebook == dynamic) && (n_serving_cell_dl > 1)) n_dai = 4;
// 29 FIRST_DAI
uint8_t codebook_HARQ_ACK = 0; // We need to get this value to calculate number of bits of fields 1st DAI and 2nd DAI.
if (pdsch_HARQ_ACK_Codebook == semiStatic) codebook_HARQ_ACK = 1;
if (pdsch_HARQ_ACK_Codebook == dynamic) codebook_HARQ_ACK = 2;
// 30 SECOND_DAI
uint8_t n_HARQ_ACK_sub_codebooks = 0; // We need to get this value to calculate number of bits of fields 1st DAI and 2nd DAI. FIXME!!!
// 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND
uint8_t pdsch_harq_t_ind = (uint8_t)ceil(log2(pucch_config_dedicated.dl_DataToUL_ACK[0]));
// 36 SRS_RESOURCE_IND
// n_SRS is the number of configured SRS resources in the SRS resource set associated with the higher layer parameter usage of value 'codeBook' or 'nonCodeBook'
// from SRS_ResourceSet_t type we should get the information of the usage parameter (with possible values beamManagement, codebook, nonCodebook, antennaSwitching)
// at frame_parms->srs_nr->p_SRS_ResourceSetList[]->usage
uint8_t n_SRS = ue->srs.number_srs_Resource_Set;
// 37 PRECOD_NBR_LAYERS
// 38 ANTENNA_PORTS
txConfig_t txConfig = pusch_config.txConfig;
transformPrecoder_t transformPrecoder = pusch_config.transformPrecoder;
codebookSubset_t codebookSubset = pusch_config.codebookSubset;
uint8_t maxRank = pusch_config.maxRank;
uint8_t num_antenna_ports = 1; // this is hardcoded. We need to get the real value FIXME!!!
uint8_t precond_nbr_layers_bits = 0;
uint8_t antenna_ports_bits_ul = 0;
// searching number of bits at tables 7.3.1.1.2-2/3/4/5 from TS 38.212 subclause 7.3.1.1.2
if (txConfig == txConfig_codebook) {
if (num_antenna_ports == 4) {
if ((transformPrecoder == transformPrecoder_disabled) && ((maxRank == 2)||(maxRank == 3)||(maxRank == 4))) { // Table 7.3.1.1.2-2
if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=6;
if (codebookSubset == codebookSubset_partialAndNonCoherent) precond_nbr_layers_bits=5;
if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=4;
}
if (((transformPrecoder == transformPrecoder_enabled)||(transformPrecoder == transformPrecoder_disabled)) && (maxRank == 1)) { // Table 7.3.1.1.2-3
if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=5;
if (codebookSubset == codebookSubset_partialAndNonCoherent) precond_nbr_layers_bits=4;
if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=2;
}
}
if (num_antenna_ports == 2) {
if ((transformPrecoder == transformPrecoder_disabled) && (maxRank == 2)) { // Table 7.3.1.1.2-4
if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=4;
if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=2;
}
if (((transformPrecoder == transformPrecoder_enabled)||(transformPrecoder == transformPrecoder_disabled)) && (maxRank == 1)) { // Table 7.3.1.1.2-5
if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=3;
if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=1;
}
}
}
if (txConfig == txConfig_nonCodebook) {
}
// searching number of bits at tables 7.3.1.1.2-6/7/8/9/10/11/12/13/14/15/16/17/18/19
if((dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1)) {
if ((transformPrecoder == transformPrecoder_enabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len1)) antenna_ports_bits_ul = 2;
if ((transformPrecoder == transformPrecoder_enabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len2)) antenna_ports_bits_ul = 4;
if ((transformPrecoder == transformPrecoder_disabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len1)) antenna_ports_bits_ul = 3;
if ((transformPrecoder == transformPrecoder_disabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len2)) antenna_ports_bits_ul = 4;
}
if((dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type2)) {
if ((transformPrecoder == transformPrecoder_disabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len1)) antenna_ports_bits_ul = 4;
if ((transformPrecoder == transformPrecoder_disabled) && (dmrs_UplinkConfig.pusch_maxLength == pusch_len2)) antenna_ports_bits_ul = 5;
}
// for format 1_1 number of bits as defined by Tables 7.3.1.2.2-1/2/3/4
uint8_t antenna_ports_bits_dl = 0;
if((dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type1) && (dmrs_DownlinkConfig.pdsch_maxLength == pdsch_len1)) antenna_ports_bits_dl = 4; // Table 7.3.1.2.2-1
if((dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type1) && (dmrs_DownlinkConfig.pdsch_maxLength == pdsch_len2)) antenna_ports_bits_dl = 5; // Table 7.3.1.2.2-2
if((dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type2) && (dmrs_DownlinkConfig.pdsch_maxLength == pdsch_len1)) antenna_ports_bits_dl = 5; // Table 7.3.1.2.2-3
if((dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type2) && (dmrs_DownlinkConfig.pdsch_maxLength == pdsch_len2)) antenna_ports_bits_dl = 6; // Table 7.3.1.2.2-4
// 39 TCI
uint8_t tci_bits=0;
if (pdcch_vars2->coreset[p].tciPresentInDCI == tciPresentInDCI_enabled) tci_bits=3;
// 42 CSI_REQUEST
// reportTriggerSize is defined in the CSI-MeasConfig IE (TS 38.331).
// Size of CSI request field in DCI (bits). Corresponds to L1 parameter 'ReportTriggerSize' (see 38.214, section 5.2)
uint8_t reportTriggerSize = csi_MeasConfig.reportTriggerSize; // value from 0..6
// 43 CBGTI
// for format 0_1
uint8_t maxCodeBlockGroupsPerTransportBlock = 0;
if (PUSCH_ServingCellConfig.maxCodeBlockGroupsPerTransportBlock != 0)
maxCodeBlockGroupsPerTransportBlock = (uint8_t)PUSCH_ServingCellConfig.maxCodeBlockGroupsPerTransportBlock;
// for format 1_1, as defined in Subclause 5.1.7 of [6, TS38.214]
uint8_t maxCodeBlockGroupsPerTransportBlock_dl = 0;
if (PDSCH_ServingCellConfig.maxCodeBlockGroupsPerTransportBlock_dl != 0)
maxCodeBlockGroupsPerTransportBlock_dl = pdsch_config.maxNrofCodeWordsScheduledByDCI; // FIXME!!!
// 44 CBGFI
uint8_t cbgfi_bit = PDSCH_ServingCellConfig.codeBlockGroupFlushIndicator;
// 45 PTRS_DMRS
// 0 bit if PTRS-UplinkConfig is not configured and transformPrecoder=disabled, or if transformPrecoder=enabled, or if maxRank=1
// 2 bits otherwise
uint8_t ptrs_dmrs_bits=0; //FIXME!!!
// 46 BETA_OFFSET_IND
// at IE PUSCH-Config, beta_offset indicator  E0 if the higher layer parameter betaOffsets = semiStatic; otherwise 2 bits
// uci-OnPUSCH
// Selection between and configuration of dynamic and semi-static beta-offset. If the field is absent or released, the UE applies the value 'semiStatic' and the BetaOffsets
uint8_t betaOffsets = 0;
if (pusch_config.uci_onPusch.betaOffset_type == betaOffset_semiStatic);
if (pusch_config.uci_onPusch.betaOffset_type == betaOffset_dynamic) betaOffsets = 2;
// 47 DMRS_SEQ_INI
uint8_t dmrs_seq_ini_bits_ul = 0;
uint8_t dmrs_seq_ini_bits_dl = 0;
//1 bit if both scramblingID0 and scramblingID1 are configured in DMRS-UplinkConfig
if ((transformPrecoder == transformPrecoder_disabled) && (dmrs_UplinkConfig.scramblingID0 != 0) && (dmrs_UplinkConfig.scramblingID1 != 0)) dmrs_seq_ini_bits_ul = 1;
//1 bit if both scramblingID0 and scramblingID1 are configured in DMRS-DownlinkConfig
if ((dmrs_DownlinkConfig.scramblingID0 != 0) && (dmrs_DownlinkConfig.scramblingID0 != 0)) dmrs_seq_ini_bits_dl = 1;
/*
* For format 2_2
*
* This format supports power control commands for semi-persistent scheduling.
* As we can already support power control commands dynamically with formats 0_0/0_1 (TPC PUSCH) and 1_0/1_1 (TPC PUCCH)
*
* This format will be implemented in the future FIXME!!!
*
*/
// 5 BLOCK_NUMBER: The parameter tpc-PUSCH or tpc-PUCCH provided by higher layers determines the index to the block number for an UL of a cell
// The following fields are defined for each block: Closed loop indicator and TPC command
// 6 CLOSE_LOOP_IND
// 41 TPC_CMD
uint8_t tpc_cmd_bit_2_2 = 2;
/*
* For format 2_3
*
* This format is used for power control of uplink sounding reference signals for devices which have not coupled SRS power control to the PUSCH power control
* either because independent control is desirable or because the device is configured without PUCCH and PUSCH
*
* This format will be implemented in the future FIXME!!!
*
*/
// 40 SRS_REQUEST
// 41 TPC_CMD
uint8_t tpc_cmd_bit_2_3 = 0;
uint8_t dci_field_size_table [NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = { // This table contains the number of bits for each field (row) contained in each dci format (column).
// The values of the variables indicate field sizes in number of bits
//Format0_0 Format0_1 Format1_0 Format1_1 Formats2_0/1/2/3
{
1, 1, (((crc_scrambled == _p_rnti) || (crc_scrambled == _si_rnti) || (crc_scrambled == _ra_rnti)) ? 0:1),
1, 0,0,0,0
}, // 0 IDENTIFIER_DCI_FORMATS:
{
0, ((crossCarrierSchedulingConfig_ind == 0) ? 0:3),
0, ((crossCarrierSchedulingConfig_ind == 0) ? 0:3),
0,0,0,0
}, // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
{0, (sul_ind == 0)?0:1, 0, 0, 0,0,0,0}, // 2 SUL_IND_0_1:
{0, 0, 0, 0, 1,0,0,0}, // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
{0, 0, 0, 0, 0,1,0,0}, // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
{0, 0, 0, 0, 0,0,0,0}, // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
{0, 0, 0, 0, 0,0,1,0}, // 6 CLOSE_LOOP_IND
{
0, (uint8_t)ceil(log2(n_UL_BWP_RRC)),
0, (uint8_t)ceil(log2(n_DL_BWP_RRC)),
0,0,0,0
}, // 7 BANDWIDTH_PART_IND:
{
0, 0, ((crc_scrambled == _p_rnti) ? 2:0),
0, 0,0,0,0
}, // 8 SHORT_MESSAGE_IND 2 bits if crc scrambled with P-RNTI
{
0, 0, ((crc_scrambled == _p_rnti) ? 8:0),
0, 0,0,0,0
}, // 9 SHORT_MESSAGES 8 bit8 if crc scrambled with P-RNTI
{
(uint8_t)(ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)))-n_UL_hopping,
n_bits_freq_dom_res_assign_ul,
0, 0, 0,0,0,0
}, // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
{
0, 0, (uint8_t)ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)),
n_bits_freq_dom_res_assign_dl,
0,0,0,0
}, // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
{
4, (uint8_t)log2(pusch_alloc_list),
4, (uint8_t)log2(pdsch_alloc_list),
0,0,0,0
}, // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
{
0, 0, 1, (((dl_res_alloc_type_0==1) &&(dl_res_alloc_type_1==0))?0:1),
0,0,0,0
}, // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
{0, 0, 0, prb_BundlingType_size, 0,0,0,0}, // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
{0, 0, 0, rateMatching_bits, 0,0,0,0}, // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
{0, 0, 0, n_zp_bits, 0,0,0,0}, // 16 ZP_CSI_RS_TRIGGER:
{
1, (((ul_res_alloc_type_0==1) &&(ul_res_alloc_type_1==0))||(freqHopping == 0))?0:1,
0, 0, 0,0,0,0
}, // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
{0, 0, 0, 5, 0,0,0,0}, // 18 TB1_MCS:
{0, 0, 0, 1, 0,0,0,0}, // 19 TB1_NDI:
{0, 0, 0, 2, 0,0,0,0}, // 20 TB1_RV:
{0, 0, 0, 5, 0,0,0,0}, // 21 TB2_MCS:
{0, 0, 0, 1, 0,0,0,0}, // 22 TB2_NDI:
{0, 0, 0, 2, 0,0,0,0}, // 23 TB2_RV:
{5, 5, 5, 0, 0,0,0,0}, // 24 MCS:
{1, 1, (crc_scrambled == _c_rnti)?1:0,0, 0,0,0,0}, // 25 NDI:
{
2, 2, (((crc_scrambled == _c_rnti) || (crc_scrambled == _si_rnti)) ? 2:0),
0, 0,0,0,0
}, // 26 RV:
{4, 4, (crc_scrambled == _c_rnti)?4:0,4, 0,0,0,0}, // 27 HARQ_PROCESS_NUMBER:
{0, 0, (crc_scrambled == _c_rnti)?2:0,n_dai, 0,0,0,0}, // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
{0, codebook_HARQ_ACK, 0, 0, 0,0,0,0}, // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK // 2 bits for dynamic HARQ-ACK codebook with single HARQ-ACK codebook
{
0, (((codebook_HARQ_ACK == 2) &&(n_HARQ_ACK_sub_codebooks==2))?2:0),
0, 0, 0,0,0,0
}, // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks // 0 bits otherwise
{
0, 0, (((crc_scrambled == _p_rnti) || (crc_scrambled == _ra_rnti)) ? 2:0),
0, 0,0,0,0
}, // 31 TB_SCALING
{2, 2, 0, 0, 0,0,0,0}, // 32 TPC_PUSCH:
{0, 0, (crc_scrambled == _c_rnti)?2:0,2, 0,0,0,0}, // 33 TPC_PUCCH:
{0, 0, (crc_scrambled == _c_rnti)?3:0,3, 0,0,0,0}, // 34 PUCCH_RESOURCE_IND:
{0, 0, (crc_scrambled == _c_rnti)?3:0,pdsch_harq_t_ind, 0,0,0,0}, // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
{0, (uint8_t)log2(n_SRS), 0, 0, 0,0,0,0}, // 36 SRS_RESOURCE_IND:
{0, precond_nbr_layers_bits, 0, 0, 0,0,0,0}, // 37 PRECOD_NBR_LAYERS:
{0, antenna_ports_bits_ul, 0, antenna_ports_bits_dl, 0,0,0,0}, // 38 ANTENNA_PORTS:
{0, 0, 0, tci_bits, 0,0,0,0}, // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
{0, (sul_ind == 0)?2:3, 0, (sul_ind == 0)?2:3, 0,0,0,2}, // 40 SRS_REQUEST:
{
0, 0, 0, 0, 0,0,tpc_cmd_bit_2_2,
tpc_cmd_bit_2_3
},
// 41 TPC_CMD:
{0, reportTriggerSize, 0, 0, 0,0,0,0}, // 42 CSI_REQUEST:
{
0, maxCodeBlockGroupsPerTransportBlock,
0, maxCodeBlockGroupsPerTransportBlock_dl,
0,0,0,0
}, // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
{0, 0, 0, cbgfi_bit, 0,0,0,0}, // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
{0, ptrs_dmrs_bits, 0, 0, 0,0,0,0}, // 45 PTRS_DMRS:
{0, betaOffsets, 0, 0, 0,0,0,0}, // 46 BETA_OFFSET_IND:
{0, dmrs_seq_ini_bits_ul, 0, dmrs_seq_ini_bits_dl, 0,0,0,0}, // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
{0, 1, 0, 0, 0,0,0,0}, // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
{0, 0, 0, 0, 0,0,0,0}, // 49 PADDING_NR_DCI:
// (NOTE 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
{(sul_ind == 0)?0:1, 0, 0, 0, 0,0,0,0}, // 50 SUL_IND_0_0:
{0, 0, 0, 0, 0,0,0,0}, // 51 RA_PREAMBLE_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
{0, 0, 0, 0, 0,0,0,0}, // 52 SUL_IND_1_0 (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
{0, 0, 0, 0, 0,0,0,0}, // 53 SS_PBCH_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
{0, 0, 0, 0, 0,0,0,0}, // 54 PRACH_MASK_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
{
0, 0, ((crc_scrambled == _p_rnti)?6:(((crc_scrambled == _si_rnti) || (crc_scrambled == _ra_rnti))?16:0)),
0, 0,0,0,0
} // 55 RESERVED_NR_DCI
};
// NOTE 1: adjustments in freq_dom_resource_assignment_UL to be done if necessary
// NOTE 2: adjustments in padding to be done if necessary
uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
for (int i=0 ; i<NBR_NR_FORMATS ; i++) {
//#ifdef NR_PDCCH_DCI_DEBUG
// LOG_DDD("i=%d, j=%d\n", i, j);
//#endif
for (int j=0; j<NBR_NR_DCI_FIELDS; j++) {
dci_size [i] = dci_size [i] + dci_field_size_table[j][i]; // dci_size[i] contains the size in bits of the dci pdu format i
//if (i==(int)format-15) { // (int)format-15 indicates the position of each format in the table (e.g. format1_0=17 -> position in table is 2)
dci_fields_sizes[j][i] = dci_field_size_table[j][i]; // dci_fields_sizes[j] contains the sizes of each field (j) for a determined format i
//}
}
LOG_DDD("(nr_dci_format_size) dci_size[%d]=%d for n_RB_ULBWP=%d\n",
i,dci_size[i],n_RB_ULBWP);
}
LOG_DDD("(nr_dci_format_size) dci_fields_sizes[][] = { \n");
#ifdef NR_PDCCH_DCI_DEBUG
for (int j=0; j<NBR_NR_DCI_FIELDS; j++) {
printf("\t\t");
for (int i=0; i<NBR_NR_FORMATS ; i++) printf("%d\t",dci_fields_sizes[j][i]);
printf("\n");
}
printf(" }\n");
#endif
LOG_DNL("(nr_dci_format_size) dci_size[0_0]=%d, dci_size[0_1]=%d, dci_size[1_0]=%d, dci_size[1_1]=%d,\n",dci_size[0],dci_size[1],dci_size[2],dci_size[3]);
//UL/SUL indicator format0_0 (TS 38.212 subclause 7.3.1.1.1)
// - 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding is larger than the number of bits for DCI format 0_0 before padding;
// - 0 bit otherwise.
// The UL/SUL indicator, if present, locates in the last bit position of DCI format 0_0, after the padding bit(s)
if ((dci_field_size_table[SUL_IND_0_0][0] == 1) && (dci_size[0] > dci_size[2])) {
dci_field_size_table[SUL_IND_0_0][0] = 0;
dci_size[0]=dci_size[0]-1;
}
// if ((format == format0_0) || (format == format1_0)) {
// According to Section 7.3.1.1.1 in TS 38.212
// If DCI format 0_0 is monitored in common search space and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space for scheduling the same serving cell,
// zeros shall be appended to the DCI format 0_0 until the payload size equals that of the DCI format 1_0.
if (dci_size[0] < dci_size[2]) { // '0' corresponding to index for format0_0 and '2' corresponding to index of format1_0
//if (format == format0_0) {
dci_fields_sizes[PADDING_NR_DCI][0] = dci_size[2] - dci_size[0];
dci_size[0] = dci_size[2];
LOG_DDD("(nr_dci_format_size) new dci_size[format0_0]=%d\n",dci_size[0]);
//}
}
// If DCI format 0_0 is monitored in common search space and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space for scheduling the same serving cell,
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0 is reduced
// such that the size of DCI format 0_0 equals to the size of the DCI format 1_0..
if (dci_size[0] > dci_size[2]) {
//if (format == format0_0) {
dci_fields_sizes[FREQ_DOM_RESOURCE_ASSIGNMENT_UL][0] -= (dci_size[0] - dci_size[2]);
dci_size[0] = dci_size[2];
LOG_DDD("(nr_dci_format_size) new dci_size[format0_0]=%d\n",dci_size[0]);
//}
}
/*
* TS 38.212 subclause 7.3.1.1.2
* For a UE configured with SUL in a cell:
* if PUSCH is configured to be transmitted on both the SUL and the non-SUL of the cell and
* if the number of information bits in format 0_1 for the SUL
* is not equal to the number of information bits in format 0_1 for the non-SUL,
* zeros shall be appended to smaller format 0_1 until the payload size equals that of the larger format 0_1
*
* Not implemented. FIXME!!!
*
*/
// }
LOG_DDD("(nr_dci_format_size) dci_fields_sizes[][] = { \n");
#ifdef NR_PDCCH_DCI_DEBUG
for (int j=0; j<NBR_NR_DCI_FIELDS; j++) {
printf("\t\t");
for (int i=0; i<NBR_NR_FORMATS ; i++) printf("%d\t",dci_fields_sizes[j][i]);
printf("\n");
}
printf(" }\n");
#endif
return dci_size[format];
}
#endif
//////////////
/*
* This code contains all the functions needed to process all dci fields.
* These tables and functions are going to be called by function nr_ue_process_dci
......@@ -3126,7 +2557,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
}
return 0;
}
//////////////
int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci) {
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
......
......@@ -66,7 +66,6 @@ int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index,
// L2 Abstraction Layer
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci){
//printf("handle_dci: rnti %x,dci_type %d\n",rnti,dci_type);
return nr_ue_process_dci_indication_pdu(module_id, cc_id, gNB_index, frame, slot, dci);
}
......
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