Commit 287f47bf authored by Fang-WANG's avatar Fang-WANG

msg4

parent 52c556fd
...@@ -419,7 +419,7 @@ int create_gNB_tasks(uint32_t gnb_nb) { ...@@ -419,7 +419,7 @@ int create_gNB_tasks(uint32_t gnb_nb) {
} }
if (AMF_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0)) { if (AMF_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0 && get_softmodem_params()->sa_ra==0)) {
if (gnb_nb > 0) { if (gnb_nb > 0) {
/* /*
if (itti_create_task (TASK_SCTP, sctp_eNB_task, NULL) < 0) { if (itti_create_task (TASK_SCTP, sctp_eNB_task, NULL) < 0) {
......
...@@ -99,6 +99,7 @@ extern "C" ...@@ -99,6 +99,7 @@ extern "C"
#define SPLIT73 softmodem_params.split73 #define SPLIT73 softmodem_params.split73
#define TP_CONFIG softmodem_params.threadPoolConfig #define TP_CONFIG softmodem_params.threadPoolConfig
#define PHY_TEST softmodem_params.phy_test #define PHY_TEST softmodem_params.phy_test
#define SA_RA softmodem_params.sa_ra
#define DO_RA softmodem_params.do_ra #define DO_RA softmodem_params.do_ra
#define WAIT_FOR_SYNC softmodem_params.wait_for_sync #define WAIT_FOR_SYNC softmodem_params.wait_for_sync
#define SINGLE_THREAD_FLAG softmodem_params.single_thread_flag #define SINGLE_THREAD_FLAG softmodem_params.single_thread_flag
...@@ -118,6 +119,7 @@ extern "C" ...@@ -118,6 +119,7 @@ extern "C"
{"split73", CONFIG_HLP_SPLIT73, 0, strptr:(char **)&SPLIT73, defstrval:NULL, TYPE_STRING, sizeof(SPLIT73)},\ {"split73", CONFIG_HLP_SPLIT73, 0, strptr:(char **)&SPLIT73, defstrval:NULL, TYPE_STRING, sizeof(SPLIT73)},\
{"thread-pool", CONFIG_HLP_TPOOL, 0, strptr:(char **)&TP_CONFIG, defstrval:"n", TYPE_STRING, sizeof(TP_CONFIG)}, \ {"thread-pool", CONFIG_HLP_TPOOL, 0, strptr:(char **)&TP_CONFIG, defstrval:"n", TYPE_STRING, sizeof(TP_CONFIG)}, \
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&PHY_TEST, defintval:0, TYPE_INT, 0}, \ {"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&PHY_TEST, defintval:0, TYPE_INT, 0}, \
{"sa-ra", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&SA_RA, defintval:0, TYPE_INT, 0}, \
{"do-ra", CONFIG_HLP_DORA, PARAMFLAG_BOOL, iptr:&DO_RA, defintval:0, TYPE_INT, 0}, \ {"do-ra", CONFIG_HLP_DORA, PARAMFLAG_BOOL, iptr:&DO_RA, defintval:0, TYPE_INT, 0}, \
{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&USIM_TEST, defintval:0, TYPE_UINT8, 0}, \ {"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&USIM_TEST, defintval:0, TYPE_UINT8, 0}, \
{"clock-source", CONFIG_HLP_CLK, 0, uptr:&CLOCK_SOURCE, defintval:0, TYPE_UINT, 0}, \ {"clock-source", CONFIG_HLP_CLK, 0, uptr:&CLOCK_SOURCE, defintval:0, TYPE_UINT, 0}, \
...@@ -212,6 +214,7 @@ typedef struct { ...@@ -212,6 +214,7 @@ typedef struct {
char split73[1024]; char split73[1024];
char threadPoolConfig[1024]; char threadPoolConfig[1024];
int phy_test; int phy_test;
int sa_ra;
int do_ra; int do_ra;
uint8_t usim_test; uint8_t usim_test;
int emulate_rf; int emulate_rf;
......
...@@ -665,8 +665,8 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -665,8 +665,8 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
return((1 + dlsch->max_ldpc_iterations)); return((1 + dlsch->max_ldpc_iterations));
} else { } else {
//#if UE_DEBUG_TRACE //#if UE_DEBUG_TRACE
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_slot_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n", LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for SFN %d nr_slot_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round); phy_vars_ue->Mod_id,frame,nr_slot_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
//#endif //#endif
harq_process->status = SCH_IDLE; harq_process->status = SCH_IDLE;
......
...@@ -569,7 +569,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) ...@@ -569,7 +569,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
gNB->uci_pdu_list[num_ucis].pdu_type = NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE; gNB->uci_pdu_list[num_ucis].pdu_type = NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE;
gNB->uci_pdu_list[num_ucis].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t); gNB->uci_pdu_list[num_ucis].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t);
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu_format0 = &gNB->uci_pdu_list[num_ucis].pucch_pdu_format_0_1; nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu_format0 = &gNB->uci_pdu_list[num_ucis].pucch_pdu_format_0_1;
uci_pdu_format0->rnti = pucch_pdu->rnti;
nr_decode_pucch0(gNB, nr_decode_pucch0(gNB,
slot_rx, slot_rx,
uci_pdu_format0, uci_pdu_format0,
......
...@@ -94,8 +94,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -94,8 +94,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti; dlsch0->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti;
dlsch0_harq = dlsch0->harq_processes[current_harq_pid]; dlsch0_harq = dlsch0->harq_processes[current_harq_pid];
LOG_D(PHY,"current_harq_pid = %d\n", current_harq_pid);
if (dlsch0_harq){ if (dlsch0_harq){
dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart; dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart;
......
...@@ -242,7 +242,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, ...@@ -242,7 +242,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
//LOG_M("txdata.m","txs",ue->common_vars.txdata[0],1228800,1,1); //LOG_M("txdata.m","txs",ue->common_vars.txdata[0],1228800,1,1);
/* RACH */ /* RACH */
if (get_softmodem_params()->do_ra==1) { if ((get_softmodem_params()->do_ra==1) || (get_softmodem_params()->sa_ra==1)) {
if ((ue->UE_mode[gNB_id] > NOT_SYNCHED && ue->UE_mode[gNB_id] < PUSCH) && (ue->prach_vars[gNB_id]->prach_Config_enabled == 1)) { if ((ue->UE_mode[gNB_id] > NOT_SYNCHED && ue->UE_mode[gNB_id] < PUSCH) && (ue->prach_vars[gNB_id]->prach_Config_enabled == 1)) {
nr_ue_prach_procedures(ue, proc, gNB_id, mode); nr_ue_prach_procedures(ue, proc, gNB_id, mode);
} }
...@@ -800,6 +800,11 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_ ...@@ -800,6 +800,11 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
else { // This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS) else { // This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS)
if (pdsch == RA_PDSCH) ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m]=ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m-1]; if (pdsch == RA_PDSCH) ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m]=ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m-1];
else if (pdsch == PDSCH) { else if (pdsch == PDSCH) {
if (dlsch0->harq_processes[harq_pid]->n_dmrs_cdm_groups == 2)
{
ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m]=ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m-1];
}
else {
if (nr_rx_pdsch(ue, if (nr_rx_pdsch(ue,
proc, proc,
pdsch, pdsch,
...@@ -814,6 +819,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_ ...@@ -814,6 +819,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
dlsch0->current_harq_pid) < 0) dlsch0->current_harq_pid) < 0)
return -1; return -1;
} }
}
else AssertFatal(1==0,"not RA_PDSCH or PDSCH\n"); else AssertFatal(1==0,"not RA_PDSCH or PDSCH\n");
} }
if (pdsch == PDSCH) LOG_D(PHY,"Done processing symbol %d : llr_offset %d\n",m,ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m]); if (pdsch == PDSCH) LOG_D(PHY,"Done processing symbol %d : llr_offset %d\n",m,ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m]);
......
...@@ -553,12 +553,19 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -553,12 +553,19 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
if (mac->RA_window_cnt >= 0 && mac->RA_RAPID_found == 1) { if (mac->RA_window_cnt >= 0 && mac->RA_RAPID_found == 1) {
if (get_softmodem_params()->sa_ra)
{
mac->ra_state = WAIT_CONTENTION_RESOLUTION;
}
else
{
// Reset RA_active flag: it disables Msg3 retransmission (8.3 of TS 38.213) // Reset RA_active flag: it disables Msg3 retransmission (8.3 of TS 38.213)
// TbD Msg3 Retransmissions to be scheduled by DCI 0_0 // TbD Msg3 Retransmissions to be scheduled by DCI 0_0
mac->RA_active = 0; mac->RA_active = 0;
mac->RA_window_cnt = -1;
mac->ra_state = RA_SUCCEEDED; mac->ra_state = RA_SUCCEEDED;
mac->generate_nr_prach = 2; mac->generate_nr_prach = 2;
}
mac->RA_window_cnt = -1;
LOG_I(MAC, "[MAC][UE %d][RAPROC]: RAR successfully received \n", mod_id); LOG_I(MAC, "[MAC][UE %d][RAPROC]: RAR successfully received \n", mod_id);
} else if (mac->RA_window_cnt == 0 && !mac->RA_RAPID_found) { } else if (mac->RA_window_cnt == 0 && !mac->RA_RAPID_found) {
......
...@@ -135,12 +135,22 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -135,12 +135,22 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275); //NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275); //NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing; rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
rel15->dci_length_options[0] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, bwp_id); rel15->dci_length_options[0] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, bwp_id);
LOG_D(PHY, "pdcch params: rnti %d, bwp %d %d, len %d\n",rel15->rnti, rel15->BWPSize, rel15->BWPStart, rel15->dci_length_options[0]);
break; break;
case NR_RNTI_P: case NR_RNTI_P:
break; break;
case NR_RNTI_CS: case NR_RNTI_CS:
break; break;
case NR_RNTI_TC: case NR_RNTI_TC:
// we use the initial DL BWP
sps = initialDownlinkBWP->genericParameters.cyclicPrefix == NULL ? 14 : 12;
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->t_crnti;
rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275); //NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
rel15->dci_length_options[0] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[0], NR_RNTI_TC, rel15->BWPSize, bwp_id);
LOG_D(PHY, "pdcch params: rnti %d, bwp %d %d (%d), len %d\n",rel15->rnti, rel15->BWPSize, rel15->BWPStart,initialDownlinkBWP->genericParameters.locationAndBandwidth, rel15->dci_length_options[0]);
break; break;
case NR_RNTI_SP_CSI: case NR_RNTI_SP_CSI:
break; break;
...@@ -222,7 +232,12 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl ...@@ -222,7 +232,12 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
fill_dci_search_candidates(ss, rel15); fill_dci_search_candidates(ss, rel15);
break; break;
case WAIT_CONTENTION_RESOLUTION: case WAIT_CONTENTION_RESOLUTION:
LOG_D(MAC, "[DCI_CONFIG] frame %d %d Configure monitoring of PDCCH candidates in Type1-PDCCH common random access search space\n",frame,slot);
rel15->rnti = mac->t_crnti; rel15->rnti = mac->t_crnti;
rel15->num_dci_options = 1; // just search the dci for msg4, should add the ul dci for retx for msg3 later.
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_TC, ss_id);
fill_dci_search_candidates(ss, rel15);
break; break;
default: default:
break; break;
......
...@@ -1657,7 +1657,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -1657,7 +1657,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
} }
} else if (get_softmodem_params()->do_ra){ } else if ((get_softmodem_params()->do_ra) || (get_softmodem_params()->sa_ra)){
NR_UE_MAC_INST_t *mac = get_mac_inst(ul_info->module_id); NR_UE_MAC_INST_t *mac = get_mac_inst(ul_info->module_id);
...@@ -3154,7 +3154,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3154,7 +3154,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
AssertFatal(mac->DLbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n"); AssertFatal(mac->DLbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n");
AssertFatal(mac->ULbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n"); AssertFatal(mac->ULbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n");
const uint16_t n_RB_DLBWP = (mac->ra_state == WAIT_RAR) ? NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275) : NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); const uint16_t n_RB_DLBWP = ((mac->ra_state == WAIT_RAR)||(mac->ra_state == WAIT_CONTENTION_RESOLUTION) ) ? NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275) : NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
const uint16_t n_RB_ULBWP = NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); const uint16_t n_RB_ULBWP = NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
LOG_D(MAC,"nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)\n",dci_format,n_RB_DLBWP,n_RB_ULBWP); LOG_D(MAC,"nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)\n",dci_format,n_RB_DLBWP,n_RB_ULBWP);
...@@ -3756,7 +3756,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3756,7 +3756,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
} }
/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/ /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/
dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind = dci->pdsch_to_harq_feedback_timing_indicator.val; dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind = dci->pdsch_to_harq_feedback_timing_indicator.val + 1;
LOG_D(MAC,"(nr_ue_procedures.c) rnti = %x dl_config->number_pdus = %d\n", LOG_D(MAC,"(nr_ue_procedures.c) rnti = %x dl_config->number_pdus = %d\n",
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti, dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti,
...@@ -4136,11 +4136,12 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -4136,11 +4136,12 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int rnti_type=-1; int rnti_type=-1;
if (rnti == mac->ra_rnti) rnti_type = NR_RNTI_RA; if (rnti == mac->ra_rnti) rnti_type = NR_RNTI_RA;
else if (rnti == mac->crnti) rnti_type = NR_RNTI_C;
else if (rnti == mac->t_crnti) rnti_type = NR_RNTI_TC; else if (rnti == mac->t_crnti) rnti_type = NR_RNTI_TC;
else if (rnti == mac->crnti) rnti_type = NR_RNTI_C;
else if (rnti == 0xFFFE) rnti_type = NR_RNTI_P; else if (rnti == 0xFFFE) rnti_type = NR_RNTI_P;
else if (rnti == 0xFFFF) rnti_type = NR_RNTI_SI; else if (rnti == 0xFFFF) rnti_type = NR_RNTI_SI;
AssertFatal(rnti_type!=-1,"no identified/handled rnti\n"); AssertFatal(rnti_type!=-1,"no identified/handled rnti\n");
AssertFatal(mac->DLbwp[0] != NULL, "DLbwp[0] shouldn't be null here!\n"); AssertFatal(mac->DLbwp[0] != NULL, "DLbwp[0] shouldn't be null here!\n");
AssertFatal(mac->ULbwp[0] != NULL, "ULbwp[0] shouldn't be null here!\n"); AssertFatal(mac->ULbwp[0] != NULL, "ULbwp[0] shouldn't be null here!\n");
...@@ -4152,7 +4153,7 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -4152,7 +4153,7 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int pos=0; int pos=0;
int fsize=0; int fsize=0;
if (rnti_type == NR_RNTI_C) { if ((rnti_type == NR_RNTI_C) || (rnti_type == NR_RNTI_TC)){
// First find out the DCI format from the first bit (UE performed blind decoding) // First find out the DCI format from the first bit (UE performed blind decoding)
pos++; pos++;
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1; dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
...@@ -4175,7 +4176,7 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -4175,7 +4176,7 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
} }
} }
#ifdef DEBUG_EXTRACT_DCI #ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC, "DCI format is %d\n", dci_format); LOG_D(MAC, "DCI format is %d, type %d, rnti %d, rnti_c %d, rnti_tc %d\n", dci_format, rnti_type, rnti, mac->crnti, mac->t_crnti);
#endif #endif
switch(dci_format) { switch(dci_format) {
...@@ -4378,38 +4379,82 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -4378,38 +4379,82 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
break; break;
case NR_RNTI_TC: case NR_RNTI_TC:
// indicating a DL DCI format 1bit
pos++;
dci_pdu_rel15->format_indicator = (*dci_pdu>>(dci_size-pos))&1;
// Freq domain assignment 0-16 bit // Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
pos+=fsize; pos+=fsize;
dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1); dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu);
#endif
// Time domain assignment 4 bit // Time domain assignment 4 bit
pos+=4; pos+=4;
dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf; dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&0xf;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,4,dci_size-pos,*dci_pdu);
#endif
pos+=1;
// VRB to PRB mapping 1 bit // VRB to PRB mapping 1 bit
dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1; dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&1;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,1,dci_size-pos,*dci_pdu);
#endif
// MCS 5bit //bit over 32, so dci_pdu ++ // MCS 5bit //bit over 32, so dci_pdu ++
pos+=5; pos+=5;
dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu);
#endif
// New data indicator 1bit // New data indicator 1bit
pos+=1;
dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1; dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&1;
// Redundancy version 2bit // Redundancy version 2bit
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu);
#endif
pos+=2; pos+=2;
dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3; dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&3;
// HARQ process number 4bit // HARQ process number 4bit
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu);
#endif
pos+=4; pos+=4;
dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu);
#endif
// Downlink assignment index  E2 bits // Downlink assignment index  E2 bits
pos+=2; pos+=2;
dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3; dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&3;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai[0].val,2,dci_size-pos,*dci_pdu);
#endif
// TPC command for scheduled PUCCH  E2 bits // TPC command for scheduled PUCCH  E2 bits
pos+=2; pos+=2;
dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3; dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&3;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu);
#endif
// PDSCH-to-HARQ_feedback timing indicator  E3 bits
pos+=3;
dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&7;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"PUCCH RESOURCE INDICATOR %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu);
#endif
// PDSCH-to-HARQ_feedback timing indicator  E3 bits // PDSCH-to-HARQ_feedback timing indicator  E3 bits
pos+=3; pos+=3;
dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&7; dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&7;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val,3,dci_size-pos,*dci_pdu);
#endif
break; break;
} }
...@@ -4497,80 +4542,159 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -4497,80 +4542,159 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
// Carrier indicator // Carrier indicator
pos+=dci_pdu_rel15->carrier_indicator.nbits; pos+=dci_pdu_rel15->carrier_indicator.nbits;
dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->carrier_indicator.nbits)-1); dci_pdu_rel15->carrier_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->carrier_indicator.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"Carrier indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->carrier_indicator.val,dci_pdu_rel15->carrier_indicator.nbits,dci_size-pos,*dci_pdu);
#endif
// BWP Indicator // BWP Indicator
pos+=dci_pdu_rel15->bwp_indicator.nbits; pos+=dci_pdu_rel15->bwp_indicator.nbits;
dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->bwp_indicator.nbits)-1); dci_pdu_rel15->bwp_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->bwp_indicator.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"bwp indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->bwp_indicator.val,dci_pdu_rel15->bwp_indicator.nbits,dci_size-pos,*dci_pdu);
#endif
// Frequency domain resource assignment // Frequency domain resource assignment
pos+=dci_pdu_rel15->frequency_domain_assignment.nbits; pos+=dci_pdu_rel15->frequency_domain_assignment.nbits;
dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->frequency_domain_assignment.nbits)-1); dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->frequency_domain_assignment.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"frequency_domain_assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,dci_pdu_rel15->frequency_domain_assignment.nbits,dci_size-pos,*dci_pdu);
#endif
// Time domain resource assignment // Time domain resource assignment
pos+=dci_pdu_rel15->time_domain_assignment.nbits; pos+=dci_pdu_rel15->time_domain_assignment.nbits;
dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->time_domain_assignment.nbits)-1); dci_pdu_rel15->time_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->time_domain_assignment.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"time_domain_assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,dci_pdu_rel15->time_domain_assignment.nbits,dci_size-pos,*dci_pdu);
#endif
// VRB-to-PRB mapping // VRB-to-PRB mapping
pos+=dci_pdu_rel15->vrb_to_prb_mapping.nbits; pos+=dci_pdu_rel15->vrb_to_prb_mapping.nbits;
dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->vrb_to_prb_mapping.nbits)-1); dci_pdu_rel15->vrb_to_prb_mapping.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->vrb_to_prb_mapping.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"vrb_to_prb_mapping %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,dci_pdu_rel15->vrb_to_prb_mapping.nbits,dci_size-pos,*dci_pdu);
#endif
// PRB bundling size indicator // PRB bundling size indicator
pos+=dci_pdu_rel15->prb_bundling_size_indicator.nbits; pos+=dci_pdu_rel15->prb_bundling_size_indicator.nbits;
dci_pdu_rel15->prb_bundling_size_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->prb_bundling_size_indicator.nbits)-1); dci_pdu_rel15->prb_bundling_size_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->prb_bundling_size_indicator.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"prb_bundling_size_indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->prb_bundling_size_indicator.val,dci_pdu_rel15->prb_bundling_size_indicator.nbits,dci_size-pos,*dci_pdu);
#endif
// Rate matching indicator // Rate matching indicator
pos+=dci_pdu_rel15->rate_matching_indicator.nbits; pos+=dci_pdu_rel15->rate_matching_indicator.nbits;
dci_pdu_rel15->rate_matching_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->rate_matching_indicator.nbits)-1); dci_pdu_rel15->rate_matching_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->rate_matching_indicator.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"rate_matching_indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rate_matching_indicator.val,dci_pdu_rel15->rate_matching_indicator.nbits,dci_size-pos,*dci_pdu);
#endif
// ZP CSI-RS trigger // ZP CSI-RS trigger
pos+=dci_pdu_rel15->zp_csi_rs_trigger.nbits; pos+=dci_pdu_rel15->zp_csi_rs_trigger.nbits;
dci_pdu_rel15->zp_csi_rs_trigger.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->zp_csi_rs_trigger.nbits)-1); dci_pdu_rel15->zp_csi_rs_trigger.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->zp_csi_rs_trigger.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"zp_csi_rs_trigger %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->zp_csi_rs_trigger.val,dci_pdu_rel15->zp_csi_rs_trigger.nbits,dci_size-pos,*dci_pdu);
#endif
//TB1 //TB1
// MCS 5bit // MCS 5bit
pos+=5; pos+=5;
dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f; dci_pdu_rel15->mcs = (*dci_pdu>>(dci_size-pos))&0x1f;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"mcs %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu);
#endif
// New data indicator 1bit // New data indicator 1bit
pos+=1; pos+=1;
dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&0x1; dci_pdu_rel15->ndi = (*dci_pdu>>(dci_size-pos))&0x1;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"ndi %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu);
#endif
// Redundancy version 2bit // Redundancy version 2bit
pos+=2; pos+=2;
dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3; dci_pdu_rel15->rv = (*dci_pdu>>(dci_size-pos))&0x3;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"rv %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu);
#endif
//TB2 //TB2
// MCS 5bit // MCS 5bit
pos+=dci_pdu_rel15->mcs2.nbits; pos+=dci_pdu_rel15->mcs2.nbits;
dci_pdu_rel15->mcs2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->mcs2.nbits)-1); dci_pdu_rel15->mcs2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->mcs2.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"mcs2 %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs2.val,dci_pdu_rel15->mcs2.nbits,dci_size-pos,*dci_pdu);
#endif
// New data indicator 1bit // New data indicator 1bit
pos+=dci_pdu_rel15->ndi2.nbits; pos+=dci_pdu_rel15->ndi2.nbits;
dci_pdu_rel15->ndi2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->ndi2.nbits)-1); dci_pdu_rel15->ndi2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->ndi2.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"ndi2 %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi2.val,dci_pdu_rel15->ndi2.nbits,dci_size-pos,*dci_pdu);
#endif
// Redundancy version 2bit // Redundancy version 2bit
pos+=dci_pdu_rel15->rv2.nbits; pos+=dci_pdu_rel15->rv2.nbits;
dci_pdu_rel15->rv2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->rv2.nbits)-1); dci_pdu_rel15->rv2.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->rv2.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"rv2 %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv2.val,dci_pdu_rel15->rv2.nbits,dci_size-pos,*dci_pdu);
#endif
// HARQ process number 4bit // HARQ process number 4bit
pos+=4; pos+=4;
dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf; dci_pdu_rel15->harq_pid = (*dci_pdu>>(dci_size-pos))&0xf;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"harq_pid %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu);
#endif
// Downlink assignment index // Downlink assignment index
pos+=dci_pdu_rel15->dai[0].nbits; pos+=dci_pdu_rel15->dai[0].nbits;
dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->dai[0].nbits)-1); dci_pdu_rel15->dai[0].val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->dai[0].nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"dai[0] %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai[0].val,dci_pdu_rel15->dai[0].nbits,dci_size-pos,*dci_pdu);
#endif
// TPC command for scheduled PUCCH 2bit // TPC command for scheduled PUCCH 2bit
pos+=2; pos+=2;
dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&0x3; dci_pdu_rel15->tpc = (*dci_pdu>>(dci_size-pos))&0x3;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"tpc %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu);
#endif
// PUCCH resource indicator 3bit // PUCCH resource indicator 3bit
pos+=3; pos+=3;
dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x3; dci_pdu_rel15->pucch_resource_indicator = (*dci_pdu>>(dci_size-pos))&0x3;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"pucch_resource_indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu);
#endif
// PDSCH-to-HARQ_feedback timing indicator // PDSCH-to-HARQ_feedback timing indicator
pos+=dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits; pos+=dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits;
dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits)-1); dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"pdsch_to_harq_feedback_timing_indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val,dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.nbits,dci_size-pos,*dci_pdu);
#endif
// Antenna ports // Antenna ports
pos+=dci_pdu_rel15->antenna_ports.nbits; pos+=dci_pdu_rel15->antenna_ports.nbits;
dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->antenna_ports.nbits)-1); dci_pdu_rel15->antenna_ports.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->antenna_ports.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"antenna_ports %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->antenna_ports.val,dci_pdu_rel15->antenna_ports.nbits,dci_size-pos,*dci_pdu);
#endif
// TCI // TCI
pos+=dci_pdu_rel15->transmission_configuration_indication.nbits; pos+=dci_pdu_rel15->transmission_configuration_indication.nbits;
dci_pdu_rel15->transmission_configuration_indication.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->transmission_configuration_indication.nbits)-1); dci_pdu_rel15->transmission_configuration_indication.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->transmission_configuration_indication.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"transmission_configuration_indication %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->transmission_configuration_indication.val,dci_pdu_rel15->transmission_configuration_indication.nbits,dci_size-pos,*dci_pdu);
#endif
// SRS request // SRS request
pos+=dci_pdu_rel15->srs_request.nbits; pos+=dci_pdu_rel15->srs_request.nbits;
dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->srs_request.nbits)-1); dci_pdu_rel15->srs_request.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->srs_request.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"srs_request %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->srs_request.val,dci_pdu_rel15->srs_request.nbits,dci_size-pos,*dci_pdu);
#endif
// CBG transmission information // CBG transmission information
pos+=dci_pdu_rel15->cbgti.nbits; pos+=dci_pdu_rel15->cbgti.nbits;
dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->cbgti.nbits)-1); dci_pdu_rel15->cbgti.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->cbgti.nbits)-1);
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"cbgti %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->cbgti.val,dci_pdu_rel15->cbgti.nbits,dci_size-pos,*dci_pdu);
#endif
// CBG flushing out information // CBG flushing out information
pos+=dci_pdu_rel15->cbgfi.nbits; pos+=dci_pdu_rel15->cbgfi.nbits;
dci_pdu_rel15->cbgfi.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->cbgfi.nbits)-1); dci_pdu_rel15->cbgfi.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->cbgfi.nbits)-1);
// DMRS sequence init
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"cbgfi %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->cbgfi.val,dci_pdu_rel15->cbgfi.nbits,dci_size-pos,*dci_pdu);
#endif // DMRS sequence init
pos+=1; pos+=1;
dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&0x1; dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&0x1;
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"dmrs_sequence_initialization %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dmrs_sequence_initialization,3,dci_size-pos,*dci_pdu);
#endif
break; break;
} }
break; break;
...@@ -4740,23 +4864,25 @@ void nr_ue_process_mac_pdu(module_id_t module_idP, ...@@ -4740,23 +4864,25 @@ void nr_ue_process_mac_pdu(module_id_t module_idP,
mac_subheader_len = 0x0001; // default to fixed-length subheader = 1-oct mac_subheader_len = 0x0001; // default to fixed-length subheader = 1-oct
mac_sdu_len = 0x0000; mac_sdu_len = 0x0000;
rx_lcid = ((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID; rx_lcid = ((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID;
//#ifdef DEBUG_HEADER_PARSING #ifdef DEBUG_HEADER_PARSING
LOG_D(MAC, "[UE] LCID %d, PDU length %d\n", ((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID, pdu_len); LOG_I(MAC, "[UE] LCID %d, PDU length %d\n", ((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID, pdu_len);
//#endif #endif
LOG_D(MAC, "[UE] LCID %d, PDU length %d\n", rx_lcid, pdu_len);
switch(rx_lcid){ switch(rx_lcid){
// MAC CE // MAC CE
case DL_SCH_LCID_CCCH: case DL_SCH_LCID_CCCH:
// MSG4 RRC Connection Setup 38.331 // MSG4 RRC Connection Setup 38.331
// varialbe length // varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){ if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8; mac_sdu_len = ((uint16_t)(((NR_MAC_SUBHEADER_LONG *) pdu_ptr)->L1 & 0x7f) << 8)
| ((uint16_t)((NR_MAC_SUBHEADER_LONG *) pdu_ptr)->L2 & 0xff);
mac_subheader_len = 3; mac_subheader_len = 3;
} }
else{
mac_sdu_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
}
break; break;
......
...@@ -387,7 +387,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, ...@@ -387,7 +387,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
if (add_ue == 1 && get_softmodem_params()->phy_test) { if (add_ue == 1 && get_softmodem_params()->phy_test) {
const int UE_id = add_new_nr_ue(Mod_idP,rnti); const int UE_id = add_new_nr_ue(Mod_idP,rnti,true);
UE_info->secondaryCellGroup[UE_id] = secondaryCellGroup; UE_info->secondaryCellGroup[UE_id] = secondaryCellGroup;
compute_csi_bitlen (secondaryCellGroup, UE_info, UE_id); compute_csi_bitlen (secondaryCellGroup, UE_info, UE_id);
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList =
......
...@@ -412,7 +412,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -412,7 +412,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// This schedule RA procedure if not in phy_test mode // This schedule RA procedure if not in phy_test mode
// Otherwise already consider 5G already connected // Otherwise already consider 5G already connected
if (get_softmodem_params()->phy_test == 0) { if (get_softmodem_params()->phy_test == 0) {
nr_schedule_RA(module_idP, frame, slot); nr_schedule_RA(module_idP, frame, slot, num_slots_per_tdd);
} }
// This schedules the DCI for Uplink and subsequently PUSCH // This schedules the DCI for Uplink and subsequently PUSCH
...@@ -427,7 +427,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -427,7 +427,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} }
if (UE_info->active[UE_id]) //if (UE_info->active[UE_id])
if (UE_info->rnti[UE_id] > 0)
nr_schedule_pucch(module_idP, UE_id, nr_ulmix_slots, frame, slot); nr_schedule_pucch(module_idP, UE_id, nr_ulmix_slots, frame, slot);
stop_meas(&RC.nrmac[module_idP]->eNB_scheduler); stop_meas(&RC.nrmac[module_idP]->eNB_scheduler);
......
...@@ -541,7 +541,7 @@ void nr_initiate_ra_proc(module_id_t module_idP, ...@@ -541,7 +541,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0);
} }
void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, int num_slots_per_tdd){
//uint8_t i = 0; //uint8_t i = 0;
int CC_id = 0; int CC_id = 0;
...@@ -556,16 +556,19 @@ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){ ...@@ -556,16 +556,19 @@ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
// NR_RA_t *ra = &cc->ra[i]; // NR_RA_t *ra = &cc->ra[i];
NR_RA_t *ra = &cc->ra[0]; NR_RA_t *ra = &cc->ra[0];
LOG_D(MAC,"RA[state:%d]\n",ra->state); LOG_D(MAC,"RA[state:%d], frame %d %d\n",ra->state, frameP, slotP);
switch (ra->state){ switch (ra->state){
case Msg2: case Msg2:
nr_generate_Msg2(module_idP, CC_id, frameP, slotP); nr_generate_Msg2(module_idP, CC_id, frameP, slotP);
break; break;
case Msg4: case Msg4:
//generate_Msg4(module_idP, CC_id, frameP, slotP); LOG_D(MAC,"RA[state:%d], frame %d %d\n",ra->state, frameP, slotP);
if (ra->Msg4_frame == frameP && ra->Msg4_slot == slotP )
nr_generate_Msg4(module_idP, CC_id, frameP, slotP, num_slots_per_tdd, ra);
break; break;
case WAIT_Msg4_ACK: case WAIT_Msg4_ACK:
//check_Msg4_retransmission(module_idP, CC_id, frameP, slotP); //check_Msg4_retransmission(module_idP, CC_id, frameP, slotP);
nr_check_Msg4_Ack(module_idP, CC_id, frameP, slotP, ra, num_slots_per_tdd);
break; break;
default: default:
break; break;
...@@ -830,7 +833,7 @@ void nr_generate_Msg2(module_id_t module_idP, ...@@ -830,7 +833,7 @@ void nr_generate_Msg2(module_id_t module_idP,
LOG_I(MAC, "[RAPROC] Scheduling common search space DCI type 1 dlBWP BW %d\n", dci10_bw); LOG_I(MAC, "[RAPROC] Scheduling common search space DCI type 1 dlBWP BW %d\n", dci10_bw);
// Qm>2 not allowed for RAR // Qm>2 not allowed for RAR
if (get_softmodem_params()->do_ra) if ((get_softmodem_params()->do_ra) || (get_softmodem_params()->sa_ra))
mcsIndex = 9; mcsIndex = 9;
else else
mcsIndex = 0; mcsIndex = 0;
...@@ -926,7 +929,7 @@ void nr_generate_Msg2(module_id_t module_idP, ...@@ -926,7 +929,7 @@ void nr_generate_Msg2(module_id_t module_idP,
ss, ss,
coreset, coreset,
scc, scc,
bwp, NULL,
aggregation_level, aggregation_level,
CCEIndex); CCEIndex);
...@@ -935,13 +938,15 @@ void nr_generate_Msg2(module_id_t module_idP, ...@@ -935,13 +938,15 @@ void nr_generate_Msg2(module_id_t module_idP,
dci_formats[0] = NR_DL_DCI_FORMAT_1_0; dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
rnti_types[0] = NR_RNTI_RA; rnti_types[0] = NR_RNTI_RA;
LOG_I(MAC, "[RAPROC] DCI params: rnti %d, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n", LOG_I(MAC, "[RAPROC] DCI params: rnti %d, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d, bwp %d %d\n",
pdcch_pdu_rel15->dci_pdu.RNTI[0], pdcch_pdu_rel15->dci_pdu.RNTI[0],
rnti_types[0], rnti_types[0],
dci_formats[0], dci_formats[0],
(unsigned long long)pdcch_pdu_rel15->FreqDomainResource, (unsigned long long)pdcch_pdu_rel15->FreqDomainResource,
pdcch_pdu_rel15->StartSymbolIndex, pdcch_pdu_rel15->StartSymbolIndex,
pdcch_pdu_rel15->DurationSymbols); pdcch_pdu_rel15->DurationSymbols,
pdcch_pdu_rel15->BWPSize,
pdcch_pdu_rel15->BWPStart);
fill_dci_pdu_rel15(scc,ra->secondaryCellGroup,pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, rnti_types,dci10_bw,ra->bwp_id); fill_dci_pdu_rel15(scc,ra->secondaryCellGroup,pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, rnti_types,dci10_bw,ra->bwp_id);
...@@ -978,6 +983,302 @@ void nr_generate_Msg2(module_id_t module_idP, ...@@ -978,6 +983,302 @@ void nr_generate_Msg2(module_id_t module_idP,
} }
} }
void
nr_get_retransmission_timing(
frame_t *frameP,
sub_frame_t *subframeP)
//------------------------------------------------------------------------------
{
*frameP = (*frameP + 1) % 1024;
*subframeP = *subframeP;
return;
}
void
nr_generate_Msg4(module_id_t module_id,
int CC_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd,
NR_RA_t *ra) {
/* PREPROCESSOR */
gNB_MAC_INST *gNB_mac = RC.nrmac[module_id];
/* PREPROCESSOR */
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
//NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
int16_t rrc_sdu_length = 0;
uint16_t msg4_padding = 0;
uint16_t msg4_post_padding = 0;
uint16_t msg4_header = 0;
int UE_id = find_nr_UE_id_msg4(module_id, ra->rnti);
if (UE_id < 0) {
LOG_E(MAC, "Can't find UE for t-crnti %x, kill RA procedure for this UE\n",
ra->rnti);
nr_clear_ra_proc(module_id, CC_id, frame);
return;
}
if (ra->coreset0_configured == 1) {
AssertFatal(1==0,"This is a standalone condition\n");
}
else { // on configured BWP or initial LDBWP, bandwidth parameters in DCI correspond size of initialBWP
}
gNB_mac->pre_processor_dl(module_id, frame, slot, num_slots_per_tdd, NR_RNTI_TC, UE_id);
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
if (sched_ctrl->rbSize <= 0)
{ // do nothing
//continue;
}
/* POST processing */
struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
AssertFatal(sched_ctrl->time_domain_allocation < tdaList->list.count,
"time_domain_allocation %d>=%d\n",
sched_ctrl->time_domain_allocation,
tdaList->list.count);
const int startSymbolAndLength =
tdaList->list.array[sched_ctrl->time_domain_allocation]->startSymbolAndLength;
int startSymbolIndex, nrOfSymbols;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
uint8_t N_PRB_DMRS =
getN_PRB_DMRS(sched_ctrl->active_bwp, sched_ctrl->numDmrsCdmGrpsNoData);
uint8_t N_DMRS_SLOT = get_num_dmrs_symbols(NULL,
RC.nrmac[module_id]->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position ,
nrOfSymbols);
const uint32_t TBS =
nr_compute_tbs(nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
sched_ctrl->rbSize,
nrOfSymbols,
N_PRB_DMRS * N_DMRS_SLOT,
0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */,
1 /* nrOfLayers */)
>> 3;
const int current_harq_pid = slot % num_slots_per_tdd;
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
NR_sched_pucch *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx][sched_ctrl->pucch_occ_idx];
harq->feedback_slot = pucch->ul_slot;
harq->is_waiting = 1;
UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
ra->harq_pid = current_harq_pid;
LOG_I(MAC, "%4d.%2d RNTI %04x start %d RBS %d MCS %d TBS %d HARQ PID %d round %d NDI %d, feedback slot %d, iswaiting %d\n",
frame, slot, ra->rnti, sched_ctrl->rbStart, sched_ctrl->rbSize, sched_ctrl->mcs,
TBS, current_harq_pid, harq->round, harq->ndi, harq->feedback_slot, harq->is_waiting);
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
nr_fill_nfapi_dl_pdu(module_id,
dl_req,
ra->rnti,
ra->secondaryCellGroup,
sched_ctrl,
pucch,
getDmrsConfigType(sched_ctrl->active_bwp),
nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
nr_get_Qm_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx),
TBS,
startSymbolIndex,
nrOfSymbols,
current_harq_pid,
harq->ndi,
harq->round,
NR_RNTI_TC);
NR_UE_ret_info_t *retInfo = &sched_ctrl->retInfo[current_harq_pid];
if (harq->round != 0) { /* retransmission */
if (sched_ctrl->rbSize != retInfo->rbSize)
LOG_W(MAC,
"retransmission uses different rbSize (%d vs. orig %d)\n",
sched_ctrl->rbSize,
retInfo->rbSize);
if (sched_ctrl->time_domain_allocation != retInfo->time_domain_allocation)
LOG_W(MAC,
"retransmission uses different time_domain_allocation (%d vs. orig %d)\n",
sched_ctrl->time_domain_allocation,
retInfo->time_domain_allocation);
if (sched_ctrl->mcs != retInfo->mcs
|| sched_ctrl->mcsTableIdx != retInfo->mcsTableIdx
|| sched_ctrl->numDmrsCdmGrpsNoData != retInfo->numDmrsCdmGrpsNoData)
LOG_W(MAC,
"retransmission uses different table/MCS/numDmrsCdmGrpsNoData (%d/%d/%d vs. orig %d/%d/%d)\n",
sched_ctrl->mcsTableIdx,
sched_ctrl->mcs,
sched_ctrl->numDmrsCdmGrpsNoData,
retInfo->mcsTableIdx,
retInfo->mcs,
retInfo->numDmrsCdmGrpsNoData);
/* we do not have to do anything, since we do not require to get data
* from RLC, encode MAC CEs, or copy data to FAPI structures */
LOG_W(MAC, "%d.%2d retransmission UE %d/RNTI %04x\n", frame, slot, UE_id, ra->rnti);
LOG_W(MAC,
"%d.%2d DL retransmission UE %d/RNTI %04x HARQ PID %d round %d NDI %d\n",
frame,
slot,
UE_id,
ra->rnti,
current_harq_pid,
harq->round,
harq->ndi);
} else { /* initial transmission */
LOG_D(MAC, "[%s] Initial HARQ transmission in %d.%d\n", __FUNCTION__, frame, slot);
/* reserve space for timing advance of UE if necessary,
* nr_generate_dlsch_pdu() checks for ta_apply and add TA CE if necessary */
const int cont_res_len = 1 + 6;
/* Get RLC data TODO: remove random data retrieval */
int header_length_total = 0;
int header_length_last = 0;
int sdu_length_total = 0;
int num_sdus = 0;
uint16_t sdu_lengths[NB_RB_MAX] = {0};
uint8_t mac_sdus[MAX_NR_DLSCH_PAYLOAD_BYTES];
unsigned char sdu_lcids[NB_RB_MAX] = {0};
const int lcid = DL_SCH_LCID_CCCH;
if (sched_ctrl->num_total_bytes > 0) {
#if 0
sdu_lengths[num_sdus] = mac_rrc_data_req(module_id, CC_idP, frameP, CCCH,
UE_RNTI(module_idP,UE_id),1, // 1 transport block
&cc[CC_idP].CCCH_pdu.payload[0], 1);
LOG_D(MAC,
"[gNB %d][USER-PLANE DEFAULT DRB] Got %d bytes for DTCH %d \n",
module_id,
sdu_lengths[num_sdus],
lcid);
sdu_lcids[num_sdus] = lcid;
sdu_length_total += sdu_lengths[num_sdus];
header_length_last = 1 + 1 + (sdu_lengths[num_sdus] >= 128);
header_length_total += header_length_last;
num_sdus++;
#else
LOG_I(MAC, "Configuring DL_TX in %d.%d: random data\n", frame, slot);
// fill dlsch_buffer with random data
sdu_lcids[0] = lcid; // DRB
sdu_lengths[0] = 500;
for (int i = 0; i < sdu_lengths[0]; i++)
mac_sdus[i] = (unsigned char) (lrand48()&0xff);
sdu_length_total += sdu_lengths[0];
header_length_total += 2 + (sdu_lengths[0] >= 128);
num_sdus +=1;
#endif
//ue_sched_ctl->uplane_inactivity_timer = 0;
}
UE_info->mac_stats[UE_id].dlsch_total_bytes += TBS;
UE_info->mac_stats[UE_id].lc_bytes_tx[lcid] += sdu_length_total;
// Check if there is data from RLC or CE
const int post_padding = TBS > header_length_total + sdu_length_total + cont_res_len;
LOG_I(MAC, "Configuring DL_TX in %d.%d: TBS %d, header_length_total %d, sdu_length_total %d,cont_res_len %d, post_padding %d \n", frame, slot,
TBS , header_length_total , sdu_length_total ,cont_res_len , post_padding );
// padding param currently not in use
//padding = TBS - header_length_total - sdu_length_total - ta_len - 1;
const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs;
nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req];
/* pointer to directly generate the PDU into the nFAPI structure */
uint32_t *buf = tx_req->TLVs[0].value.direct;
const int offset = nr_generate_dlsch_pdu(
module_id,
sched_ctrl,
(unsigned char *)mac_sdus,
(unsigned char *)buf,
num_sdus, // num_sdus
sdu_lengths,
sdu_lcids,
255, // no drx
ra->cont_res_id, // contention res id
post_padding);
// Padding: fill remainder of DLSCH with 0
if (post_padding > 0) {
for (int j = 0; j < TBS - offset; j++)
buf[offset + j] = 0;
}
/* the buffer has been filled by nr_generate_dlsch_pdu(), below we simply
* fill the remaining information */
tx_req->PDU_length = TBS;
tx_req->PDU_index = gNB_mac->pdu_index[0]++;
tx_req->num_TLV = 1;
tx_req->TLVs[0].length = TBS + 2;
gNB_mac->TX_req[CC_id].Number_of_PDUs++;
gNB_mac->TX_req[CC_id].SFN = frame;
gNB_mac->TX_req[CC_id].Slot = slot;
retInfo->rbSize = sched_ctrl->rbSize;
retInfo->time_domain_allocation = sched_ctrl->time_domain_allocation;
retInfo->mcsTableIdx = sched_ctrl->mcsTableIdx;
retInfo->mcs = sched_ctrl->mcs;
retInfo->numDmrsCdmGrpsNoData = sched_ctrl->numDmrsCdmGrpsNoData;
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
if (frame%100 == 0) {
LOG_I(MAC,
"%d.%d, first 10 payload bytes, TBS size: %d \n",
frame,
slot,
TBS);
for(int i = 0; i < 10; i++)
LOG_I(MAC, "byte %d: %x\n", i, ((uint8_t *) buf)[i]);
}
#endif
}
nr_get_retransmission_timing(&ra->Msg4_frame, &ra->Msg4_slot);
ra->state = WAIT_Msg4_ACK;
LOG_I(MAC, "retrx time for msg4 is %d %d\n", ra->Msg4_frame, ra->Msg4_slot);
}
void
nr_check_Msg4_Ack(module_id_t module_id,
int CC_id,
frame_t frame,
sub_frame_t slot,
NR_RA_t *ra,
int num_slots_per_tdd) {
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
int UE_id = find_nr_UE_id_msg4(module_id, ra->rnti);
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
const int current_harq_pid = ra->harq_pid;
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
LOG_D(MAC, "ue %d, rnti %d, harq is waiting %d, round %d, frame %d %d, harq id %d\n", UE_id, ra->rnti, harq->is_waiting, harq->round, frame, slot, current_harq_pid);
if (harq->is_waiting == 0)
{
if ( harq->round == 0)
{
ra->state = IDLE;
UE_info->active[UE_id] = true;
free(ra->preambles.preamble_list);
LOG_I(MAC, "ue %d, rnti %d is active, frame %d %d\n", UE_id, ra->rnti, frame, slot);
}
else
{
ra->state = Msg4;
}
}
}
void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP){ void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP){
NR_RA_t *ra = &RC.nrmac[module_idP]->common_channels[CC_id].ra[0]; NR_RA_t *ra = &RC.nrmac[module_idP]->common_channels[CC_id].ra[0];
......
...@@ -375,25 +375,26 @@ uint8_t getN_PRB_DMRS(NR_BWP_Downlink_t *bwp, int numDmrsCdmGrpsNoData) { ...@@ -375,25 +375,26 @@ uint8_t getN_PRB_DMRS(NR_BWP_Downlink_t *bwp, int numDmrsCdmGrpsNoData) {
void nr_simple_dlsch_preprocessor(module_id_t module_id, void nr_simple_dlsch_preprocessor(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
int num_slots_per_tdd) { int num_slots_per_tdd,
int rnti_type,
int UE_id) {
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
AssertFatal(UE_info->num_UEs <= 1,
"%s() cannot handle more than one UE, but found %d\n",
__func__,
UE_info->num_UEs);
if (UE_info->num_UEs == 0)
return;
const int UE_id = 0;
const int CC_id = 0; const int CC_id = 0;
rnti_t rnti;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
uint16_t Y = 0;
int m = 0;
int ss_type;
int cid;
rnti = UE_info->rnti[UE_id];
if (rnti_type == NR_RNTI_C)
{
/* Retrieve amount of data to send for this UE */ /* Retrieve amount of data to send for this UE */
sched_ctrl->num_total_bytes = 0; sched_ctrl->num_total_bytes = 0;
const int lcid = DL_SCH_LCID_DTCH; const int lcid = DL_SCH_LCID_DTCH;
const rnti_t rnti = UE_info->rnti[UE_id];
sched_ctrl->rlc_status[lcid] = mac_rlc_status_ind(module_id, sched_ctrl->rlc_status[lcid] = mac_rlc_status_ind(module_id,
rnti, rnti,
module_id, module_id,
...@@ -416,19 +417,52 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id, ...@@ -416,19 +417,52 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
lcid, lcid,
sched_ctrl->rlc_status[lcid].bytes_in_buffer, sched_ctrl->rlc_status[lcid].bytes_in_buffer,
sched_ctrl->ta_apply); sched_ctrl->ta_apply);
ss_type = 1; // UE_Specific
/* Find a free CCE */
const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss); sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss);
sched_ctrl->coreset = get_coreset(sched_ctrl->active_bwp, sched_ctrl->search_space, ss_type);
cid = sched_ctrl->coreset->controlResourceSetId;
Y = UE_info->Y[UE_id][cid][slot];
m = UE_info->num_pdcch_cand[UE_id][cid];
}
else if (rnti_type == NR_RNTI_TC)
{
gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
NR_RA_t *ra = &cc->ra[0];
/*
rrc_sdu_length = mac_rrc_data_req(module_idP, CC_idP, frameP, CCCH,
UE_RNTI(module_idP,UE_id),1, // 1 transport block
&cc[CC_idP].CCCH_pdu.payload[0], 0); // not used in this case
*/
int rrc_sdu_length = 500;
sched_ctrl->num_total_bytes += rrc_sdu_length;
if (sched_ctrl->num_total_bytes == 0)
return;
LOG_D(MAC,
"[gNB %d][RAPROC] CC_id %d Frame %d, slot %d: UE_id %d, rrc_sdu_length %d\n",
module_id, CC_id, frame, slot, UE_id, rrc_sdu_length);
sched_ctrl->search_space = ra->ra_ss;
ss_type = 0; // Common
sched_ctrl->coreset = get_coreset(sched_ctrl->active_bwp, sched_ctrl->search_space, ss_type);
cid = sched_ctrl->coreset->controlResourceSetId;
rnti = ra->rnti;
}
else
{
return;
}
/* Find a free CCE */
uint8_t nr_of_candidates; uint8_t nr_of_candidates;
find_aggregation_candidates(&sched_ctrl->aggregation_level, find_aggregation_candidates(&sched_ctrl->aggregation_level,
&nr_of_candidates, &nr_of_candidates,
sched_ctrl->search_space); sched_ctrl->search_space);
sched_ctrl->coreset = get_coreset(
sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */);
int cid = sched_ctrl->coreset->controlResourceSetId;
const uint16_t Y = UE_info->Y[UE_id][cid][slot];
const int m = UE_info->num_pdcch_cand[UE_id][cid];
sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id], sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id],
sched_ctrl->active_bwp, sched_ctrl->active_bwp,
sched_ctrl->coreset, sched_ctrl->coreset,
...@@ -436,6 +470,9 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id, ...@@ -436,6 +470,9 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
Y, Y,
m, m,
nr_of_candidates); nr_of_candidates);
LOG_D(PHY, "simple: frame %d %d, rnti %d, cce index %d, ss_type %d, ue is active %d\n", frame,
slot, rnti, sched_ctrl->cce_index, ss_type, UE_info->active[UE_id]);
if (sched_ctrl->cce_index < 0) { if (sched_ctrl->cce_index < 0) {
LOG_E(MAC, "%s(): could not find CCE for UE %d\n", __func__, UE_id); LOG_E(MAC, "%s(): could not find CCE for UE %d\n", __func__, UE_id);
return; return;
...@@ -449,7 +486,8 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id, ...@@ -449,7 +486,8 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
slot, slot,
num_slots_per_tdd, num_slots_per_tdd,
&sched_ctrl->pucch_sched_idx, &sched_ctrl->pucch_sched_idx,
&sched_ctrl->pucch_occ_idx); &sched_ctrl->pucch_occ_idx,
ss_type);
AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n"); AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n");
...@@ -496,7 +534,7 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id, ...@@ -496,7 +534,7 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
// modulation scheme // modulation scheme
sched_ctrl->mcsTableIdx = 0; sched_ctrl->mcsTableIdx = 0;
sched_ctrl->mcs = 9; sched_ctrl->mcs = 9;
sched_ctrl->numDmrsCdmGrpsNoData = 1; sched_ctrl->numDmrsCdmGrpsNoData = (ss_type == 1)? 1 : 2;
// Freq-demain allocation // Freq-demain allocation
while (rbStart < bwpSize && vrb_map[rbStart]) rbStart++; while (rbStart < bwpSize && vrb_map[rbStart]) rbStart++;
...@@ -505,13 +543,22 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id, ...@@ -505,13 +543,22 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
getN_PRB_DMRS(sched_ctrl->active_bwp, sched_ctrl->numDmrsCdmGrpsNoData); getN_PRB_DMRS(sched_ctrl->active_bwp, sched_ctrl->numDmrsCdmGrpsNoData);
int nrOfSymbols = getNrOfSymbols(sched_ctrl->active_bwp, int nrOfSymbols = getNrOfSymbols(sched_ctrl->active_bwp,
sched_ctrl->time_domain_allocation); sched_ctrl->time_domain_allocation);
uint8_t N_DMRS_SLOT = get_num_dmrs_symbols(sched_ctrl->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup, uint8_t N_DMRS_SLOT = get_num_dmrs_symbols((ss_type == 1)? sched_ctrl->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup : NULL,
RC.nrmac[module_id]->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position , RC.nrmac[module_id]->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position ,
nrOfSymbols); nrOfSymbols);
int rbSize = 0; int rbSize = 0;
const int oh = 2 + (sched_ctrl->num_total_bytes >= 256) int oh;
if (rnti_type == NR_RNTI_C)
{
oh = 2 + (sched_ctrl->num_total_bytes >= 256)
+ 2 * (frame == (sched_ctrl->ta_frame + 10) % 1024); + 2 * (frame == (sched_ctrl->ta_frame + 10) % 1024);
}
else
{ // NR_RNTI_TC, msg4
oh = 2 + (sched_ctrl->num_total_bytes >= 256)
+ 1 + 6; // UE Contention Resolution Identity CE
}
uint32_t TBS = 0; uint32_t TBS = 0;
do { do {
rbSize++; rbSize++;
...@@ -540,16 +587,20 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -540,16 +587,20 @@ void nr_schedule_ue_spec(module_id_t module_id,
int num_slots_per_tdd) { int num_slots_per_tdd) {
gNB_MAC_INST *gNB_mac = RC.nrmac[module_id]; gNB_MAC_INST *gNB_mac = RC.nrmac[module_id];
/* PREPROCESSOR */
gNB_mac->pre_processor_dl(module_id, frame, slot, num_slots_per_tdd);
NR_UE_info_t *UE_info = &gNB_mac->UE_info; NR_UE_info_t *UE_info = &gNB_mac->UE_info;
const int CC_id = 0; const int CC_id = 0;
NR_UE_list_t *UE_list = &UE_info->list; NR_UE_list_t *UE_list = &UE_info->list;
for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) { for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
if (!UE_info->active[UE_id])
continue;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
/* PREPROCESSOR */
gNB_mac->pre_processor_dl(module_id, frame, slot, num_slots_per_tdd, NR_RNTI_C, UE_id);
/* update TA and set ta_apply every 10 frames. /* update TA and set ta_apply every 10 frames.
* Possible improvement: take the periodicity from input file. * Possible improvement: take the periodicity from input file.
* If such UE is not scheduled now, it will be by the preprocessor later. * If such UE is not scheduled now, it will be by the preprocessor later.
...@@ -620,7 +671,8 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -620,7 +671,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
nrOfSymbols, nrOfSymbols,
current_harq_pid, current_harq_pid,
harq->ndi, harq->ndi,
harq->round); harq->round,
NR_RNTI_C);
NR_UE_ret_info_t *retInfo = &sched_ctrl->retInfo[current_harq_pid]; NR_UE_ret_info_t *retInfo = &sched_ctrl->retInfo[current_harq_pid];
if (harq->round != 0) { /* retransmission */ if (harq->round != 0) { /* retransmission */
...@@ -712,7 +764,7 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -712,7 +764,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
header_length_total += header_length_last; header_length_total += header_length_last;
num_sdus++; num_sdus++;
} }
else if (get_softmodem_params()->phy_test || get_softmodem_params()->do_ra) { else if (get_softmodem_params()->phy_test || get_softmodem_params()->do_ra || get_softmodem_params()->sa_ra) {
LOG_D(MAC, "Configuring DL_TX in %d.%d: random data\n", frame, slot); LOG_D(MAC, "Configuring DL_TX in %d.%d: random data\n", frame, slot);
// fill dlsch_buffer with random data // fill dlsch_buffer with random data
for (int i = 0; i < TBS; i++) for (int i = 0; i < TBS; i++)
......
...@@ -334,7 +334,8 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -334,7 +334,8 @@ void nr_preprocessor_phytest(module_id_t module_id,
slot, slot,
num_slots_per_tdd, num_slots_per_tdd,
&sched_ctrl->pucch_sched_idx, &sched_ctrl->pucch_sched_idx,
&sched_ctrl->pucch_occ_idx); &sched_ctrl->pucch_occ_idx,
1);
AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n"); AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n");
sched_ctrl->rbStart = rbStart; sched_ctrl->rbStart = rbStart;
......
...@@ -510,7 +510,8 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP, ...@@ -510,7 +510,8 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
int NrOfSymbols, int NrOfSymbols,
int harq_pid, int harq_pid,
int ndi, int ndi,
int round) { int round,
int rnit_type) {
gNB_MAC_INST *nr_mac = RC.nrmac[Mod_idP]; gNB_MAC_INST *nr_mac = RC.nrmac[Mod_idP];
NR_COMMON_channels_t *cc = nr_mac->common_channels; NR_COMMON_channels_t *cc = nr_mac->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
...@@ -604,6 +605,8 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP, ...@@ -604,6 +605,8 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET]; dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET];
memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15_t) * MAX_DCI_CORESET); memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15_t) * MAX_DCI_CORESET);
if (rnit_type == NR_RNTI_C)
{
// bwp indicator // bwp indicator
int n_dl_bwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count; int n_dl_bwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
if (n_dl_bwp < 4) if (n_dl_bwp < 4)
...@@ -620,6 +623,17 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP, ...@@ -620,6 +623,17 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
275)); 275));
else else
AssertFatal(1==0,"Only frequency resource allocation type 1 is currently supported\n"); AssertFatal(1==0,"Only frequency resource allocation type 1 is currently supported\n");
}
else
{
dci_pdu_rel15[0].frequency_domain_assignment.val =
PRBalloc_to_locationandbandwidth0(
pdsch_pdu_rel15->rbSize,
pdsch_pdu_rel15->rbStart,
NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, //bwp->bwp_Common->genericParameters.locationAndBandwidth,
275));
}
// time domain assignment: row index used instead of SLIV // time domain assignment: row index used instead of SLIV
dci_pdu_rel15[0].time_domain_assignment.val = sched_ctrl->time_domain_allocation; dci_pdu_rel15[0].time_domain_assignment.val = sched_ctrl->time_domain_allocation;
// mcs and rv // mcs and rv
...@@ -661,21 +675,21 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP, ...@@ -661,21 +675,21 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
sched_ctrl->search_space, sched_ctrl->search_space,
sched_ctrl->coreset, sched_ctrl->coreset,
scc, scc,
bwp, (rnit_type == NR_RNTI_TC) ? NULL:bwp,
sched_ctrl->aggregation_level, sched_ctrl->aggregation_level,
sched_ctrl->cce_index); sched_ctrl->cce_index);
int dci_formats[2]; int dci_formats[2];
int rnti_types[2]; int rnti_types[2];
if (sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats) if ((rnit_type == NR_RNTI_C) && (sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats))
dci_formats[0] = NR_DL_DCI_FORMAT_1_1; dci_formats[0] = NR_DL_DCI_FORMAT_1_1;
else else
dci_formats[0] = NR_DL_DCI_FORMAT_1_0; dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
rnti_types[0] = NR_RNTI_C; rnti_types[0] = rnit_type;
fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pdsch_pdu_rel15->BWPSize,bwp_id); fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pdcch_pdu_rel15->BWPSize,bwp_id);
LOG_D(MAC, LOG_D(MAC,
"DCI params: rnti %x, rnti_type %d, dci_format %d\n", "DCI params: rnti %x, rnti_type %d, dci_format %d\n",
...@@ -683,10 +697,12 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP, ...@@ -683,10 +697,12 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
rnti_types[0], rnti_types[0],
dci_formats[0]); dci_formats[0]);
LOG_D(MAC, LOG_D(MAC,
"coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n", "coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d, BWP %d %d\n",
(unsigned long long)pdcch_pdu_rel15->FreqDomainResource, (unsigned long long)pdcch_pdu_rel15->FreqDomainResource,
pdcch_pdu_rel15->StartSymbolIndex, pdcch_pdu_rel15->StartSymbolIndex,
pdcch_pdu_rel15->DurationSymbols); pdcch_pdu_rel15->DurationSymbols,
pdcch_pdu_rel15->BWPSize,
pdcch_pdu_rel15->BWPStart);
LOG_D(MAC, LOG_D(MAC,
"DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d " "DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d "
...@@ -701,6 +717,7 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP, ...@@ -701,6 +717,7 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
TBS); TBS);
dl_req->nPDUs += 2; dl_req->nPDUs += 2;
} }
void config_uldci(NR_BWP_Uplink_t *ubwp, void config_uldci(NR_BWP_Uplink_t *ubwp,
...@@ -787,6 +804,7 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac, ...@@ -787,6 +804,7 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
NR_BWP_Downlink_t *bwp, NR_BWP_Downlink_t *bwp,
uint8_t aggregation_level, uint8_t aggregation_level,
int CCEIndex) { int CCEIndex) {
int sps;
if (bwp) { // This is not the InitialBWP if (bwp) { // This is not the InitialBWP
pdcch_pdu->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275); pdcch_pdu->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275); pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
...@@ -795,8 +813,20 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac, ...@@ -795,8 +813,20 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
// first symbol // first symbol
//AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored"); //AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
int sps = bwp->bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12; sps = bwp->bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12;
}
else
{ // This is not the InitialBWP
pdcch_pdu->BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
pdcch_pdu->SubcarrierSpacing = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
pdcch_pdu->CyclicPrefix = (scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.cyclicPrefix==NULL) ? 0 : scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.cyclicPrefix;
LOG_I(PHY, "initial dl bwp %d %d (%d)\n", pdcch_pdu->BWPSize, pdcch_pdu->BWPStart, scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth);
// first symbol
//AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
sps = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.cyclicPrefix == NULL ? 14 : 12;
}
AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n"); AssertFatal(ss->monitoringSymbolsWithinSlot!=NULL,"ss->monitoringSymbolsWithinSlot is null\n");
AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n"); AssertFatal(ss->monitoringSymbolsWithinSlot->buf!=NULL,"ss->monitoringSymbolsWithinSlot->buf is null\n");
...@@ -858,10 +888,8 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac, ...@@ -858,10 +888,8 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
pdcch_pdu->dci_pdu.powerControlOffsetSS[pdcch_pdu->numDlDci]=1; pdcch_pdu->dci_pdu.powerControlOffsetSS[pdcch_pdu->numDlDci]=1;
pdcch_pdu->numDlDci++; pdcch_pdu->numDlDci++;
}
else { // this is for InitialBWP
AssertFatal(1==0,"Fill in InitialBWP PDCCH configuration\n");
}
} }
...@@ -1348,46 +1376,71 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc, ...@@ -1348,46 +1376,71 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
break; break;
case NR_RNTI_TC: case NR_RNTI_TC:
dci_pdu_rel15->format_indicator = 1;
// indicating a DL DCI format 1bit // indicating a DL DCI format 1bit
*dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator&1)<<(dci_size-pos++);
pos=1;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator&0x1)<<(dci_size-pos);
LOG_D(MAC,"format indicator %d (%d bits)=> %d (0x%lx), dci size %d\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu, dci_size);
// Freq domain assignment 0-16 bit // Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++) pos += fsize;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val>>(fsize-i-1))&1)<<(dci_size-pos++); *dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val&((1<<fsize)-1)) << (dci_size-pos);
LOG_D(MAC,"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment.val,fsize,dci_size-pos,*dci_pdu);
// Time domain assignment 4 bit // Time domain assignment 4 bit
for (int i=0; i<4; i++) pos += 4;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val>>(3-i))&1)<<(dci_size-pos++); *dci_pdu |= ((uint64_t)dci_pdu_rel15->time_domain_assignment.val&0xf) << (dci_size-pos);
LOG_D(MAC,"Time domain assignment %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment.val,4,dci_size-pos,*dci_pdu);
// VRB to PRB mapping 1 bit // VRB to PRB mapping 1 bit
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++); pos += 1;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos);
LOG_D(MAC,"VRB to PRB %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping.val,1,dci_size-pos,*dci_pdu);
// MCS 5bit //bit over 32, so dci_pdu ++ // MCS 5bit //bit over 32, so dci_pdu ++
for (int i=0; i<5; i++) pos+=5;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++); *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs&0x1f)<<(dci_size-pos);
LOG_D(MAC,"MCS %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,5,dci_size-pos,*dci_pdu);
// New data indicator 1bit // New data indicator 1bit
*dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi&1)<<(dci_size-pos++); pos += 1;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi&1)<<(dci_size-pos);
LOG_D(MAC,"NDI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->ndi,1,dci_size-pos,*dci_pdu);
// Redundancy version 2bit // Redundancy version 2bit
for (int i=0; i<2; i++) pos += 2;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++); *dci_pdu |= ((uint64_t)dci_pdu_rel15->rv&0x3)<<(dci_size-pos);
LOG_D(MAC,"RV %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->rv,2,dci_size-pos,*dci_pdu);
// HARQ process number 4bit // HARQ process number 4bit
for (int i=0; i<4; i++) pos += 4;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->harq_pid>>(3-i))&1)<<(dci_size-pos++); *dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid&0xf)<<(dci_size-pos);
LOG_D(MAC,"HARQ_PID %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->harq_pid,4,dci_size-pos,*dci_pdu);
// Downlink assignment index – 2 bits // Downlink assignment index – 2 bits
for (int i=0; i<2; i++) pos += 2;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->dai[0].val>>(1-i))&1)<<(dci_size-pos++); *dci_pdu |= ((uint64_t)dci_pdu_rel15->dai[0].val&0x3)<<(dci_size-pos);
LOG_D(MAC,"DAI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->dai[0].val,2,dci_size-pos,*dci_pdu);
// TPC command for scheduled PUCCH – 2 bits // TPC command for scheduled PUCCH – 2 bits
for (int i=0; i<2; i++) pos += 2;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->tpc>>(1-i))&1)<<(dci_size-pos++); *dci_pdu |= ((uint64_t)dci_pdu_rel15->tpc&0x3)<<(dci_size-pos);
LOG_D(MAC,"TPC %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->tpc,2,dci_size-pos,*dci_pdu);
// LOG_D(MAC, "DCI PDU: [0]->0x%08llx \t [1]->0x%08llx \t [2]->0x%08llx \t [3]->0x%08llx\n", // LOG_D(MAC, "DCI PDU: [0]->0x%08llx \t [1]->0x%08llx \t [2]->0x%08llx \t [3]->0x%08llx\n",
// dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]); // dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
// pucch_resource_indicator – 3 bits
pos += 3;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->pucch_resource_indicator&0x7)<<(dci_size-pos);
LOG_D(MAC,"pucch_resource_indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pucch_resource_indicator,3,dci_size-pos,*dci_pdu);
// PDSCH-to-HARQ_feedback timing indicator – 3 bits // PDSCH-to-HARQ_feedback timing indicator – 3 bits
for (int i=0; i<3; i++) pos += 3;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val>>(2-i))&1)<<(dci_size-pos++); *dci_pdu |= ((uint64_t)dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val&0x7)<<(dci_size-pos);
LOG_D(MAC,"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val,3,dci_size-pos,*dci_pdu);
break; break;
} }
break; break;
...@@ -1787,7 +1840,8 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP) ...@@ -1787,7 +1840,8 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
NR_UE_info_t *UE_info = &RC.nrmac[mod_idP]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[mod_idP]->UE_info;
for (UE_id = 0; UE_id < MAX_MOBILES_PER_GNB; UE_id++) { for (UE_id = 0; UE_id < MAX_MOBILES_PER_GNB; UE_id++) {
if (UE_info->active[UE_id]) { //if (UE_info->active[UE_id])
{
if (UE_info->rnti[UE_id] == rntiP) { if (UE_info->rnti[UE_id] == rntiP) {
return UE_id; return UE_id;
} }
...@@ -1797,6 +1851,24 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP) ...@@ -1797,6 +1851,24 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
return -1; return -1;
} }
int find_nr_UE_id_msg4(module_id_t mod_idP, rnti_t rntiP)
//------------------------------------------------------------------------------
{
int UE_id;
NR_UE_info_t *UE_info = &RC.nrmac[mod_idP]->UE_info;
for (UE_id = 0; UE_id < MAX_MOBILES_PER_GNB; UE_id++) {
if (!UE_info->active[UE_id]) {
if (UE_info->rnti[UE_id] == rntiP) {
return UE_id;
}
}
}
return -1;
}
void set_Y(int Y[3][160], rnti_t rnti) { void set_Y(int Y[3][160], rnti_t rnti) {
const int A[3] = {39827, 39829, 39839}; const int A[3] = {39827, 39829, 39839};
const int D = 65537; const int D = 65537;
...@@ -1831,7 +1903,7 @@ int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP) { ...@@ -1831,7 +1903,7 @@ int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP) {
} }
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, bool isActive){
NR_UE_info_t *UE_info = &RC.nrmac[mod_idP]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[mod_idP]->UE_info;
NR_COMMON_channels_t *cc = RC.nrmac[mod_idP]->common_channels; NR_COMMON_channels_t *cc = RC.nrmac[mod_idP]->common_channels;
...@@ -1839,10 +1911,11 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){ ...@@ -1839,10 +1911,11 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
int num_slots_ul = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots; int num_slots_ul = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0) if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0)
num_slots_ul++; num_slots_ul++;
LOG_W(MAC, "[gNB %d] Adding UE with rnti %x (num_UEs %d)\n", LOG_W(MAC, "[gNB %d] Adding UE with rnti %x (num_UEs %d), isActive %d\n",
mod_idP, mod_idP,
rntiP, rntiP,
UE_info->num_UEs); UE_info->num_UEs,
isActive);
dump_nr_ue_list(&UE_info->list); dump_nr_ue_list(&UE_info->list);
for (int i = 0; i < MAX_MOBILES_PER_GNB; i++) { for (int i = 0; i < MAX_MOBILES_PER_GNB; i++) {
...@@ -1851,7 +1924,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){ ...@@ -1851,7 +1924,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
int UE_id = i; int UE_id = i;
UE_info->num_UEs++; UE_info->num_UEs++;
UE_info->active[UE_id] = true; UE_info->active[UE_id] = isActive;
UE_info->rnti[UE_id] = rntiP; UE_info->rnti[UE_id] = rntiP;
add_nr_ue_list(&UE_info->list, UE_id); add_nr_ue_list(&UE_info->list, UE_id);
set_Y(UE_info->Y[UE_id], rntiP); set_Y(UE_info->Y[UE_id], rntiP);
......
...@@ -40,7 +40,9 @@ void nr_schedule_pucch(int Mod_idP, ...@@ -40,7 +40,9 @@ void nr_schedule_pucch(int Mod_idP,
frame_t frameP, frame_t frameP,
sub_frame_t slotP) { sub_frame_t slotP) {
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id); //AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id);
if (UE_info->active[UE_id] <= 0)
LOG_D(MAC, "Cannot find UE_id %d is not active\n",UE_id);
for (int k=0; k<nr_ulmix_slots; k++) { for (int k=0; k<nr_ulmix_slots; k++) {
for (int l=0; l<2; l++) { for (int l=0; l<2; l++) {
...@@ -280,6 +282,8 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id, ...@@ -280,6 +282,8 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01) const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01)
{ {
int UE_id = find_nr_UE_id(mod_id, uci_01->rnti); int UE_id = find_nr_UE_id(mod_id, uci_01->rnti);
LOG_D(MAC, "handle_nr_uci_pucch_0_1, ue id %d, rnti %d\n", UE_id, uci_01->rnti);
if (UE_id < 0) { if (UE_id < 0) {
LOG_E(MAC, "%s(): unknown RNTI %04x in PUCCH UCI\n", __func__, uci_01->rnti); LOG_E(MAC, "%s(): unknown RNTI %04x in PUCCH UCI\n", __func__, uci_01->rnti);
return; return;
...@@ -314,6 +318,10 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id, ...@@ -314,6 +318,10 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
else else
sched_ctrl->harq_processes[harq_idx].round++; sched_ctrl->harq_processes[harq_idx].round++;
sched_ctrl->harq_processes[harq_idx].is_waiting = 0; sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
LOG_D(MAC, "%s(): RNTI %04x in PUCCH UCI, harq bit %d, idx %d, feedbanck slot %d, round %d, harq value %d, confidence %d\n", __func__, uci_01->rnti,
harq_bit, harq_idx, sched_ctrl->harq_processes[harq_idx].feedback_slot, sched_ctrl->harq_processes[harq_idx].round,
uci_01->harq->harq_list[harq_bit].harq_value,
uci_01->harq->harq_confidence_level);
harq_idx_s = harq_idx + 1; harq_idx_s = harq_idx + 1;
// if the max harq rounds was reached // if the max harq rounds was reached
if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) { if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
...@@ -334,6 +342,10 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id, ...@@ -334,6 +342,10 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
sched_ctrl->harq_processes[harq_idx].round = 0; sched_ctrl->harq_processes[harq_idx].round = 0;
} }
sched_ctrl->harq_processes[harq_idx].is_waiting = 0; sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
LOG_D(MAC, "%s(): RNTI %04x in PUCCH UCI, harq bit %d, idx %d, feedbanck slot %d, round %d, harq value %d, confidence %d\n", __func__, uci_01->rnti,
harq_bit, harq_idx, sched_ctrl->harq_processes[harq_idx].feedback_slot, sched_ctrl->harq_processes[harq_idx].round,
uci_01->harq->harq_list[harq_bit].harq_value,
uci_01->harq->harq_confidence_level);
} }
} }
} }
...@@ -380,6 +392,10 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, ...@@ -380,6 +392,10 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
else else
sched_ctrl->harq_processes[harq_idx].round++; sched_ctrl->harq_processes[harq_idx].round++;
sched_ctrl->harq_processes[harq_idx].is_waiting = 0; sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
LOG_D(MAC, "%s(): RNTI %04x in PUCCH UCI, harq bit %d, idx %d, feedbanck slot %d, round %d, harq crc %d, acknack %d\n", __func__, uci_234->rnti,
harq_bit, harq_idx, sched_ctrl->harq_processes[harq_idx].feedback_slot, sched_ctrl->harq_processes[harq_idx].round,
uci_234->harq.harq_crc,
acknack);
harq_idx_s = harq_idx + 1; harq_idx_s = harq_idx + 1;
// if the max harq rounds was reached // if the max harq rounds was reached
if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) { if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
...@@ -400,6 +416,10 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, ...@@ -400,6 +416,10 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
sched_ctrl->harq_processes[harq_idx].round = 0; sched_ctrl->harq_processes[harq_idx].round = 0;
} }
sched_ctrl->harq_processes[harq_idx].is_waiting = 0; sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
LOG_D(MAC, "%s(): RNTI %04x in PUCCH UCI, harq bit %d, idx %d, feedbanck slot %d, round %d, harq crc %d, acknack %d\n", __func__, uci_234->rnti,
harq_bit, harq_idx, sched_ctrl->harq_processes[harq_idx].feedback_slot, sched_ctrl->harq_processes[harq_idx].round,
uci_234->harq.harq_crc,
acknack);
} }
} }
} }
...@@ -414,7 +434,8 @@ void nr_acknack_scheduling(int Mod_idP, ...@@ -414,7 +434,8 @@ void nr_acknack_scheduling(int Mod_idP,
sub_frame_t slotP, sub_frame_t slotP,
int slots_per_tdd, int slots_per_tdd,
int *pucch_id, int *pucch_id,
int *pucch_occ) { int *pucch_occ,
int isUEspec) {
NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
...@@ -440,7 +461,15 @@ void nr_acknack_scheduling(int Mod_idP, ...@@ -440,7 +461,15 @@ void nr_acknack_scheduling(int Mod_idP,
max_acknacks=2; max_acknacks=2;
// this is hardcoded for now as ue specific // this is hardcoded for now as ue specific
NR_SearchSpace__searchSpaceType_PR ss_type = NR_SearchSpace__searchSpaceType_PR_ue_Specific; NR_SearchSpace__searchSpaceType_PR ss_type;
if( isUEspec == 1)
{
ss_type = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
}
else
{
ss_type = NR_SearchSpace__searchSpaceType_PR_common;
}
get_pdsch_to_harq_feedback(Mod_idP,UE_id,ss_type,pdsch_to_harq_feedback); get_pdsch_to_harq_feedback(Mod_idP,UE_id,ss_type,pdsch_to_harq_feedback);
// for each possible ul or mixed slot // for each possible ul or mixed slot
......
...@@ -395,7 +395,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -395,7 +395,8 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
current_rnti); current_rnti);
continue; continue;
} }
const int UE_id = add_new_nr_ue(gnb_mod_idP, ra->rnti); bool isActive = (get_softmodem_params()->sa_ra ? false:true);
const int UE_id = add_new_nr_ue(gnb_mod_idP, ra->rnti, isActive);
UE_info->secondaryCellGroup[UE_id] = ra->secondaryCellGroup; UE_info->secondaryCellGroup[UE_id] = ra->secondaryCellGroup;
compute_csi_bitlen(ra->secondaryCellGroup, UE_info, UE_id); compute_csi_bitlen(ra->secondaryCellGroup, UE_info, UE_id);
UE_info->UE_beam_index[UE_id] = ra->beam_id; UE_info->UE_beam_index[UE_id] = ra->beam_id;
...@@ -420,13 +421,22 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -420,13 +421,22 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
// re-initialize ta update variables afrer RA procedure completion // re-initialize ta update variables afrer RA procedure completion
UE_info->UE_sched_ctrl[UE_id].ta_frame = frameP; UE_info->UE_sched_ctrl[UE_id].ta_frame = frameP;
if (isActive) // NSA mode
{
free(ra->preambles.preamble_list); free(ra->preambles.preamble_list);
ra->state = RA_IDLE; ra->state = RA_IDLE;
LOG_I(MAC, LOG_I(MAC,
"reset RA state information for RA-RNTI %04x/index %d\n", "reset RA state information for RA-RNTI %04x/index %d\n",
ra->rnti, ra->rnti,
i); i);
}
else // SA mode
{
ra->state = Msg4;
ra->Msg4_frame = ( frameP +2 ) % 1024;
ra->Msg4_slot = 1;
LOG_I(MAC, "set RA state to Msg4 for RA-RNTI %04x, msg4 frame %d %d\n", ra->rnti, ra->Msg4_frame, ra->Msg4_slot);
}
return; return;
} }
} }
......
...@@ -84,7 +84,9 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -84,7 +84,9 @@ void nr_schedule_ue_spec(module_id_t module_id,
void nr_simple_dlsch_preprocessor(module_id_t module_id, void nr_simple_dlsch_preprocessor(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
int num_slots_per_tdd); int num_slots_per_tdd,
int rnti_type,
int UE_id);
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, uint8_t slots_per_frame); void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, uint8_t slots_per_frame);
...@@ -104,7 +106,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, ...@@ -104,7 +106,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
/////// Random Access MAC-PHY interface functions and primitives /////// /////// Random Access MAC-PHY interface functions and primitives ///////
void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP); void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, int num_slots_per_tdd);
/* \brief Function to indicate a received preamble on PRACH. It initiates the RA procedure. /* \brief Function to indicate a received preamble on PRACH. It initiates the RA procedure.
@param module_idP Instance ID of gNB @param module_idP Instance ID of gNB
...@@ -178,7 +180,8 @@ void nr_fill_nfapi_dl_pdu(int Mod_id, ...@@ -178,7 +180,8 @@ void nr_fill_nfapi_dl_pdu(int Mod_id,
int NrOfSymbols, int NrOfSymbols,
int harq_pid, int harq_pid,
int ndi, int ndi,
int round); int round,
int rnit_type);
void handle_nr_uci_pucch_0_1(module_id_t mod_id, void handle_nr_uci_pucch_0_1(module_id_t mod_id,
frame_t frame, frame_t frame,
...@@ -221,7 +224,8 @@ void nr_acknack_scheduling(int Mod_idP, ...@@ -221,7 +224,8 @@ void nr_acknack_scheduling(int Mod_idP,
sub_frame_t slotP, sub_frame_t slotP,
int slots_per_tdd, int slots_per_tdd,
int *pucch_id, int *pucch_id,
int *pucch_occ); int *pucch_occ,
int isUEspec);
int get_pucch_resource(NR_UE_info_t *UE_info,int UE_id,int k,int l); int get_pucch_resource(NR_UE_info_t *UE_info,int UE_id,int k,int l);
...@@ -338,7 +342,7 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP); ...@@ -338,7 +342,7 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP);
int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP); int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP);
int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP); int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, bool isActive);
void mac_remove_nr_ue(module_id_t mod_id, rnti_t rnti); void mac_remove_nr_ue(module_id_t mod_id, rnti_t rnti);
......
...@@ -96,7 +96,7 @@ void mac_top_init_gNB(void) ...@@ -96,7 +96,7 @@ void mac_top_init_gNB(void)
// These should be out of here later // These should be out of here later
pdcp_layer_init(); pdcp_layer_init();
if(IS_SOFTMODEM_NOS1 && !get_softmodem_params()->do_ra) if(IS_SOFTMODEM_NOS1 && !get_softmodem_params()->do_ra && !get_softmodem_params()->sa_ra)
nr_DRB_preconfiguration(0x1234); nr_DRB_preconfiguration(0x1234);
rrc_init_nr_global_param(); rrc_init_nr_global_param();
...@@ -117,6 +117,7 @@ void mac_top_init_gNB(void) ...@@ -117,6 +117,7 @@ void mac_top_init_gNB(void)
for (list_el = 0; list_el < MAX_MOBILES_PER_GNB; list_el++) { for (list_el = 0; list_el < MAX_MOBILES_PER_GNB; list_el++) {
UE_info->list.next[list_el] = -1; UE_info->list.next[list_el] = -1;
UE_info->active[list_el] = false; UE_info->active[list_el] = false;
UE_info->rnti[list_el] = 0;
for (int list_harq = 0; list_harq < NR_MAX_NB_HARQ_PROCESSES; list_harq++) { for (int list_harq = 0; list_harq < NR_MAX_NB_HARQ_PROCESSES; list_harq++) {
UE_info->UE_sched_ctrl[list_el].harq_processes[list_harq].round = 0; UE_info->UE_sched_ctrl[list_el].harq_processes[list_harq].round = 0;
UE_info->UE_sched_ctrl[list_el].harq_processes[list_harq].ndi = 0; UE_info->UE_sched_ctrl[list_el].harq_processes[list_harq].ndi = 0;
......
...@@ -476,7 +476,9 @@ typedef struct { ...@@ -476,7 +476,9 @@ typedef struct {
typedef void (*nr_pp_impl_dl)(module_id_t mod_id, typedef void (*nr_pp_impl_dl)(module_id_t mod_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
int num_slots_per_tdd); int num_slots_per_tdd,
int rnti_type,
int UE_id);
typedef void (*nr_pp_impl_ul)(module_id_t mod_id, typedef void (*nr_pp_impl_ul)(module_id_t mod_id,
frame_t frame, frame_t frame,
sub_frame_t slot, sub_frame_t slot,
......
...@@ -109,7 +109,7 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){ ...@@ -109,7 +109,7 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
ret = nr_ue_scheduler(NULL, ul_info); ret = nr_ue_scheduler(NULL, ul_info);
if (is_nr_UL_slot(mac->scc, ul_info->slot_tx) && get_softmodem_params()->do_ra) if (is_nr_UL_slot(mac->scc, ul_info->slot_tx) && (get_softmodem_params()->do_ra || get_softmodem_params()->sa_ra))
nr_ue_prach_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->thread_id); nr_ue_prach_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->thread_id);
switch(ret){ switch(ret){
......
...@@ -225,7 +225,7 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration ...@@ -225,7 +225,7 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration
(NR_CellGroupConfig_t *)NULL (NR_CellGroupConfig_t *)NULL
); );
if (get_softmodem_params()->phy_test > 0 || get_softmodem_params()->do_ra > 0) { if (get_softmodem_params()->phy_test > 0 || get_softmodem_params()->do_ra > 0 || get_softmodem_params()->sa_ra > 0) {
// This is for phytest only, emulate first X2 message if uecap.raw file is present // This is for phytest only, emulate first X2 message if uecap.raw file is present
FILE *fd; FILE *fd;
fd = fopen("uecap.raw","r"); fd = fopen("uecap.raw","r");
......
...@@ -98,7 +98,7 @@ int generate_CG_Config(gNB_RRC_INST *rrc, ...@@ -98,7 +98,7 @@ int generate_CG_Config(gNB_RRC_INST *rrc,
total_size = (enc_rval.encoded+7)>>3; total_size = (enc_rval.encoded+7)>>3;
FILE *fd; // file to be generated for nr-ue FILE *fd; // file to be generated for nr-ue
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0) { if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0 || get_softmodem_params()->sa_ra > 0) {
// This is for phytest only, emulate first X2 message if uecap.raw file is present // This is for phytest only, emulate first X2 message if uecap.raw file is present
LOG_I(RRC,"Dumping NR_RRCReconfiguration message (%jd bytes)\n",(enc_rval.encoded+7)>>3); LOG_I(RRC,"Dumping NR_RRCReconfiguration message (%jd bytes)\n",(enc_rval.encoded+7)>>3);
for (int i=0; i<(enc_rval.encoded+7)>>3; i++) { for (int i=0; i<(enc_rval.encoded+7)>>3; i++) {
...@@ -123,7 +123,7 @@ int generate_CG_Config(gNB_RRC_INST *rrc, ...@@ -123,7 +123,7 @@ int generate_CG_Config(gNB_RRC_INST *rrc,
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0) { if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0 || get_softmodem_params()->sa_ra > 0) {
LOG_I(RRC,"Dumping scg_RB_Config message (%jd bytes)\n",(enc_rval.encoded+7)>>3); LOG_I(RRC,"Dumping scg_RB_Config message (%jd bytes)\n",(enc_rval.encoded+7)>>3);
for (int i=0; i<(enc_rval.encoded+7)>>3; i++) { for (int i=0; i<(enc_rval.encoded+7)>>3; i++) {
......
...@@ -162,7 +162,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ ...@@ -162,7 +162,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
NR_RRCReconfiguration_IEs_t *reconfig_ies=calloc(1,sizeof(NR_RRCReconfiguration_IEs_t)); NR_RRCReconfiguration_IEs_t *reconfig_ies=calloc(1,sizeof(NR_RRCReconfiguration_IEs_t));
ue_context_p->ue_context.reconfig->criticalExtensions.choice.rrcReconfiguration = reconfig_ies; ue_context_p->ue_context.reconfig->criticalExtensions.choice.rrcReconfiguration = reconfig_ies;
carrier->initial_csi_index[rrc->Nb_ue] = 0; carrier->initial_csi_index[rrc->Nb_ue] = 0;
if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1){ if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1 || get_softmodem_params()->sa_ra == 1){
ue_context_p->ue_context.rb_config = calloc(1,sizeof(NR_RRCReconfiguration_t)); ue_context_p->ue_context.rb_config = calloc(1,sizeof(NR_RRCReconfiguration_t));
fill_default_rbconfig(ue_context_p->ue_context.rb_config); fill_default_rbconfig(ue_context_p->ue_context.rb_config);
} }
...@@ -255,7 +255,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_ ...@@ -255,7 +255,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
1024); 1024);
X2AP_ENDC_SGNB_ADDITION_REQ_ACK(msg).rrc_buffer_size = (enc_rval.encoded+7)>>3; X2AP_ENDC_SGNB_ADDITION_REQ_ACK(msg).rrc_buffer_size = (enc_rval.encoded+7)>>3;
itti_send_msg_to_task(TASK_X2AP, ENB_MODULE_ID_TO_INSTANCE(0), msg); //Check right id instead of hardcoding itti_send_msg_to_task(TASK_X2AP, ENB_MODULE_ID_TO_INSTANCE(0), msg); //Check right id instead of hardcoding
} else if (get_softmodem_params()->do_ra) { } else if (get_softmodem_params()->do_ra || get_softmodem_params()->sa_ra) {
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, rrc->module_id, GNB_FLAG_YES, ue_context_p->ue_id_rnti, 0, 0,rrc->module_id); PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, rrc->module_id, GNB_FLAG_YES, ue_context_p->ue_id_rnti, 0, 0,rrc->module_id);
} }
......
...@@ -79,7 +79,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -79,7 +79,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
secondaryCellGroup->cellGroupId = scg_id; secondaryCellGroup->cellGroupId = scg_id;
NR_RLC_BearerConfig_t *RLC_BearerConfig = calloc(1,sizeof(*RLC_BearerConfig)); NR_RLC_BearerConfig_t *RLC_BearerConfig = calloc(1,sizeof(*RLC_BearerConfig));
nr_rlc_bearer_init(RLC_BearerConfig); nr_rlc_bearer_init(RLC_BearerConfig);
if (get_softmodem_params()->do_ra) if ((get_softmodem_params()->do_ra) || (get_softmodem_params()->sa_ra))
nr_drb_config(RLC_BearerConfig->rlc_Config, NR_RLC_Config_PR_um_Bi_Directional); nr_drb_config(RLC_BearerConfig->rlc_Config, NR_RLC_Config_PR_um_Bi_Directional);
else else
nr_drb_config(RLC_BearerConfig->rlc_Config, NR_RLC_Config_PR_am); nr_drb_config(RLC_BearerConfig->rlc_Config, NR_RLC_Config_PR_am);
......
...@@ -458,7 +458,7 @@ NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char* rrc_config_path){ ...@@ -458,7 +458,7 @@ NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char* rrc_config_path){
RRC_LIST_INIT(NR_UE_rrc_inst[nr_ue].CSI_ReportConfig_list, NR_maxNrofCSI_ReportConfigurations); RRC_LIST_INIT(NR_UE_rrc_inst[nr_ue].CSI_ReportConfig_list, NR_maxNrofCSI_ReportConfigurations);
} }
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra==1) { if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra || get_softmodem_params()->sa_ra ==1) {
// read in files for RRCReconfiguration and RBconfig // read in files for RRCReconfiguration and RBconfig
FILE *fd; FILE *fd;
char filename[1024]; char filename[1024];
......
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