Commit 2c2640b9 authored by hardy's avatar hardy

Merge remote-tracking branch 'origin/NR_FR2_RRC_SSB' into integration_2020_wk50

 Conflicts:
	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
parents 034d576e 29a56fe5
...@@ -41,12 +41,10 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp) ...@@ -41,12 +41,10 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp)
int case_E[8] = {8, 12, 16, 20, 32, 36, 40, 44}; int case_E[8] = {8, 12, 16, 20, 32, 36, 40, 44};
switch(mu) { switch(mu) {
case NR_MU_0: // case A case NR_MU_0: // case A
n = i_ssb >> 1; n = i_ssb >> 1;
symbol = case_AC[i_ssb % 2] + 14*n; symbol = case_AC[i_ssb % 2] + 14*n;
break; break;
case NR_MU_1: case NR_MU_1:
if (type == 1){ // case B if (type == 1){ // case B
n = i_ssb >> 2; n = i_ssb >> 2;
...@@ -57,20 +55,16 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp) ...@@ -57,20 +55,16 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp)
symbol = case_AC[i_ssb % 2] + 14*n; symbol = case_AC[i_ssb % 2] + 14*n;
} }
break; break;
case NR_MU_3: // case D case NR_MU_3: // case D
n_temp = i_ssb >> 2; n_temp = i_ssb >> 2;
n = n_temp + (n_temp >> 2); n = n_temp + (n_temp >> 2);
symbol = case_BD[i_ssb % 4] + 28*n; symbol = case_BD[i_ssb % 4] + 28*n;
break; break;
case NR_MU_4: // case E case NR_MU_4: // case E
n_temp = i_ssb >> 3; n_temp = i_ssb >> 3;
n = n_temp + (n_temp >> 2); n = n_temp + (n_temp >> 2);
symbol = case_E[i_ssb % 8] + 56*n; symbol = case_E[i_ssb % 8] + 56*n;
break; break;
default: default:
AssertFatal(0==1, "Invalid numerology index %d for the synchronization block\n", mu); AssertFatal(0==1, "Invalid numerology index %d for the synchronization block\n", mu);
} }
......
...@@ -47,6 +47,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms, ...@@ -47,6 +47,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
int temp = 0, i, aa, max_val = 0, max_pos = 0; int temp = 0, i, aa, max_val = 0, max_pos = 0;
int diff; int diff;
short Re,Im,ncoef; short Re,Im,ncoef;
uint8_t sync_offset = 0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_IN);
...@@ -80,11 +81,14 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms, ...@@ -80,11 +81,14 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
// do not filter to have proactive timing adjustment // do not filter to have proactive timing adjustment
//max_pos_fil = max_pos; //max_pos_fil = max_pos;
if(subframe == 0)
{
diff = max_pos_fil - (frame_parms->nb_prefix_samples>>3); diff = max_pos_fil - (frame_parms->nb_prefix_samples>>3);
if ( abs(diff) < SYNCH_HYST ) if (frame_parms->freq_range==nr_FR2)
sync_offset = 2;
else
sync_offset = 0;
if ( abs(diff) < (SYNCH_HYST+sync_offset) )
ue->rx_offset = 0; ue->rx_offset = 0;
else else
ue->rx_offset = diff; ue->rx_offset = diff;
...@@ -134,5 +138,5 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms, ...@@ -134,5 +138,5 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
#endif //DEBUG_PHY #endif //DEBUG_PHY
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_OUT);
}
} }
...@@ -243,7 +243,7 @@ void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue, ...@@ -243,7 +243,7 @@ void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
unsigned int ssb_offset = ue->frame_parms.first_carrier_offset + ue->frame_parms.ssb_start_subcarrier; unsigned int ssb_offset = ue->frame_parms.first_carrier_offset + ue->frame_parms.ssb_start_subcarrier;
if (ssb_offset>= ue->frame_parms.ofdm_symbol_size) ssb_offset-=ue->frame_parms.ofdm_symbol_size; if (ssb_offset>= ue->frame_parms.ofdm_symbol_size) ssb_offset-=ue->frame_parms.ofdm_symbol_size;
symbol_offset = ue->frame_parms.ofdm_symbol_size*(ue->symbol_offset+1); symbol_offset = ue->frame_parms.ofdm_symbol_size*((ue->symbol_offset+1)%(ue->frame_parms.symbols_per_slot));
ue->measurements.rsrp[eNB_offset] = 0; ue->measurements.rsrp[eNB_offset] = 0;
......
...@@ -373,7 +373,10 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, ...@@ -373,7 +373,10 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
for (int rb=0;rb<coreset_nbr_rb;rb++,c_rb++) { for (int rb=0;rb<coreset_nbr_rb;rb++,c_rb++) {
c_rb_by6 = c_rb/6; c_rb_by6 = c_rb/6;
// skip zeros in frequency domain bitmap // skip zeros in frequency domain bitmap
while ((coreset_freq_dom[c_rb_by6>>3] & (1<<(c_rb_by6&7))) == 0) c_rb+=6; while ((coreset_freq_dom[c_rb_by6>>3] & (1<<(7-(c_rb_by6&7)))) == 0) {
c_rb+=6;
c_rb_by6 = c_rb/6;
}
LOG_DDD("c_rb=%d\n",c_rb); LOG_DDD("c_rb=%d\n",c_rb);
rxF=NULL; rxF=NULL;
......
...@@ -304,8 +304,11 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode, ...@@ -304,8 +304,11 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
if (ret == 0) { if (ret == 0) {
// sync at symbol ue->symbol_offset // sync at symbol ue->symbol_offset
// computing the offset wrt the beginning of the frame // computing the offset wrt the beginning of the frame
sync_pos_frame = (fp->ofdm_symbol_size + fp->nb_prefix_samples0)+((ue->symbol_offset)-1)*(fp->ofdm_symbol_size + fp->nb_prefix_samples); int mu = fp->numerology_index;
// number of symbols with different prefix length
// every 7*(1<<mu) symbols there is a different prefix length (38.211 5.3.1)
int n_symb_prefix0 = (ue->symbol_offset/(7*(1<<mu)))+1;
sync_pos_frame = n_symb_prefix0*(fp->ofdm_symbol_size + fp->nb_prefix_samples0)+(ue->symbol_offset-n_symb_prefix0)*(fp->ofdm_symbol_size + fp->nb_prefix_samples);
if (ue->ssb_offset < sync_pos_frame) if (ue->ssb_offset < sync_pos_frame)
ue->rx_offset = fp->samples_per_frame - sync_pos_frame + ue->ssb_offset; ue->rx_offset = fp->samples_per_frame - sync_pos_frame + ue->ssb_offset;
else else
......
...@@ -538,6 +538,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -538,6 +538,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
M = NR_POLAR_PBCH_E; M = NR_POLAR_PBCH_E;
nushift = (Lmax==4)? i_ssb&3 : i_ssb&7; nushift = (Lmax==4)? i_ssb&3 : i_ssb&7;
uint32_t unscrambling_mask = (Lmax==64)?0x100006D:0x1000041; uint32_t unscrambling_mask = (Lmax==64)?0x100006D:0x1000041;
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_E,0,0); nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_E,0,0);
//polar decoding de-rate matching //polar decoding de-rate matching
const t_nrPolar_params *currentPtr = nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL,1,&ue->polarList); const t_nrPolar_params *currentPtr = nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL,1,&ue->polarList);
......
...@@ -228,7 +228,7 @@ typedef struct { ...@@ -228,7 +228,7 @@ typedef struct {
/// Pointer to Msg3 payload for UL-grant /// Pointer to Msg3 payload for UL-grant
uint8_t *Msg3; uint8_t *Msg3;
/// Frame of last completed synch /// Frame of last completed synch
uint8_t sync_frame; uint16_t sync_frame;
/// Flag to indicate that prach is ready to start: it is enabled with an initial delay after the sync /// Flag to indicate that prach is ready to start: it is enabled with an initial delay after the sync
uint8_t init_msg1; uint8_t init_msg1;
} NR_PRACH_RESOURCES_t; } NR_PRACH_RESOURCES_t;
......
...@@ -311,7 +311,6 @@ void nr_ue_pbch_procedures(uint8_t gNB_id, ...@@ -311,7 +311,6 @@ void nr_ue_pbch_procedures(uint8_t gNB_id,
{ {
// int i; // int i;
//int pbch_tx_ant=0; //int pbch_tx_ant=0;
//uint8_t pbch_phase;
int ret = 0; int ret = 0;
//static uint8_t first_run = 1; //static uint8_t first_run = 1;
//uint8_t pbch_trials = 0; //uint8_t pbch_trials = 0;
...@@ -323,7 +322,7 @@ void nr_ue_pbch_procedures(uint8_t gNB_id, ...@@ -323,7 +322,7 @@ void nr_ue_pbch_procedures(uint8_t gNB_id,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PBCH_PROCEDURES, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PBCH_PROCEDURES, VCD_FUNCTION_IN);
//LOG_I(PHY,"[UE %d] Frame %d, Trying PBCH %d (NidCell %d, gNB_id %d)\n",ue->Mod_id,frame_rx,pbch_phase,ue->frame_parms.Nid_cell,gNB_id); LOG_D(PHY,"[UE %d] Frame %d, Trying PBCH (NidCell %d, gNB_id %d)\n",ue->Mod_id,frame_rx,ue->frame_parms.Nid_cell,gNB_id);
ret = nr_rx_pbch(ue, proc, ret = nr_rx_pbch(ue, proc,
ue->pbch_vars[gNB_id], ue->pbch_vars[gNB_id],
...@@ -1710,7 +1709,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ...@@ -1710,7 +1709,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
int frame_rx = proc->frame_rx; int frame_rx = proc->frame_rx;
int nr_slot_rx = proc->nr_slot_rx; int nr_slot_rx = proc->nr_slot_rx;
int slot_pbch; int slot_pbch;
//int slot_ssb; int slot_ssb;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0]; NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
fapi_nr_config_request_t *cfg = &ue->nrUE_config; fapi_nr_config_request_t *cfg = &ue->nrUE_config;
...@@ -1736,11 +1735,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ...@@ -1736,11 +1735,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb); get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_slot_rx, fp); slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_slot_rx, fp);
//slot_ssb = is_ssb_in_slot(cfg, frame_rx, nr_slot_rx, fp); slot_ssb = is_ssb_in_slot(cfg, frame_rx, nr_slot_rx, fp);
// looking for pbch only in slot where it is supposed to be // looking for pbch only in slot where it is supposed to be
if ((ue->decode_MIB == 1) && slot_pbch) if (slot_ssb) {
{
LOG_D(PHY," ------ PBCH ChannelComp/LLR: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx); LOG_D(PHY," ------ PBCH ChannelComp/LLR: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
for (int i=1; i<4; i++) { for (int i=1; i<4; i++) {
...@@ -1758,14 +1756,15 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ...@@ -1758,14 +1756,15 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats); stop_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
} }
//if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){ //if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){
nr_ue_rsrp_measurements(ue, proc, nr_slot_rx, 0); nr_ue_rsrp_measurements(ue,proc,nr_slot_rx,0);
//} //}
if ((ue->decode_MIB == 1) && slot_pbch) {
LOG_D(PHY," ------ Decode MIB: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
nr_ue_pbch_procedures(gNB_id, ue, proc, 0); nr_ue_pbch_procedures(gNB_id, ue, proc, 0);
if (ue->no_timing_correction==0) { if (ue->no_timing_correction==0) {
...@@ -1779,6 +1778,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ...@@ -1779,6 +1778,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
16384); 16384);
} }
} }
}
if ((frame_rx%64 == 0) && (nr_slot_rx==0)) { if ((frame_rx%64 == 0) && (nr_slot_rx==0)) {
printf("============================================\n"); printf("============================================\n");
...@@ -2165,7 +2165,7 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t ...@@ -2165,7 +2165,7 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_IN);
if (!prach_resources->init_msg1 && (frame_tx == (ue->prach_resources[gNB_id]->sync_frame + 150) % MAX_FRAME_NUMBER)){ if (!prach_resources->init_msg1 && ((MAX_FRAME_NUMBER+frame_tx-ue->prach_resources[gNB_id]->sync_frame)% MAX_FRAME_NUMBER)>150){
ue->prach_cnt = 0; ue->prach_cnt = 0;
prach_resources->init_msg1 = 1; prach_resources->init_msg1 = 1;
} }
......
...@@ -244,10 +244,10 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) { ...@@ -244,10 +244,10 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) {
scc->ssb_PositionsInBurst->choice.longBitmap.bits_unused = 0; scc->ssb_PositionsInBurst->choice.longBitmap.bits_unused = 0;
scc->ssb_PositionsInBurst->choice.longBitmap.buf = CALLOC(1,8); scc->ssb_PositionsInBurst->choice.longBitmap.buf = CALLOC(1,8);
for (int j=0; j<8; j++) { for (int j=0; j<8; j++) {
scc->ssb_PositionsInBurst->choice.longBitmap.buf[7-j] = 0; scc->ssb_PositionsInBurst->choice.longBitmap.buf[j] = 0;
curr_bit = (ssbmap>>(j<<3))&(0xff); curr_bit = (ssbmap>>(j<<3))&(0xff);
for (int i=0; i<8; i++) for (int i=0; i<8; i++)
scc->ssb_PositionsInBurst->choice.longBitmap.buf[7-j] |= (((curr_bit>>(7-i))&0x01)<<i); scc->ssb_PositionsInBurst->choice.longBitmap.buf[j] |= (((curr_bit>>(7-i))&0x01)<<i);
} }
} }
......
...@@ -937,14 +937,22 @@ int64_t table_6_3_3_2_4_prachConfig_Index [256][10] = { ...@@ -937,14 +937,22 @@ int64_t table_6_3_3_2_4_prachConfig_Index [256][10] = {
int get_format0(uint8_t index, int get_format0(uint8_t index,
uint8_t unpaired){ uint8_t unpaired,
frequency_range_t frequency_range){
uint16_t format; uint16_t format;
if (unpaired) if (unpaired) {
if (frequency_range==FR1)
format = table_6_3_3_2_3_prachConfig_Index[index][0]; format = table_6_3_3_2_3_prachConfig_Index[index][0];
else else
format = table_6_3_3_2_4_prachConfig_Index[index][0];
}
else {
if (frequency_range==FR1)
format = table_6_3_3_2_2_prachConfig_Index[index][0]; format = table_6_3_3_2_2_prachConfig_Index[index][0];
else
AssertFatal(0==1,"no paired spectrum for FR2\n");
}
return format; return format;
} }
...@@ -1402,11 +1410,12 @@ uint16_t table_63313[838] = { ...@@ -1402,11 +1410,12 @@ uint16_t table_63313[838] = {
uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config, uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config,
uint8_t nb_preambles, uint8_t nb_preambles,
uint8_t unpaired) { uint8_t unpaired,
frequency_range_t frequency_range) {
uint8_t config_index = rach_config->rach_ConfigGeneric.prach_ConfigurationIndex; uint8_t config_index = rach_config->rach_ConfigGeneric.prach_ConfigurationIndex;
uint8_t ncs_index = rach_config->rach_ConfigGeneric.zeroCorrelationZoneConfig; uint8_t ncs_index = rach_config->rach_ConfigGeneric.zeroCorrelationZoneConfig;
uint16_t format0 = get_format0(config_index, unpaired); uint16_t format0 = get_format0(config_index, unpaired, frequency_range);
uint16_t NCS = get_NCS(ncs_index, format0, rach_config->restrictedSetConfig); uint16_t NCS = get_NCS(ncs_index, format0, rach_config->restrictedSetConfig);
uint16_t L_ra = (rach_config->prach_RootSequenceIndex.present==NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139) ? 139 : 839; uint16_t L_ra = (rach_config->prach_RootSequenceIndex.present==NR_RACH_ConfigCommon__prach_RootSequenceIndex_PR_l139) ? 139 : 839;
uint16_t r,u,index,q,d_u,n_shift_ra,n_shift_ra_bar,d_start; uint16_t r,u,index,q,d_u,n_shift_ra,n_shift_ra_bar,d_start;
......
...@@ -44,6 +44,11 @@ ...@@ -44,6 +44,11 @@
#define MAX_TDM (7) // Maximum nb of PRACH occasions TDMed in a slot #define MAX_TDM (7) // Maximum nb of PRACH occasions TDMed in a slot
#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot #define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot
typedef enum frequency_range_e {
FR1 = 0,
FR2
} frequency_range_t;
// PRACH occasion details // PRACH occasion details
typedef struct prach_occasion_info { typedef struct prach_occasion_info {
uint8_t start_symbol; // 0 - 13 (14 symbols in a slot) uint8_t start_symbol; // 0 - 13 (14 symbols in a slot)
...@@ -159,11 +164,12 @@ uint8_t get_pusch_mcs_table(long *mcs_Table, ...@@ -159,11 +164,12 @@ uint8_t get_pusch_mcs_table(long *mcs_Table,
uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config, uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config,
uint8_t nb_preambles, uint8_t nb_preambles,
uint8_t unpaired); uint8_t unpaired,
frequency_range_t);
int ul_ant_bits(NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig,long transformPrecoder); int ul_ant_bits(NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig,long transformPrecoder);
int get_format0(uint8_t index, uint8_t unpaired); int get_format0(uint8_t index, uint8_t unpaired,frequency_range_t);
int64_t *get_prach_config_info(uint32_t pointa, int64_t *get_prach_config_info(uint32_t pointa,
uint8_t index, uint8_t index,
......
...@@ -147,7 +147,6 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, ...@@ -147,7 +147,6 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
fapi_nr_config_request_t *cfg = &mac->phy_config.config_req; fapi_nr_config_request_t *cfg = &mac->phy_config.config_req;
NR_ServingCellConfigCommon_t *scc = mac->scc; NR_ServingCellConfigCommon_t *scc = mac->scc;
int i; int i;
lte_frame_type_t frame_type;
mac->phy_config.Mod_id = module_id; mac->phy_config.Mod_id = module_id;
mac->phy_config.CC_id = cc_idP; mac->phy_config.CC_id = cc_idP;
...@@ -201,6 +200,10 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, ...@@ -201,6 +200,10 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
} }
} }
uint32_t band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
frequency_range_t frequency_range = band<100?FR1:FR2;
lte_frame_type_t frame_type;
get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing, &frame_type); get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing, &frame_type);
// cell config // cell config
...@@ -236,8 +239,8 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, ...@@ -236,8 +239,8 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
cfg->ssb_table.ssb_mask_list[0].ssb_mask = 0; cfg->ssb_table.ssb_mask_list[0].ssb_mask = 0;
cfg->ssb_table.ssb_mask_list[1].ssb_mask = 0; cfg->ssb_table.ssb_mask_list[1].ssb_mask = 0;
for (i=0; i<4; i++) { for (i=0; i<4; i++) {
cfg->ssb_table.ssb_mask_list[0].ssb_mask += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[i]<<i*8); cfg->ssb_table.ssb_mask_list[0].ssb_mask += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[3-i]<<i*8);
cfg->ssb_table.ssb_mask_list[1].ssb_mask += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[i+4]<<i*8); cfg->ssb_table.ssb_mask_list[1].ssb_mask += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[7-i]<<i*8);
} }
break; break;
default: default:
...@@ -310,7 +313,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, ...@@ -310,7 +313,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
cfg->prach_config.num_prach_fd_occasions_list[i].k1 = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart; cfg->prach_config.num_prach_fd_occasions_list[i].k1 = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig; cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences = compute_nr_root_seq(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup, nb_preambles, frame_type); cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences = compute_nr_root_seq(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup, nb_preambles, frame_type,frequency_range);
//cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences = ??? //cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences = ???
} }
......
...@@ -205,7 +205,7 @@ typedef struct { ...@@ -205,7 +205,7 @@ typedef struct {
/// Random-access procedure flag /// Random-access procedure flag
uint8_t RA_active; uint8_t RA_active;
/// Random-access window counter /// Random-access window counter
int8_t RA_window_cnt; int16_t RA_window_cnt;
/// Random-access Msg3 size in bytes /// Random-access Msg3 size in bytes
uint8_t RA_Msg3_size; uint8_t RA_Msg3_size;
/// Random-access prachMaskIndex /// Random-access prachMaskIndex
...@@ -292,10 +292,6 @@ typedef enum channel_bandwidth_e { ...@@ -292,10 +292,6 @@ typedef enum channel_bandwidth_e {
bw_100MHz = 0x32 bw_100MHz = 0x32
} channel_bandwidth_t; } channel_bandwidth_t;
typedef enum frequency_range_e {
FR1 = 0,
FR2
} frequency_range_t;
typedef struct { typedef struct {
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS: uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
......
...@@ -970,35 +970,30 @@ int8_t nr_ue_decode_mib(module_id_t module_id, ...@@ -970,35 +970,30 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
uint16_t frame_number_4lsb = 0; uint16_t frame_number_4lsb = 0;
for (int i=0; i<4; i++) for (int i=0; i<4; i++)
frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i); frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i);
//uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4] uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4]
uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5]
uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset; uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset;
//uint32_t ssb_index = 0; // TODO: ssb_index should obtain from L1 in case Lssb != 64
frame = frame << 4; frame = frame << 4;
frame = frame | frame_number_4lsb; frame = frame | frame_number_4lsb;
if(ssb_length == 64){ if(ssb_length == 64){
ssb_index = ssb_index & (( extra_bits >> 2 ) & 0x1C ); // { extra_bits[5:7], ssb_index[2:0] } for (int i=0; i<3; i++)
ssb_index += (((extra_bits>>(7-i))&0x01)<<(3+i));
}else{ }else{
if(ssb_subcarrier_offset_msb){ if(ssb_subcarrier_offset_msb){
ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10; ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10;
} }
} }
#ifdef DEBUG_MIB LOG_D(MAC,"system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]);
LOG_I(MAC,"system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]); LOG_D(MAC,"system frame number(with LSB): %d\n", (int)frame);
LOG_I(MAC,"system frame number(with LSB): %d\n", (int)frame); LOG_D(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon);
LOG_I(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon); LOG_D(MAC,"ssb carrier offset(with MSB): %d\n", (int)ssb_subcarrier_offset);
LOG_I(MAC,"ssb carrier offset(with MSB): %d\n", (int)ssb_subcarrier_offset); LOG_D(MAC,"dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position);
LOG_I(MAC,"dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position); LOG_D(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
LOG_I(MAC,"pdcch config sib1: %d\n", (int)mac->mib->pdcch_ConfigSIB1); LOG_D(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
LOG_I(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred); LOG_D(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit);
LOG_I(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection); LOG_D(MAC,"ssb index(extra bits): %d\n", (int)ssb_index);
LOG_I(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit);
LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index);
#endif
subcarrier_spacing_t scs_ssb = scs_30kHz; // default for subcarrier_spacing_t scs_ssb = scs_30kHz; // default for
//const uint32_t scs_index = 0; //const uint32_t scs_index = 0;
...@@ -1021,8 +1016,8 @@ int8_t nr_ue_decode_mib(module_id_t module_id, ...@@ -1021,8 +1016,8 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
int32_t num_rbs = -1; int32_t num_rbs = -1;
int32_t num_symbols = -1; int32_t num_symbols = -1;
int32_t rb_offset = -1; int32_t rb_offset = -1;
//LOG_I(MAC,"<<<<<<<<<configSIB1 %d index_4msb %d index_4lsb %d scs_ssb %d scs_pdcch %d switch %d ", LOG_D(MAC,"<<<<<<<<<configSIB1: controlResourceSetZero %d searchSpaceZero %d scs_ssb %d scs_pdcch %d switch %d ",
//mac->mib->pdcch_ConfigSIB1,index_4msb,index_4lsb,scs_ssb,scs_pdcch, (scs_ssb << 5)|scs_pdcch); index_4msb,index_4lsb,scs_ssb,scs_pdcch, (scs_ssb << 5)|scs_pdcch);
// type0-pdcch coreset // type0-pdcch coreset
switch( (scs_ssb << 5)|scs_pdcch ){ switch( (scs_ssb << 5)|scs_pdcch ){
......
...@@ -124,6 +124,9 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm ...@@ -124,6 +124,9 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
} }
} }
uint32_t band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
frequency_range_t frequency_range = band<100?FR1:FR2;
lte_frame_type_t frame_type; lte_frame_type_t frame_type;
get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing, &frame_type); get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing, &frame_type);
RC.nrmac[Mod_idP]->common_channels[0].frame_type = frame_type; RC.nrmac[Mod_idP]->common_channels[0].frame_type = frame_type;
...@@ -213,7 +216,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm ...@@ -213,7 +216,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig; cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.tl.tag = NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG; cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.tl.tag = NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences.value = compute_nr_root_seq(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup,nb_preambles, frame_type); cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences.value = compute_nr_root_seq(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup,nb_preambles, frame_type, frequency_range);
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences.tl.tag = NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG; cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences.tl.tag = NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences.value = 1; cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences.value = 1;
...@@ -252,8 +255,8 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm ...@@ -252,8 +255,8 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
cfg->ssb_table.ssb_mask_list[0].ssb_mask.value = 0; cfg->ssb_table.ssb_mask_list[0].ssb_mask.value = 0;
cfg->ssb_table.ssb_mask_list[1].ssb_mask.value = 0; cfg->ssb_table.ssb_mask_list[1].ssb_mask.value = 0;
for (i=0; i<4; i++) { for (i=0; i<4; i++) {
cfg->ssb_table.ssb_mask_list[0].ssb_mask.value += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[i+4]<<i*8); cfg->ssb_table.ssb_mask_list[0].ssb_mask.value += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[3-i]<<i*8);
cfg->ssb_table.ssb_mask_list[1].ssb_mask.value += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[i]<<i*8); cfg->ssb_table.ssb_mask_list[1].ssb_mask.value += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[7-i]<<i*8);
} }
break; break;
default: default:
......
...@@ -42,6 +42,8 @@ ...@@ -42,6 +42,8 @@
#include "SIMULATION/TOOLS/sim.h" // for taus #include "SIMULATION/TOOLS/sim.h" // for taus
extern RAN_CONTEXT_t RC; extern RAN_CONTEXT_t RC;
extern const uint8_t nr_slots_per_frame[5];
extern uint16_t sl_ahead;
uint8_t DELTA[4]= {2,3,4,6}; uint8_t DELTA[4]= {2,3,4,6};
...@@ -112,12 +114,14 @@ int16_t ssb_index_from_prach(module_id_t module_idP, ...@@ -112,12 +114,14 @@ int16_t ssb_index_from_prach(module_id_t module_idP,
slot_index = 0; //For scs = 30khz and 120khz slot_index = 0; //For scs = 30khz and 120khz
} }
// prach_occasion_id = subframe_index * N_t_slot * N_RA_slot * fdm + N_RA_slot_index * N_t_slot * fdm + freq_index + fdm * start_symbol_index; // prach_occasion_id = subframe_index * N_t_slot * N_RA_slot * fdm + N_RA_slot_index * N_t_slot * fdm + freq_index + fdm * start_symbol_index;
prach_occasion_id = (((frameP % (cc->max_association_period * config_period))/config_period)*cc->total_prach_occasions_per_config_period) + (RA_sfn_index + slot_index) * N_t_slot * fdm + start_symbol_index * fdm + freq_index; prach_occasion_id = (((frameP % (cc->max_association_period * config_period))/config_period)*cc->total_prach_occasions_per_config_period) +
//one RO is shared by one or more SSB (RA_sfn_index + slot_index) * N_t_slot * fdm + start_symbol_index * fdm + freq_index;
//one RO is shared by one or more SSB
if(num_ssb_per_RO <= 1 ) if(num_ssb_per_RO <= 1 )
index = (int) (prach_occasion_id / (int)(1/num_ssb_per_RO)) % num_active_ssb; index = (int) (prach_occasion_id / (int)(1/num_ssb_per_RO)) % num_active_ssb;
//one SSB have more than one continuous RO //one SSB have more than one continuous RO
else if ( num_ssb_per_RO > 1) { else if ( num_ssb_per_RO > 1) {
index = (prach_occasion_id * (int)num_ssb_per_RO)% num_active_ssb ; index = (prach_occasion_id * (int)num_ssb_per_RO)% num_active_ssb ;
for(int j = 0;j < num_ssb_per_RO;j++) { for(int j = 0;j < num_ssb_per_RO;j++) {
...@@ -126,9 +130,13 @@ int16_t ssb_index_from_prach(module_id_t module_idP, ...@@ -126,9 +130,13 @@ int16_t ssb_index_from_prach(module_id_t module_idP,
} }
} }
LOG_D(MAC, "Frame %d, Slot %d: Prach Occasion id = %d ssb per RO = %f number of active SSB %u index = %d fdm %u symbol index %u freq_index %u total_RApreambles %u\n", frameP, slotP, prach_occasion_id, num_ssb_per_RO, num_active_ssb, index, fdm, start_symbol_index, freq_index, total_RApreambles); LOG_D(MAC, "Frame %d, Slot %d: Prach Occasion id = %d ssb per RO = %f number of active SSB %u index = %d fdm %u symbol index %u freq_index %u total_RApreambles %u\n",
frameP, slotP, prach_occasion_id, num_ssb_per_RO, num_active_ssb, index, fdm, start_symbol_index, freq_index, total_RApreambles);
return index; return index;
} }
//Compute Total active SSBs and RO available //Compute Total active SSBs and RO available
void find_SSB_and_RO_available(module_id_t module_idP) { void find_SSB_and_RO_available(module_id_t module_idP) {
...@@ -190,8 +198,8 @@ void find_SSB_and_RO_available(module_id_t module_idP) { ...@@ -190,8 +198,8 @@ void find_SSB_and_RO_available(module_id_t module_idP) {
cc->total_prach_occasions = total_RA_occasions - unused_RA_occasion; cc->total_prach_occasions = total_RA_occasions - unused_RA_occasion;
cc->num_active_ssb = num_active_ssb; cc->num_active_ssb = num_active_ssb;
LOG_I(MAC, "Total available RO %d, num of active SSB %d: unused RO = %d max_association_period %u N_RA_sfn %u \n", cc->total_prach_occasions, cc->num_active_ssb, unused_RA_occasion, max_association_period, N_RA_sfn); LOG_I(MAC, "Total available RO %d, num of active SSB %d: unused RO = %d max_association_period %u N_RA_sfn %u \n",
cc->total_prach_occasions, cc->num_active_ssb, unused_RA_occasion, max_association_period, N_RA_sfn);
} }
void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
...@@ -202,9 +210,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP ...@@ -202,9 +210,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[0][slotP]; nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req_ahead[0][slotP];
nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0]; nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[module_idP]->config[0];
if (!is_nr_UL_slot(scc,slotP)) if (is_nr_UL_slot(scc,slotP)) {
return;
uint8_t config_index = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex; uint8_t config_index = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;
uint8_t mu,N_dur,N_t_slot,start_symbol = 0,N_RA_slot; uint8_t mu,N_dur,N_t_slot,start_symbol = 0,N_RA_slot;
uint16_t RA_sfn_index = -1; uint16_t RA_sfn_index = -1;
...@@ -220,7 +226,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP ...@@ -220,7 +226,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
uint8_t fdm = cfg->prach_config.num_prach_fd_occasions.value; uint8_t fdm = cfg->prach_config.num_prach_fd_occasions.value;
// prach is scheduled according to configuration index and tables 6.3.3.2.2 to 6.3.3.2.4 // prach is scheduled according to configuration index and tables 6.3.3.2.2 to 6.3.3.2.4
if (!get_nr_prach_info_from_index(config_index, if ( get_nr_prach_info_from_index(config_index,
(int)frameP, (int)frameP,
(int)slotP, (int)slotP,
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA, scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA,
...@@ -232,68 +238,54 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP ...@@ -232,68 +238,54 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
&N_dur, &N_dur,
&RA_sfn_index, &RA_sfn_index,
&N_RA_slot, &N_RA_slot,
&config_period) ) &config_period) ) {
return;
uint16_t format0 = format&0xff; // first column of format from table uint16_t format0 = format&0xff; // first column of format from table
uint16_t format1 = (format>>8)&0xff; // second column of format from table uint16_t format1 = (format>>8)&0xff; // second column of format from table
if (N_RA_slot > 1) { // more than 1 PRACH slot in a subframe if (N_RA_slot > 1) { //more than 1 PRACH slot in a subframe
slot_index = slotP % 2 == 1; if (slotP%2 == 1)
} else if (N_RA_slot <= 1) { // 1 PRACH slot in a subframe slot_index = 1;
else
slot_index = 0;
}else if (N_RA_slot <= 1) { //1 PRACH slot in a subframe
slot_index = 0; slot_index = 0;
} }
AssertFatal(UL_tti_req->SFN == frameP && UL_tti_req->Slot == slotP, UL_tti_req->SFN = frameP;
"%d.%d UL_tti_req frame.slot %d.%d does not match PRACH %d.%d\n", UL_tti_req->Slot = slotP;
frameP, slotP,
UL_tti_req->SFN,
UL_tti_req->Slot,
frameP, slotP);
for (int fdm_index=0; fdm_index < fdm; fdm_index++) { // one structure per frequency domain occasion for (int fdm_index=0; fdm_index < fdm; fdm_index++) { // one structure per frequency domain occasion
for (int td_index = 0; td_index < N_t_slot; td_index++) { for (int td_index=0; td_index<N_t_slot; td_index++) {
prach_occasion_id = (((frameP % (cc->max_association_period * config_period)) / config_period)
* cc->total_prach_occasions_per_config_period) prach_occasion_id = (((frameP % (cc->max_association_period * config_period))/config_period) * cc->total_prach_occasions_per_config_period) +
+ (RA_sfn_index + slot_index) * N_t_slot * fdm + td_index * fdm + fdm_index; (RA_sfn_index + slot_index) * N_t_slot * fdm + td_index * fdm + fdm_index;
if (!((prach_occasion_id < cc->total_prach_occasions) && (td_index == 0)))
continue; if((prach_occasion_id < cc->total_prach_occasions) && (td_index == 0)){
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE;
NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE; UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_prach_pdu_t);
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = nfapi_nr_prach_pdu_t *prach_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].prach_pdu;
sizeof(nfapi_nr_prach_pdu_t); memset(prach_pdu,0,sizeof(nfapi_nr_prach_pdu_t));
nfapi_nr_prach_pdu_t *prach_pdu = UL_tti_req->n_pdus+=1;
&UL_tti_req->pdus_list[UL_tti_req->n_pdus].prach_pdu;
memset(prach_pdu, 0, sizeof(nfapi_nr_prach_pdu_t));
UL_tti_req->n_pdus += 1;
// filling the prach fapi structure // filling the prach fapi structure
prach_pdu->phys_cell_id = *scc->physCellId; prach_pdu->phys_cell_id = *scc->physCellId;
prach_pdu->num_prach_ocas = N_t_slot; prach_pdu->num_prach_ocas = N_t_slot;
prach_pdu->prach_start_symbol = start_symbol; prach_pdu->prach_start_symbol = start_symbol;
prach_pdu->num_ra = fdm_index; prach_pdu->num_ra = fdm_index;
prach_pdu->num_cs = get_NCS( prach_pdu->num_cs = get_NCS(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig,
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice
.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig,
format0, format0,
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig);
.setup->restrictedSetConfig);
LOG_D(MAC, LOG_D(MAC, "Frame %d, Slot %d: Prach Occasion id = %u fdm index = %u start symbol = %u slot index = %u subframe index = %u \n",
"Frame %d, Slot %d: Prach Occasion id = %u fdm index = %u start " frameP, slotP,
"symbol = %u slot index = %u subframe index = %u \n", prach_occasion_id, prach_pdu->num_ra,
frameP,
slotP,
prach_occasion_id,
prach_pdu->num_ra,
prach_pdu->prach_start_symbol, prach_pdu->prach_start_symbol,
slot_index, slot_index, RA_sfn_index);
RA_sfn_index);
// SCF PRACH PDU format field does not consider A1/B1 etc. possibilities // SCF PRACH PDU format field does not consider A1/B1 etc. possibilities
// We added 9 = A1/B1 10 = A2/B2 11 A3/B3 // We added 9 = A1/B1 10 = A2/B2 11 A3/B3
if (format1 != 0xff) { if (format1!=0xff) {
switch (format0) { switch(format0) {
case 0xa1: case 0xa1:
prach_pdu->prach_format = 11; prach_pdu->prach_format = 11;
break; break;
...@@ -304,12 +296,11 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP ...@@ -304,12 +296,11 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
prach_pdu->prach_format = 13; prach_pdu->prach_format = 13;
break; break;
default: default:
AssertFatal( AssertFatal(1==0,"Only formats A1/B1 A2/B2 A3/B3 are valid for dual format");
1 == 0,
"Only formats A1/B1 A2/B2 A3/B3 are valid for dual format");
} }
} else { }
switch (format0) { else{
switch(format0) {
case 0: case 0:
prach_pdu->prach_format = 0; prach_pdu->prach_format = 0;
break; break;
...@@ -344,23 +335,11 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP ...@@ -344,23 +335,11 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
prach_pdu->prach_format = 10; prach_pdu->prach_format = 10;
break; break;
default: default:
AssertFatal(1 == 0, "Invalid PRACH format"); AssertFatal(1==0,"Invalid PRACH format");
}
}
} }
} }
const int start_rb = cfg->prach_config.num_prach_fd_occasions_list[fdm_index].k1.value;
const int pusch_mu = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
const int num_rb = get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, pusch_mu);
uint16_t *vrb_map_UL =
&RC.nrmac[module_idP]->common_channels[0].vrb_map_UL[slotP * 275];
const uint16_t symb_mask = ((1 << N_dur) - 1) << start_symbol;
for (int i = start_rb; i < start_rb + num_rb; ++i) {
AssertFatal((vrb_map_UL[i] & symb_mask) == 0,
"cannot reserve resources for PRACH: at RB %d, "
"vrb_map_UL %x for symbols %x!\n",
i,
vrb_map_UL[i],
symb_mask);
vrb_map_UL[i] |= symb_mask;
} }
} }
} }
...@@ -392,6 +371,13 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, ...@@ -392,6 +371,13 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
*msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot *msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot
*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1); *msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
// we can't schedule msg2 before sl_ahead since prach
int eff_slot = *msg2_slot+(*msg2_frame-rach_frame)*nr_slots_per_frame[mu];
if ((eff_slot-rach_slot)<=sl_ahead) {
*msg2_slot = (*msg2_slot+tdd_period_slot)%nr_slots_per_frame[mu];
*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
}
switch(response_window){ switch(response_window){
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1: case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1:
slot_window = 1; slot_window = 1;
...@@ -424,12 +410,11 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, ...@@ -424,12 +410,11 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
// slot and frame limit to transmit msg2 according to response window // slot and frame limit to transmit msg2 according to response window
uint8_t slot_limit = (rach_slot + slot_window)%nr_slots_per_frame[mu]; uint8_t slot_limit = (rach_slot + slot_window)%nr_slots_per_frame[mu];
//uint8_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1); uint8_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1);
// go to previous slot if the current scheduled slot is beyond the response window // go to previous slot if the current scheduled slot is beyond the response window
// and if the slot is not among the PDCCH monitored ones (38.213 10.1) // and if the slot is not among the PDCCH monitored ones (38.213 10.1)
while ((*msg2_slot>slot_limit) || ((*msg2_frame*nr_slots_per_frame[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0)) { while (((*msg2_slot>slot_limit)&&(*msg2_frame>frame_limit)) || ((*msg2_frame*nr_slots_per_frame[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0)) {
if((*msg2_slot%tdd_period_slot) > 0) if((*msg2_slot%tdd_period_slot) > 0)
(*msg2_slot)--; (*msg2_slot)--;
else else
...@@ -1040,11 +1025,7 @@ void nr_fill_rar(uint8_t Mod_idP, ...@@ -1040,11 +1025,7 @@ void nr_fill_rar(uint8_t Mod_idP,
uint8_t * dlsch_buffer, uint8_t * dlsch_buffer,
nfapi_nr_pusch_pdu_t *pusch_pdu){ nfapi_nr_pusch_pdu_t *pusch_pdu){
LOG_I(MAC, LOG_I(MAC, "[gNB] Generate RAR MAC PDU frame %d slot %d preamble index %u\n", ra->Msg2_frame, ra-> Msg2_slot, ra->preamble_index);
"[gNB] Generate RAR MAC PDU frame %d slot %d preamble index %u\n",
ra->Msg2_frame,
ra->Msg2_slot,
ra->preamble_index);
NR_RA_HEADER_RAPID *rarh = (NR_RA_HEADER_RAPID *) dlsch_buffer; NR_RA_HEADER_RAPID *rarh = (NR_RA_HEADER_RAPID *) dlsch_buffer;
NR_MAC_RAR *rar = (NR_MAC_RAR *) (dlsch_buffer + 1); NR_MAC_RAR *rar = (NR_MAC_RAR *) (dlsch_buffer + 1);
unsigned char csi_req = 0, tpc_command; unsigned char csi_req = 0, tpc_command;
......
...@@ -155,7 +155,7 @@ void compute_csi_bitlen (NR_CellGroupConfig_t *secondaryCellGroup, NR_UE_info_t ...@@ -155,7 +155,7 @@ void compute_csi_bitlen (NR_CellGroupConfig_t *secondaryCellGroup, NR_UE_info_t
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].diff_rsrp_bitlen =0; UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].diff_rsrp_bitlen =0;
} }
LOG_I (MAC, "UCI: CSI_bit len : ssbri %d, rsrp: %d, diff_rsrp: %d", LOG_I (MAC, "UCI: CSI_bit len : ssbri %d, rsrp: %d, diff_rsrp: %d\n",
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].cri_ssbri_bitlen, UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].cri_ssbri_bitlen,
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].rsrp_bitlen, UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].rsrp_bitlen,
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].diff_rsrp_bitlen); UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].diff_rsrp_bitlen);
...@@ -221,7 +221,7 @@ void nr_csi_meas_reporting(int Mod_idP, ...@@ -221,7 +221,7 @@ void nr_csi_meas_reporting(int Mod_idP,
if ( (frame%(period/n_slots_frame)==(offset/n_slots_frame)) && (slot==((sched_slot/slots_per_tdd)*slots_per_tdd))) { if ( (frame%(period/n_slots_frame)==(offset/n_slots_frame)) && (slot==((sched_slot/slots_per_tdd)*slots_per_tdd))) {
// we are scheduling pucch for csi in the first pucch occasion (this comes before ack/nack) // we are scheduling pucch for csi in the first pucch occasion (this comes before ack/nack)
curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[sched_slot-slots_per_tdd+ul_slots][0]; curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[(sched_slot%slots_per_tdd)-slots_per_tdd+ul_slots][0];
NR_PUCCH_CSI_Resource_t *pucchcsires = csirep->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list.array[0]; NR_PUCCH_CSI_Resource_t *pucchcsires = csirep->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list.array[0];
......
...@@ -441,6 +441,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -441,6 +441,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
"reset RA state information for RA-RNTI %04x/index %d\n", "reset RA state information for RA-RNTI %04x/index %d\n",
ra->rnti, ra->rnti,
i); i);
return; return;
} }
} }
......
...@@ -57,9 +57,22 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -57,9 +57,22 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n"); AssertFatal(servingcellconfigcommon!=NULL,"servingcellconfigcommon is null\n");
AssertFatal(secondaryCellGroup!=NULL,"secondaryCellGroup is null\n"); AssertFatal(secondaryCellGroup!=NULL,"secondaryCellGroup is null\n");
if(servingcellconfigcommon->ssb_PositionsInBurst->present !=2) uint64_t bitmap=0;
AssertFatal(1==0,"Currenrly implemented only for medium size SSB bitmap\n"); switch (servingcellconfigcommon->ssb_PositionsInBurst->present) {
uint8_t bitmap = servingcellconfigcommon->ssb_PositionsInBurst->choice.mediumBitmap.buf[0]; case 1 :
bitmap = ((uint64_t) servingcellconfigcommon->ssb_PositionsInBurst->choice.shortBitmap.buf[0])<<56;
break;
case 2 :
bitmap = ((uint64_t) servingcellconfigcommon->ssb_PositionsInBurst->choice.mediumBitmap.buf[0])<<56;
break;
case 3 :
for (int i=0; i<8; i++) {
bitmap |= (((uint64_t) servingcellconfigcommon->ssb_PositionsInBurst->choice.longBitmap.buf[i])<<((7-i)*8));
}
break;
default:
AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", servingcellconfigcommon->ssb_PositionsInBurst->present);
}
memset(secondaryCellGroup,0,sizeof(NR_CellGroupConfig_t)); memset(secondaryCellGroup,0,sizeof(NR_CellGroupConfig_t));
secondaryCellGroup->cellGroupId = scg_id; secondaryCellGroup->cellGroupId = scg_id;
...@@ -251,9 +264,9 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -251,9 +264,9 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList=calloc(1,sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList)); secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList=calloc(1,sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList));
int n_ssb = 0; int n_ssb = 0;
NR_TCI_State_t *tcic[8]; NR_TCI_State_t *tcic[64];
for (int i=0;i<8;i++) { for (int i=0;i<64;i++) {
if ((bitmap>>(7-i))&0x01){ if ((bitmap>>(63-i))&0x01){
tcic[i]=calloc(1,sizeof(*tcic[i])); tcic[i]=calloc(1,sizeof(*tcic[i]));
tcic[i]->tci_StateId=n_ssb; tcic[i]->tci_StateId=n_ssb;
tcic[i]->qcl_Type1.cell=NULL; tcic[i]->qcl_Type1.cell=NULL;
...@@ -417,11 +430,20 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -417,11 +430,20 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=NULL; bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet)); bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet));
int curr_bwp = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
NR_ControlResourceSet_t *coreset = calloc(1,sizeof(*coreset)); NR_ControlResourceSet_t *coreset = calloc(1,sizeof(*coreset));
coreset->controlResourceSetId=1; coreset->controlResourceSetId=1;
// frequencyDomainResources '11111111 11111111 00000000 00000000 00000000 00000'B, // frequency domain resources depends on BWP size
// options are 24, 48 or 96
coreset->frequencyDomainResources.buf = calloc(1,6); coreset->frequencyDomainResources.buf = calloc(1,6);
if (curr_bwp < 48)
coreset->frequencyDomainResources.buf[0] = 0xf0;
else
coreset->frequencyDomainResources.buf[0] = 0xff; coreset->frequencyDomainResources.buf[0] = 0xff;
if (curr_bwp < 96)
coreset->frequencyDomainResources.buf[1] = 0;
else
coreset->frequencyDomainResources.buf[1] = 0xff; coreset->frequencyDomainResources.buf[1] = 0xff;
coreset->frequencyDomainResources.buf[2] = 0; coreset->frequencyDomainResources.buf[2] = 0;
coreset->frequencyDomainResources.buf[3] = 0; coreset->frequencyDomainResources.buf[3] = 0;
...@@ -434,9 +456,9 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -434,9 +456,9 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
coreset->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle; coreset->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
coreset->tci_StatesPDCCH_ToAddList=calloc(1,sizeof(*coreset->tci_StatesPDCCH_ToAddList)); coreset->tci_StatesPDCCH_ToAddList=calloc(1,sizeof(*coreset->tci_StatesPDCCH_ToAddList));
NR_TCI_StateId_t *tci[8]; NR_TCI_StateId_t *tci[64];
for (int i=0;i<8;i++) { for (int i=0;i<64;i++) {
if ((bitmap>>(7-i))&0x01){ if ((bitmap>>(63-i))&0x01){
tci[i]=calloc(1,sizeof(*tci[i])); tci[i]=calloc(1,sizeof(*tci[i]));
*tci[i] = i; *tci[i] = i;
ASN_SEQUENCE_ADD(&coreset->tci_StatesPDCCH_ToAddList->list,tci[i]); ASN_SEQUENCE_ADD(&coreset->tci_StatesPDCCH_ToAddList->list,tci[i]);
...@@ -536,6 +558,11 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -536,6 +558,11 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
ss2->nrofCandidates=calloc(1,sizeof(*ss2->nrofCandidates)); ss2->nrofCandidates=calloc(1,sizeof(*ss2->nrofCandidates));
ss2->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0; ss2->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
ss2->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0; ss2->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
if (curr_bwp < 48)
ss2->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n1;
else if (curr_bwp < 96)
ss2->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n2;
else
ss2->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n4; ss2->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n4;
ss2->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0; ss2->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss2->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0; ss2->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
...@@ -658,9 +685,9 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -658,9 +685,9 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
n_ssb = 0; n_ssb = 0;
NR_TCI_State_t *tcid[8]; NR_TCI_State_t *tcid[64];
for (int i=0;i<8;i++) { for (int i=0;i<64;i++) {
if ((bitmap>>(7-i))&0x01){ if ((bitmap>>(63-i))&0x01){
tcid[i]=calloc(1,sizeof(*tcid[i])); tcid[i]=calloc(1,sizeof(*tcid[i]));
tcid[i]->tci_StateId=n_ssb; tcid[i]->tci_StateId=n_ssb;
tcid[i]->qcl_Type1.cell=NULL; tcid[i]->qcl_Type1.cell=NULL;
...@@ -930,7 +957,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -930,7 +957,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
NR_PUCCH_Resource_t *pucchres2=calloc(1,sizeof(*pucchres2)); NR_PUCCH_Resource_t *pucchres2=calloc(1,sizeof(*pucchres2));
NR_PUCCH_Resource_t *pucchres3=calloc(1,sizeof(*pucchres3)); NR_PUCCH_Resource_t *pucchres3=calloc(1,sizeof(*pucchres3));
pucchres0->pucch_ResourceId=1; pucchres0->pucch_ResourceId=1;
pucchres0->startingPRB=48; pucchres0->startingPRB=8;
pucchres0->intraSlotFrequencyHopping=NULL; pucchres0->intraSlotFrequencyHopping=NULL;
pucchres0->secondHopPRB=NULL; pucchres0->secondHopPRB=NULL;
pucchres0->format.present= NR_PUCCH_Resource__format_PR_format0; pucchres0->format.present= NR_PUCCH_Resource__format_PR_format0;
...@@ -941,7 +968,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -941,7 +968,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres0); ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres0);
pucchres1->pucch_ResourceId=2; pucchres1->pucch_ResourceId=2;
pucchres1->startingPRB=48; pucchres1->startingPRB=8;
pucchres1->intraSlotFrequencyHopping=NULL; pucchres1->intraSlotFrequencyHopping=NULL;
pucchres1->secondHopPRB=NULL; pucchres1->secondHopPRB=NULL;
pucchres1->format.present= NR_PUCCH_Resource__format_PR_format0; pucchres1->format.present= NR_PUCCH_Resource__format_PR_format0;
...@@ -952,23 +979,23 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -952,23 +979,23 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres1); ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres1);
pucchres2->pucch_ResourceId=3; pucchres2->pucch_ResourceId=3;
pucchres2->startingPRB=40; pucchres2->startingPRB=0;
pucchres2->intraSlotFrequencyHopping=NULL; pucchres2->intraSlotFrequencyHopping=NULL;
pucchres2->secondHopPRB=NULL; pucchres2->secondHopPRB=NULL;
pucchres2->format.present= NR_PUCCH_Resource__format_PR_format2; pucchres2->format.present= NR_PUCCH_Resource__format_PR_format2;
pucchres2->format.choice.format2=calloc(1,sizeof(*pucchres2->format.choice.format2)); pucchres2->format.choice.format2=calloc(1,sizeof(*pucchres2->format.choice.format2));
pucchres2->format.choice.format2->nrofPRBs=4; pucchres2->format.choice.format2->nrofPRBs=8;
pucchres2->format.choice.format2->nrofSymbols=1; pucchres2->format.choice.format2->nrofSymbols=1;
pucchres2->format.choice.format2->startingSymbolIndex=13; pucchres2->format.choice.format2->startingSymbolIndex=13;
ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres2); ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres2);
pucchres3->pucch_ResourceId=4; pucchres3->pucch_ResourceId=4;
pucchres3->startingPRB=40; pucchres3->startingPRB=0;
pucchres3->intraSlotFrequencyHopping=NULL; pucchres3->intraSlotFrequencyHopping=NULL;
pucchres3->secondHopPRB=NULL; pucchres3->secondHopPRB=NULL;
pucchres3->format.present= NR_PUCCH_Resource__format_PR_format2; pucchres3->format.present= NR_PUCCH_Resource__format_PR_format2;
pucchres3->format.choice.format2=calloc(1,sizeof(*pucchres3->format.choice.format2)); pucchres3->format.choice.format2=calloc(1,sizeof(*pucchres3->format.choice.format2));
pucchres3->format.choice.format2->nrofPRBs=4; pucchres3->format.choice.format2->nrofPRBs=8;
pucchres3->format.choice.format2->nrofSymbols=1; pucchres3->format.choice.format2->nrofSymbols=1;
pucchres3->format.choice.format2->startingSymbolIndex=12; pucchres3->format.choice.format2->startingSymbolIndex=12;
ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres3); ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres3);
...@@ -1091,45 +1118,14 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -1091,45 +1118,14 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
NR_CSI_SSB_ResourceSet_t *ssbresset0 = calloc(1,sizeof(*ssbresset0)); NR_CSI_SSB_ResourceSet_t *ssbresset0 = calloc(1,sizeof(*ssbresset0));
ssbresset0->csi_SSB_ResourceSetId=0; ssbresset0->csi_SSB_ResourceSetId=0;
if ((bitmap>>7)&0x01){
NR_SSB_Index_t *ssbresset00=calloc(1,sizeof(*ssbresset00)); NR_SSB_Index_t *ssbresset[64];
*ssbresset00=0; for (int i=0;i<64;i++) {
ASN_SEQUENCE_ADD(&ssbresset0->csi_SSB_ResourceList.list,ssbresset00); if ((bitmap>>(63-i))&0x01){
} ssbresset[i]=calloc(1,sizeof(*ssbresset[i]));
if ((bitmap>>6)&0x01) { *ssbresset[i] = i;
NR_SSB_Index_t *ssbresset01=calloc(1,sizeof(*ssbresset01)); ASN_SEQUENCE_ADD(&ssbresset0->csi_SSB_ResourceList.list,ssbresset[i]);
*ssbresset01=1;
ASN_SEQUENCE_ADD(&ssbresset0->csi_SSB_ResourceList.list,ssbresset01);
}
if ((bitmap>>5)&0x01) {
NR_SSB_Index_t *ssbresset02=calloc(1,sizeof(*ssbresset02));
*ssbresset02=2;
ASN_SEQUENCE_ADD(&ssbresset0->csi_SSB_ResourceList.list,ssbresset02);
}
if ((bitmap>>4)&0x01) {
NR_SSB_Index_t *ssbresset03=calloc(1,sizeof(*ssbresset03));
*ssbresset03=3;
ASN_SEQUENCE_ADD(&ssbresset0->csi_SSB_ResourceList.list,ssbresset03);
}
if ((bitmap>>3)&0x01) {
NR_SSB_Index_t *ssbresset04=calloc(1,sizeof(*ssbresset04));
*ssbresset04=4;
ASN_SEQUENCE_ADD(&ssbresset0->csi_SSB_ResourceList.list,ssbresset04);
}
if ((bitmap>>2)&0x01) {
NR_SSB_Index_t *ssbresset05=calloc(1,sizeof(*ssbresset05));
*ssbresset05=5;
ASN_SEQUENCE_ADD(&ssbresset0->csi_SSB_ResourceList.list,ssbresset05);
}
if ((bitmap>>1)&0x01) {
NR_SSB_Index_t *ssbresset06=calloc(1,sizeof(*ssbresset06));
*ssbresset06=6;
ASN_SEQUENCE_ADD(&ssbresset0->csi_SSB_ResourceList.list,ssbresset06);
} }
if ((bitmap)&0x01) {
NR_SSB_Index_t *ssbresset07=calloc(1,sizeof(*ssbresset07));
*ssbresset07=7;
ASN_SEQUENCE_ADD(&ssbresset0->csi_SSB_ResourceList.list,ssbresset07);
} }
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list,ssbresset0); ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list,ssbresset0);
......
...@@ -71,6 +71,11 @@ gNBs = ...@@ -71,6 +71,11 @@ gNBs =
initialDLBWPmappingType_2 = 0; initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12 #this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54; initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=4 //5 (4 is for 43, 5 is for 57)
initialDLBWPstartSymbolAndLength_3 = 57; //43; //57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
ul_frequencyBand = 257; ul_frequencyBand = 257;
...@@ -89,7 +94,7 @@ gNBs = ...@@ -89,7 +94,7 @@ gNBs =
initialULBWPsubcarrierSpacing = 3; initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon #rach-ConfigCommon
#rach-ConfigGeneric #rach-ConfigGeneric
prach_ConfigurationIndex = 98; prach_ConfigurationIndex = 52;
#prach_msg1_FDM #prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight #0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0; prach_msg1_FDM = 0;
...@@ -103,12 +108,12 @@ gNBs = ...@@ -103,12 +108,12 @@ gNBs =
powerRampingStep = 1; powerRampingStep = 1;
#ra_ReponseWindow #ra_ReponseWindow
#1,2,4,8,10,20,40,80 #1,2,4,8,10,20,40,80
ra_ResponseWindow = 4; ra_ResponseWindow = 7;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen #0=oneeighth,1=onefourth,2=half,3=one,4=two,5=four,6=eight,7=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64 #oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15; ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 7;
#ra_ContentionResolutionTimer #ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64 #(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7; ra_ContentionResolutionTimer = 7;
...@@ -119,22 +124,26 @@ gNBs = ...@@ -119,22 +124,26 @@ gNBs =
prach_RootSequenceIndex = 1; prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
# #
msg1_SubcarrierSpacing = 1, msg1_SubcarrierSpacing = 3,
# restrictedSetConfig # restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B # 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0, restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements) # pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1 initialULBWPmappingType_0 = 1
# this is SS=0 L=11 # this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55; initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2; initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1; initialULBWPmappingType_1 = 1;
# this is SS=0 L=12 # this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69; initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1; msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90; p0_NominalWithGrant =-90;
......
...@@ -47,7 +47,7 @@ gNBs = ...@@ -47,7 +47,7 @@ gNBs =
dl_carrierBandwidth = 32; dl_carrierBandwidth = 32;
#initialDownlinkBWP #initialDownlinkBWP
#genericParameters #genericParameters
# this is RBstart=0,L=50 (275*(L-1))+RBstart # this is RBstart=0,L=32 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 8525; initialDLBWPlocationAndBandwidth = 8525;
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
...@@ -121,8 +121,8 @@ gNBs = ...@@ -121,8 +121,8 @@ gNBs =
ra_ContentionResolutionTimer = 7; ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19; rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR #prach-RootSequenceIndex_PR
#0 = 839, 1 = 139 #1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 1; prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1; prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
# #
...@@ -132,12 +132,12 @@ gNBs = ...@@ -132,12 +132,12 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B # 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0, restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements) # pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2; initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1 initialULBWPmappingType_0 = 1
# this is SS=0 L=11 # this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55; initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2; initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1; initialULBWPmappingType_1 = 1;
# this is SS=0 L=12 # this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69; initialULBWPstartSymbolAndLength_1 = 69;
...@@ -211,7 +211,7 @@ gNBs = ...@@ -211,7 +211,7 @@ gNBs =
); );
///X2 ///X2
enable_x2 = "yes"; enable_x2 = "no";
t_reloc_prep = 1000; /* unit: millisecond */ t_reloc_prep = 1000; /* unit: millisecond */
tx2_reloc_overall = 2000; /* unit: millisecond */ tx2_reloc_overall = 2000; /* unit: millisecond */
t_dc_prep = 1000; /* unit: millisecond */ t_dc_prep = 1000; /* unit: millisecond */
......
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