Commit 33afbc9e authored by Sakthivel Velumani's avatar Sakthivel Velumani

Revert "Multiple RXTX sequential threads"

This reverts commit 85e1c34c.
parent 0bbaa0db
......@@ -26,7 +26,6 @@
#include "RRC/NR_UE/rrc_proto.h"
#include "SCHED_NR_UE/phy_frame_config_nr.h"
#include "SCHED_NR_UE/defs.h"
#include "SCHED_NR_UE/pucch_uci_ue_nr.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "executables/softmodem-common.h"
......@@ -93,8 +92,6 @@
#define DURATION_RX_TO_TX (6) /* For LTE, this duration is fixed to 4 and it is linked to LTE standard for both modes FDD/TDD */
#endif
#define RX_JOB_ID 0x1010
typedef enum {
pss = 0,
pbch = 1,
......@@ -133,7 +130,10 @@ void init_nr_ue_vars(PHY_VARS_NR_UE *ue,
* \param arg is a pointer to a \ref PHY_VARS_NR_UE structure.
*/
typedef nr_rxtx_thread_data_t syncData_t;
typedef struct syncData_s {
UE_nr_rxtx_proc_t proc;
PHY_VARS_NR_UE *UE;
} syncData_t;
static void UE_synch(void *arg) {
syncData_t *syncD=(syncData_t *) arg;
......@@ -359,10 +359,7 @@ void processSlotRX(void *arg) {
PHY_VARS_NR_UE *UE = rxtxD->UE;
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_slot_rx);
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_slot_tx);
uint8_t gNB_id = 0;
bool check_tx_finish = true;
bool check_rx_finish = true;
if (rx_slot_type == NR_DOWNLINK_SLOT || rx_slot_type == NR_MIXED_SLOT){
......@@ -390,21 +387,26 @@ void processSlotRX(void *arg) {
// Wait for PUSCH processing to finish
notifiedFIFO_elt_t *res;
while (check_tx_finish || check_rx_finish) { // Loop through the FIFO for the current slot msg
// under the assumption that no two slots with same slot index of different frames are processed at the same time
res = pullTpool(UE->respPdsch,&(get_nrUE_params()->Tpool));
if (res->key == proc->nr_slot_rx) check_rx_finish = false;
pushNotifiedFIFO_nothreadSafe(UE->respPdsch, res);
res = pullTpool(UE->txFifo,&(get_nrUE_params()->Tpool));
if (res->key == proc->nr_slot_tx) check_tx_finish = false;
pushNotifiedFIFO_nothreadSafe(UE->txFifo, res);
if (get_softmodem_params()->usim_test==0) {
pucch_procedures_ue_nr(UE,
gNB_id,
proc,
FALSE);
}
LOG_D(PHY, "Sending Uplink data \n");
nr_ue_pusch_common_procedures(UE,
proc->nr_slot_tx,
&UE->frame_parms,1);
ue_ta_procedures(UE, proc->nr_slot_tx, proc->frame_tx);
} else {
processSlotTX(rxtxD);
}
if (tx_slot_type == NR_UPLINK_SLOT || tx_slot_type == NR_MIXED_SLOT){
if (get_softmodem_params()->usim_test==0) {
pucch_procedures_ue_nr(UE,
gNB_id,
......@@ -547,32 +549,25 @@ void *UE_thread(void *arg) {
notifiedFIFO_t rxFifo;
UE->rxFifo = &rxFifo;
initNotifiedFIFO(&rxFifo);
pushNotifiedFIFO_nothreadSafe(&rxFifo, newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), 1,&rxFifo,processSlotRX));
notifiedFIFO_t txFifo;
UE->txFifo = &txFifo;
initNotifiedFIFO(&txFifo);
pushNotifiedFIFO_nothreadSafe(&txFifo, newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), 1,&txFifo,processSlotTX));
notifiedFIFO_t respPdsch;
UE->respPdsch = &respPdsch;
initNotifiedFIFO(&respPdsch);
int nbSlotProcessing=0;
int thread_idx=0;
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
int timing_advance = UE->timing_advance;
bool syncRunning=false;
const int nb_slot_frame = UE->frame_parms.slots_per_frame;
int absolute_slot=0, decoded_frame_rx=-1, trashed_frames=0;
for (int i=0; i<RX_NB_TH; i++) {
pushNotifiedFIFO_nothreadSafe(&rxFifo, newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), RX_JOB_ID,&rxFifo,processSlotRX));
pushNotifiedFIFO_nothreadSafe(&txFifo, newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), 1,&txFifo,processSlotTX));
pushNotifiedFIFO_nothreadSafe(&respPdsch, newNotifiedFIFO_elt(sizeof(pdsch_rx_thread_data_t), 1,&respPdsch,processPdsch));
}
int absolute_slot=0, decoded_frame_rx=INT_MAX, trashed_frames=0;
while (!oai_exit) {
if (UE->lost_sync) {
abortTpool(&(get_nrUE_params()->Tpool),RX_JOB_ID);
abortTpool(&(get_nrUE_params()->Tpool),0);
UE->is_synchronized = 0;
UE->lost_sync = 0;
}
......@@ -640,6 +635,18 @@ void *UE_thread(void *arg) {
// this is general failure in UE !!!
thread_idx = absolute_slot % RX_NB_TH;
int slot_nr = absolute_slot % nb_slot_frame;
notifiedFIFO_elt_t *msgToPush;
AssertFatal((msgToPush=pullTpool(&rxFifo,&(get_nrUE_params()->Tpool))) != NULL,"chained list failure");
nr_rxtx_thread_data_t *curMsg=(nr_rxtx_thread_data_t *)NotifiedFifoData(msgToPush);
curMsg->UE=UE;
// update thread index for received subframe
curMsg->proc.thread_id = thread_idx;
curMsg->proc.CC_id = UE->CC_id;
curMsg->proc.nr_slot_rx = slot_nr;
curMsg->proc.nr_slot_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1;
//LOG_I(PHY,"Process slot %d thread Idx %d total gain %d\n", slot_nr, thread_idx, UE->rx_total_gain_dB);
#ifdef OAI_ADRV9371_ZC706
......@@ -695,30 +702,13 @@ void *UE_thread(void *arg) {
LOG_E(PHY,"can't compensate: diff =%d\n", first_symbols);
}
notifiedFIFO_elt_t *msgToPush;
AssertFatal((msgToPush=pullTpool(&rxFifo,&(get_nrUE_params()->Tpool))) != NULL,"chained list failure");
nr_rxtx_thread_data_t *curMsg=(nr_rxtx_thread_data_t *)NotifiedFifoData(msgToPush);
// Extract the received frame number
if (curMsg->proc.decoded_frame_rx != -1)
decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | curMsg->proc.decoded_frame_rx);
else
decoded_frame_rx=-1;
curMsg->UE=UE;
// update thread index for received subframe
curMsg->proc.thread_id = thread_idx;
curMsg->proc.CC_id = UE->CC_id;
curMsg->proc.nr_slot_rx = slot_nr;
curMsg->proc.nr_slot_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1;
curMsg->proc.timestamp_tx = timestamp+
UE->frame_parms.get_samples_slot_timestamp(slot_nr,
&UE->frame_parms,DURATION_RX_TO_TX) - firstSymSamp;
// Check if the processed frame number is same as the received frame number;
if (decoded_frame_rx>0 && decoded_frame_rx != curMsg->proc.frame_rx)
decoded_frame_rx=-1;
if ( decoded_frame_rx>0 && decoded_frame_rx != curMsg->proc.frame_rx)
LOG_E(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n",
decoded_frame_rx, curMsg->proc.frame_rx );
......@@ -757,6 +747,8 @@ void *UE_thread(void *arg) {
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
memset(txp[i], 0, writeBlockSize);
nbSlotProcessing++;
msgToPush->key=1;
pushTpool(&(get_nrUE_params()->Tpool), msgToPush);
} // while !oai_exit
......
......@@ -214,17 +214,10 @@ nrUE_params_t *get_nrUE_params(void) {
}
/* initialie thread pools used for NRUE processing paralleliation */
void init_tpools(uint8_t nun_dlsch_threads) {
char *params = NULL;
if (IS_SOFTMODEM_RFSIM) {
params = calloc(1,2);
memcpy(params,"N",1);
}
else {
params = calloc(1,(RX_NB_TH*RX_NB_TH_PL*3)+1);
for (int i=0; i<RX_NB_TH*RX_NB_TH_PL; i++) {
char *params=calloc(1,(RX_NB_TH*3)+1);
for (int i=0; i<RX_NB_TH; i++) {
memcpy(params+(i*3),"-1,",3);
}
}
initTpool(params, &(nrUE_params.Tpool), false);
free(params);
init_dlsch_tpool( nun_dlsch_threads);
......@@ -247,6 +240,7 @@ static void get_options(void) {
printf("%s\n",uecap_xer);
uecap_xer_in=1;
} /* UE with config file */
init_tpools(nrUE_params.nr_dlsch_parallel);
}
// set PHY vars from command line
......@@ -484,7 +478,6 @@ int main( int argc, char **argv ) {
get_options (); //Command-line options specific for NRUE
get_common_options(SOFTMODEM_5GUE_BIT );
init_tpools(nrUE_params.nr_dlsch_parallel);
CONFIG_CLEARRTFLAG(CONFIG_NOEXITONHELP);
#if T_TRACER
T_Config_Init();
......
......@@ -1741,8 +1741,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t subframe);
void *dlsch_thread(void *arg);
void processPdsch(void *arg);
/**@}*/
#endif
......@@ -75,7 +75,6 @@
#define RX_NB_TH_MAX 2
#define RX_NB_TH 2
#define RX_NB_TH_PL 2 //number of parallel jobs per slot
#define RX_NB_TH_DL 14
#define LTE_SLOTS_PER_SUBFRAME 2
......
......@@ -1068,7 +1068,6 @@ typedef struct {
#endif
notifiedFIFO_t *rxFifo;
notifiedFIFO_t *txFifo;
notifiedFIFO_t *respPdsch;
int dl_stats[5];
......@@ -1082,10 +1081,5 @@ typedef struct nr_rxtx_thread_data_s {
PHY_VARS_NR_UE *UE;
} nr_rxtx_thread_data_t;
typedef struct pdsch_rx_thread_data_s {
nr_rxtx_thread_data_t rxtxD;
int gNB_id;
uint8_t dlsch_parallel;
} pdsch_rx_thread_data_t;
#include "SIMULATION/ETH_TRANSPORT/defs.h"
#endif
......@@ -1684,13 +1684,186 @@ int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL
}
}
void processPdsch(void *arg) {
pdsch_rx_thread_data_t *param = (pdsch_rx_thread_data_t *) arg;
UE_nr_rxtx_proc_t *proc = &param->rxtxD.proc;
PHY_VARS_NR_UE *ue = param->rxtxD.UE;
int gNB_id = param->gNB_id;
uint8_t dlsch_parallel = param->dlsch_parallel;
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
uint8_t dlsch_parallel
)
{
int frame_rx = proc->frame_rx;
int nr_slot_rx = proc->nr_slot_rx;
int slot_pbch;
int slot_ssb;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
fapi_nr_config_request_t *cfg = &ue->nrUE_config;
uint8_t nb_symb_pdcch = pdcch_vars->nb_search_space > 0 ? pdcch_vars->pdcch_config[0].coreset.duration : 0;
uint8_t dci_cnt = 0;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_slot_rx);
/*
uint8_t next1_thread_id = proc->thread_id== (RX_NB_TH-1) ? 0:(proc->thread_id+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
*/
int coreset_nb_rb=0;
int coreset_start_rb=0;
if (pdcch_vars->nb_search_space > 0)
get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_slot_rx, fp);
slot_ssb = is_ssb_in_slot(cfg, frame_rx, nr_slot_rx, fp);
// looking for pbch only in slot where it is supposed to be
if (slot_ssb) {
LOG_D(PHY," ------ PBCH ChannelComp/LLR: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
for (int i=1; i<4; i++) {
nr_slot_fep(ue,
proc,
(ue->symbol_offset+i)%(fp->symbols_per_slot),
nr_slot_rx,
0,
0);
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats);
#endif
nr_pbch_channel_estimation(ue,proc,0,nr_slot_rx,(ue->symbol_offset+i)%(fp->symbols_per_slot),i-1,(fp->ssb_index)&7,fp->half_frame_bit);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
}
nr_ue_rsrp_measurements(ue, gNB_id, proc, nr_slot_rx, 0);
if ((ue->decode_MIB == 1) && slot_pbch) {
LOG_D(PHY," ------ Decode MIB: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
nr_ue_pbch_procedures(gNB_id, ue, proc, 0);
if (ue->no_timing_correction==0) {
LOG_D(PHY,"start adjust sync slot = %d no timing %d\n", nr_slot_rx, ue->no_timing_correction);
nr_adjust_synch_ue(fp,
ue,
gNB_id,
frame_rx,
nr_slot_rx,
0,
16384);
}
LOG_D(PHY, "Doing N0 measurements in %s\n", __FUNCTION__);
nr_ue_rrc_measurements(ue, proc, nr_slot_rx);
}
}
if ((frame_rx%64 == 0) && (nr_slot_rx==0)) {
printf("============================================\n");
LOG_I(PHY,"Harq round stats for Downlink: %d/%d/%d/%d DLSCH errors: %d\n",ue->dl_stats[0],ue->dl_stats[1],ue->dl_stats[2],ue->dl_stats[3],ue->dl_stats[4]);
printf("============================================\n");
}
#ifdef NR_PDCCH_SCHED
nr_gold_pdcch(ue, 0, 2);
LOG_D(PHY," ------ --> PDCCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
for (uint16_t l=0; l<nb_symb_pdcch; l++) {
#if UE_TIMING_TRACE
start_meas(&ue->ofdm_demod_stats);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
nr_slot_fep(ue,
proc,
l,
nr_slot_rx,
0,
0);
dci_cnt = 0;
for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) {
// note: this only works if RBs for PDCCH are contigous!
LOG_D(PHY, "pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d\n",
fp->first_carrier_offset, pdcch_vars->pdcch_config[n_ss].BWPStart, coreset_start_rb);
if (coreset_nb_rb > 0)
nr_pdcch_channel_estimation(ue,
proc,
0,
nr_slot_rx,
l,
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->ofdm_demod_stats);
#endif
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(gNB_id, ue, proc);
}
}
if (dci_cnt > 0) {
LOG_D(PHY,"[UE %d] Frame %d, nr_slot_rx %d: found %d DCIs\n", ue->Mod_id, frame_rx, nr_slot_rx, dci_cnt);
NR_UE_DLSCH_t *dlsch = NULL;
if (ue->dlsch[proc->thread_id][gNB_id][0]->active == 1){
dlsch = ue->dlsch[proc->thread_id][gNB_id][0];
} else if (ue->dlsch_SI[0]->active == 1){
dlsch = ue->dlsch_SI[0];
} else if (ue->dlsch_ra[0]->active == 1){
dlsch = ue->dlsch_ra[0];
}
if (dlsch) {
uint8_t harq_pid = dlsch->current_harq_pid;
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch->harq_processes[harq_pid];
uint16_t nb_symb_sch = dlsch0_harq->nb_symbols;
uint16_t start_symb_sch = dlsch0_harq->start_symbol;
int symb_dmrs = -1;
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
//to update from pdsch config
for (int i=0;i<4;i++) if (((1<<i)&dlsch0_harq->dlDmrsSymbPos) > 0) {symb_dmrs=i;break;}
AssertFatal(symb_dmrs>=0,"no dmrs in 0..3\n");
LOG_D(PHY,"Initializing dmrs for slot %d DMRS mask %x\n", nr_slot_rx, dlsch0_harq->dlDmrsSymbPos);
nr_gold_pdsch(ue, nr_slot_rx, 0);
for (uint16_t m=start_symb_sch;m<(nb_symb_sch+start_symb_sch) ; m++){
nr_slot_fep(ue,
proc,
m, //to be updated from higher layer
nr_slot_rx,
0,
0);
}
}
} else {
LOG_D(PHY,"[UE %d] Frame %d, nr_slot_rx %d: No DCIs found\n", ue->Mod_id, frame_rx, nr_slot_rx);
}
#endif //NR_PDCCH_SCHED
// Start PUSCH processing here. It runs in parallel with PDSCH processing
notifiedFIFO_elt_t *res;
res = pullTpool(ue->txFifo,&(get_nrUE_params()->Tpool));
nr_rxtx_thread_data_t *curMsg=(nr_rxtx_thread_data_t *)NotifiedFifoData(res);
curMsg->proc = *proc;
curMsg->UE = ue;
res->key = 1;
pushTpool(&(get_nrUE_params()->Tpool), res);
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat);
#endif
......@@ -1705,7 +1878,7 @@ void processPdsch(void *arg) {
ue->dlsch[proc->thread_id][gNB_id][0],
NULL);
nr_ue_measurement_procedures(2, ue, proc, gNB_id, proc->nr_slot_rx);
nr_ue_measurement_procedures(2, ue, proc, gNB_id, nr_slot_rx);
}
// do procedures for SI-RNTI
......@@ -1786,7 +1959,7 @@ void processPdsch(void *arg) {
// do procedures for C-RNTI
if (ue->dlsch[proc->thread_id][gNB_id][0]->active == 1) {
LOG_D(PHY, "DLSCH data reception at proc->nr_slot_rx: %d \n \n", proc->nr_slot_rx);
LOG_D(PHY, "DLSCH data reception at nr_slot_rx: %d \n \n", nr_slot_rx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
#if UE_TIMING_TRACE
......@@ -1807,11 +1980,11 @@ void processPdsch(void *arg) {
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_procedures_stat[proc->thread_id]);
#if DISABLE_LOG_X
printf("[SFN %d] Slot1: Pdsch Proc %5.2f\n",proc->nr_slot_rx,ue->pdsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
printf("[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",proc->nr_slot_rx,ue->dlsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
printf("[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_slot_rx,ue->pdsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
printf("[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_slot_rx,ue->dlsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",proc->nr_slot_rx,ue->pdsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",proc->nr_slot_rx,ue->dlsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_slot_rx,ue->pdsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_slot_rx,ue->dlsch_procedures_stat[proc->thread_id].p_time/(cpuf*1000.0));
#endif
#endif
......@@ -1829,7 +2002,7 @@ start_meas(&ue->generic_stat);
#if 0
if(proc->nr_slot_rx==5 && ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid]->nb_rb > 20){
if(nr_slot_rx==5 && ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid]->nb_rb > 20){
//write_output("decoder_llr.m","decllr",dlsch_llr,G,1,0);
//write_output("llr.m","llr", &ue->pdsch_vars[proc->thread_id][gNB_id]->llr[0][0],(14*nb_rb*12*dlsch1_harq->Qm) - 4*(nb_rb*4*dlsch1_harq->Qm),1,0);
......@@ -1855,9 +2028,9 @@ start_meas(&ue->generic_stat);
NR_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[next1_thread_id][gNB_id][0]->harq_processes[current_harq_pid];
NR_DL_UE_HARQ_t *harq_processes_dest1 = ue->dlsch[next2_thread_id][gNB_id][0]->harq_processes[current_harq_pid];
*/
/*nr_harq_status_t *current_harq_ack = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_ack[proc->nr_slot_rx];
nr_harq_status_t *harq_ack_dest = &ue->dlsch[next1_thread_id][gNB_id][0]->harq_ack[proc->nr_slot_rx];
nr_harq_status_t *harq_ack_dest1 = &ue->dlsch[next2_thread_id][gNB_id][0]->harq_ack[proc->nr_slot_rx];
/*nr_harq_status_t *current_harq_ack = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_ack[nr_slot_rx];
nr_harq_status_t *harq_ack_dest = &ue->dlsch[next1_thread_id][gNB_id][0]->harq_ack[nr_slot_rx];
nr_harq_status_t *harq_ack_dest1 = &ue->dlsch[next2_thread_id][gNB_id][0]->harq_ack[nr_slot_rx];
*/
//copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
......@@ -1866,8 +2039,8 @@ start_meas(&ue->generic_stat);
//copy_harq_proc_struct(harq_processes_dest1, current_harq_processes);
//copy_ack_struct(harq_ack_dest1, current_harq_ack);
if (proc->nr_slot_rx==9) {
if (proc->frame_rx % 10 == 0) {
if (nr_slot_rx==9) {
if (frame_rx % 10 == 0) {
if ((ue->dlsch_received[gNB_id] - ue->dlsch_received_last[gNB_id]) != 0)
ue->dlsch_fer[gNB_id] = (100*(ue->dlsch_errors[gNB_id] - ue->dlsch_errors_last[gNB_id]))/(ue->dlsch_received[gNB_id] - ue->dlsch_received_last[gNB_id]);
......@@ -1879,234 +2052,42 @@ start_meas(&ue->generic_stat);
ue->bitrate[gNB_id] = (ue->total_TBS[gNB_id] - ue->total_TBS_last[gNB_id])*100;
ue->total_TBS_last[gNB_id] = ue->total_TBS[gNB_id];
LOG_D(PHY,"[UE %d] Calculating bitrate Frame %d: total_TBS = %d, total_TBS_last = %d, bitrate %f kbits\n",
ue->Mod_id,proc->frame_rx,ue->total_TBS[gNB_id],
ue->Mod_id,frame_rx,ue->total_TBS[gNB_id],
ue->total_TBS_last[gNB_id],(float) ue->bitrate[gNB_id]/1000.0);
#if UE_AUTOTEST_TRACE
if ((proc->frame_rx % 100 == 0)) {
LOG_I(PHY,"[UE %d] AUTOTEST Metric : UE_DLSCH_BITRATE = %5.2f kbps (frame = %d) \n", ue->Mod_id, (float) ue->bitrate[gNB_id]/1000.0, proc->frame_rx);
if ((frame_rx % 100 == 0)) {
LOG_I(PHY,"[UE %d] AUTOTEST Metric : UE_DLSCH_BITRATE = %5.2f kbps (frame = %d) \n", ue->Mod_id, (float) ue->bitrate[gNB_id]/1000.0, frame_rx);
}
#endif
}
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat);
printf("after tubo until end of Rx %5.2f \n",ue->generic_stat.p_time/(cpuf*1000.0));
stop_meas(&ue->generic_stat);
printf("after tubo until end of Rx %5.2f \n",ue->generic_stat.p_time/(cpuf*1000.0));
#endif
#ifdef EMOS
phy_procedures_emos_UE_RX(ue,slot,gNB_id);
phy_procedures_emos_UE_RX(ue,slot,gNB_id);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->phy_proc_rx[proc->thread_id]);
stop_meas(&ue->phy_proc_rx[proc->thread_id]);
#if DISABLE_LOG_X
printf("------FULL RX PROC [SFN %d]: %5.2f ------\n",proc->nr_slot_rx,ue->phy_proc_rx[proc->thread_id].p_time/(cpuf*1000.0));
printf("------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_slot_rx,ue->phy_proc_rx[proc->thread_id].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",proc->nr_slot_rx,ue->phy_proc_rx[proc->thread_id].p_time/(cpuf*1000.0));
LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_slot_rx,ue->phy_proc_rx[proc->thread_id].p_time/(cpuf*1000.0));
#endif
#endif
//#endif //pdsch
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", proc->frame_rx%1024, proc->nr_slot_rx);
}
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
uint8_t dlsch_parallel
)
{
int frame_rx = proc->frame_rx;
int nr_slot_rx = proc->nr_slot_rx;
int slot_pbch;
int slot_ssb;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
fapi_nr_config_request_t *cfg = &ue->nrUE_config;
uint8_t nb_symb_pdcch = pdcch_vars->nb_search_space > 0 ? pdcch_vars->pdcch_config[0].coreset.duration : 0;
uint8_t dci_cnt = 0;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_slot_rx);
/*
uint8_t next1_thread_id = proc->thread_id== (RX_NB_TH-1) ? 0:(proc->thread_id+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
*/
int coreset_nb_rb=0;
int coreset_start_rb=0;
if (pdcch_vars->nb_search_space > 0)
get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_slot_rx, fp);
slot_ssb = is_ssb_in_slot(cfg, frame_rx, nr_slot_rx, fp);
// looking for pbch only in slot where it is supposed to be
if (slot_ssb) {
LOG_D(PHY," ------ PBCH ChannelComp/LLR: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
for (int i=1; i<4; i++) {
nr_slot_fep(ue,
proc,
(ue->symbol_offset+i)%(fp->symbols_per_slot),
nr_slot_rx,
0,
0);
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats);
#endif
nr_pbch_channel_estimation(ue,proc,0,nr_slot_rx,(ue->symbol_offset+i)%(fp->symbols_per_slot),i-1,(fp->ssb_index)&7,fp->half_frame_bit);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
}
nr_ue_rsrp_measurements(ue, gNB_id, proc, nr_slot_rx, 0);
if ((ue->decode_MIB == 1) && slot_pbch) {
LOG_D(PHY," ------ Decode MIB: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
nr_ue_pbch_procedures(gNB_id, ue, proc, 0);
if (ue->no_timing_correction==0) {
LOG_D(PHY,"start adjust sync slot = %d no timing %d\n", nr_slot_rx, ue->no_timing_correction);
nr_adjust_synch_ue(fp,
ue,
gNB_id,
frame_rx,
nr_slot_rx,
0,
16384);
}
LOG_D(PHY, "Doing N0 measurements in %s\n", __FUNCTION__);
nr_ue_rrc_measurements(ue, proc, nr_slot_rx);
}
}
if ((frame_rx%64 == 0) && (nr_slot_rx==0)) {
printf("============================================\n");
LOG_I(PHY,"Harq round stats for Downlink: %d/%d/%d/%d DLSCH errors: %d\n",ue->dl_stats[0],ue->dl_stats[1],ue->dl_stats[2],ue->dl_stats[3],ue->dl_stats[4]);
printf("============================================\n");
}
#ifdef NR_PDCCH_SCHED
nr_gold_pdcch(ue, 0, 2);
LOG_D(PHY," ------ --> PDCCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
for (uint16_t l=0; l<nb_symb_pdcch; l++) {
#if UE_TIMING_TRACE
start_meas(&ue->ofdm_demod_stats);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
nr_slot_fep(ue,
proc,
l,
nr_slot_rx,
0,
0);
dci_cnt = 0;
for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) {
// note: this only works if RBs for PDCCH are contigous!
LOG_D(PHY, "pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d\n",
fp->first_carrier_offset, pdcch_vars->pdcch_config[n_ss].BWPStart, coreset_start_rb);
if (coreset_nb_rb > 0)
nr_pdcch_channel_estimation(ue,
proc,
0,
nr_slot_rx,
l,
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->ofdm_demod_stats);
#endif
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(gNB_id, ue, proc);
}
}
if (dci_cnt > 0) {
LOG_D(PHY,"[UE %d] Frame %d, nr_slot_rx %d: found %d DCIs\n", ue->Mod_id, frame_rx, nr_slot_rx, dci_cnt);
NR_UE_DLSCH_t *dlsch = NULL;
if (ue->dlsch[proc->thread_id][gNB_id][0]->active == 1){
dlsch = ue->dlsch[proc->thread_id][gNB_id][0];
} else if (ue->dlsch_SI[0]->active == 1){
dlsch = ue->dlsch_SI[0];
} else if (ue->dlsch_ra[0]->active == 1){
dlsch = ue->dlsch_ra[0];
}
if (dlsch) {
uint8_t harq_pid = dlsch->current_harq_pid;
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch->harq_processes[harq_pid];
uint16_t nb_symb_sch = dlsch0_harq->nb_symbols;
uint16_t start_symb_sch = dlsch0_harq->start_symbol;
int symb_dmrs = -1;
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
//to update from pdsch config
for (int i=0;i<4;i++) if (((1<<i)&dlsch0_harq->dlDmrsSymbPos) > 0) {symb_dmrs=i;break;}
AssertFatal(symb_dmrs>=0,"no dmrs in 0..3\n");
LOG_D(PHY,"Initializing dmrs for slot %d DMRS mask %x\n", nr_slot_rx, dlsch0_harq->dlDmrsSymbPos);
nr_gold_pdsch(ue, nr_slot_rx, 0);
for (uint16_t m=start_symb_sch;m<(nb_symb_sch+start_symb_sch) ; m++){
nr_slot_fep(ue,
proc,
m, //to be updated from higher layer
nr_slot_rx,
0,
0);
}
}
} else {
LOG_D(PHY,"[UE %d] Frame %d, nr_slot_rx %d: No DCIs found\n", ue->Mod_id, frame_rx, nr_slot_rx);
}
#endif //NR_PDCCH_SCHED
notifiedFIFO_elt_t *res;
// Start PDSCH processing
res = pullTpool(ue->respPdsch,&(get_nrUE_params()->Tpool));
pdsch_rx_thread_data_t *curMsgRx=(pdsch_rx_thread_data_t *)NotifiedFifoData(res);
curMsgRx->rxtxD.proc = *proc;
curMsgRx->rxtxD.UE = ue;
curMsgRx->gNB_id = gNB_id;
curMsgRx->dlsch_parallel = dlsch_parallel;
res->key = proc->nr_slot_rx;
pushTpool(&(get_nrUE_params()->Tpool), res);
// Start PUSCH processing
res = pullTpool(ue->txFifo,&(get_nrUE_params()->Tpool));
nr_rxtx_thread_data_t *curMsg=(nr_rxtx_thread_data_t *)NotifiedFifoData(res);
curMsg->proc = *proc;
curMsg->UE = ue;
res->key = proc->nr_slot_tx;
pushTpool(&(get_nrUE_params()->Tpool), res);
//#endif //pdsch
return (0);
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_slot_rx);
return (0);
}
......
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