Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
wangjie
OpenXG-RAN
Commits
4124edff
Commit
4124edff
authored
Nov 24, 2020
by
Robert Schmidt
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Recalculate PUSCH saved params struct in Pre-processor
parent
7361eb23
Changes
4
Show whitespace changes
Inline
Side-by-side
Showing
4 changed files
with
72 additions
and
38 deletions
+72
-38
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+18
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+2
-0
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+51
-37
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+1
-0
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
4124edff
...
@@ -407,7 +407,6 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
...
@@ -407,7 +407,6 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
}
}
}
}
sched_ctrl
->
sched_pusch
.
time_domain_allocation
=
tda
;
sched_ctrl
->
sched_pusch
.
slot
=
sched_slot
;
sched_ctrl
->
sched_pusch
.
slot
=
sched_slot
;
sched_ctrl
->
sched_pusch
.
frame
=
sched_frame
;
sched_ctrl
->
sched_pusch
.
frame
=
sched_frame
;
...
@@ -435,6 +434,24 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
...
@@ -435,6 +434,24 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
}
}
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
sched_ctrl
->
sched_pusch
.
time_domain_allocation
=
tda
;
const
long
f
=
sched_ctrl
->
search_space
->
searchSpaceType
->
choice
.
ue_Specific
->
dci_Formats
;
const
int
dci_format
=
f
?
NR_UL_DCI_FORMAT_0_1
:
NR_UL_DCI_FORMAT_0_0
;
const
uint8_t
num_dmrs_cdm_grps_no_data
=
1
;
/* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or
* num_dmrs_cdm_grps_no_data has changed and only then recompute */
NR_sched_pusch_save_t
*
ps
=
&
sched_ctrl
->
pusch_save
;
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
dci_format
!=
dci_format
||
ps
->
num_dmrs_cdm_grps_no_data
!=
num_dmrs_cdm_grps_no_data
)
nr_save_pusch_fields
(
scc
,
sched_ctrl
->
active_ubwp
,
dci_format
,
tda
,
num_dmrs_cdm_grps_no_data
,
ps
);
sched_ctrl
->
sched_pusch
.
mcs
=
9
;
sched_ctrl
->
sched_pusch
.
mcs
=
9
;
sched_ctrl
->
sched_pusch
.
rbStart
=
rbStart
;
sched_ctrl
->
sched_pusch
.
rbStart
=
rbStart
;
sched_ctrl
->
sched_pusch
.
rbSize
=
rbSize
;
sched_ctrl
->
sched_pusch
.
rbSize
=
rbSize
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
4124edff
...
@@ -1929,6 +1929,8 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
...
@@ -1929,6 +1929,8 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
UE_info
->
UE_sched_ctrl
[
UE_id
].
ta_update
=
31
;
UE_info
->
UE_sched_ctrl
[
UE_id
].
ta_update
=
31
;
UE_info
->
UE_sched_ctrl
[
UE_id
].
ta_apply
=
false
;
UE_info
->
UE_sched_ctrl
[
UE_id
].
ta_apply
=
false
;
UE_info
->
UE_sched_ctrl
[
UE_id
].
ul_rssi
=
0
;
UE_info
->
UE_sched_ctrl
[
UE_id
].
ul_rssi
=
0
;
/* set illegal time domain allocation to force recomputation of all fields */
UE_info
->
UE_sched_ctrl
[
UE_id
].
pusch_save
.
time_domain_allocation
=
-
1
;
UE_info
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
=
(
NR_sched_pucch
**
)
malloc
(
num_slots_ul
*
sizeof
(
NR_sched_pucch
*
));
UE_info
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
=
(
NR_sched_pucch
**
)
malloc
(
num_slots_ul
*
sizeof
(
NR_sched_pucch
*
));
for
(
int
s
=
0
;
s
<
num_slots_ul
;
s
++
)
for
(
int
s
=
0
;
s
<
num_slots_ul
;
s
++
)
UE_info
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
[
s
]
=
(
NR_sched_pucch
*
)
malloc
(
2
*
sizeof
(
NR_sched_pucch
));
UE_info
->
UE_sched_ctrl
[
UE_id
].
sched_pucch
[
s
]
=
(
NR_sched_pucch
*
)
malloc
(
2
*
sizeof
(
NR_sched_pucch
));
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
4124edff
...
@@ -506,7 +506,6 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
...
@@ -506,7 +506,6 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
while
(
rbStart
+
rbSize
<
bwpSize
&&
!
vrb_map_UL
[
rbStart
+
rbSize
])
while
(
rbStart
+
rbSize
<
bwpSize
&&
!
vrb_map_UL
[
rbStart
+
rbSize
])
rbSize
++
;
rbSize
++
;
sched_ctrl
->
sched_pusch
.
time_domain_allocation
=
tda
;
sched_ctrl
->
sched_pusch
.
slot
=
sched_slot
;
sched_ctrl
->
sched_pusch
.
slot
=
sched_slot
;
sched_ctrl
->
sched_pusch
.
frame
=
sched_frame
;
sched_ctrl
->
sched_pusch
.
frame
=
sched_frame
;
...
@@ -534,6 +533,24 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
...
@@ -534,6 +533,24 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
}
}
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
sched_ctrl
->
sched_pusch
.
time_domain_allocation
=
tda
;
const
long
f
=
sched_ctrl
->
search_space
->
searchSpaceType
->
choice
.
ue_Specific
->
dci_Formats
;
const
int
dci_format
=
f
?
NR_UL_DCI_FORMAT_0_1
:
NR_UL_DCI_FORMAT_0_0
;
const
uint8_t
num_dmrs_cdm_grps_no_data
=
1
;
/* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or
* num_dmrs_cdm_grps_no_data has changed and only then recompute */
NR_sched_pusch_save_t
*
ps
=
&
sched_ctrl
->
pusch_save
;
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
dci_format
!=
dci_format
||
ps
->
num_dmrs_cdm_grps_no_data
!=
num_dmrs_cdm_grps_no_data
)
nr_save_pusch_fields
(
scc
,
sched_ctrl
->
active_ubwp
,
dci_format
,
tda
,
num_dmrs_cdm_grps_no_data
,
ps
);
sched_ctrl
->
sched_pusch
.
mcs
=
9
;
sched_ctrl
->
sched_pusch
.
mcs
=
9
;
sched_ctrl
->
sched_pusch
.
rbStart
=
rbStart
;
sched_ctrl
->
sched_pusch
.
rbStart
=
rbStart
;
sched_ctrl
->
sched_pusch
.
rbSize
=
rbSize
;
sched_ctrl
->
sched_pusch
.
rbSize
=
rbSize
;
...
@@ -569,34 +586,27 @@ void nr_schedule_ulsch(module_id_t module_id,
...
@@ -569,34 +586,27 @@ void nr_schedule_ulsch(module_id_t module_id,
cur_harq
->
state
=
ACTIVE_SCHED
;
cur_harq
->
state
=
ACTIVE_SCHED
;
cur_harq
->
last_tx_slot
=
sched_pusch
->
slot
;
cur_harq
->
last_tx_slot
=
sched_pusch
->
slot
;
const
long
f
=
sched_ctrl
->
search_space
->
searchSpaceType
->
choice
.
ue_Specific
->
dci_Formats
;
int
dci_formats
[
2
]
=
{
f
?
NR_UL_DCI_FORMAT_0_1
:
NR_UL_DCI_FORMAT_0_0
,
0
};
int
rnti_types
[
2
]
=
{
NR_RNTI_C
,
0
};
int
rnti_types
[
2
]
=
{
NR_RNTI_C
,
0
};
const
int
tda
=
sched_pusch
->
time_domain_allocation
;
/* pre-computed PUSCH values that only change if time domain allocation,
const
uint8_t
num_dmrs_cdm_grps_no_data
=
1
;
* DCI format, or DMRS parameters change. Updated in the preprocessor
NR_sched_pusch_save_t
ps
;
* through nr_save_pusch_fields() */
nr_save_pusch_fields
(
scc
,
NR_sched_pusch_save_t
*
ps
=
&
sched_ctrl
->
pusch_save
;
sched_ctrl
->
active_ubwp
,
dci_formats
[
0
],
tda
,
num_dmrs_cdm_grps_no_data
,
&
ps
);
/* Calculate TBS from MCS */
/* Calculate TBS from MCS */
const
uint8_t
mcs
=
sched_pusch
->
mcs
;
const
uint8_t
mcs
=
sched_pusch
->
mcs
;
uint16_t
R
=
nr_get_code_rate_ul
(
mcs
,
ps
.
mcs_table
);
uint16_t
R
=
nr_get_code_rate_ul
(
mcs
,
ps
->
mcs_table
);
uint8_t
Qm
=
nr_get_Qm_ul
(
mcs
,
ps
.
mcs_table
);
uint8_t
Qm
=
nr_get_Qm_ul
(
mcs
,
ps
->
mcs_table
);
if
(
ps
.
pusch_Config
->
tp_pi2BPSK
if
(
ps
->
pusch_Config
->
tp_pi2BPSK
&&
((
ps
.
mcs_table
==
3
&&
mcs
<
2
)
||
(
ps
.
mcs_table
==
4
&&
mcs
<
6
)))
{
&&
((
ps
->
mcs_table
==
3
&&
mcs
<
2
)
||
(
ps
->
mcs_table
==
4
&&
mcs
<
6
)))
{
R
>>=
1
;
R
>>=
1
;
Qm
<<=
1
;
Qm
<<=
1
;
}
}
const
uint32_t
tb_size
=
nr_compute_tbs
(
Qm
,
const
uint32_t
tb_size
=
nr_compute_tbs
(
Qm
,
R
,
R
,
sched_pusch
->
rbSize
,
sched_pusch
->
rbSize
,
ps
.
nrOfSymbols
,
ps
->
nrOfSymbols
,
ps
.
N_PRB_DMRS
*
ps
.
num_dmrs_symb
,
ps
->
N_PRB_DMRS
*
ps
->
num_dmrs_symb
,
0
,
// nb_rb_oh
0
,
// nb_rb_oh
0
,
0
,
1
/* NrOfLayers */
)
>>
3
;
1
/* NrOfLayers */
)
>>
3
;
...
@@ -639,23 +649,23 @@ void nr_schedule_ulsch(module_id_t module_id,
...
@@ -639,23 +649,23 @@ void nr_schedule_ulsch(module_id_t module_id,
pusch_pdu
->
target_code_rate
=
R
;
pusch_pdu
->
target_code_rate
=
R
;
pusch_pdu
->
qam_mod_order
=
Qm
;
pusch_pdu
->
qam_mod_order
=
Qm
;
pusch_pdu
->
mcs_index
=
mcs
;
pusch_pdu
->
mcs_index
=
mcs
;
pusch_pdu
->
mcs_table
=
ps
.
mcs_table
;
pusch_pdu
->
mcs_table
=
ps
->
mcs_table
;
pusch_pdu
->
transform_precoding
=
ps
.
transform_precoding
;
pusch_pdu
->
transform_precoding
=
ps
->
transform_precoding
;
if
(
ps
.
pusch_Config
->
dataScramblingIdentityPUSCH
)
if
(
ps
->
pusch_Config
->
dataScramblingIdentityPUSCH
)
pusch_pdu
->
data_scrambling_id
=
*
ps
.
pusch_Config
->
dataScramblingIdentityPUSCH
;
pusch_pdu
->
data_scrambling_id
=
*
ps
->
pusch_Config
->
dataScramblingIdentityPUSCH
;
else
else
pusch_pdu
->
data_scrambling_id
=
*
scc
->
physCellId
;
pusch_pdu
->
data_scrambling_id
=
*
scc
->
physCellId
;
pusch_pdu
->
nrOfLayers
=
1
;
pusch_pdu
->
nrOfLayers
=
1
;
/* FAPI: DMRS */
/* FAPI: DMRS */
pusch_pdu
->
ul_dmrs_symb_pos
=
ps
.
ul_dmrs_symb_pos
;
pusch_pdu
->
ul_dmrs_symb_pos
=
ps
->
ul_dmrs_symb_pos
;
pusch_pdu
->
dmrs_config_type
=
ps
.
dmrs_config_type
;
pusch_pdu
->
dmrs_config_type
=
ps
->
dmrs_config_type
;
if
(
pusch_pdu
->
transform_precoding
)
{
// transform precoding disabled
if
(
pusch_pdu
->
transform_precoding
)
{
// transform precoding disabled
long
*
scramblingid
;
long
*
scramblingid
;
if
(
pusch_pdu
->
scid
==
0
)
if
(
pusch_pdu
->
scid
==
0
)
scramblingid
=
ps
.
NR_DMRS_UplinkConfig
->
transformPrecodingDisabled
->
scramblingID0
;
scramblingid
=
ps
->
NR_DMRS_UplinkConfig
->
transformPrecodingDisabled
->
scramblingID0
;
else
else
scramblingid
=
ps
.
NR_DMRS_UplinkConfig
->
transformPrecodingDisabled
->
scramblingID1
;
scramblingid
=
ps
->
NR_DMRS_UplinkConfig
->
transformPrecodingDisabled
->
scramblingID1
;
if
(
scramblingid
==
NULL
)
if
(
scramblingid
==
NULL
)
pusch_pdu
->
ul_dmrs_scrambling_id
=
*
scc
->
physCellId
;
pusch_pdu
->
ul_dmrs_scrambling_id
=
*
scc
->
physCellId
;
else
else
...
@@ -663,30 +673,30 @@ void nr_schedule_ulsch(module_id_t module_id,
...
@@ -663,30 +673,30 @@ void nr_schedule_ulsch(module_id_t module_id,
}
}
else
{
else
{
pusch_pdu
->
ul_dmrs_scrambling_id
=
*
scc
->
physCellId
;
pusch_pdu
->
ul_dmrs_scrambling_id
=
*
scc
->
physCellId
;
if
(
ps
.
NR_DMRS_UplinkConfig
->
transformPrecodingEnabled
->
nPUSCH_Identity
!=
NULL
)
if
(
ps
->
NR_DMRS_UplinkConfig
->
transformPrecodingEnabled
->
nPUSCH_Identity
!=
NULL
)
pusch_pdu
->
pusch_identity
=
*
ps
.
NR_DMRS_UplinkConfig
->
transformPrecodingEnabled
->
nPUSCH_Identity
;
pusch_pdu
->
pusch_identity
=
*
ps
->
NR_DMRS_UplinkConfig
->
transformPrecodingEnabled
->
nPUSCH_Identity
;
else
else
pusch_pdu
->
pusch_identity
=
*
scc
->
physCellId
;
pusch_pdu
->
pusch_identity
=
*
scc
->
physCellId
;
}
}
pusch_pdu
->
scid
=
0
;
// DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]
pusch_pdu
->
scid
=
0
;
// DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]
pusch_pdu
->
num_dmrs_cdm_grps_no_data
=
ps
.
num_dmrs_cdm_grps_no_data
;
pusch_pdu
->
num_dmrs_cdm_grps_no_data
=
ps
->
num_dmrs_cdm_grps_no_data
;
pusch_pdu
->
dmrs_ports
=
1
;
pusch_pdu
->
dmrs_ports
=
1
;
/* FAPI: Pusch Allocation in frequency domain */
/* FAPI: Pusch Allocation in frequency domain */
AssertFatal
(
ps
.
pusch_Config
->
resourceAllocation
==
NR_PUSCH_Config__resourceAllocation_resourceAllocationType1
,
AssertFatal
(
ps
->
pusch_Config
->
resourceAllocation
==
NR_PUSCH_Config__resourceAllocation_resourceAllocationType1
,
"Only frequency resource allocation type 1 is currently supported
\n
"
);
"Only frequency resource allocation type 1 is currently supported
\n
"
);
pusch_pdu
->
resource_alloc
=
1
;
//type 1
pusch_pdu
->
resource_alloc
=
1
;
//type 1
pusch_pdu
->
rb_start
=
sched_pusch
->
rbStart
;
pusch_pdu
->
rb_start
=
sched_pusch
->
rbStart
;
pusch_pdu
->
rb_size
=
sched_pusch
->
rbSize
;
pusch_pdu
->
rb_size
=
sched_pusch
->
rbSize
;
pusch_pdu
->
vrb_to_prb_mapping
=
0
;
pusch_pdu
->
vrb_to_prb_mapping
=
0
;
if
(
ps
.
pusch_Config
->
frequencyHopping
==
NULL
)
if
(
ps
->
pusch_Config
->
frequencyHopping
==
NULL
)
pusch_pdu
->
frequency_hopping
=
0
;
pusch_pdu
->
frequency_hopping
=
0
;
else
else
pusch_pdu
->
frequency_hopping
=
1
;
pusch_pdu
->
frequency_hopping
=
1
;
/* FAPI: Resource Allocation in time domain */
/* FAPI: Resource Allocation in time domain */
pusch_pdu
->
start_symbol_index
=
ps
.
startSymbolIndex
;
pusch_pdu
->
start_symbol_index
=
ps
->
startSymbolIndex
;
pusch_pdu
->
nr_of_symbols
=
ps
.
nrOfSymbols
;
pusch_pdu
->
nr_of_symbols
=
ps
->
nrOfSymbols
;
/* PUSCH PDU */
/* PUSCH PDU */
pusch_pdu
->
pusch_data
.
rv_index
=
nr_rv_round_map
[
cur_harq
->
round
];
pusch_pdu
->
pusch_data
.
rv_index
=
nr_rv_round_map
[
cur_harq
->
round
];
...
@@ -696,7 +706,7 @@ void nr_schedule_ulsch(module_id_t module_id,
...
@@ -696,7 +706,7 @@ void nr_schedule_ulsch(module_id_t module_id,
pusch_pdu
->
pusch_data
.
num_cb
=
0
;
//CBG not supported
pusch_pdu
->
pusch_data
.
num_cb
=
0
;
//CBG not supported
/* PUSCH PTRS */
/* PUSCH PTRS */
if
(
ps
.
NR_DMRS_UplinkConfig
->
phaseTrackingRS
!=
NULL
)
{
if
(
ps
->
NR_DMRS_UplinkConfig
->
phaseTrackingRS
!=
NULL
)
{
// TODO to be fixed from RRC config
// TODO to be fixed from RRC config
uint8_t
ptrs_mcs1
=
2
;
// higher layer parameter in PTRS-UplinkConfig
uint8_t
ptrs_mcs1
=
2
;
// higher layer parameter in PTRS-UplinkConfig
uint8_t
ptrs_mcs2
=
4
;
// higher layer parameter in PTRS-UplinkConfig
uint8_t
ptrs_mcs2
=
4
;
// higher layer parameter in PTRS-UplinkConfig
...
@@ -740,12 +750,16 @@ void nr_schedule_ulsch(module_id_t module_id,
...
@@ -740,12 +750,16 @@ void nr_schedule_ulsch(module_id_t module_id,
memset
(
dci_pdu_rel15
,
0
,
sizeof
(
dci_pdu_rel15
));
memset
(
dci_pdu_rel15
,
0
,
sizeof
(
dci_pdu_rel15
));
NR_CellGroupConfig_t
*
secondaryCellGroup
=
UE_info
->
secondaryCellGroup
[
UE_id
];
NR_CellGroupConfig_t
*
secondaryCellGroup
=
UE_info
->
secondaryCellGroup
[
UE_id
];
const
int
n_ubwp
=
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
uplinkBWP_ToAddModList
->
list
.
count
;
const
int
n_ubwp
=
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
uplinkConfig
->
uplinkBWP_ToAddModList
->
list
.
count
;
// NOTE: below functions assume that dci_formats is an array corresponding
// to all UL DCIs in the PDCCH, but for us it is a simple int. So before
// having multiple UEs, the below need to be changed (IMO the functions
// should fill for one DCI only and not handle all of them).
config_uldci
(
sched_ctrl
->
active_ubwp
,
config_uldci
(
sched_ctrl
->
active_ubwp
,
pusch_pdu
,
pusch_pdu
,
pdcch_pdu_rel15
,
pdcch_pdu_rel15
,
&
dci_pdu_rel15
[
0
],
&
dci_pdu_rel15
[
0
],
dci_formats
,
&
ps
->
dci_format
,
tda
,
ps
->
time_domain_allocation
,
UE_info
->
UE_sched_ctrl
[
UE_id
].
tpc0
,
UE_info
->
UE_sched_ctrl
[
UE_id
].
tpc0
,
n_ubwp
,
n_ubwp
,
sched_ctrl
->
active_bwp
->
bwp_Id
);
sched_ctrl
->
active_bwp
->
bwp_Id
);
...
@@ -753,7 +767,7 @@ void nr_schedule_ulsch(module_id_t module_id,
...
@@ -753,7 +767,7 @@ void nr_schedule_ulsch(module_id_t module_id,
secondaryCellGroup
,
secondaryCellGroup
,
pdcch_pdu_rel15
,
pdcch_pdu_rel15
,
dci_pdu_rel15
,
dci_pdu_rel15
,
dci_formats
,
&
ps
->
dci_format
,
rnti_types
,
rnti_types
,
pusch_pdu
->
bwp_size
,
pusch_pdu
->
bwp_size
,
sched_ctrl
->
active_bwp
->
bwp_Id
);
sched_ctrl
->
active_bwp
->
bwp_Id
);
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
4124edff
...
@@ -386,6 +386,7 @@ typedef struct {
...
@@ -386,6 +386,7 @@ typedef struct {
/// selected PUCCH index, if scheduled
/// selected PUCCH index, if scheduled
int
pucch_sched_idx
;
int
pucch_sched_idx
;
int
pucch_occ_idx
;
int
pucch_occ_idx
;
NR_sched_pusch_save_t
pusch_save
;
NR_sched_pusch_t
sched_pusch
;
NR_sched_pusch_t
sched_pusch
;
/// CCE index and aggregation, should be coherent with cce_list
/// CCE index and aggregation, should be coherent with cce_list
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment