Commit 54d36600 authored by Sakthivel Velumani's avatar Sakthivel Velumani

Merge branch 'runel' of https://gitlab.eurecom.fr/oai/openairinterface5g into runel

parents 755a79fd 236ccc17
......@@ -516,7 +516,25 @@ void init_openair0(void) {
openair0_cfg[card].configFilename = NULL;
openair0_cfg[card].threequarter_fs = frame_parms[0]->threequarter_fs;
if(frame_parms[0]->N_RB_DL == 217) {
if(frame_parms[0]->N_RB_DL == 272) {
if (numerology==1) {
if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=92.16e6;
openair0_cfg[card].samples_per_frame = 921600;
openair0_cfg[card].tx_bw = 40e6;
openair0_cfg[card].rx_bw = 40e6;
}
else {
openair0_cfg[card].sample_rate=122.88e6;
openair0_cfg[card].samples_per_frame = 1228800;
openair0_cfg[card].tx_bw = 40e6;
openair0_cfg[card].rx_bw = 40e6;
}
} else {
LOG_E(PHY,"Unsupported numerology!\n");
exit(-1);
}
}else if(frame_parms[0]->N_RB_DL == 217) {
if (numerology==1) {
if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=92.16e6;
......
......@@ -137,11 +137,13 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
switch(mu) {
/*
case NR_MU_0: //15kHz scs
fp->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_0];
fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_0];
fp->ssb_type = nr_ssb_type_A;
break;
*/
case NR_MU_1: //30kHz scs
fp->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_1];
......@@ -157,65 +159,42 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
AssertFatal(1==0,"NR Operating Band n%d not available for SS block SCS with mu=%d\n", fp->eutra_band, mu);
}
switch(N_RB_DL){
case 11:
case 24:
case 38:
case 78:
case 51:
case 65:
case 106: //40 MHz
if (N_RB_DL>0 && N_RB_DL<=106) {
if (fp->threequarter_fs) {
fp->ofdm_symbol_size = 1536;
fp->first_carrier_offset = 900; //1536 - ( (106*12) / 2 )
fp->nb_prefix_samples0 = 132;
fp->nb_prefix_samples = 108;
}
else {
fp->ofdm_symbol_size = 2048;
fp->first_carrier_offset = 1412; //2048 - ( (106*12) / 2 )
fp->nb_prefix_samples0 = 176;
fp->nb_prefix_samples = 144;
}
break;
case 133:
case 162:
case 189:
case 217: //80 MHz
}
else if (N_RB_DL>106 && N_RB_DL<=217) {
if (fp->threequarter_fs) {
fp->ofdm_symbol_size = 3072;
fp->first_carrier_offset = 1770; //3072 - ( (217*12) / 2 )
fp->nb_prefix_samples0 = 264;
fp->nb_prefix_samples = 216;
}
else {
fp->ofdm_symbol_size = 4096;
fp->first_carrier_offset = 2794; //4096 - ( (217*12) / 2 )
fp->nb_prefix_samples0 = 352;
fp->nb_prefix_samples = 288;
}
break;
case 245:
AssertFatal(fp->threequarter_fs==0,"3/4 sampling impossible for N_RB %d and MU %d\n",N_RB_DL,mu);
fp->ofdm_symbol_size = 4096;
fp->first_carrier_offset = 2626; //4096 - ( (245*12) / 2 )
fp->nb_prefix_samples0 = 352;
fp->nb_prefix_samples = 288;
break;
case 273:
}
else if (N_RB_DL>217 && N_RB_DL<=273) {
AssertFatal(fp->threequarter_fs==0,"3/4 sampling impossible for N_RB %d and MU %d\n",N_RB_DL,mu);
fp->ofdm_symbol_size = 4096;
fp->first_carrier_offset = 2458; //4096 - ( (273*12) / 2 )
fp->nb_prefix_samples0 = 352;
fp->nb_prefix_samples = 288;
break;
default:
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", N_RB_DL, mu, fp);
}
else {
AssertFatal(1==0,"Unsupported configuration N_RB %d and MU %d\n",N_RB_DL,mu);
}
fp->first_carrier_offset = fp->ofdm_symbol_size - N_RB_DL*6;
break;
case NR_MU_2: //60kHz scs
......@@ -240,6 +219,7 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
}
break;
/*
case NR_MU_3:
fp->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_3];
fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_3];
......@@ -251,6 +231,7 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_4];
fp->ssb_type = nr_ssb_type_E;
break;
*/
default:
AssertFatal(1==0,"Invalid numerology index %d", mu);
......
......@@ -36,8 +36,8 @@
#include "PHY/MODULATION/nr_modulation.h"
//#define DEBUG_PDCCH_DMRS
//#define DEBUG_DCI
//#define DEBUG_CHANNEL_CODING
#define DEBUG_DCI
#define DEBUG_CHANNEL_CODING
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
......@@ -212,6 +212,10 @@ uint8_t nr_generate_dci_top(NR_gNB_DCI_ALLOC_t dci_alloc,
uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)?
pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
t_nrPolar_params *currentPtr = nr_polar_params(NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
printf("DCI PDU old: %lx\n",dci_alloc.dci_pdu[0]);
dci_alloc.dci_pdu[0] = 0x90B478F0000; // To test runel DCI with UE
printf("DCI PDU new: %lx\n",dci_alloc.dci_pdu[0]);
// dci_alloc.dci_pdu[1] = 0x0;
polar_encoder_fast(dci_alloc.dci_pdu, encoder_output, pdcch_params.rnti, 1, currentPtr);
#ifdef DEBUG_CHANNEL_CODING
printf("polar rnti %d\n",pdcch_params.rnti);
......
......@@ -160,7 +160,7 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
dlsch->harq_mask |= (1<<pdu_rel15->harq_pid);
dlsch->rnti = params_rel15->rnti;
dci_alloc->L = 8;
dci_alloc->L = 4;
memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
dci_alloc->size = nr_get_dci_size(dci_alloc->pdcch_params.dci_format,
dci_alloc->pdcch_params.rnti_type,
......
......@@ -49,7 +49,7 @@
//#define NR_LTE_PDCCH_DCI_SWITCH
#define NR_PDCCH_DCI_RUN // activates new nr functions
//#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
#ifdef NR_PDCCH_DCI_DEBUG
#define LOG_DNL(a, ...) printf("\n\t\t<-NR_PDCCH_DCI_DEBUG (%s)-> " a, __func__, ##__VA_ARGS__ )
#define LOG_DD(a, ...) printf("\t<-NR_PDCCH_DCI_DEBUG (%s)-> " a, __func__, ##__VA_ARGS__ )
......@@ -1352,14 +1352,14 @@ void nr_dci_decoding_procedure0(int s,
*format_found=_format_1_0_found;
// LOG_DDD("a format1_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
} else {
if ((dci_estimation[0]&1) == 0) {
if ((dci_estimation[0]>>(sizeof_bits-1)) == 0) {
dci_alloc[*dci_cnt].format = format0_0;
*dci_cnt = *dci_cnt + 1;
*format_found=_format_0_0_found;
// LOG_DDD("b format0_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
}
if ((dci_estimation[0]&1) == 1) {
if ((dci_estimation[0]>>(sizeof_bits-1)) == 1) {
dci_alloc[*dci_cnt].format = format1_0;
*dci_cnt = *dci_cnt + 1;
*format_found=_format_1_0_found;
......@@ -2556,6 +2556,12 @@ uint8_t nr_dci_decoding_procedure(int s,
}
coreset_nbr_rb = 6 * coreset_nbr_rb;
#ifdef NR_PDCCH_DCI_DEBUG
printf("PDCCH_DMRS_Scrambling_ID %d coreset_nbr_rb %d coreset_freq_dom %lx coreset_time_dur %d\n",
pdcch_DMRS_scrambling_id,coreset_nbr_rb,coreset_freq_dom,coreset_time_dur);
#endif
// coreset_time_dur,coreset_nbr_rb,
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
//uint8_t mi;// = get_mi(&ue->frame_parms, nr_tti_rx);
......@@ -2782,13 +2788,13 @@ uint8_t nr_dci_decoding_procedure(int s,
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
LOG_DD("calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
uss_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8
//for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
// for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
LOG_DD("common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
LOG_DD("UE-specific searchSpaces with format uss_dci_format=%d and aggregation_level=%d\n",
uss_dci_format,(1<<aggregationLevel));
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
......
......@@ -2834,7 +2834,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
// Higher layers have updated the number of searchSpaces with are active in the current slot and this value is stored in variable nb_searchspace_total
int nb_searchspace_total = pdcch_vars2->nb_search_space;
pdcch_vars[eNB_id]->crnti = 0x1234; //to be check how to set when using loop memory
pdcch_vars[eNB_id]->crnti = 1000;// 0x1234; //to be check how to set when using loop memory
uint16_t c_rnti=pdcch_vars[eNB_id]->crnti;
uint16_t cs_rnti=0,new_rnti=0,tc_rnti=0;
......@@ -4142,7 +4142,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
uint16_t nb_symb_sch = dlsch0_harq->nb_symbols;
uint16_t start_symb_sch = dlsch0_harq->start_symbol;
uint8_t nb_symb_pdcch = pdcch_vars->coreset[0].duration;
uint8_t ssb_periodicity = 10;// ue->ssb_periodicity; // initialized to 5ms in nr_init_ue for scenarios where UE is not configured (otherwise acquired by cell configuration from gNB or LTE)
uint8_t ssb_periodicity = 20;// ue->ssb_periodicity; // initialized to 5ms in nr_init_ue for scenarios where UE is not configured (otherwise acquired by cell configuration from gNB or LTE)
uint8_t dci_cnt = 0;
fapi_nr_pbch_config_t *pbch_config = &ue->nrUE_config.pbch_config;
......
......@@ -422,8 +422,8 @@ int main(int argc, char **argv)
printf("-o CORESET offset\n");
printf("-a Start PRB for PDSCH\n");
printf("-b Number of PRB for PDSCH\n");
printf("-c Start symbol for PDSCH (fixed for now)\n");
printf("-j Number of symbols for PDSCH (fixed for now)\n");
// printf("-c Start symbol for PDSCH (2 or 1)\n");
printf("-j Number of symbols for PDSCH (9 or 13)\n");
printf("-e MSC index\n");
exit (-1);
break;
......@@ -469,7 +469,7 @@ int main(int argc, char **argv)
fs = 122.88e6;
bw = 90e6;
}
else if (mu == 1 && N_RB_DL == 273) {
else if (mu == 1 && N_RB_DL == 272) {
fs = 122.88e6;
bw = 100e6;
}
......@@ -683,9 +683,9 @@ int main(int argc, char **argv)
uint64_t mask = 0x0;
uint16_t num_rbs=24;
uint16_t rb_offset=gNB->pdcch_vars.dci_alloc[0].pdcch_params.rb_offset;
uint16_t cell_id=0;
uint16_t num_symbols=2;
uint16_t rb_offset=120;//gNB->pdcch_vars.dci_alloc[0].pdcch_params.rb_offset;
uint16_t cell_id=47;
uint16_t num_symbols=1;
for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
mask = mask >> 1;
mask = mask | 0x100000000000;
......
......@@ -364,29 +364,22 @@ int main(int argc, char **argv)
double fs,bw,scs,eps;
switch (mu) {
case 1:
if (mu == 1) {
scs = 30000;
if (N_RB_DL == 217) {
if (N_RB_DL > 106 && N_RB_DL <= 273) {
fs = 122.88e6;
bw = 80e6;
}
else if (N_RB_DL == 245) {
fs = 122.88e6;
bw = 90e6;
}
else if (N_RB_DL == 273) {
fs = 122.88e6;
bw = 100e6;
}
else if (N_RB_DL == 106) {
else if (N_RB_DL > 0 && N_RB_DL <= 106) {
fs = 61.44e6;
bw = 40e6;
}
else AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL);
break;
else
AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL);
}
else
AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL);
// cfo with respect to sub-carrier spacing
eps = cfo/scs;
......
......@@ -126,6 +126,7 @@ openair0_config_t openair0_cfg[MAX_CARDS];
int main(int argc, char **argv)
{
char c;
float target_error_rate = 0.1;
int i,sf;
double SNR, snr0 = -2.0, snr1 = 2.0;
double sigma, sigma_dB;
......@@ -655,30 +656,28 @@ int main(int argc, char **argv)
}
if (errors_decoding > 0) {
is_frame_in_error = 1;
n_false_positive++;
printf("\x1B[31m""[frame %d][trial %d]\tnumber of errors in decoding = %d\n" "\x1B[0m", frame, trial, errors_decoding);
} else {
is_frame_in_error = 0;
break;
}
////////////////////////////////////////////////////////////
} // trial loop
if (is_frame_in_error == 1)
if((float)n_false_positive/(float)n_trials > target_error_rate) {
is_frame_in_error = 1;
break;
} else {
is_frame_in_error = 0;
}
} // frame loop
if(is_frame_in_error == 0 || number_of_frames==1)
break;
} // SNR loop
if(is_frame_in_error == 0) {
printf("\n");
printf("*************\n");
printf("PUSCH test OK\n");
printf("*************\n");
break;
}
} // SNR loop
printf("\n");
......
......@@ -448,7 +448,7 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
//MIB
int32_t MIB_subCarrierSpacingCommon = 0;
int32_t MIB_ssb_SubcarrierOffset = 0;
int32_t MIB_dmrs_TypeA_Position = 0;
int32_t MIB_dmrs_TypeA_Position = 2;
int32_t pdcch_ConfigSIB1 = 0;
//SIB1
......
......@@ -38,6 +38,8 @@
#include "common/utils/LOG/log.h"
#include "openair2/LAYER2/MAC/mac.h"
//#define DEBUG_MIB
#include <stdio.h>
#include <math.h>
......@@ -235,7 +237,7 @@ int8_t nr_ue_decode_mib(
nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, NR_BCCH_BCH, (uint8_t *) pduP, 3 ); // fixed 3 bytes MIB PDU
AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n");
//if(mac->mib != NULL){
uint16_t frame = (mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused);
uint16_t frame_number_4lsb = 0;
for (int i=0; i<4; i++)
......@@ -264,7 +266,8 @@ int8_t nr_ue_decode_mib(
LOG_I(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon);
LOG_I(MAC,"ssb carrier offset(with MSB): %d\n", (int)ssb_subcarrier_offset);
LOG_I(MAC,"dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position);
LOG_I(MAC,"pdcch config sib1: %d\n", (int)mac->mib->pdcch_ConfigSIB1);
LOG_I(MAC,"pdcch config sib1 controlResourceSetZero: %d\n", (int)mac->mib->pdcch_ConfigSIB1.controlResourceSetZero);
LOG_I(MAC,"pdcch config sib1 searchSapceZero: %d\n", (int)mac->mib->pdcch_ConfigSIB1.searchSpaceZero);
LOG_I(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
LOG_I(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
LOG_I(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit);
......@@ -417,13 +420,19 @@ int8_t nr_ue_decode_mib(
//mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
//mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
//changed for runel test
num_rbs = 24;
num_symbols = 1;
rb_offset = 120;
uint64_t mask = 0x0;
uint8_t i;
for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
mask = mask >> 1;
mask = mask | 0x100000000000;
}
//LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset);
uint16_t UE_rb_offset_count = rb_offset/6;
mask = mask >> UE_rb_offset_count;
LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset);
mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask;
mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset
......
......@@ -164,7 +164,7 @@ int configure_fapi_dl_Tx(nfapi_nr_dl_config_request_body_t *dl_req,
nfapi_nr_dl_config_request_pdu_t *dl_config_dci_pdu;
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu;
int TBS;
uint16_t rnti = 0x1234;
uint16_t rnti = 1000; //0x1234;
int dl_carrier_bandwidth = cfg->rf_config.dl_carrier_bandwidth.value;
dl_config_dci_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void *)dl_config_dci_pdu,0,sizeof(nfapi_nr_dl_config_request_pdu_t));
......@@ -202,7 +202,7 @@ int configure_fapi_dl_Tx(nfapi_nr_dl_config_request_body_t *dl_req,
*cfg,
dl_carrier_bandwidth);
pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value);
pdu_rel15->time_domain_assignment = 3; // row index used here instead of SLIV;
pdu_rel15->time_domain_assignment = (dlsch_pdu_rel15->nb_symbols == 13) ? 12 : 3; // row index used here instead of SLIV; for now UE supports 9 or 13 (refer the table)
pdu_rel15->vrb_to_prb_mapping = 1;
pdu_rel15->mcs = dlsch_pdu_rel15->mcs_idx;
pdu_rel15->tb_scaling = 1;
......
......@@ -51,14 +51,14 @@ void set_cset_offset(uint16_t offset_bits) {
void nr_init_coreset(nfapi_nr_coreset_t *coreset) {
coreset->coreset_id = 1;
coreset->frequency_domain_resources = 0x1E00000000;//0x1FFFE0000000; // 96 RB starting from CRB0
coreset->duration = 2;
coreset->frequency_domain_resources = 0x1E00000;//0x1FFFE0000000; // 96 RB starting from CRB0
coreset->duration = 1;
coreset->cce_reg_mapping_type = NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED;
coreset->reg_bundle_size = 6;
coreset->interleaver_size = 2;
coreset->precoder_granularity = NFAPI_NR_CSET_SAME_AS_REG_BUNDLE;
coreset->tci_present_in_dci = 0;
coreset->dmrs_scrambling_id = 0;
coreset->dmrs_scrambling_id = 47;
}
void nr_init_search_space(nfapi_nr_search_space_t *search_space)
......
......@@ -315,13 +315,15 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
uint64_t mask = 0x0;
uint16_t num_rbs=24;
uint16_t rb_offset=0;
uint16_t cell_id=0;
uint16_t num_symbols=2;
uint16_t rb_offset=120;
uint16_t cell_id=47;
uint16_t num_symbols=1;
for(int i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
mask = mask >> 1;
mask = mask | 0x100000000000;
}
uint16_t UE_rb_offset_count = rb_offset/6;
mask = mask >> UE_rb_offset_count;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.frequency_domain_resource = mask;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset; // additional parameter other than coreset
......
......@@ -297,6 +297,9 @@ int8_t nr_ue_process_spcell_config(NR_SpCellConfig_t *spcell_config){
return 0;
}
// this is a local variable that holds a fake MIB to workaround the problem with Runel
NR_MIB_t mib_runel;
/*brief decode BCCH-BCH (MIB) message*/
int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
const module_id_t module_id,
......@@ -321,17 +324,39 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
(void **)&bcch_message,
(const void *)bufferP,
buffer_len );
if ((dec_rval.code != RC_OK) || (dec_rval.consumed == 0)) {
printf("NR_BCCH_BCH decode error\n");
printf("NR_BCCH_BCH decode error (return value %d)\n",dec_rval.code);
for (i=0; i<buffer_len; i++){
printf("%02x ",bufferP[i]);
}
printf("\n");
mib = NULL;
// free the memory
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)bcch_message, 1 );
return -1;
}
else if (bcch_message->message.present != NR_BCCH_BCH_MessageType_PR_mib) {
printf("NR_BCCH_BCH message type is not MIB, using dummy MIB\n");
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)bcch_message, 1 );
if (mib_runel.systemFrameNumber.buf==NULL) {
uint8_t sfn_msb = 0;
mib_runel.systemFrameNumber.buf = CALLOC(1,sizeof(uint8_t));
mib_runel.systemFrameNumber.buf[0] = sfn_msb << 2;
mib_runel.systemFrameNumber.size = 1;
mib_runel.systemFrameNumber.bits_unused=2;
}
mib_runel.subCarrierSpacingCommon = 1;
mib_runel.ssb_SubcarrierOffset = 0;
mib_runel.dmrs_TypeA_Position = 0;
mib_runel.pdcch_ConfigSIB1.controlResourceSetZero = 0;
mib_runel.pdcch_ConfigSIB1.searchSpaceZero = 0;
mib_runel.cellBarred = 1;
mib_runel.intraFreqReselection = 1;
mib = &mib_runel;
nr_rrc_mac_config_req_ue( 0, 0, 0, mib, NULL, NULL, NULL);
}
else {
// link to rrc instance
mib = bcch_message->message.choice.mib;
......
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