Commit 7fb14ab3 authored by Florian Kaltenberger's avatar Florian Kaltenberger

adding MAC part of 5G FAPI interface for PUSCH. Since the previous version was...

adding MAC part of 5G FAPI interface for PUSCH. Since the previous version was incomplete anyway I merged in the new SCF specs and used those (only for PUSCH). Todo: implement PHY part.
parent fa040160
...@@ -17,6 +17,12 @@ ...@@ -17,6 +17,12 @@
#define NFAPI_NR_MAX_NB_CORESETS 12 #define NFAPI_NR_MAX_NB_CORESETS 12
#define NFAPI_NR_MAX_NB_SEARCH_SPACES 40 #define NFAPI_NR_MAX_NB_SEARCH_SPACES 40
#define NFAPI_MAX_NUM_UL_UE_PER_GROUP 6
#define NFAPI_MAX_NUM_UL_PDU 8
#define NFAPI_MAX_NUM_GROUPS 8
#define NFAPI_MAX_NUM_CB 8
/*
// Extension to the generic structures for single tlv values // Extension to the generic structures for single tlv values
typedef struct { typedef struct {
nfapi_tl_t tl; nfapi_tl_t tl;
...@@ -27,6 +33,7 @@ typedef struct { ...@@ -27,6 +33,7 @@ typedef struct {
nfapi_tl_t tl; nfapi_tl_t tl;
uint32_t value; uint32_t value;
} nfapi_uint32_tlv_t; } nfapi_uint32_tlv_t;
*/
// 2019.8 // 2019.8
// SCF222_5G-FAPI_PHY_SPI_Specificayion.pdf Section 3.2 // SCF222_5G-FAPI_PHY_SPI_Specificayion.pdf Section 3.2
...@@ -259,7 +266,7 @@ typedef struct { ...@@ -259,7 +266,7 @@ typedef struct {
typedef struct { typedef struct {
uint8_t number_of_tlvs; uint8_t number_of_tlvs;
nfapi_nr_config_tlv_t tlv; nfapi_nr_config_tlv_t tlv;
} nfapi_nr_config_request_t; } nfapi_nr_config_request_scf_t;
typedef enum { typedef enum {
NFAPI_NR_CONFIG_MSG_OK = 0, NFAPI_NR_CONFIG_MSG_OK = 0,
...@@ -830,8 +837,7 @@ typedef struct ...@@ -830,8 +837,7 @@ typedef struct
uint8_t new_data_indicator; uint8_t new_data_indicator;
uint32_t tb_size; uint32_t tb_size;
uint16_t num_cb; uint16_t num_cb;
// fixme: uint8_t cb_present_and_position[(NFAPI_MAX_NUM_CB+7) / 8];
uint8_t *cb_present_and_position;//uint8_t cb_present_and_position[ceil (num_cb / 8)]
} nfapi_nr_pusch_data_t; } nfapi_nr_pusch_data_t;
//for nfapi_nr_pusch_uci_t //for nfapi_nr_pusch_uci_t
...@@ -875,9 +881,14 @@ typedef struct ...@@ -875,9 +881,14 @@ typedef struct
} nfapi_nr_dfts_ofdm_t; } nfapi_nr_dfts_ofdm_t;
#define PUSCH_PDU_BITMAP_PUSCH_DATA 0x1
#define PUSCH_PDU_BITMAP_PUSCH_UCI 0x2
#define PUSCH_PDU_BITMAP_PUSCH_PTRS 0x4
#define PUSCH_PDU_BITMAP_DFTS_OFDM 0x8
typedef struct typedef struct
{ {
uint16_t pdu_bit_map;// uint16_t pdu_bit_map;//Bitmap indicating presence of optional PDUs (see above)
uint16_t rnti; uint16_t rnti;
uint32_t handle;//An opaque handling returned in the RxData.indication and/or UCI.indication message uint32_t handle;//An opaque handling returned in the RxData.indication and/or UCI.indication message
//BWP //BWP
...@@ -892,6 +903,7 @@ typedef struct ...@@ -892,6 +903,7 @@ typedef struct
uint8_t mcs_table; uint8_t mcs_table;
uint8_t transform_precoding; uint8_t transform_precoding;
uint16_t data_scrambling_id; uint16_t data_scrambling_id;
uint8_t nrOfLayers;
//DMRS //DMRS
uint8_t ul_dmrs_symb_pos; uint8_t ul_dmrs_symb_pos;
uint8_t dmrs_config_type; uint8_t dmrs_config_type;
...@@ -1002,19 +1014,25 @@ typedef struct ...@@ -1002,19 +1014,25 @@ typedef struct
} nfapi_nr_srs_pdu_t; } nfapi_nr_srs_pdu_t;
// //
typedef struct
{ typedef enum {
nfapi_nr_prach_pdu_t* prach_pdu; NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE=0,
nfapi_nr_pusch_pdu_t* pusch_pdu; NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE,
nfapi_nr_pucch_pdu_t* pucch_pdu; NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE,
nfapi_nr_srs_pdu_t* srs_pdu; NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE,
} nfapi_nr_ul_pdu_configuration_t; } nfapi_nr_ul_config_pdu_type_e;
typedef struct typedef struct
{ {
uint16_t pdu_type;//0: PRACH PDU, 1: PUSCH PDU, 2: PUCCH PDU, 3: SRS PDU uint16_t pdu_type;//0: PRACH PDU, 1: PUSCH PDU, 2: PUCCH PDU, 3: SRS PDU
uint16_t pdu_size;//Value: 0 -> 65535 uint16_t pdu_size;//Value: 0 -> 65535
nfapi_nr_ul_pdu_configuration_t* ul_pdu_configuration; union
{
nfapi_nr_prach_pdu_t prach_pdu;
nfapi_nr_pusch_pdu_t pusch_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
nfapi_nr_srs_pdu_t srs_pdu;
};
} nfapi_nr_ul_tti_request_number_of_pdus_t; } nfapi_nr_ul_tti_request_number_of_pdus_t;
...@@ -1027,7 +1045,7 @@ typedef struct ...@@ -1027,7 +1045,7 @@ typedef struct
typedef struct typedef struct
{ {
uint8_t n_ue;//Number of UE in this group For SU-MIMO, one group includes one UE only. For MU-MIMO, one group includes up to 12 UEs. Value 1 -> 6 uint8_t n_ue;//Number of UE in this group For SU-MIMO, one group includes one UE only. For MU-MIMO, one group includes up to 12 UEs. Value 1 -> 6
nfapi_nr_ul_tti_request_number_of_ue_t* ue_list; nfapi_nr_ul_tti_request_number_of_ue_t ue_list[NFAPI_MAX_NUM_UL_UE_PER_GROUP];
} nfapi_nr_ul_tti_request_number_of_groups_t; } nfapi_nr_ul_tti_request_number_of_groups_t;
...@@ -1039,8 +1057,8 @@ typedef struct { ...@@ -1039,8 +1057,8 @@ typedef struct {
uint8_t n_ulsch;//Number of ULSCH PDUs that are included in this message. uint8_t n_ulsch;//Number of ULSCH PDUs that are included in this message.
uint8_t n_ulcch;//Number of ULCCH PDUs uint8_t n_ulcch;//Number of ULCCH PDUs
uint8_t n_group;//Number of UE Groups included in this message. Value 0 -> 8 uint8_t n_group;//Number of UE Groups included in this message. Value 0 -> 8
nfapi_nr_ul_tti_request_number_of_pdus_t* pdus_list; nfapi_nr_ul_tti_request_number_of_pdus_t pdus_list[NFAPI_MAX_NUM_UL_PDU];
nfapi_nr_ul_tti_request_number_of_groups_t* groups_list; nfapi_nr_ul_tti_request_number_of_groups_t groups_list[NFAPI_MAX_NUM_GROUPS];
} nfapi_nr_ul_tti_request_t; } nfapi_nr_ul_tti_request_t;
......
...@@ -986,7 +986,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB, ...@@ -986,7 +986,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
first_symbol_flag = 1; first_symbol_flag = 1;
} }
if (symbol == 2){ // [hna] here it is assumed that symbol 2 carries 6 DMRS REs (dmrs-type 1) if (symbol == rel15_ul->start_symbol){ // [hna] here it is assumed that first carries 6 DMRS REs (dmrs-type 1)
nb_re_pusch = rel15_ul->number_rbs * 6; nb_re_pusch = rel15_ul->number_rbs * 6;
pilots = 1; pilots = 1;
} else { } else {
......
...@@ -76,7 +76,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, ...@@ -76,7 +76,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
sub_frame_t slotP){ sub_frame_t slotP){
nfapi_nr_dl_config_request_t *DL_req = &gNB->DL_req[0]; nfapi_nr_dl_config_request_t *DL_req = &gNB->DL_req[0];
nfapi_ul_config_request_t *UL_req = &gNB->UL_req[0]; nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req[0];
nfapi_hi_dci0_request_t * HI_DCI0_req = &gNB->HI_DCI0_req[0]; nfapi_hi_dci0_request_t * HI_DCI0_req = &gNB->HI_DCI0_req[0];
nfapi_tx_request_t *TX_req = &gNB->TX_req[0]; nfapi_tx_request_t *TX_req = &gNB->TX_req[0];
...@@ -93,9 +93,10 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, ...@@ -93,9 +93,10 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0; HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0;
UL_req[CC_idP].ul_config_request_body.number_of_pdus = 0; UL_tti_req[CC_idP].n_pdus = 0;
UL_req[CC_idP].ul_config_request_body.rach_prach_frequency_resources = 0; // ignored, handled by PHY for now UL_tti_req[CC_idP].n_ulsch = 0;
UL_req[CC_idP].ul_config_request_body.srs_present = 0; // ignored, handled by PHY for now UL_tti_req[CC_idP].n_ulcch = 0;
UL_tti_req[CC_idP].n_group = 0;
TX_req[CC_idP].tx_request_body.number_of_pdus = 0; TX_req[CC_idP].tx_request_body.number_of_pdus = 0;
...@@ -261,6 +262,8 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram ...@@ -261,6 +262,8 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
} }
} }
*/ */
/*
void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
{ {
int CC_id; int CC_id;
...@@ -289,6 +292,7 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -289,6 +292,7 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
ul_req->ul_config_request_body.number_of_pdus*sizeof(nfapi_ul_config_request_pdu_t)); ul_req->ul_config_request_body.number_of_pdus*sizeof(nfapi_ul_config_request_pdu_t));
} }
} }
*/
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frameP, frame_t frameP,
...@@ -401,6 +405,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -401,6 +405,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} }
} }
/*
for(int j = 0; j < 10; j++){ for(int j = 0; j < 10; j++){
nfapi_ul_config_request_body_t *ul_req_tmp = NULL; nfapi_ul_config_request_body_t *ul_req_tmp = NULL;
ul_req_tmp = &RC.nrmac[module_idP]->UL_req_tmp[CC_id][j].ul_config_request_body; ul_req_tmp = &RC.nrmac[module_idP]->UL_req_tmp[CC_id][j].ul_config_request_body;
...@@ -418,6 +423,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -418,6 +423,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} }
} }
rrc_mac_remove_ue(module_idP,rnti); rrc_mac_remove_ue(module_idP,rnti);
*/
} }
} //END if (RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer > 0) } //END if (RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer > 0)
} //END if (UE_list->active[i]) } //END if (UE_list->active[i])
......
...@@ -74,7 +74,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -74,7 +74,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
dl_config_dlsch_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE; dl_config_dlsch_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE;
dl_config_dlsch_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_nr_dl_config_dlsch_pdu)); dl_config_dlsch_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_nr_dl_config_dlsch_pdu));
nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &dl_config_dci_pdu->dci_dl_pdu.dci_dl_pdu_rel15; nfapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_dl_pdu_rel15 = &dl_config_dci_pdu->dci_dl_pdu.dci_dl_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &dl_config_dci_pdu->dci_dl_pdu.pdcch_params_rel15; nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &dl_config_dci_pdu->dci_dl_pdu.pdcch_params_rel15;
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15; nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15;
...@@ -98,30 +98,30 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -98,30 +98,30 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
params_rel15->first_slot = 0; params_rel15->first_slot = 0;
pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value); dci_dl_pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value);
pdu_rel15->time_domain_assignment = 3; // row index used here instead of SLIV dci_dl_pdu_rel15->time_domain_assignment = 3; // row index used here instead of SLIV
pdu_rel15->vrb_to_prb_mapping = 1; dci_dl_pdu_rel15->vrb_to_prb_mapping = 1;
pdu_rel15->mcs = 9; dci_dl_pdu_rel15->mcs = 9;
pdu_rel15->tb_scaling = 1; dci_dl_pdu_rel15->tb_scaling = 1;
pdu_rel15->ra_preamble_index = 25; dci_dl_pdu_rel15->ra_preamble_index = 25;
pdu_rel15->format_indicator = 1; dci_dl_pdu_rel15->format_indicator = 1;
pdu_rel15->ndi = 1; dci_dl_pdu_rel15->ndi = 1;
pdu_rel15->rv = 0; dci_dl_pdu_rel15->rv = 0;
pdu_rel15->harq_pid = 0; dci_dl_pdu_rel15->harq_pid = 0;
pdu_rel15->dai = 2; dci_dl_pdu_rel15->dai = 2;
pdu_rel15->tpc = 2; dci_dl_pdu_rel15->tpc = 2;
pdu_rel15->pucch_resource_indicator = 7; dci_dl_pdu_rel15->pucch_resource_indicator = 7;
pdu_rel15->pdsch_to_harq_feedback_timing_indicator = 7; dci_dl_pdu_rel15->pdsch_to_harq_feedback_timing_indicator = 7;
LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n", LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
pdu_rel15->frequency_domain_assignment, dci_dl_pdu_rel15->frequency_domain_assignment,
pdu_rel15->time_domain_assignment, dci_dl_pdu_rel15->time_domain_assignment,
pdu_rel15->vrb_to_prb_mapping, dci_dl_pdu_rel15->vrb_to_prb_mapping,
pdu_rel15->mcs, dci_dl_pdu_rel15->mcs,
pdu_rel15->tb_scaling, dci_dl_pdu_rel15->tb_scaling,
pdu_rel15->ndi, dci_dl_pdu_rel15->ndi,
pdu_rel15->rv); dci_dl_pdu_rel15->rv);
params_rel15->rnti = rnti; params_rel15->rnti = rnti;
params_rel15->rnti_type = NFAPI_NR_RNTI_C; params_rel15->rnti_type = NFAPI_NR_RNTI_C;
...@@ -183,9 +183,11 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -183,9 +183,11 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
//NR_COMMON_channels_t *cc = nr_mac->common_channels; //NR_COMMON_channels_t *cc = nr_mac->common_channels;
nfapi_nr_dl_config_request_body_t *dl_req; nfapi_nr_dl_config_request_body_t *dl_req;
nfapi_nr_pusch_pdu_t *ul_req;
nfapi_nr_dl_config_request_pdu_t *dl_config_dci_pdu; nfapi_nr_dl_config_request_pdu_t *dl_config_dci_pdu;
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu; nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu;
nfapi_tx_request_pdu_t *TX_req; nfapi_tx_request_pdu_t *TX_req;
nfapi_nr_ul_tti_request_t *UL_tti_req;
nfapi_nr_config_request_t *cfg = &nr_mac->config[0]; nfapi_nr_config_request_t *cfg = &nr_mac->config[0];
uint16_t rnti = 0x1234; uint16_t rnti = 0x1234;
...@@ -213,10 +215,11 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -213,10 +215,11 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
dl_config_dlsch_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE; dl_config_dlsch_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE;
dl_config_dlsch_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_nr_dl_config_dlsch_pdu)); dl_config_dlsch_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_nr_dl_config_dlsch_pdu));
nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &dl_config_dci_pdu->dci_dl_pdu.dci_dl_pdu_rel15; nfapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_dl_pdu_rel15 = &dl_config_dci_pdu->dci_dl_pdu.dci_dl_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &dl_config_dci_pdu->dci_dl_pdu.pdcch_params_rel15; nfapi_nr_dl_config_pdcch_parameters_rel15_t *pdcch_params_rel15 = &dl_config_dci_pdu->dci_dl_pdu.pdcch_params_rel15;
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15; nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu_rel15 = &dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15;
dlsch_pdu_rel15->start_prb = 0; dlsch_pdu_rel15->start_prb = 0;
dlsch_pdu_rel15->n_prb = 50; dlsch_pdu_rel15->n_prb = 50;
dlsch_pdu_rel15->start_symbol = 2; dlsch_pdu_rel15->start_symbol = 2;
...@@ -228,55 +231,55 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -228,55 +231,55 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
dlsch_pdu_rel15->ndi = 1; dlsch_pdu_rel15->ndi = 1;
dlsch_pdu_rel15->redundancy_version = 0; dlsch_pdu_rel15->redundancy_version = 0;
nr_configure_dci_from_pdcch_config(params_rel15, nr_configure_dci_from_pdcch_config(pdcch_params_rel15,
coreset, coreset,
search_space, search_space,
*cfg, *cfg,
dl_carrier_bandwidth); dl_carrier_bandwidth);
pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value); dci_dl_pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value);
pdu_rel15->time_domain_assignment = 3; // row index used here instead of SLIV; dci_dl_pdu_rel15->time_domain_assignment = 3; // row index used here instead of SLIV;
pdu_rel15->vrb_to_prb_mapping = 1; dci_dl_pdu_rel15->vrb_to_prb_mapping = 1;
pdu_rel15->mcs = 9; dci_dl_pdu_rel15->mcs = 9;
pdu_rel15->tb_scaling = 1; dci_dl_pdu_rel15->tb_scaling = 1;
pdu_rel15->ra_preamble_index = 25; dci_dl_pdu_rel15->ra_preamble_index = 25;
pdu_rel15->format_indicator = 1; dci_dl_pdu_rel15->format_indicator = 1;
pdu_rel15->ndi = 1; dci_dl_pdu_rel15->ndi = 1;
pdu_rel15->rv = 0; dci_dl_pdu_rel15->rv = 0;
pdu_rel15->harq_pid = 0; dci_dl_pdu_rel15->harq_pid = 0;
pdu_rel15->dai = 2; dci_dl_pdu_rel15->dai = 2;
pdu_rel15->tpc = 2; dci_dl_pdu_rel15->tpc = 2;
pdu_rel15->pucch_resource_indicator = 7; dci_dl_pdu_rel15->pucch_resource_indicator = 7;
pdu_rel15->pdsch_to_harq_feedback_timing_indicator = 7; dci_dl_pdu_rel15->pdsch_to_harq_feedback_timing_indicator = 7;
LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n", LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
pdu_rel15->frequency_domain_assignment, dci_dl_pdu_rel15->frequency_domain_assignment,
pdu_rel15->time_domain_assignment, dci_dl_pdu_rel15->time_domain_assignment,
pdu_rel15->vrb_to_prb_mapping, dci_dl_pdu_rel15->vrb_to_prb_mapping,
pdu_rel15->mcs, dci_dl_pdu_rel15->mcs,
pdu_rel15->tb_scaling, dci_dl_pdu_rel15->tb_scaling,
pdu_rel15->ndi, dci_dl_pdu_rel15->ndi,
pdu_rel15->rv); dci_dl_pdu_rel15->rv);
params_rel15->rnti = rnti; pdcch_params_rel15->rnti = rnti;
params_rel15->rnti_type = NFAPI_NR_RNTI_C; pdcch_params_rel15->rnti_type = NFAPI_NR_RNTI_C;
params_rel15->dci_format = NFAPI_NR_DL_DCI_FORMAT_1_0; pdcch_params_rel15->dci_format = NFAPI_NR_DL_DCI_FORMAT_1_0;
//params_rel15->aggregation_level = 1; //pdcch_params_rel15->aggregation_level = 1;
LOG_D(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d, config type %d\n \ LOG_D(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d, config type %d\n \
coreset params: mux_pattern %d, n_rb %d, n_symb %d, rb_offset %d \n \ coreset params: mux_pattern %d, n_rb %d, n_symb %d, rb_offset %d \n \
ss params : first symb %d, ss type %d\n", ss params : first symb %d, ss type %d\n",
params_rel15->rnti, pdcch_params_rel15->rnti,
params_rel15->rnti_type, pdcch_params_rel15->rnti_type,
params_rel15->config_type, pdcch_params_rel15->config_type,
params_rel15->dci_format, pdcch_params_rel15->dci_format,
params_rel15->mux_pattern, pdcch_params_rel15->mux_pattern,
params_rel15->n_rb, pdcch_params_rel15->n_rb,
params_rel15->n_symb, pdcch_params_rel15->n_symb,
params_rel15->rb_offset, pdcch_params_rel15->rb_offset,
params_rel15->first_symbol, pdcch_params_rel15->first_symbol,
params_rel15->search_space_type); pdcch_params_rel15->search_space_type);
nr_get_tbs(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu, *cfg); nr_get_tbs(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu, *cfg);
LOG_D(MAC, "DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d\n", LOG_D(MAC, "DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d\n",
dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->start_prb,
...@@ -310,5 +313,90 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -310,5 +313,90 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG; nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
nr_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST; nr_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
UL_tti_req = &nr_mac->UL_tti_req[CC_id];
UL_tti_req->sfn = frameP;
UL_tti_req->slot = slotP;
UL_tti_req->n_pdus = 1;
UL_tti_req->pdus_list[0].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
UL_tti_req->pdus_list[0].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu;
memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t));
/*
// original configuration
rel15_ul->rnti = 0x1234;
rel15_ul->ulsch_pdu_rel15.start_rb = 30;
rel15_ul->ulsch_pdu_rel15.number_rbs = 50;
rel15_ul->ulsch_pdu_rel15.start_symbol = 2;
rel15_ul->ulsch_pdu_rel15.number_symbols = 12;
rel15_ul->ulsch_pdu_rel15.nb_re_dmrs = 6;
rel15_ul->ulsch_pdu_rel15.length_dmrs = 1;
rel15_ul->ulsch_pdu_rel15.Qm = 2;
rel15_ul->ulsch_pdu_rel15.mcs = 9;
rel15_ul->ulsch_pdu_rel15.rv = 0;
rel15_ul->ulsch_pdu_rel15.n_layers = 1;
*/
pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
pusch_pdu->rnti = rnti;
pusch_pdu->handle = 0; //not yet used
//BWP related paramters - we don't yet use them as the PHY only uses one default BWP
//pusch_pdu->bwp_size;
//pusch_pdu->bwp_start;
//pusch_pdu->subcarrier_spacing;
//pusch_pdu->cyclic_prefix;
//pusch information always include
//this informantion seems to be redundant. with hthe mcs_index and the modulation table, the mod_order and target_code_rate can be determined.
pusch_pdu->mcs_index = 9;
pusch_pdu->mcs_table = 0; //0: notqam256 [TS38.214, table 5.1.3.1-1] - corresponds to nr_target_code_rate_table1 in PHY
pusch_pdu->target_code_rate = nr_get_code_rate(pusch_pdu->mcs_index,pusch_pdu->mcs_table+1) ;
pusch_pdu->qam_mod_order = nr_get_Qm(pusch_pdu->mcs_index,pusch_pdu->mcs_table+1) ;
pusch_pdu->transform_precoding = 0;
pusch_pdu->data_scrambling_id = 0; //It equals the higher-layer parameter Data-scrambling-Identity if configured and the RNTI equals the C-RNTI, otherwise L2 needs to set it to physical cell id.;
pusch_pdu->nrOfLayers = 1;
//DMRS
pusch_pdu->ul_dmrs_symb_pos = 1;
pusch_pdu->dmrs_config_type = 0; //dmrs-type 1 (the one with a single DMRS symbol in the beginning)
pusch_pdu->ul_dmrs_scrambling_id = 0; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0.
//pusch_pdu->num_dmrs_cdm_grps_no_data;
//pusch_pdu->dmrs_ports; //DMRS ports. [TS38.212 7.3.1.1.2] provides description between DCI 0-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used
//Pusch Allocation in frequency domain [TS38.214, sec 6.1.2.2]
pusch_pdu->resource_alloc = 1; //type 1
//pusch_pdu->rb_bitmap;// for ressource alloc type 0
pusch_pdu->rb_start = 30;
pusch_pdu->rb_size = 50;
pusch_pdu->vrb_to_prb_mapping = 0;
pusch_pdu->frequency_hopping = 0;
//pusch_pdu->tx_direct_current_location;//The uplink Tx Direct Current location for the carrier. Only values in the value range of this field between 0 and 3299, which indicate the subcarrier index within the carrier corresponding 1o the numerology of the corresponding uplink BWP and value 3300, which indicates "Outside the carrier" and value 3301, which indicates "Undetermined position within the carrier" are used. [TS38.331, UplinkTxDirectCurrentBWP IE]
pusch_pdu->uplink_frequency_shift_7p5khz = 0;
//Resource Allocation in time domain
pusch_pdu->start_symbol_index = 1;
pusch_pdu->nr_of_symbols = 12;
//Optional Data only included if indicated in pduBitmap
pusch_pdu->pusch_data.rv_index = 0;
pusch_pdu->pusch_data.harq_process_id = 0;
pusch_pdu->pusch_data.new_data_indicator = 0;
pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->mcs_index,
pusch_pdu->rb_size,
pusch_pdu->nr_of_symbols,
6, //nb_re_dmrs - not sure where this is coming from - its not in the FAPI
1, //length_dmrs - sum of bits in pusch_pdu->ul_dmrs_symb_pos
pusch_pdu->nrOfLayers = 1);
pusch_pdu->pusch_data.num_cb = 0; //CBG not supported
//pusch_pdu->pusch_data.cb_present_and_position;
//pusch_pdu->pusch_uci;
//pusch_pdu->pusch_ptrs;
//pusch_pdu->dfts_ofdm;
//beamforming
//pusch_pdu->beamforming; //not used for now
} }
} }
...@@ -105,10 +105,12 @@ void mac_top_init_gNB(void) ...@@ -105,10 +105,12 @@ void mac_top_init_gNB(void)
for (j = 0; j < MAX_NUM_CCs; j++) { for (j = 0; j < MAX_NUM_CCs; j++) {
RC.nrmac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.nrmac[i]->dl_config_pdu_list[j]; RC.nrmac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.nrmac[i]->dl_config_pdu_list[j];
RC.nrmac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.nrmac[i]->ul_config_pdu_list[j];
for (int k = 0; k < 10; k++) //FK changed UL_req to UL_tti_req, which does not contain a pointer to the pdu_list
RC.nrmac[i]->UL_req_tmp[j][k].ul_config_request_body.ul_config_pdu_list =RC.nrmac[i]->ul_config_pdu_list_tmp[j][k]; //RC.nrmac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.nrmac[i]->ul_config_pdu_list[j];
//for (int k = 0; k < 10; k++)
// RC.nrmac[i]->UL_req_tmp[j][k].ul_config_request_body.ul_config_pdu_list =RC.nrmac[i]->ul_config_pdu_list_tmp[j][k];
RC.nrmac[i]->HI_DCI0_req[j].hi_dci0_request_body.hi_dci0_pdu_list = RC.nrmac[i]->hi_dci0_pdu_list[j]; RC.nrmac[i]->HI_DCI0_req[j].hi_dci0_request_body.hi_dci0_pdu_list = RC.nrmac[i]->hi_dci0_pdu_list[j];
RC.nrmac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.nrmac[i]->tx_request_pdu[j]; RC.nrmac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.nrmac[i]->tx_request_pdu[j];
......
...@@ -48,6 +48,7 @@ ...@@ -48,6 +48,7 @@
#include "NR_MeasConfig.h" #include "NR_MeasConfig.h"
#include "nfapi_nr_interface.h" #include "nfapi_nr_interface.h"
#include "nfapi_nr_interface_scf.h"
#include "NR_PHY_INTERFACE/NR_IF_Module.h" #include "NR_PHY_INTERFACE/NR_IF_Module.h"
#include "COMMON/platform_constants.h" #include "COMMON/platform_constants.h"
...@@ -118,16 +119,10 @@ typedef struct gNB_MAC_INST_s { ...@@ -118,16 +119,10 @@ typedef struct gNB_MAC_INST_s {
nfapi_nr_config_request_t config[NFAPI_CC_MAX]; nfapi_nr_config_request_t config[NFAPI_CC_MAX];
/// NFAPI DL Config Request Structure /// NFAPI DL Config Request Structure
nfapi_nr_dl_config_request_t DL_req[NFAPI_CC_MAX]; nfapi_nr_dl_config_request_t DL_req[NFAPI_CC_MAX];
/// NFAPI UL Config Request Structure, send to L1 4 subframes before processing takes place /// NFAPI UL TTI Request Structure (this is from the new SCF specs)
nfapi_ul_config_request_t UL_req[NFAPI_CC_MAX]; nfapi_nr_ul_tti_request_t UL_tti_req[NFAPI_CC_MAX];
/// Preallocated DL pdu list /// Preallocated DL pdu list
nfapi_nr_dl_config_request_pdu_t dl_config_pdu_list[NFAPI_CC_MAX][MAX_NUM_DL_PDU]; nfapi_nr_dl_config_request_pdu_t dl_config_pdu_list[NFAPI_CC_MAX][MAX_NUM_DL_PDU];
/// Preallocated UL pdu list
nfapi_ul_config_request_pdu_t ul_config_pdu_list[NFAPI_CC_MAX][MAX_NUM_UL_PDU];
/// Preallocated UL pdu list for ULSCH (n+k delay)
nfapi_ul_config_request_pdu_t ul_config_pdu_list_tmp[NFAPI_CC_MAX][10][MAX_NUM_UL_PDU];
/// NFAPI "Temporary" UL Config Request Structure, holds future UL_config requests
nfapi_ul_config_request_t UL_req_tmp[NFAPI_CC_MAX][10];
/// Preallocated HI_DCI0 pdu list /// Preallocated HI_DCI0 pdu list
nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[NFAPI_CC_MAX][MAX_NUM_HI_DCI0_PDU]; nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[NFAPI_CC_MAX][MAX_NUM_HI_DCI0_PDU];
/// NFAPI HI/DCI0 Config Request Structure /// NFAPI HI/DCI0 Config Request Structure
......
...@@ -325,9 +325,9 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) ...@@ -325,9 +325,9 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id]; sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
if ((mac->common_channels[CC_id].tdd_Config==NULL) || if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
(is_nr_UL_slot(&mac->common_channels[CC_id],(sched_info->slot+sf_ahead)%spf)>0)) (is_nr_UL_slot(&mac->common_channels[CC_id],(sched_info->slot+sf_ahead)%spf)>0))
sched_info->UL_req = &mac->UL_req[CC_id]; sched_info->UL_tti_req = &mac->UL_tti_req[CC_id];
else else
sched_info->UL_req = NULL; sched_info->UL_tti_req = NULL;
sched_info->TX_req = &mac->TX_req[CC_id]; sched_info->TX_req = &mac->TX_req[CC_id];
......
...@@ -35,6 +35,7 @@ ...@@ -35,6 +35,7 @@
#include <stdint.h> #include <stdint.h>
#include "nfapi_nr_interface.h" #include "nfapi_nr_interface.h"
#include "nfapi_nr_interface_scf.h"
#include "platform_constants.h" #include "platform_constants.h"
#include "platform_types.h" #include "platform_types.h"
...@@ -103,7 +104,7 @@ typedef struct{ ...@@ -103,7 +104,7 @@ typedef struct{
/// nFAPI DL Config Request /// nFAPI DL Config Request
nfapi_nr_dl_config_request_t *DL_req; nfapi_nr_dl_config_request_t *DL_req;
/// nFAPI UL Config Request /// nFAPI UL Config Request
nfapi_ul_config_request_t *UL_req; nfapi_nr_ul_tti_request_t *UL_tti_req;
/// nFAPI HI_DCI Request /// nFAPI HI_DCI Request
nfapi_hi_dci0_request_t *HI_DCI0_req; nfapi_hi_dci0_request_t *HI_DCI0_req;
/// Pointers to DL SDUs /// Pointers to DL SDUs
......
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