Commit 9d3c8011 authored by Francesco Mani's avatar Francesco Mani

Revert "Merge branch 'ru-parallel-beamforming-merge' into nr_beamforming"

This reverts commit fe6130c8, reversing
changes made to 2406662e.
parent fe6130c8
......@@ -131,8 +131,8 @@ pipeline {
[$class: 'UsernamePasswordMultiBinding', credentialsId: "${params.FlexRanRtcGitLabRepository_Credentials}", usernameVariable: 'git_username', passwordVariable: 'git_password']
]) {
sh "git clone https://${git_username}:${git_password}@gitlab.eurecom.fr/flexran/flexran-rtc.git . > ../git_clone.log 2>&1"
sh "git checkout develop >> ../git_clone.log 2>&1"
}
sh "sed -i -e 's#add-apt-repository.*cleishm.*neo4j#add-apt-repository ppa:cleishm/neo4j -y#' -e 's#libneo4j-client-dev#libneo4j-client-dev -y#' tools/install_dependencies"
sh "zip -r -qq flexran.zip ."
}
}
......
......@@ -179,12 +179,8 @@ function build_on_vm {
echo "cp /home/ubuntu/zip-install.txt cmake_targets/log" >> $VM_CMDS
echo "echo \"./tools/install_dependencies \"" >> $VM_CMDS
echo "./tools/install_dependencies > cmake_targets/log/install-build.txt 2>&1" >> $VM_CMDS
echo "echo \"mkdir build\"" >> $VM_CMDS
echo "mkdir build" >> $VM_CMDS
echo "echo \"cd build\"" >> $VM_CMDS
echo "cd build" >> $VM_CMDS
echo "echo \"$BUILD_OPTIONS \"" >> $VM_CMDS
echo "$BUILD_OPTIONS > ../cmake_targets/log/rt_controller.Rel15.txt 2>&1" >> $VM_CMDS
echo "$BUILD_OPTIONS > cmake_targets/log/rt_controller.Rel15.txt 2>&1" >> $VM_CMDS
fi
if [[ "$VM_NAME" != *"-cppcheck"* ]] && [[ "$VM_NAME" != *"-flexran-rtc"* ]]
then
......
......@@ -372,7 +372,7 @@ class SSHConnection():
self.air_interface = 'lte'
self.command('mkdir -p ' + lSourcePath, '\$', 5)
self.command('cd ' + lSourcePath, '\$', 5)
self.command('if [ ! -e .git ]; then stdbuf -o0 git clone ' + self.ranRepository + ' .; else stdbuf -o0 git fetch --prune; fi', '\$', 600)
self.command('if [ ! -e .git ]; then stdbuf -o0 git clone ' + self.ranRepository + ' .; else stdbuf -o0 git fetch; fi', '\$', 600)
# Raphael: here add a check if git clone or git fetch went smoothly
self.command('git config user.email "jenkins@openairinterface.org"', '\$', 5)
self.command('git config user.name "OAI Jenkins"', '\$', 5)
......@@ -537,7 +537,7 @@ class SSHConnection():
ue_prefix = ''
self.command('mkdir -p ' + self.UESourceCodePath, '\$', 5)
self.command('cd ' + self.UESourceCodePath, '\$', 5)
self.command('if [ ! -e .git ]; then stdbuf -o0 git clone ' + self.ranRepository + ' .; else stdbuf -o0 git fetch --prune; fi', '\$', 600)
self.command('if [ ! -e .git ]; then stdbuf -o0 git clone ' + self.ranRepository + ' .; else stdbuf -o0 git fetch; fi', '\$', 600)
# here add a check if git clone or git fetch went smoothly
self.command('git config user.email "jenkins@openairinterface.org"', '\$', 5)
self.command('git config user.name "OAI Jenkins"', '\$', 5)
......
......@@ -222,7 +222,7 @@ function variant__v8__ue_ethernet {
function variant__v10__flexran_rtc {
ARCHIVES_LOC=flexran
NB_PATTERN_FILES=1
BUILD_OPTIONS="cmake .. && make -j2"
BUILD_OPTIONS="cmake . && make -j2"
VARIANT_INFO="non-OSA"
}
......
......@@ -1084,32 +1084,33 @@
(Test3: 273 PRB),
(Test4: 106 PRB 12 CSET-Offset),
(Test5: 217 PRB 48 CSET-Offset),
(Test6: 106 PRB 25 PDSCH-Offset),
<!--(Test6: 106 PRB 25 PDSCH-Offset),
(Test7: 106 PRB 51 PDSCH-Offset),
(Test8: 217 PRB 100 PDSCH-PRBs),
(Test9: 217 PRB 80 PDSCH-Offset),
(Test10: 217 PRB 100 PDSCH-PRBs 80 PDSCH-Offset),
(Test11: 106 PRBs 50 PDSCH-PRBs MCS Index 28</desc>
(Test6: 106 PRB 0 MCS),-->
(Test7: 273 PRB 28 MCS)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_dlsim.Rel15</main_exec>
<main_exec_args>-n100 -R106 -b106
-n100 -R217 -b217
-n100 -R273 -b273
<main_exec_args>-n100 -R106
-n100 -R217
-n100 -R273
-n100 -R106 -o12
-n100 -R217 -o48
-n100 -R106 -a25
<!---n100 -R106 -a25
-n100 -R106 -a51
-n100 -R217 -b100
-n100 -R217 -a80
-n100 -R217 -a80 -b100
-n100 -e28</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7
nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11</tags>
<search_expr_true>PDSCH test OK</search_expr_true>
-n100 -R106 -e0-->
-n100 -R273 -e28</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 <!--nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10-->nr_dlsim.test6 nr_dlsim.test7</tags>
<search_expr_true>"PDCCH test OK" "PDSCH test OK"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
......@@ -1239,23 +1240,19 @@
<testCase id="015111">
<class>execution</class>
<desc>nr_ulsim Test cases. (Test1: MCS 9 106 PRBs),
(Test2: MCS 16 50 PRBs),
(Test3: MCS 28 50 PRBs),
(Test4: MCS 9 217 PRBs),
(Test5: MCS 9 273 PRBs)</desc>
<desc>nr_ulsim Test cases. (Test1: MCS 9),
(Test2: MCS 16),
(Test3: MCS 28)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_ulsim.Rel15</main_exec>
<main_exec_args>-f100 -m9 -r106 -s10
<main_exec_args>-f100 -m9 -s10
-f100 -m16 -s20
-f100 -m28 -s30
-f100 -m9 -R217 -r217 -s10
-f100 -m9 -R273 -r273 -s10</main_exec_args>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5</tags>
-f100 -m28 -s30</main_exec_args>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
......
......@@ -247,8 +247,7 @@ const char* eurecomVariablesNames[] = {
"slot_number_TX0_gNB",
"slot_number_TX1_gNB",
"slot_number_RX0_gNB",
"slot_number_RX1_gNB",
"ru_tx_ofdm_mask"
"slot_number_RX1_gNB"
};
const char* eurecomFunctionsNames[] = {
......@@ -329,13 +328,6 @@ const char* eurecomFunctionsNames[] = {
"phy_procedures_ru_feptx_ofdm7",
"phy_procedures_ru_feptx_ofdm8",
"phy_procedures_ru_feptx_ofdm9",
"phy_procedures_ru_feptx_ofdm10",
"phy_procedures_ru_feptx_ofdm11",
"phy_procedures_ru_feptx_ofdm12",
"phy_procedures_ru_feptx_ofdm13",
"phy_procedures_ru_feptx_ofdm14",
"phy_procedures_ru_feptx_ofdm15",
"phy_procedures_ru_feptx_ofdm16",
"phy_procedures_ru_feptx_prec0",
"phy_procedures_ru_feptx_prec1",
"phy_procedures_ru_feptx_prec2",
......@@ -510,7 +502,6 @@ const char* eurecomFunctionsNames[] = {
"pdcch_interleaving",
"pdcch_tx",
/*NR softmodem signal*/
"wakeup_txfh",
"gNB_thread_rxtx0",
"gNB_thread_rxtx1"
};
......
......@@ -225,7 +225,6 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_RU_TX_OFDM_MASK,
VCD_SIGNAL_DUMPER_VARIABLES_END
......@@ -310,13 +309,6 @@ typedef enum {
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM7,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM8,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM9,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM10,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM11,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM12,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM13,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM14,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM15,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM16,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC1,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC2,
......@@ -502,7 +494,6 @@ typedef enum {
VCD_SIGNAL_DUMPER_FUNCTIONS_PDCCH_TX,
/*NR softmodem signal*/
VCD_SIGNAL_DUMPER_FUNCTIONS_WAKEUP_TXFH,
VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX0,
VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX1,
......
......@@ -73,10 +73,10 @@ typedef struct {
} T_cache_t;
/* number of VCD functions (to be kept up to date! see in T_messages.txt) */
#define VCD_NUM_FUNCTIONS (245)
#define VCD_NUM_FUNCTIONS (237)//(232)
/* number of VCD variables (to be kept up to date! see in T_messages.txt) */
#define VCD_NUM_VARIABLES (186)
#define VCD_NUM_VARIABLES (185)
/* first VCD function (to be kept up to date! see in T_messages.txt) */
#define VCD_FIRST_FUNCTION ((uintptr_t)T_VCD_FUNCTION_RT_SLEEP)
......
......@@ -2050,11 +2050,6 @@ ID = VCD_VARIABLE_SLOT_NUMBER_RX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = slot_number_RX1_gNB
ID = VCD_VARIABLE_RU_TX_OFDM_MASK
DESC = VCD variable RU_TX_OFDM_MASK
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = ru_tx_ofdm_mask
#functions
......@@ -2423,41 +2418,6 @@ ID = VCD_FUNCTION_PHY_PROCEDURES_RU_FEPTX_OFDM9
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = phy_procedures_ru_feptx_ofdm9
ID = VCD_FUNCTION_PHY_PROCEDURES_RU_FEPTX_OFDM10
DESC = VCD function PHY_PROCEDURES_RU_FEPTX_OFDM10
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = phy_procedures_ru_feptx_ofdm10
ID = VCD_FUNCTION_PHY_PROCEDURES_RU_FEPTX_OFDM11
DESC = VCD function PHY_PROCEDURES_RU_FEPTX_OFDM11
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = phy_procedures_ru_feptx_ofdm11
ID = VCD_FUNCTION_PHY_PROCEDURES_RU_FEPTX_OFDM12
DESC = VCD function PHY_PROCEDURES_RU_FEPTX_OFDM12
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = phy_procedures_ru_feptx_ofdm12
ID = VCD_FUNCTION_PHY_PROCEDURES_RU_FEPTX_OFDM13
DESC = VCD function PHY_PROCEDURES_RU_FEPTX_OFDM13
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = phy_procedures_ru_feptx_ofdm13
ID = VCD_FUNCTION_PHY_PROCEDURES_RU_FEPTX_OFDM14
DESC = VCD function PHY_PROCEDURES_RU_FEPTX_OFDM14
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = phy_procedures_ru_feptx_ofdm14
ID = VCD_FUNCTION_PHY_PROCEDURES_RU_FEPTX_OFDM15
DESC = VCD function PHY_PROCEDURES_RU_FEPTX_OFDM15
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = phy_procedures_ru_feptx_ofdm15
ID = VCD_FUNCTION_PHY_PROCEDURES_RU_FEPTX_OFDM16
DESC = VCD function PHY_PROCEDURES_RU_FEPTX_OFDM16
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = phy_procedures_ru_feptx_ofdm16
ID = VCD_FUNCTION_PHY_PROCEDURES_RU_FEPTX_PREC
DESC = VCD function PHY_PROCEDURES_RU_FEPTX_PREC
GROUP = ALL:VCD:ENB:VCD_FUNCTION
......@@ -3270,11 +3230,6 @@ ID = VCD_FUNCTION_PDCCH_TX
VCD_NAME = pdcch_tx
#function for gNB
ID = VCD_FUNCTION_WAKEUP_TXFH
DESC = VCD function WAKEUP_TXFH
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = wakeup_txfh
ID = VCD_FUNCTION_gNB_PROC_RXTX0
DESC = VCD function gNB_PROC_RXTX0
GROUP = ALL:VCD:ENB:VCD_FUNCTION
......
......@@ -290,8 +290,6 @@ static void *gNB_L1_thread_tx(void *param) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX1_GNB,slot_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_GNB,frame_tx);
phy_procedures_gNB_TX(gNB, frame_tx,slot_tx, 1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_WAKEUP_TXFH, 1 );
pthread_mutex_lock( &L1_proc_tx->mutex );
L1_proc_tx->instance_cnt = -1;
......@@ -303,7 +301,6 @@ static void *gNB_L1_thread_tx(void *param) {
pthread_mutex_unlock(&L1_proc_tx->mutex);
wakeup_txfh(gNB,L1_proc_tx,frame_tx,slot_tx,timestamp_tx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_WAKEUP_TXFH, 0 );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX1, 0 );
}
......@@ -423,10 +420,10 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot
// note this should depend on the numerology used by the TX L1 thread, set here for 500us slot time
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL,1);
waitret=wait_on_condition(&proc->mutex_RUs_tx,&proc->cond_RUs,&proc->instance_cnt_RUs,"wakeup_txfh");
AssertFatal(release_thread(&proc->mutex_RUs_tx,&proc->instance_cnt_RUs,"wakeup_txfh")==0, "error releaseing gNB lock on RUs\n");
waitret=timedwait_on_condition(&proc->mutex_RUs_tx,&proc->cond_RUs,&proc->instance_cnt_RUs,"wakeup_txfh",1000000);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL,0);
AssertFatal(release_thread(&proc->mutex_RUs_tx,&proc->instance_cnt_RUs,"wakeup_txfh")==0, "error releaseing gNB lock on RUs\n");
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,proc->instance_cnt_RUs);
if (waitret == ETIMEDOUT) {
......@@ -451,7 +448,7 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot
ru = gNB->RU_list[i];
ru_proc = &ru->proc;
//AssertFatal((ret = pthread_mutex_lock(&ru_proc->mutex_gNBs))==0,"ERROR pthread_mutex_lock failed on mutex_gNBs L1_thread_tx with ret=%d\n",ret);
AssertFatal((ret = pthread_mutex_lock(&ru_proc->mutex_gNBs))==0,"ERROR pthread_mutex_lock failed on mutex_gNBs L1_thread_tx with ret=%d\n",ret);
if (ru_proc->instance_cnt_gNBs == 0) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST_UE, 1);
......@@ -459,7 +456,7 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot
AssertFatal((ret=pthread_mutex_lock(&gNB->proc.mutex_RU_tx))==0,"mutex_lock returns %d\n",ret);
gNB->proc.RU_mask_tx = 0;
AssertFatal((ret=pthread_mutex_unlock(&gNB->proc.mutex_RU_tx))==0,"mutex_unlock returns %d\n",ret);
//AssertFatal((ret=pthread_mutex_unlock( &ru_proc->mutex_gNBs ))==0,"mutex_unlock return %d\n",ret);
AssertFatal((ret=pthread_mutex_unlock( &ru_proc->mutex_gNBs ))==0,"mutex_unlock return %d\n",ret);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST_UE, 0);
return(-1);
......@@ -525,8 +522,6 @@ int wakeup_rxtx(PHY_VARS_gNB *gNB,RU_t *ru) {
RU_proc_t *ru_proc=&ru->proc;
int ret;
int i;
struct timespec abstime;
int time_ns = 50000;
AssertFatal((ret=pthread_mutex_lock(&proc->mutex_RU))==0,"mutex_lock returns %d\n",ret);
for (i=0;i<gNB->num_RU;i++) {
......@@ -547,22 +542,14 @@ int wakeup_rxtx(PHY_VARS_gNB *gNB,RU_t *ru) {
AssertFatal((ret=pthread_mutex_unlock(&proc->mutex_RU))==0,"muex_unlock returns %d\n",ret);
}
clock_gettime(CLOCK_REALTIME, &abstime);
abstime.tv_nsec = abstime.tv_nsec + time_ns;
if (abstime.tv_nsec >= 1000*1000*1000) {
abstime.tv_nsec -= 1000*1000*1000;
abstime.tv_sec += 1;
}
// wake up TX for subframe n+sl_ahead
// lock the TX mutex and make sure the thread is ready
AssertFatal((ret=pthread_mutex_timedlock(&L1_proc->mutex, &abstime)) == 0,"mutex_lock returns %d\n", ret);
AssertFatal((ret=pthread_mutex_lock(&L1_proc->mutex)) == 0,"mutex_lock returns %d\n", ret);
if (L1_proc->instance_cnt == 0) { // L1_thread is busy so abort the subframe
AssertFatal((ret=pthread_mutex_unlock( &L1_proc->mutex))==0,"muex_unlock return %d\n",ret);
LOG_W(PHY,"L1_thread isn't ready in %d.%d, aborting RX processing\n",ru_proc->frame_rx,ru_proc->tti_rx);
return(-1);
}
++L1_proc->instance_cnt;
......
......@@ -678,6 +678,9 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_slot*fp->slots_per_frame))&1023;
proc->tti_rx = (proc->timestamp_rx / fp->samples_per_slot)%fp->slots_per_frame;
// synchronize first reception to frame 0 subframe 0
proc->timestamp_tx = proc->timestamp_rx+(sl_ahead*fp->samples_per_slot);
proc->tti_tx = (proc->tti_rx+sl_ahead)%fp->slots_per_frame;
proc->frame_tx = (proc->tti_rx>(fp->slots_per_frame-1-sl_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
LOG_D(PHY,"RU %d/%d TS %llu (off %d), frame %d, slot %d.%d / %d\n",
ru->idx,
0,
......@@ -762,22 +765,18 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot );
for (i=0; i<ru->nb_tx; i++){
for (i=0; i<ru->nb_tx; i++)
txp[i] = (void *)&ru->common.txdata[i][(slot*fp->samples_per_slot)-sf_extension];
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp-ru->openair0_cfg.tx_sample_advance)&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 );
// prepare tx buffer pointers
start_meas(&ru->tx_fhaul);
txs = ru->rfdevice.trx_write_func(&ru->rfdevice,
timestamp+ru->ts_offset-ru->openair0_cfg.tx_sample_advance-sf_extension,
txp,
siglen+sf_extension,
ru->nb_tx,
flags);
stop_meas(&ru->tx_fhaul);
LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, subframe %d\n",ru->idx,
(long long unsigned int)timestamp,frame,proc->frame_tx_unwrap,slot);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
......@@ -786,7 +785,6 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
}
/*!
* \brief The Asynchronous RX/TX FH thread of RAU/RCC/gNB/RRU.
* This handles the RX FH for an asynchronous RRU/UE
......@@ -875,7 +873,7 @@ static void *ru_thread_prach( void *param ) {
0,0
);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_RU_PRACH_RX, 0 );*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_RU_PRACH_RX, 0 ); */
if (release_thread(&proc->mutex_prach,&proc->instance_cnt_prach,"ru_prach_thread") < 0) break;
}
......@@ -1212,22 +1210,14 @@ static void *ru_stats_thread(void *param) {
sleep(1);
if (opp_enabled == 1) {
if (ru->feptx_prec) {
print_meas(&ru->precoding_stats,"feptx_prec",NULL,NULL);
}
if (ru->feprx) print_meas(&ru->ofdm_demod_stats,"feprx",NULL,NULL);
if (ru->feptx_ofdm){
print_meas(&ru->txdataF_copy_stats,"txdataF_copy",NULL,NULL);
print_meas(&ru->ofdm_mod_stats,"feptx_ofdm",NULL,NULL);
print_meas(&ru->ofdm_total_stats,"feptx_total",NULL,NULL);
}
if (ru->feptx_ofdm) print_meas(&ru->ofdm_mod_stats,"feptx_ofdm",NULL,NULL);
if (ru->fh_north_asynch_in) print_meas(&ru->rx_fhaul,"rx_fhaul",NULL,NULL);
print_meas(&ru->tx_fhaul,"tx_fhaul",NULL,NULL);
if (ru->fh_north_out) {
print_meas(&ru->tx_fhaul,"tx_fhaul",NULL,NULL);
print_meas(&ru->compression,"compression",NULL,NULL);
print_meas(&ru->transport,"transport",NULL,NULL);
}
......@@ -1282,7 +1272,7 @@ static void *ru_thread_tx( void *param ) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, tti_tx );
// do TX front-end processing if needed (precoding and/or IDFTs)
//if (ru->feptx_prec) ru->feptx_prec(ru,frame_tx,tti_tx);
if (ru->feptx_prec) ru->feptx_prec(ru,frame_tx,tti_tx);
// do OFDM if needed
if ((ru->fh_north_asynch_in == NULL) && (ru->feptx_ofdm)) ru->feptx_ofdm(ru,frame_tx,tti_tx);
......@@ -1295,17 +1285,8 @@ static void *ru_thread_tx( void *param ) {
} else {
if(proc->frame_tx == print_frame) {
for (i=0; i<ru->nb_tx; i++) {
if(proc->tti_tx == 0) {
sprintf(filename,"gNBdataF_frame%d_sl%d.m", print_frame, proc->tti_tx);
LOG_M(filename,"txdataF_frame",&ru->gNB_list[0]->common_vars.txdataF[i][0],fp->samples_per_frame_wCP, 1, 1);
sprintf(filename,"tx%ddataF_frame%d_sl%d.m", i, print_frame, proc->tti_tx);
LOG_M(filename,"txdataF_frame",&ru->common.txdataF[i][0],fp->samples_per_frame_wCP, 1, 1);
sprintf(filename,"tx%ddataF_BF_frame%d_sl%d.m", i, print_frame, proc->tti_tx);
LOG_M(filename,"txdataF_BF_frame",&ru->common.txdataF_BF[i][0],fp->samples_per_subframe_wCP, 1, 1);
}
LOG_M(filename,"txdataF_frame",&ru->common.txdataF_BF[i][0],fp->samples_per_subframe_wCP, 1, 1);
if(proc->tti_tx == 9) {
sprintf(filename,"tx%ddata_frame%d.m", i, print_frame);
......@@ -1358,14 +1339,14 @@ static void *ru_thread_tx( void *param ) {
ret = pthread_mutex_lock(&L1_proc->mutex_RUs_tx);
AssertFatal(ret == 0,"mutex_lock returns %d\n",ret);
// the thread can now be woken up
//if (L1_proc->instance_cnt_RUs == -1) {
L1_proc->instance_cnt_RUs = 0;
if (L1_proc->instance_cnt_RUs==-1) {
AssertFatal(pthread_cond_signal(&L1_proc->cond_RUs) == 0,
"ERROR pthread_cond_signal for gNB_L1_thread\n");
//} //else AssertFatal(1==0,"gNB TX thread is not ready\n");
} //else AssertFatal(1==0,"gNB TX thread is not ready\n");
L1_proc->instance_cnt_RUs = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,L1_proc->instance_cnt_RUs);
ret = pthread_mutex_unlock(&L1_proc->mutex_RUs_tx);
AssertFatal(ret == 0,"mutex_unlock returns %d\n",ret);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,L1_proc->instance_cnt_RUs);
}
}
}
......@@ -1525,7 +1506,7 @@ static void *ru_thread( void *param ) {
if(get_thread_parallel_conf() == PARALLEL_SINGLE_THREAD || ru->num_gNB==0) {
// do TX front-end processing if needed (precoding and/or IDFTs)
//if (ru->feptx_prec) ru->feptx_prec(ru,proc->frame_tx,proc->tti_tx);
if (ru->feptx_prec) ru->feptx_prec(ru,proc->frame_tx,proc->tti_tx);
// do OFDM if needed
if ((ru->fh_north_asynch_in == NULL) && (ru->feptx_ofdm)) ru->feptx_ofdm(ru,proc->frame_tx,proc->tti_tx);
......@@ -1689,7 +1670,6 @@ void init_RU_proc(RU_t *ru) {
proc->frame_offset = 0;
proc->num_slaves = 0;
proc->frame_tx_unwrap = 0;
proc->feptx_mask = 0;
for (i=0; i<10; i++) proc->symbol_mask[i]=0;
......@@ -1735,7 +1715,6 @@ void init_RU_proc(RU_t *ru) {
if (ru->feprx) nr_init_feprx_thread(ru);
if (ru->feptx_ofdm) nr_init_feptx_thread(ru);
//if (ru->feptx_prec) nr_init_feptx_prec_thread(ru);
}
if (opp_enabled == 1) threadCreate(&ru->ru_stats_thread,ru_stats_thread,(void *)ru, "emulateRF", -1, OAI_PRIORITY_RT_LOW);
......
......@@ -74,10 +74,6 @@ int nr_phy_init_RU(RU_t *ru) {
}
// allocate precoding input buffers (TX)
ru->common.txdataF = (int32_t **)malloc16(15*sizeof(int32_t*));
for(i=0; i< 15; ++i) ru->common.txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
// allocate IFFT input buffers (TX)
ru->common.txdataF_BF = (int32_t **)malloc16(ru->nb_tx*sizeof(int32_t*));
LOG_I(PHY,"[INIT] common.txdata_BF= %p (%lu bytes)\n",ru->common.txdataF_BF,
......@@ -162,10 +158,6 @@ void nr_phy_free_RU(RU_t *ru)
for (i = 0; i < ru->nb_rx; i++) free_and_zero(ru->common.rxdata_7_5kHz[i]);
free_and_zero(ru->common.rxdata_7_5kHz);
// free beamforming input buffers (TX)
for (i = 0; i < 15; i++) free_and_zero(ru->common.txdataF[i]);
free_and_zero(ru->common.txdataF);
// free IFFT input buffers (TX)
for (i = 0; i < ru->nb_tx; i++) free_and_zero(ru->common.txdataF_BF[i]);
free_and_zero(ru->common.txdataF_BF);
......
......@@ -144,12 +144,12 @@ int nr_beam_precoding(int32_t **txdataF,
int32_t ***beam_weights,
int slot,
int symbol,
int aa,
int nb_antenna_ports)
int aa)
{
uint8_t p;
int nb_antenna_ports = frame_parms->Lmax; // for now logical antenna ports corresponds to SSB
// clear txdata_BF[aa][re] for each call of ue_spec_beamforming
memset(&txdataF_BF[aa][symbol*frame_parms->ofdm_symbol_size],0,sizeof(int32_t)*(frame_parms->ofdm_symbol_size));
......@@ -164,5 +164,5 @@ int nr_beam_precoding(int32_t **txdataF,
15);
}
}
return 0;
return 0;
}
......@@ -99,8 +99,6 @@ int nr_beam_precoding(int32_t **txdataF,
int32_t ***beam_weights,
int slot,
int symbol,
int aa,
int nb_antenna_ports
);
int aa);
#endif
......@@ -86,8 +86,6 @@ void PHY_ofdm_mod(int *input, /// pointer to complex input
)
{
if(nb_symbols == 0) return;
short temp[4096*4] __attribute__((aligned(32)));
unsigned short i,j;
short k;
......
......@@ -37,12 +37,11 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pusch)
{
int pilot[3280] __attribute__((aligned(16)));
int pilot[1320] __attribute__((aligned(16)));
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt;
int16_t ch[2],*pil,*rxF,*ul_ch;
int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh;
int16_t ch[2],*pil,*rxF,*ul_ch,*fl,*fm,*fr,*fml,*fmr,*fmm;
int ch_offset,symbol_offset, length_dmrs, UE_id = 0;
unsigned short n_idDMRS[2] = {0,1}; //to update from pusch config
int32_t temp_in_ifft_0[8192*2] __attribute__((aligned(16)));
......@@ -83,10 +82,6 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
fmm = filt8_mm0;
fml = filt8_m0;
fmr = filt8_mr0;
fdcl = filt8_dcl0;
fdcr = filt8_dcr0;
fdclh = filt8_dcl0_h;
fdcrh = filt8_dcr0_h;
break;
case 1:
......@@ -96,10 +91,6 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
fmm = filt8_mm1;
fml = filt8_ml1;
fmr = filt8_m1;
fdcl = filt8_dcl1;
fdcr = filt8_dcr1;
fdclh = filt8_dcl1_h;
fdcrh = filt8_dcr1_h;
break;
default:
......@@ -128,12 +119,12 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
memset(ul_ch,0,4*(gNB->frame_parms.ofdm_symbol_size));
#ifdef DEBUG_PUSCH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[0], gNB->frame_parms.N_RB_UL);
printf("ch est pilot addr %p RB_DL %d\n",&pilot[0], gNB->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,gNB->frame_parms.first_carrier_offset);
printf("rxF addr %p p %d\n", rxF,p);
printf("ul_ch addr %p nushift %d\n",ul_ch,nushift);
#endif
//if ((gNB->frame_parms.N_RB_UL&1)==0) {
//if ((gNB->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
......@@ -149,7 +140,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ul_ch,
8);
pil+=2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
//for (int i= 0; i<8; i++)
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
......@@ -165,7 +156,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ul_ch,
8);
pil+=2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
//printf("ul_ch addr %p\n",ul_ch);
......@@ -184,7 +175,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
pil+=2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ul_ch+=8;
......@@ -202,7 +193,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
8);
pil+=2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
......@@ -215,7 +206,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ul_ch,
8);
pil+=2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ul_ch+=8;
......@@ -236,7 +227,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
pil+=2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
......@@ -251,7 +242,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
8);
pil+=2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
re_offset = (re_offset+2)&(gNB->frame_parms.ofdm_symbol_size-1);
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ul_ch+=8;
......@@ -265,69 +256,6 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ul_ch,
8);
// check if PRB crosses DC and improve estimates around DC
if ((bwp_start_subcarrier >= gNB->frame_parms.ofdm_symbol_size/2) && (bwp_start_subcarrier+nb_rb_pusch*12 >= gNB->frame_parms.ofdm_symbol_size)) {
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
uint16_t idxDC = 2*(gNB->frame_parms.ofdm_symbol_size - bwp_start_subcarrier);
uint16_t idxPil = idxDC/2;
re_offset = k;
pil = (int16_t *)&pilot[0];
pil += (idxPil-2);
ul_ch += (idxDC-4);
ul_ch = memset(ul_ch, 0, sizeof(int16_t)*10);
re_offset = (re_offset+idxDC/2-2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
// for proper allignment of SIMD vectors
if((gNB->frame_parms.N_RB_UL&1)==0) {
multadd_real_vector_complex_scalar(fdcl,
ch,
ul_ch-4,
8);
pil += 4;
re_offset = (re_offset+4) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
multadd_real_vector_complex_scalar(fdcr,
ch,
ul_ch-4,
8);
} else {
multadd_real_vector_complex_scalar(fdclh,
ch,
ul_ch,
8);
pil += 4;
re_offset = (re_offset+4) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
multadd_real_vector_complex_scalar(fdcrh,
ch,
ul_ch,
8);
}
}
#ifdef DEBUG_PDSCH
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
for(uint16_t idxP=0; idxP<ceil((float)nb_rb_pusch*12/8); idxP++) {
for(uint8_t idxI=0; idxI<16; idxI+=2) {
printf("%d\t%d\t",ul_ch[idxP*16+idxI],ul_ch[idxP*16+idxI+1]);
}
printf("%d\n",idxP);
}
#endif
// Convert to time domain
memset(temp_in_ifft_0, 0, gNB->frame_parms.ofdm_symbol_size*sizeof(int32_t));
memcpy(temp_in_ifft_0, &ul_ch_estimates[aarx][symbol_offset], nb_rb_pusch * NR_NB_SC_PER_RB * sizeof(int32_t));
......
......@@ -55,7 +55,7 @@ int pseudo_random_sequence(int M_PN, uint32_t *c, uint32_t cinit);
void lte_gold_new(LTE_DL_FRAME_PARMS *frame_parms, uint32_t lte_gold_table[20][2][14], uint16_t Nid_cell);
void generate_dmrs_pbch(uint32_t dmrs_pbch_bitmap[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE], uint16_t Nid_cell);
uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position);
uint16_t get_dmrs_freq_idx_ul(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type);
uint16_t get_dmrs_freq_idx_ul(uint8_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type);
#undef EXTERN
......
......@@ -148,7 +148,7 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
//printf("x1 : %x, x2 : %x\n",x1,x2);
}
for (n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
for (n=0; n<52; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
......
......@@ -90,7 +90,6 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
uint8_t Qm = rel15->modulation_order;
uint32_t encoded_length = nb_symbols*Qm;
/// CRC, coding, interleaving and rate matching
AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n");
start_meas(dlsch_encoding_stats);
......@@ -207,6 +206,7 @@ for (int i=0; i<n_dmrs>>4; i++) {
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_symbols %d)\n",
start_sc, rel15->start_symbol, rel15->n_prb, rel15->nb_symbols);
#endif
for (int ap=0; ap<rel15->nb_layers; ap++) {
// DMRS params for this ap
......@@ -221,7 +221,6 @@ ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime[0], l0, dmrs_symbol);
#endif
uint8_t k_prime=0;
uint16_t m=0, n=0, dmrs_idx=0, k=0;
int txdataF_offset = (slot%2)*frame_parms->samples_per_slot_wCP;
if (dmrs_type == NFAPI_NR_DMRS_TYPE1) // another if condition to be included to check pdsch config type (reference of k)
dmrs_idx = rel15->start_prb*6;
else
......@@ -231,12 +230,12 @@ ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime[0], l0, dmrs_symbol);
k = start_sc;
for (int i=0; i<rel15->n_prb*NR_NB_SC_PER_RB; i++) {
if ((l == dmrs_symbol) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_type))%(frame_parms->ofdm_symbol_size)))) {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
((int16_t*)txdataF[ap])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1]);
#endif
dmrs_idx++;
k_prime++;
......@@ -246,12 +245,12 @@ dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol
else {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
((int16_t*)txdataF[ap])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * tx_layers[ap][m<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
m, l, k, ((int16_t*)txdataF[ap])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1]);
#endif
m++;
}
......
......@@ -123,30 +123,6 @@ short filt8_m0[8] = {
short filt8_mm0[8]= {
0,0,0,8192,16384,8192,0,0};
short filt8_dcma[8]= {
16384,12288,8192,4096,4096,0,0,0};
short filt8_dcmb[8]= {
0,4096,8192,4096,4096,0,0,0};
short filt8_dcmc[8]= {
0,0,0,4096,4096,8192,4096,0};
short filt8_dcmd[8]= {
0,0,0,4096,4096,8192,12288,16384};
short filt8_dcl0[8]= {
0,0,16384,12288,8192,4096,0,0};
short filt8_dcr0[8]= {
0,0,0,4096,8192,12288,16384,0};
short filt8_dcl0_h[8]= {
16384,12288,8192,4096,0,0,0,0};
short filt8_dcr0_h[8]= {
0,4096,8192,12288,16384,0,0,0};
short filt8_l1[8] = {
24576,16384,0,0,0,0,0,0};
......@@ -161,15 +137,3 @@ short filt8_m1[8] = {
short filt8_mm1[8]= {
0,0,0,0,8192,16384,8192,0};
\ No newline at end of file
short filt8_dcl1[8]= {
0,0,0,16384,12288,8192,4096,0};
short filt8_dcr1[8]= {
0,0,0,0,4096,8192,12288,16384};
short filt8_dcl1_h[8]= {
0,16384,12288,8192,4096,0,0,0};
short filt8_dcr1_h[8]= {
0,0,4096,8192,12288,16384,0,0};
......@@ -91,22 +91,6 @@ extern short filt8_m0[8];
extern short filt8_mm0[8];
extern short filt8_dcma[8];
extern short filt8_dcmb[8];
extern short filt8_dcmc[8];
extern short filt8_dcmd[8];
extern short filt8_dcl0[8];
extern short filt8_dcr0[8];
extern short filt8_dcl0_h[8];
extern short filt8_dcr0_h[8];
extern short filt8_l1[8];
extern short filt8_ml1[8];
......@@ -117,11 +101,4 @@ extern short filt8_m1[8];
extern short filt8_mm1[8];
extern short filt8_dcl1[8];
extern short filt8_dcr1[8];
extern short filt8_dcl1_h[8];
extern short filt8_dcr1_h[8];
#endif
\ No newline at end of file
......@@ -258,7 +258,7 @@ uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position) {
*
*********************************************************************/
uint16_t get_dmrs_freq_idx_ul(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type) {
uint16_t get_dmrs_freq_idx_ul(uint8_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type) {
uint16_t dmrs_idx;
......
......@@ -564,13 +564,13 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
// Fixme: correct type is unsigned, but nrLDPC_decoder and all called behind use signed int
if (check_crc((uint8_t*)llrProcBuf,length_dec,harq_process->F,crc_type)) {
printf("\x1B[34m" "Segment %d CRC OK\n\033[0m",r);
printf("\x1B[34m" "Segment %d CRC OK\n",r);
//Temporary hack
no_iteration_ldpc = dlsch->max_ldpc_iterations;
ret = no_iteration_ldpc;
}
else {
printf("\x1B[33m" "CRC NOK\n\033[0m");
printf("\x1B[33m" "CRC NOK\n");
ret = 1 + dlsch->max_ldpc_iterations;
}
......
......@@ -104,10 +104,6 @@ typedef struct {
/// - first index: tx antenna [0..nb_antennas_tx[
/// - second index: sample [0..]
int32_t **txdataF_BF;
/// \brief holds the transmit data before beamforming in the frequency domain.
/// - first index: tx antenna [0..nb_antennas_tx[
/// - second index: sample [0..]
int32_t **txdataF;
/// \brief holds the transmit data before beamforming for epdcch/mpdcch
/// - first index : tx antenna [0..nb_epdcch_antenna_ports[
/// - second index: sampl [0..]
......@@ -151,44 +147,6 @@ typedef struct {
} RU_CALIBRATION;
typedef struct RU_prec_t_s{
/// \internal This variable is protected by \ref mutex_feptx_prec
int instance_cnt_feptx_prec;
/// pthread struct for RU TX FEP PREC worker thread
pthread_t pthread_feptx_prec;
/// pthread attributes for worker feptx prec thread
pthread_attr_t attr_feptx_prec;
/// condition varible for RU TX FEP PREC thread
pthread_cond_t cond_feptx_prec;
/// mutex for fep PREC TX worker thread
pthread_mutex_t mutex_feptx_prec;
int symbol;
int p;//logical
int aa;//physical MAX nb_tx
struct RU_t_s *ru;
int index;
} RU_prec_t;
typedef struct RU_feptx_t_s{
/// \internal This variable is protected by \ref mutex_feptx_prec
int instance_cnt_feptx;
/// pthread struct for RU TX FEP PREC worker thread
pthread_t pthread_feptx;
/// pthread attributes for worker feptx prec thread
pthread_attr_t attr_feptx;
/// condition varible for RU TX FEP PREC thread
pthread_cond_t cond_feptx;
/// mutex for fep PREC TX worker thread
pthread_mutex_t mutex_feptx;
struct RU_t_s *ru;
int aa;//physical MAX nb_tx
int half_slot;//first or second half of a slot
int slot;//current slot
int symbol;//current symbol
int nb_antenna_ports;//number of logical port
int index;
}RU_feptx_t;
typedef struct RU_proc_t_s {
/// Pointer to associated RU descriptor
struct RU_t_s *ru;
......@@ -381,15 +339,9 @@ typedef struct RU_proc_t_s {
int ru_rx_ready;
int ru_tx_ready;
int emulate_rf_busy;
/// structure for precoding thread
RU_prec_t prec[16];
/// structure for feptx thread
RU_feptx_t feptx[16];
/// mask for checking process finished
int feptx_mask;
} RU_proc_t;
typedef enum {
LOCAL_RF =0,
REMOTE_IF5 =1,
......@@ -543,16 +495,10 @@ typedef struct RU_t_s {
void (*eNB_top)(struct PHY_VARS_eNB_s *eNB, int frame_rx, int subframe_rx, char *string, struct RU_t_s *ru);
void (*gNB_top)(struct PHY_VARS_gNB_s *gNB, int frame_rx, int slot_rx, char *string, struct RU_t_s *ru);
/// Timing data copy statistics (TX)
time_stats_t txdataF_copy_stats;
/// Timing statistics (TX)
time_stats_t precoding_stats;
/// Timing statistics
time_stats_t ofdm_demod_stats;
/// Timing statistics (TX)
time_stats_t ofdm_mod_stats;
/// Timing statistics (TX)
time_stats_t ofdm_total_stats;
/// Timing wait statistics
time_stats_t ofdm_demod_wait_stats;
/// Timing wakeup statistics
......
......@@ -994,7 +994,7 @@ typedef struct {
uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
/// PDSCH DMRS
uint32_t nr_gold_pdsch[2][20][2][NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD];
uint32_t nr_gold_pdsch[2][20][2][52];
/// PDCCH DMRS
uint32_t nr_gold_pdcch[7][20][3][52];
......
......@@ -218,8 +218,6 @@ int is_srs_occasion_common(LTE_DL_FRAME_PARMS *frame_parms,int frame_tx,int subf
void compute_srs_pos(lte_frame_type_t frameType,uint16_t isrs,uint16_t *psrsPeriodicity,uint16_t *psrsOffset);
void release_rnti_of_phy(module_id_t mod_id);
void ru_fep_full_2thread(RU_t *ru, int subframe);
/*@}*/
......
This diff is collapsed.
......@@ -96,7 +96,6 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
uint8_t *pbch_pdu=&gNB->pbch_pdu[0];
uint8_t ssb_index, n_hf;
int ssb_start_symbol, rel_slot;
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
n_hf = cfg->sch_config.half_frame_index.value;
......@@ -126,18 +125,18 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
// it is supposed that each logical antenna port correspont to a different beam so each SSB is stored into its own index of txdataF
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, &txdataF[ssb_index][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, &txdataF[ssb_index][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pss(gNB->d_pss, txdataF[ssb_index], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, txdataF[ssb_index], AMP, ssb_start_symbol, cfg, fp);
if (fp->Lmax == 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],&txdataF[ssb_index][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF[ssb_index], AMP, ssb_start_symbol, cfg, fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],&txdataF[ssb_index][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],txdataF[ssb_index], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch,
pbch_pdu,
gNB->nr_pbch_interleaver,
&txdataF[ssb_index][txdataF_offset],
txdataF[ssb_index],
AMP,
ssb_start_symbol,
n_hf,fp->Lmax,ssb_index,
......@@ -156,7 +155,6 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
int offset = gNB->CC_id;
uint8_t ssb_frame_periodicity; // every how many frames SSB are generated
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
if (cfg->sch_config.ssb_periodicity.value < 20)
ssb_frame_periodicity = 1;
......@@ -171,7 +169,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
// clear the transmit data array for the current subframe
for (aa=0; aa<fp->Lmax; aa++) {
memset(&gNB->common_vars.txdataF[aa][txdataF_offset],0,fp->samples_per_slot_wCP*sizeof(int32_t));
memset(gNB->common_vars.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t));
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_COMMON_TX,1);
......@@ -192,9 +190,8 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
nr_generate_dci_top(gNB->pdcch_vars.dci_alloc[i],
gNB->nr_gold_pdcch_dmrs[slot],
&gNB->common_vars.txdataF[0][txdataF_offset], // hardcoded to beam 0
gNB->common_vars.txdataF[0], // hardcoded to beam 0
AMP, *fp, *cfg);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0);
}
......
......@@ -42,16 +42,12 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx);
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot);
void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx);
void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx);
void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols, int aa);
void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols);
void nr_init_feptx_thread(RU_t *ru);
void fep_full(RU_t *ru,int slot);
void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx);
void nr_init_feptx_prec_thread(RU_t *ru);
void nr_feptx_prec_control(RU_t *ru,int frame,int tti_tx);
void nr_init_feprx_thread(RU_t *ru);
void nr_fep_full(RU_t *ru, int slot);
void nr_fep_full_2thread(RU_t *ru, int slot);
void feptx_prec(RU_t *ru,int frame_tx,int tti_tx);
int nr_phy_init_RU(RU_t *ru);
void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
......
......@@ -602,26 +602,24 @@ int main(int argc, char **argv)
phy_procedures_gNB_TX(gNB,frame,slot,0);
//nr_common_signal_procedures (gNB,frame,subframe);
int txdataF_offset = (slot%2) * frame_parms->samples_per_slot_wCP;
LOG_M("txsigF0.m","txsF0", gNB->common_vars.txdataF[0],frame_length_complex_samples_no_prefix,1,1);
if (gNB->frame_parms.nb_antennas_tx>1)
LOG_M("txsigF1.m","txsF1", gNB->common_vars.txdataF[1],frame_length_complex_samples_no_prefix,1,1);
int tx_offset = slot*frame_parms->samples_per_slot;
printf("samples_per_slot_wCP = %d\n", frame_parms->samples_per_slot_wCP);
//TODO: loop over slots
for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
if (gNB_config->subframe_config.dl_cyclic_prefix_type.value == 1) {
PHY_ofdm_mod(&gNB->common_vars.txdataF[aa][txdataF_offset],
PHY_ofdm_mod(gNB->common_vars.txdataF[aa],
&txdata[aa][tx_offset],
frame_parms->ofdm_symbol_size,
12,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
} else {
nr_normal_prefix_mod(&gNB->common_vars.txdataF[aa][txdataF_offset],
nr_normal_prefix_mod(gNB->common_vars.txdataF[aa],
&txdata[aa][tx_offset],
14,
frame_parms);
......@@ -879,18 +877,26 @@ int main(int argc, char **argv)
printf("*****************************************\n");
printf("SNR %f, (false positive %f)\n", SNR,
(float) n_errors / (float) n_trials);
(float) n_false_positive / (float) n_trials);
printf("*****************************************\n");
printf("\n");
if (errors_bit == 0) {
printf("PDSCH test OK\n");
printf("\n");
}
printf("SNR %f : n_errors (negative CRC) = %d/%d\n", SNR, n_errors, n_trials);
printf("\n");
if ((float)n_errors/(float)n_trials <= target_error_rate) {
printf("PDSCH test OK\n");
printf("PDCCH test OK\n");
break;
}
if (n_trials == 1)
break;
} // NSR
for (i = 0; i < 2; i++) {
......
......@@ -455,14 +455,14 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp,
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[8][nsamps2];
__m256i buff_tx[2][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[8][nsamps2];
__m128i buff_tx[2][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[8][nsamps2];
int16x8_t buff_tx[2][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
......@@ -566,14 +566,14 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tmp[8][nsamps2];
__m256i buff_tmp[2][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tmp[8][nsamps2];
__m128i buff_tmp[2][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tmp[8][nsamps2];
int16x8_t buff_tmp[2][nsamps2];
#endif
if (device->type == USRP_B200_DEV) {
......
......@@ -246,16 +246,15 @@ L1s = (
RUs = (
{
local_rf = "yes"
nb_tx = 1;
nb_rx = 1;
att_tx = 0;
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2,clock_source=external,time_source=external";
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2,mgmt_addr=192.168.10.2,clock_source=external,time_source=external";
}
);
......
......@@ -70,7 +70,7 @@ gNBs =
UL_BWP_prefix_type = "NORMAL";
UL_timeAlignmentTimerCommon = "infinity";
ServingCellConfigCommon_n_TimingAdvanceOffset = "n0"
ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0x01;#####
ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0x01;
ServingCellConfigCommon_ssb_periodicityServingCell = 10;
ServingCellConfigCommon_dmrs_TypeA_Position = 2;
NIA_SubcarrierSpacing = "kHz15";
......@@ -262,9 +262,9 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
worker_config = "WORKER_DISABLE";
}
);
......
......@@ -70,7 +70,7 @@ gNBs =
UL_BWP_prefix_type = "NORMAL";
UL_timeAlignmentTimerCommon = "infinity";
ServingCellConfigCommon_n_TimingAdvanceOffset = "n0"
ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0x0ff;
ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0x01;
ServingCellConfigCommon_ssb_periodicityServingCell = 10;
ServingCellConfigCommon_dmrs_TypeA_Position = 2;
NIA_SubcarrierSpacing = "kHz15";
......@@ -246,7 +246,7 @@ L1s = (
RUs = (
{
local_rf = "yes"
nb_tx = 8
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
......@@ -264,7 +264,7 @@ THREAD_STRUCT = (
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
worker_config = "WORKER_DISABLE";
}
);
......
[*]
[*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI
[*] Fri Sep 6 15:01:30 2019
[*] GTKWave Analyzer v3.3.61 (w)1999-2014 BSI
[*] Sat May 18 17:25:11 2019
[*]
[dumpfile] "/tmp/gNB_prec.vcd"
[dumpfile_mtime] "Fri Sep 6 14:59:50 2019"
[dumpfile_size] 13106022
[savefile] "/homes/wangts/openairinterface5g/targets/RT/USER/gNB_usrp.gtkw"
[timestart] 2183320000
[size] 1920 1018
[dumpfile] "/tmp/openair_dump_gNB40.vcd"
[dumpfile_mtime] "Sat May 18 17:11:31 2019"
[dumpfile_size] 53148516
[savefile] "/home/caracal/raymond/openairinterface5g/targets/RT/USER/gNB_usrp.gtkw"
[timestart] 11552775390
[size] 1840 795
[pos] -1 -1
*-18.423141 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
*-13.848083 11552814436 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 386
[signals_width] 344
[sst_expanded] 1
[sst_vpaned_height] 267
[sst_vpaned_height] 197
@28
functions.trx_read
functions.trx_write
......@@ -24,8 +24,9 @@ variables.frame_number_TX1_UE[63:0]
functions.ue_gain_control
@420
variables.frame_number_RX1_UE[63:0]
@24
@25
variables.trx_ts_ue[63:0]
@24
variables.trx_ts[63:0]
variables.trx_tst[63:0]
variables.frame_number_RX0_RU[63:0]
......@@ -62,7 +63,5 @@ functions.phy_procedures_ru_feptx_ofdm0
functions.phy_procedures_ru_feptx_ofdm1
functions.phy_procedures_ru_feptx_prec0
functions.phy_procedures_ru_feptx_prec1
@23
variables.ru_tx_ofdm_mask[63:0]
[pattern_trace] 1
[pattern_trace] 0
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