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Commit b5b0c404 authored by rmagueta's avatar rmagueta
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Fix RA at gNB

parent a62a5661
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Showing with 110 additions and 54 deletions
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @ b5b0c404
...@@ -1152,10 +1152,18 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -1152,10 +1152,18 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
long BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); long BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
// HARQ management // HARQ management
AssertFatal(sched_ctrl->available_dl_harq.head >= 0, NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
"UE context not initialized: no HARQ processes found\n"); int8_t current_harq_pid = sched_pdsch->dl_harq_pid;
int current_harq_pid = sched_ctrl->available_dl_harq.head; if (current_harq_pid < 0) {
current_harq_pid = sched_ctrl->available_dl_harq.head;
remove_front_nr_list(&sched_ctrl->available_dl_harq); remove_front_nr_list(&sched_ctrl->available_dl_harq);
sched_pdsch->dl_harq_pid = current_harq_pid;
} else {
if (sched_ctrl->harq_processes[current_harq_pid].round == 0)
remove_nr_list(&sched_ctrl->available_dl_harq, current_harq_pid);
else
remove_nr_list(&sched_ctrl->retrans_dl_harq, current_harq_pid);
}
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid]; NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
DevAssert(!harq->is_waiting); DevAssert(!harq->is_waiting);
add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid); add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid);
...@@ -1164,6 +1172,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -1164,6 +1172,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
nr_acknack_scheduling(module_idP, UE_id, frameP, slotP); nr_acknack_scheduling(module_idP, UE_id, frameP, slotP);
harq->feedback_slot = sched_ctrl->sched_pucch->ul_slot; harq->feedback_slot = sched_ctrl->sched_pucch->ul_slot;
harq->feedback_frame = sched_ctrl->sched_pucch->frame;
// Bytes to be transmitted // Bytes to be transmitted
uint8_t *buf = (uint8_t *) harq->tb; uint8_t *buf = (uint8_t *) harq->tb;
...@@ -1196,16 +1205,20 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -1196,16 +1205,20 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
long dmrsConfigType = bwp!=NULL ? (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0; long dmrsConfigType = bwp!=NULL ? (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
uint8_t N_PRB_DMRS = 0; uint8_t N_PRB_DMRS = 0;
AssertFatal(nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData == 1 uint8_t numDmrsCdmGrpsNoData = 2;
|| nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData == 2, if (nrOfSymbols == 2) {
"nr_mac->schedCtrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData %d is not possible", numDmrsCdmGrpsNoData = 1;
nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData); }
AssertFatal(numDmrsCdmGrpsNoData == 1 || numDmrsCdmGrpsNoData == 2,
"nr_mac->schedCtrlCommon->numDmrsCdmGrpsNoData %d is not possible",
numDmrsCdmGrpsNoData);
if (dmrsConfigType==NFAPI_NR_DMRS_TYPE1) { if (dmrsConfigType==NFAPI_NR_DMRS_TYPE1) {
N_PRB_DMRS = nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6; N_PRB_DMRS = numDmrsCdmGrpsNoData * 6;
} }
else { else {
N_PRB_DMRS = nr_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 4; N_PRB_DMRS = numDmrsCdmGrpsNoData * 4;
} }
uint8_t mcsTableIdx = 0; uint8_t mcsTableIdx = 0;
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @ b5b0c404
...@@ -172,11 +172,11 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub ...@@ -172,11 +172,11 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
tdd->nrofUplinkSlots); tdd->nrofUplinkSlots);
} }
void nr_process_mac_pdu(module_id_t module_idP, void nr_process_mac_pdu(
int UE_id, module_id_t module_idP,
rnti_t rnti,
uint8_t CC_id, uint8_t CC_id,
frame_t frameP, frame_t frameP,
sub_frame_t slot,
uint8_t *pduP, uint8_t *pduP,
uint16_t mac_pdu_len) uint16_t mac_pdu_len)
{ {
...@@ -190,6 +190,11 @@ void nr_process_mac_pdu(module_id_t module_idP, ...@@ -190,6 +190,11 @@ void nr_process_mac_pdu(module_id_t module_idP,
NR_UE_info_t *UE_info = &RC.nrmac[module_idP]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[module_idP]->UE_info;
int UE_id = find_nr_UE_id(module_idP, rnti);
if (UE_id == -1) {
LOG_E(MAC, "%s() UE_id == -1\n",__func__);
return;
}
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
// For both DL/UL-SCH // For both DL/UL-SCH
// Except: // Except:
...@@ -251,10 +256,7 @@ void nr_process_mac_pdu(module_id_t module_idP, ...@@ -251,10 +256,7 @@ void nr_process_mac_pdu(module_id_t module_idP,
NR_BSR_SHORT *bsr_s = (NR_BSR_SHORT *) ce_ptr; NR_BSR_SHORT *bsr_s = (NR_BSR_SHORT *) ce_ptr;
sched_ctrl->estimated_ul_buffer = 0; sched_ctrl->estimated_ul_buffer = 0;
sched_ctrl->estimated_ul_buffer = NR_SHORT_BSR_TABLE[bsr_s->Buffer_size]; sched_ctrl->estimated_ul_buffer = NR_SHORT_BSR_TABLE[bsr_s->Buffer_size];
LOG_D(MAC, LOG_D(MAC, "SHORT BSR, LCG ID %d, BS Index %d, BS value < %d, est buf %d\n",
"SHORT BSR at %4d.%2d, LCG ID %d, BS Index %d, BS value < %d, est buf %d\n",
frameP,
slot,
bsr_s->LcgID, bsr_s->LcgID,
bsr_s->Buffer_size, bsr_s->Buffer_size,
NR_SHORT_BSR_TABLE[bsr_s->Buffer_size], NR_SHORT_BSR_TABLE[bsr_s->Buffer_size],
...@@ -283,9 +285,7 @@ void nr_process_mac_pdu(module_id_t module_idP, ...@@ -283,9 +285,7 @@ void nr_process_mac_pdu(module_id_t module_idP,
sched_ctrl->estimated_ul_buffer += sched_ctrl->estimated_ul_buffer +=
NR_LONG_BSR_TABLE[pdu_ptr[mac_subheader_len + 1 + n]]; NR_LONG_BSR_TABLE[pdu_ptr[mac_subheader_len + 1 + n]];
LOG_D(MAC, LOG_D(MAC,
"LONG BSR at %4d.%2d, %d/%d (n/n_Lcg), BS Index %d, BS value < %d, total %d\n", "LONG BSR, %d/%d (n/n_Lcg), BS Index %d, BS value < %d, total %d\n",
frameP,
slot,
n, n,
n_Lcg, n_Lcg,
pdu_ptr[mac_subheader_len + 1 + n], pdu_ptr[mac_subheader_len + 1 + n],
...@@ -394,7 +394,7 @@ void nr_process_mac_pdu(module_id_t module_idP, ...@@ -394,7 +394,7 @@ void nr_process_mac_pdu(module_id_t module_idP,
frameP, frameP,
0, 0,
0, 0,
UE_info->rnti[UE_id], rnti,
CCCH, CCCH,
pdu_ptr+mac_subheader_len, pdu_ptr+mac_subheader_len,
mac_sdu_len, mac_sdu_len,
...@@ -618,7 +618,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -618,7 +618,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
if (UE_scheduling_control->sched_ul_bytes < 0) if (UE_scheduling_control->sched_ul_bytes < 0)
UE_scheduling_control->sched_ul_bytes = 0; UE_scheduling_control->sched_ul_bytes = 0;
nr_process_mac_pdu(gnb_mod_idP, UE_id, CC_idP, frameP, slotP, sduP, sdu_lenP); nr_process_mac_pdu(gnb_mod_idP, current_rnti, CC_idP, frameP, sduP, sdu_lenP);
} }
} else if(sduP) { } else if(sduP) {
...@@ -707,7 +707,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -707,7 +707,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
// First byte corresponds to R/LCID MAC sub-header // First byte corresponds to R/LCID MAC sub-header
memcpy(ra->cont_res_id, &sduP[1], sizeof(uint8_t) * 6); memcpy(ra->cont_res_id, &sduP[1], sizeof(uint8_t) * 6);
nr_process_mac_pdu(gnb_mod_idP, UE_id, CC_idP, frameP, slotP, sduP, sdu_lenP); nr_process_mac_pdu(gnb_mod_idP, current_rnti, CC_idP, frameP, sduP, sdu_lenP);
ra->state = Msg4; ra->state = Msg4;
ra->Msg4_frame = ( frameP +2 ) % 1024; ra->Msg4_frame = ( frameP +2 ) % 1024;
......
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @ b5b0c404
...@@ -359,6 +359,14 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -359,6 +359,14 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_frame_t slot, NR_RA_t *ra); void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_frame_t slot, NR_RA_t *ra);
void nr_process_mac_pdu(
module_id_t module_idP,
rnti_t rnti,
uint8_t CC_id,
frame_t frameP,
uint8_t *pduP,
uint16_t mac_pdu_len);
int binomial(int n, int k); int binomial(int n, int k);
bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot); bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot);
......
openair2/RRC/LTE/rrc_eNB_GTPV1U.c
View file @ b5b0c404
...@@ -249,7 +249,7 @@ boolean_t gtpv_data_req_new ( ...@@ -249,7 +249,7 @@ boolean_t gtpv_data_req_new (
return result; return result;
} else { /* It is from from epc message */ } else { /* It is from from epc message */
/* in the source enb, UE in RRC_HO_EXECUTION mode */ /* in the source enb, UE in RRC_HO_EXECUTION mode */
MessageDef *msg; // MessageDef *msg;
// ????? // ?????
return true; return true;
} }
......
targets/ARCH/ETHERNET/USERSPACE/LIB/ethernet_lib.c
View file @ b5b0c404
...@@ -42,6 +42,7 @@ ...@@ -42,6 +42,7 @@
#include <unistd.h> #include <unistd.h>
#include <errno.h> #include <errno.h>
#include <linux/sysctl.h> #include <linux/sysctl.h>
#include <sys/sysctl.h>
#include "common_lib.h" #include "common_lib.h"
#include "ethernet_lib.h" #include "ethernet_lib.h"
......
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf
View file @ b5b0c404
...@@ -61,13 +61,27 @@ gNBs = ...@@ -61,13 +61,27 @@ gNBs =
initialDLBWPsearchSpaceZero = 0; initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon #pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries) #pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot initialDLBWPk0_0 = 0;
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB #initialULBWPmappingType
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 #0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
initialDLBWPk0_1 = 0; #for mixed slot #this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0; initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
...@@ -123,17 +137,20 @@ gNBs = ...@@ -123,17 +137,20 @@ gNBs =
restrictedSetConfig = 0, restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements) # pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1 initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12 # this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6; # used for mixed slot initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1; initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 # this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7; # used for Msg.3 during RA initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1; initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 # this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1; msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90; p0_NominalWithGrant =-90;
......
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf
View file @ b5b0c404
...@@ -61,13 +61,27 @@ gNBs = ...@@ -61,13 +61,27 @@ gNBs =
initialDLBWPsearchSpaceZero = 0; initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon #pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries) #pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot initialDLBWPk0_0 = 0;
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB #initialULBWPmappingType
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13 #0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
initialDLBWPk0_1 = 0; #for mixed slot #this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0; initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5 #this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
...@@ -123,17 +137,20 @@ gNBs = ...@@ -123,17 +137,20 @@ gNBs =
restrictedSetConfig = 0, restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements) # pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1 initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 55; # this is SS=0 L=12 # this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6; # used for mixed slot initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1; initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 24; # this is SS=10 L=2 # this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7; # used for Msg.3 during RA initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1; initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4 # this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1; msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90; p0_NominalWithGrant =-90;
......
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