Skip to content

O
OpenXG-RAN
Commit b5bb01d4 authored by cig's avatar cig Committed by Thomas Schlichter
Browse files
Options

Cleanup and formatting nr_ue_scheduled_response

parent 3c16ad56
Hide whitespace changes
Inline Side-by-side
Showing with 142 additions and 125 deletions
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @ b5bb01d4
...@@ -34,156 +34,173 @@ ...@@ -34,156 +34,173 @@
#include "fapi_nr_ue_interface.h" #include "fapi_nr_ue_interface.h"
#include "fapi_nr_ue_l1.h" #include "fapi_nr_ue_l1.h"
//#include "PHY/phy_vars_nr_ue.h"
#include "PHY/defs_nr_UE.h" #include "PHY/defs_nr_UE.h"
#include "PHY/impl_defs_nr.h" #include "PHY/impl_defs_nr.h"
extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response) extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
{
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if(scheduled_response != NULL){ if(scheduled_response != NULL){
/// module id
module_id_t module_id = scheduled_response->module_id; module_id_t module_id = scheduled_response->module_id;
/// component carrier id uint8_t cc_id = scheduled_response->CC_id, thread_id;
uint8_t cc_id = scheduled_response->CC_id;
uint32_t i; uint32_t i;
int slot = scheduled_response->slot; int slot = scheduled_response->slot;
// Note: we have to handle the thread IDs for this. To be revisited completely. // Note: we have to handle the thread IDs for this. To be revisited completely.
uint8_t thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot]; thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0]; NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0]; NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0]; NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
//NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms; //NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
NR_PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0]; //NR_PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
// PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
// PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
if(scheduled_response->dl_config != NULL){ if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config; fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
LOG_D(PHY,"Received %d DL pdus\n",dl_config->number_pdus); LOG_D(PHY,"Received %d DL pdus\n",dl_config->number_pdus);
pdcch_vars->nb_search_space = 0; pdcch_vars->nb_search_space = 0;
for(i=0; i<dl_config->number_pdus; ++i){ for (i = 0; i < dl_config->number_pdus; ++i){
if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
fapi_nr_dl_config_dci_dl_pdu_rel15_t *pdcch_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15; if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI) {
memcpy((void*)&pdcch_vars->pdcch_config[pdcch_vars->nb_search_space],(void*)pdcch_config,sizeof(*pdcch_config));
pdcch_vars->nb_search_space = pdcch_vars->nb_search_space + 1; fapi_nr_dl_config_dci_dl_pdu_rel15_t *pdcch_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
LOG_D(PHY,"Number of DCI SearchSpaces %d\n",pdcch_vars->nb_search_space); memcpy((void*)&pdcch_vars->pdcch_config[pdcch_vars->nb_search_space],(void*)pdcch_config,sizeof(*pdcch_config));
}else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH pdcch_vars->nb_search_space = pdcch_vars->nb_search_space + 1;
// dlsch config pdu LOG_D(PHY,"Number of DCI SearchSpaces %d\n",pdcch_vars->nb_search_space);
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15; } else { //FAPI_NR_DL_CONFIG_TYPE_DLSCH
uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
dlsch0->current_harq_pid = current_harq_pid; fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
dlsch0->active = 1; uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
dlsch0->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti; NR_DL_UE_HARQ_t *dlsch0_harq;
//dlsch0->harq_processes[0]->mcs = &dlsch_config_pdu->mcs; dlsch0->current_harq_pid = current_harq_pid;
dlsch0->active = 1;
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch0->harq_processes[current_harq_pid]; dlsch0->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti;
//dlsch0->harq_processes[0]->mcs = &dlsch_config_pdu->mcs;
dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart; dlsch0_harq = dlsch0->harq_processes[current_harq_pid];
dlsch0_harq->BWPSize = dlsch_config_pdu->BWPSize; dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart;
dlsch0_harq->nb_rb = dlsch_config_pdu->number_rbs; dlsch0_harq->BWPSize = dlsch_config_pdu->BWPSize;
dlsch0_harq->start_rb = dlsch_config_pdu->start_rb; dlsch0_harq->nb_rb = dlsch_config_pdu->number_rbs;
dlsch0_harq->nb_symbols = dlsch_config_pdu->number_symbols; dlsch0_harq->start_rb = dlsch_config_pdu->start_rb;
dlsch0_harq->start_symbol = dlsch_config_pdu->start_symbol; dlsch0_harq->nb_symbols = dlsch_config_pdu->number_symbols;
dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos; dlsch0_harq->start_symbol = dlsch_config_pdu->start_symbol;
dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType; dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos;
dlsch0_harq->mcs = dlsch_config_pdu->mcs; dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType;
dlsch0_harq->DCINdi = dlsch_config_pdu->ndi; dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->rvidx = dlsch_config_pdu->rv; dlsch0_harq->DCINdi = dlsch_config_pdu->ndi;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH; dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0_harq->harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id; dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq->harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind; dlsch0_harq->harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq->Nl=1; dlsch0_harq->harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind;
dlsch0_harq->mcs_table=0; dlsch0_harq->Nl=1;
dlsch0_harq->status = ACTIVE; dlsch0_harq->mcs_table=0;
LOG_D(MAC,">>>> \tdlsch0->g_pucch=%d\tdlsch0_harq.mcs=%d\n",dlsch0->g_pucch,dlsch0_harq->mcs); dlsch0_harq->status = ACTIVE;
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs);
} }
} }
}else{ } else {
pdcch_vars->nb_search_space = 0; pdcch_vars->nb_search_space = 0;
} }
if(scheduled_response->ul_config != NULL){ if (scheduled_response->ul_config != NULL){
fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config; fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
for(i=0; i<ul_config->number_pdus; ++i){
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH){ for (i = 0; i < ul_config->number_pdus; ++i){
// pusch config pdu
fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15; uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, pucch_resource_id, current_harq_pid, format;
uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr; fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu;
ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs; fapi_nr_ul_config_pucch_pdu *pucch_config_pdu;
ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb; fapi_nr_ul_config_prach_pdu *prach_config_pdu;
ulsch0->harq_processes[current_harq_pid]->number_of_symbols = pusch_config_pdu->number_symbols; PUCCH_ConfigCommon_nr_t *pucch_config_common_nr;
ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol; PUCCH_Config_t *pucch_config_dedicated_nr;
ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs; PUCCH_format_t *format_params;
ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv; switch (pdu_type){
ulsch0->harq_processes[current_harq_pid]->Nl = pusch_config_pdu->n_layers;
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH; case (FAPI_NR_UL_CONFIG_TYPE_PUSCH):
} // pusch config pdu
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){ pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15;
// pucch config pdu current_harq_pid = pusch_config_pdu->harq_process_nbr;
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu; ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs;
uint8_t pucch_resource_id = 0; //FIXME!!! ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb;
uint8_t format = 1; // FIXME!!! ulsch0->harq_processes[current_harq_pid]->number_of_symbols = pusch_config_pdu->number_symbols;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift; ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols; ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex; ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs; ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB; ulsch0->harq_processes[current_harq_pid]->Nl = pusch_config_pdu->n_layers;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC; ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length; break;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping; case (FAPI_NR_UL_CONFIG_TYPE_PUCCH):
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used // pucch config pdu
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK; pucch_resource_id = 0; //FIXME!!!
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping; format = 1; // FIXME!!!
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId; pucch_config_common_nr = &PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal; pucch_config_dedicated_nr = &PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift; format_params = &pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->format_parameters;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex; format_params->initialCyclicShift = pucch_config_pdu->initialCyclicShift;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs; format_params->nrofSymbols = pucch_config_pdu->nrofSymbols;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB; format_params->startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC; format_params->nrofPRBs = pucch_config_pdu->nrofPRBs;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length; format_params->timeDomainOCC = pucch_config_pdu->timeDomainOCC;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index; format_params->occ_length = pucch_config_pdu->occ_length;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping; format_params->occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK; pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping; pucch_config_dedicated_nr->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_common->hoppingId = pucch_config_pdu->hoppingId; pucch_config_dedicated_nr->formatConfig[format - 1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/ pucch_config_dedicated_nr->formatConfig[format - 1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
}
if (ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH) { pucch_config_common_nr->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
// prach config pdu pucch_config_common_nr->hoppingId = pucch_config_pdu->hoppingId;
fapi_nr_ul_config_prach_pdu *prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu; pucch_config_common_nr->p0_nominal = pucch_config_pdu->p0_nominal;
/*frame_parms.prach_config_common.rootSequenceIndex = prach_config_pdu->root_sequence_index;
frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = prach_config_pdu->prach_configuration_index; /* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = prach_config_pdu->zero_correlation_zone_config; pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag = prach_config_pdu->restrictedset_config; pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = prach_config_pdu->prach_freq_offset;*/ pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
////prach_resources->ra_PreambleIndex = prach_config_pdu->preamble_index; pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
} pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
break;
case (FAPI_NR_UL_CONFIG_TYPE_PRACH):
// prach config pdu
prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
/*frame_parms.prach_config_common.rootSequenceIndex = prach_config_pdu->root_sequence_index;
frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = prach_config_pdu->prach_configuration_index;
frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = prach_config_pdu->zero_correlation_zone_config;
frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag = prach_config_pdu->restrictedset_config;
frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = prach_config_pdu->prach_freq_offset;*/
////prach_resources->ra_PreambleIndex = prach_config_pdu->preamble_index;
break;
default:
break;
}
} }
}else{ } else {
} }
if(scheduled_response->tx_request != NULL){ if (scheduled_response->tx_request != NULL){
} else {
}else{
} }
} }
...@@ -194,10 +211,10 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response) ...@@ -194,10 +211,10 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
fapi_nr_config_request_t *nrUE_config = &PHY_vars_UE_g[phy_config->Mod_id][phy_config->CC_id]->nrUE_config; fapi_nr_config_request_t *nrUE_config = &PHY_vars_UE_g[phy_config->Mod_id][phy_config->CC_id]->nrUE_config;
if(phy_config != NULL) if(phy_config != NULL)
memcpy(nrUE_config,&phy_config->config_req,sizeof(fapi_nr_config_request_t)); memcpy(nrUE_config,&phy_config->config_req,sizeof(fapi_nr_config_request_t));
return 0; return 0;
} }
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment