Commit c43db483 authored by Florian Kaltenberger's avatar Florian Kaltenberger

debugging

parent 9276121d
...@@ -638,8 +638,6 @@ void rx_rf(RU_t *ru,int *frame,int *slot) { ...@@ -638,8 +638,6 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
for (i=0; i<ru->nb_rx; i++) for (i=0; i<ru->nb_rx; i++)
rxp[i] = (void *)&ru->common.rxdata[i][fp->get_samples_slot_timestamp(*slot,fp,0)]; rxp[i] = (void *)&ru->common.rxdata[i][fp->get_samples_slot_timestamp(*slot,fp,0)];
LOG_D(PHY,"Reading %d samples for slot %d (%p)\n",samples_per_slot,*slot,rxp[0]);
//when the USRP starts, it initializes the timestamp to 0. We wait 1 frames until we program the first rx. //when the USRP starts, it initializes the timestamp to 0. We wait 1 frames until we program the first rx.
if (proc->first_rx==1) { if (proc->first_rx==1) {
proc->timestamp_rx = fp->samples_per_frame; proc->timestamp_rx = fp->samples_per_frame;
...@@ -647,7 +645,7 @@ void rx_rf(RU_t *ru,int *frame,int *slot) { ...@@ -647,7 +645,7 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
} }
else { else {
//we always advance the timestamp by samples_per_slot, even if we have not read the (full) slot. This is to keep the timestamp updated even when there is no RX. //we always advance the timestamp by samples_per_slot, even if we have not read the (full) slot. This is to keep the timestamp updated even when there is no RX.
proc->timestamp_rx += fp->get_samples_per_slot((*slot-1)%fp->slots_per_frame,fp); proc->timestamp_rx += fp->get_samples_per_slot(*slot%fp->slots_per_frame,fp);
} }
int slot_type = nr_slot_select(cfg,*frame,*slot%fp->slots_per_frame); int slot_type = nr_slot_select(cfg,*frame,*slot%fp->slots_per_frame);
...@@ -661,12 +659,16 @@ void rx_rf(RU_t *ru,int *frame,int *slot) { ...@@ -661,12 +659,16 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
rxsymb++; rxsymb++;
} }
AssertFatal(rxsymb>0,"illegal rxsymb %d\n",rxsymb); AssertFatal(rxsymb>0,"illegal rxsymb %d\n",rxsymb);
//TODO: this has to be adapted for numerology!=1
siglen = (fp->ofdm_symbol_size + fp->nb_prefix_samples0) + (rxsymb - 1) * (fp->ofdm_symbol_size + fp->nb_prefix_samples); siglen = (fp->ofdm_symbol_size + fp->nb_prefix_samples0) + (rxsymb - 1) * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
proc->timestamp_rx += fp->get_samples_per_slot(*slot%fp->slots_per_frame,fp) - siglen;
} }
else { else {
siglen = samples_per_slot; siglen = samples_per_slot;
} }
LOG_I(PHY,"Reading %d samples for slot %d at timestamp %ld\n",siglen,*slot,proc->timestamp_rx);
if(emulate_rf) { if(emulate_rf) {
wait_on_condition(&proc->mutex_emulateRF,&proc->cond_emulateRF,&proc->instance_cnt_emulateRF,"emulatedRF_thread"); wait_on_condition(&proc->mutex_emulateRF,&proc->cond_emulateRF,&proc->instance_cnt_emulateRF,"emulatedRF_thread");
release_thread(&proc->mutex_emulateRF,&proc->instance_cnt_emulateRF,"emulatedRF_thread"); release_thread(&proc->mutex_emulateRF,&proc->instance_cnt_emulateRF,"emulatedRF_thread");
...@@ -779,12 +781,15 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { ...@@ -779,12 +781,15 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp-ru->openair0_cfg.tx_sample_advance)&0xffffffff ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp-ru->openair0_cfg.tx_sample_advance)&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 ); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 );
// prepare tx buffer pointers // prepare tx buffer pointers
/*
txs = ru->rfdevice.trx_write_func(&ru->rfdevice, txs = ru->rfdevice.trx_write_func(&ru->rfdevice,
timestamp+ru->ts_offset-ru->openair0_cfg.tx_sample_advance-sf_extension, timestamp+ru->ts_offset-ru->openair0_cfg.tx_sample_advance-sf_extension,
txp, txp,
siglen+sf_extension, siglen+sf_extension,
ru->nb_tx, ru->nb_tx,
flags); flags);
*/
txs=siglen+sf_extension;
LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, slot %d\n",ru->idx, LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, slot %d\n",ru->idx,
(long long unsigned int)timestamp,frame,proc->frame_tx_unwrap,slot); (long long unsigned int)timestamp,frame,proc->frame_tx_unwrap,slot);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 ); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
......
...@@ -661,10 +661,11 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp ptimestamp, ...@@ -661,10 +661,11 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp ptimestamp,
// receive a single channel (e.g. from connector RF A) // receive a single channel (e.g. from connector RF A)
samples_received=0; samples_received=0;
while (samples_received != nsamps) { //while (samples_received != nsamps) {
samples_received += s->rx_stream->recv((void*)((int32_t*)buff_tmp[0]+samples_received), samples_received += s->rx_stream->recv((void*)((int32_t*)buff_tmp[0]+samples_received),
nsamps-samples_received, s->rx_md); nsamps-samples_received, s->rx_md);
/*
if ((s->wait_for_first_pps == 0) && (s->rx_md.error_code!=uhd::rx_metadata_t::ERROR_CODE_NONE)) if ((s->wait_for_first_pps == 0) && (s->rx_md.error_code!=uhd::rx_metadata_t::ERROR_CODE_NONE))
break; break;
...@@ -672,7 +673,7 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp ptimestamp, ...@@ -672,7 +673,7 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp ptimestamp,
printf("sleep...\n"); //usleep(100); printf("sleep...\n"); //usleep(100);
} }
} }
*/
if (samples_received == nsamps) s->wait_for_first_pps=0; if (samples_received == nsamps) s->wait_for_first_pps=0;
} }
......
...@@ -21,184 +21,167 @@ gNBs = ...@@ -21,184 +21,167 @@ gNBs =
////////// Physical parameters: ////////// Physical parameters:
component_carriers = ( ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
servingCellConfigCommon = (
{ {
node_function = "3GPP_gNODEB"; #spCellConfigCommon
node_timing = "synch_to_ext_device";
node_synch_ref = 0; physCellId = 0;
frame_type = "TDD";
DL_prefix_type = "NORMAL"; # downlinkConfigCommon
UL_prefix_type = "NORMAL"; #frequencyInfoDL
eutra_band = 78; # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
downlink_frequency = 3510000000L; absoluteFrequencySSB = 641032;
uplink_frequency_offset = -120000000; dl_frequencyBand = 78;
Nid_cell = 0; # this is 3600 MHz
N_RB_DL = 106; dl_absoluteFrequencyPointA = 640000;
nb_antenna_ports = 1; #scs-SpecificCarrierList
nb_antennas_tx = 1; dl_offstToCarrier = 0;
nb_antennas_rx = 1; # subcarrierSpacing
tx_gain = 90; # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
rx_gain = 125; dl_subcarrierSpacing = 1;
MIB_subCarrierSpacingCommon = 30; dl_carrierBandwidth = 106;
MIB_ssb_SubcarrierOffset = 0; #initialDownlinkBWP
MIB_dmrs_TypeA_Position = 2; #genericParameters
pdcch_ConfigSIB1 = 0; # this is RBstart=0,L=50 (275*(L-1))+RBstart
SIB1_frequencyOffsetSSB = "khz5"; initialDLBWPlocationAndBandwidth = 13475;
SIB1_ssb_PeriodicityServingCell = 5; # subcarrierSpacing
SIB1_ss_PBCH_BlockPower = -60; # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
absoluteFrequencySSB = 0; initialDLBWPsubcarrierSpacing = 1;
DL_FreqBandIndicatorNR = 15; #pdcch-ConfigCommon
DL_absoluteFrequencyPointA = 15; initialDLBWPcontrolResourceSetZero = 12;
DL_offsetToCarrier = 15; initialDLBWPsearchSpaceZero = 0;
DL_SCS_SubcarrierSpacing = "kHz30"; #pdsch-ConfigCommon
DL_SCS_SpecificCarrier_k0 = 0; #pdschTimeDomainAllocationList (up to 16 entries)
DL_carrierBandwidth = 15; initialDLBWPk0_0 = 0;
DL_locationAndBandwidth = 15; #initialULBWPmappingType
DL_BWP_SubcarrierSpacing = "kHz30"; #0=typeA,1=typeB
DL_BWP_prefix_type = "NORMAL"; initialDLBWPmappingType_0 = 0;
UL_FreqBandIndicatorNR = 15; #this is SS=2,L=3
UL_absoluteFrequencyPointA = 13; initialDLBWPstartSymbolAndLength_0 = 40;
UL_additionalSpectrumEmission = 3;
UL_p_Max = -1; initialDLBWPk0_1 = 0;
UL_frequencyShift7p5khz = "TRUE"; initialDLBWPmappingType_1 = 0;
UL_offsetToCarrier = 10; #this is SS=2,L=12
UL_SCS_SubcarrierSpacing = "kHz30"; initialDLBWPstartSymbolAndLength_1 = 53;
UL_SCS_SpecificCarrier_k0 = 0;
UL_carrierBandwidth = 15; initialDLBWPk0_2 = 0;
UL_locationAndBandwidth = 15; initialDLBWPmappingType_2 = 0;
UL_BWP_SubcarrierSpacing = "kHz30"; #this is SS=1,L=12
UL_BWP_prefix_type = "NORMAL"; initialDLBWPstartSymbolAndLength_2 = 54;
UL_timeAlignmentTimerCommon = "infinity"; #uplinkConfigCommon
ServingCellConfigCommon_n_TimingAdvanceOffset = "n0" #frequencyInfoUL
ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0x01; ul_frequencyBand = 78;
ServingCellConfigCommon_ssb_periodicityServingCell = 10; #scs-SpecificCarrierList
ServingCellConfigCommon_dmrs_TypeA_Position = 2; ul_offstToCarrier = 0;
NIA_SubcarrierSpacing = "kHz15"; # subcarrierSpacing
ServingCellConfigCommon_ss_PBCH_BlockPower = -60; # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = "kHz15"; ul_subcarrierSpacing = 1;
dl_UL_TransmissionPeriodicity = "ms0p5"; ul_carrierBandwidth = 106;
nrofDownlinkSlots = 10; pMax = 20;
nrofDownlinkSymbols = 10; #initialUplinkBWP
nrofUplinkSlots = 10; #genericParameters
nrofUplinkSymbols = 10; initialULBWPlocationAndBandwidth = 13475;
rach_totalNumberOfRA_Preambles = 63; # subcarrierSpacing
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_choice = "oneEighth"; # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneEighth = 4; initialULBWPsubcarrierSpacing = 1;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneFourth = 8; #rach-ConfigCommon
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneHalf = 16; #rach-ConfigGeneric
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_one = 24; prach_ConfigurationIndex = 98;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_two = 32; #prach_msg1_FDM
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_four = 8; #0 = one, 1=two, 2=four, 3=eight
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_eight = 4; prach_msg1_FDM = 0;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_sixteen = 2; prach_msg1_FrequencyStart = 0;
rach_groupBconfigured = "ENABLE"; zeroCorrelationZoneConfig = 13;
rach_ra_Msg3SizeGroupA = 56; preambleReceivedTargetPower = -118;
rach_messagePowerOffsetGroupB = "dB0"; #preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
rach_numberOfRA_PreamblesGroupA = 32;
rach_ra_ContentionResolutionTimer = 8;
rsrp_ThresholdSSB = 64;
rsrp_ThresholdSSB_SUL = 64;
prach_RootSequenceIndex_choice = "l839";
prach_RootSequenceIndex_l839 = 0;
prach_RootSequenceIndex_l139 = 0;
prach_msg1_SubcarrierSpacing = "kHz30";
restrictedSetConfig = "unrestrictedSet";
msg3_transformPrecoding = "ENABLE";
prach_ConfigurationIndex = 10;
prach_msg1_FDM = "one";
prach_msg1_FrequencyStart = 10;
zeroCorrelationZoneConfig = 10;
preambleReceivedTargetPower = -150;
preambleTransMax = 6; preambleTransMax = 6;
powerRampingStep = "dB0"; #powerRampingStep
ra_ResponseWindow = 8; # 0=dB0,1=dB2,2=dB4,3=dB6
groupHoppingEnabledTransformPrecoding = "ENABLE"; powerRampingStep = 1;
msg3_DeltaPreamble = 0; #ra_ReponseWindow
p0_NominalWithGrant = 0; #1,2,4,8,10,20,40,80
PUSCH_TimeDomainResourceAllocation_k2 = 0; ra_ResponseWindow = 4;
PUSCH_TimeDomainResourceAllocation_mappingType = "typeA"; #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
PUSCH_TimeDomainResourceAllocation_startSymbolAndLength = 0; #0=oneeighth,1=onefourth,2=half,3=one,4=two,5=four,6=eight,7=sixteen
pucch_ResourceCommon = 0; ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
pucch_GroupHopping = "neither"; #oneHalf (0..15) 4,8,12,16,...60,64
hoppingId = 0; ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
p0_nominal = -30; #ra_ContentionResolutionTimer
PDSCH_TimeDomainResourceAllocation_k0 = 2; #(0..7) 8,16,24,32,40,48,56,64
PDSCH_TimeDomainResourceAllocation_mappingType = "typeA"; ra_ContentionResolutionTimer = 7;
PDSCH_TimeDomainResourceAllocation_startSymbolAndLength = 0; rsrp_ThresholdSSB = 19;
rateMatchPatternId = 0; #prach-RootSequenceIndex_PR
RateMatchPattern_patternType = "bitmaps"; #0 = 839, 1 = 139
symbolsInResourceBlock = "oneSlot"; prach_RootSequenceIndex_PR = 1;
periodicityAndPattern = 2; prach_RootSequenceIndex = 1;
RateMatchPattern_controlResourceSet = 5; # SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
RateMatchPattern_subcarrierSpacing = "kHz30"; #
RateMatchPattern_mode = "dynamic"; msg1_SubcarrierSpacing = 1,
controlResourceSetZero = 0;
searchSpaceZero = 0;
searchSpaceSIB1 = 10;
searchSpaceOtherSystemInformation = 10;
pagingSearchSpace = 10;
ra_SearchSpace = 10;
PDCCH_common_controlResourceSetId = 5;
PDCCH_common_ControlResourceSet_duration = 2;
PDCCH_cce_REG_MappingType = "nonInterleaved";
PDCCH_reg_BundleSize = 3;
PDCCH_interleaverSize = 3;
PDCCH_shiftIndex = 10;
PDCCH_precoderGranularity = "sameAsREG-bundle";
PDCCH_TCI_StateId = 32;
tci_PresentInDCI = "ENABLE";
PDCCH_DMRS_ScramblingID = 0;
SearchSpaceId = 10;
commonSearchSpaces_controlResourceSetId = 5;
SearchSpace_monitoringSlotPeriodicityAndOffset_choice = "sl1";
SearchSpace_monitoringSlotPeriodicityAndOffset_value = 0;
SearchSpace_duration = 2;
SearchSpace_nrofCandidates_aggregationLevel1 = 0;
SearchSpace_nrofCandidates_aggregationLevel2 = 0;
SearchSpace_nrofCandidates_aggregationLevel4 = 0;
SearchSpace_nrofCandidates_aggregationLevel8 = 0;
SearchSpace_nrofCandidates_aggregationLevel16 = 0;
SearchSpace_searchSpaceType = "common";
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel1 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel2 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel4 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel8 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel16 = 1;
Common_dci_Format2_3_monitoringPeriodicity = 1;
Common_dci_Format2_3_nrofPDCCH_Candidates = 1;
ue_Specific__dci_Formats = "formats0-0-And-1-0";
RateMatchPatternLTE_CRS_carrierFreqDL = 6;
RateMatchPatternLTE_CRS_carrierBandwidthDL = 6;
RateMatchPatternLTE_CRS_nrofCRS_Ports = 1;
RateMatchPatternLTE_CRS_v_Shift = 0;
RateMatchPatternLTE_CRS_radioframeAllocationPeriod = 1;
RateMatchPatternLTE_CRS_radioframeAllocationOffset = 0;
RateMatchPatternLTE_CRS_subframeAllocation_choice = "oneFrame";
}
);
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
srb1_parameters :
{
# timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500]
timer_poll_retransmit = 80;
# timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200] msg3_DeltaPreamble = 1;
timer_reordering = 35; p0_NominalWithGrant =-90;
# timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500] # pucch-ConfigCommon setup :
timer_status_prohibit = 0; # pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)] # ssb_periodicityServingCell
poll_pdu = 4; # 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)] # dmrs_TypeA_position
poll_byte = 99999; # 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32] # subcarrierSpacing
max_retx_threshold = 4; # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = 10;
} }
);
# ------- SCTP definitions # ------- SCTP definitions
SCTP : SCTP :
{ {
...@@ -255,7 +238,7 @@ RUs = ( ...@@ -255,7 +238,7 @@ RUs = (
max_rxgain = 114; max_rxgain = 114;
eNB_instances = [0]; eNB_instances = [0];
sdr_addrs = "type=b200"; sdr_addrs = "type=b200";
#clock_src = "external";
} }
); );
...@@ -264,20 +247,10 @@ THREAD_STRUCT = ( ...@@ -264,20 +247,10 @@ THREAD_STRUCT = (
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT" #three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD"; parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE" #two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_DISABLE"; worker_config = "WORKER_ENABLE";
} }
); );
NETWORK_CONTROLLER :
{
FLEXRAN_ENABLED = "no";
FLEXRAN_INTERFACE_NAME = "lo";
FLEXRAN_IPV4_ADDRESS = "127.0.0.1";
FLEXRAN_PORT = 2210;
FLEXRAN_CACHE = "/mnt/oai_agent_cache";
FLEXRAN_AWAIT_RECONF = "no";
};
log_config : log_config :
{ {
global_log_level ="info"; global_log_level ="info";
......
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