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OpenXG-RAN
Commit cd18c09f authored by Raymond Knopp's avatar Raymond Knopp
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git-svn-id: http://svn.eurecom.fr/openair4G/trunk@5740 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent d2bf4ddc
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Showing with 1365 additions and 453 deletions
openair2/COMMON/phy_messages_types.h
View file @ cd18c09f
......@@ -78,10 +78,10 @@ typedef struct CellInfo_s {
//-------------------------------------------------------------------------------------------//
// eNB: ENB_APP -> PHY messages
typedef struct PhyConfigurationReq_s {
lte_frame_type_t frame_type;
lte_prefix_type_t prefix_type;
uint32_t downlink_frequency;
int32_t uplink_frequency_offset;
lte_frame_type_t frame_type[MAX_NUM_CCs];
lte_prefix_type_t prefix_type[MAX_NUM_CCs];
uint32_t downlink_frequency[MAX_NUM_CCs];
int32_t uplink_frequency_offset[MAX_NUM_CCs];
} PhyConfigurationReq;
// UE: RRC -> PHY messages
......
openair2/COMMON/rrc_messages_types.h
View file @ cd18c09f
......@@ -40,6 +40,7 @@
#include "as_message.h"
#include "rrc_types.h"
#include "s1ap_messages_types.h"
#include "RRC/LITE/MESSAGES/SystemInformationBlockType2.h"
//-------------------------------------------------------------------------------------------//
// Messages for RRC logging
......@@ -95,12 +96,86 @@ typedef struct RrcConfigurationReq_s {
uint16_t mnc;
uint8_t mnc_digit_length;
/*
paging_drx_t default_drx;
lte_frame_type_t frame_type;
uint8_t tdd_config;
uint8_t tdd_config_s;
int16_t eutra_band;
*/
int16_t nb_cc;
lte_frame_type_t frame_type[MAX_NUM_CCs];
uint8_t tdd_config[MAX_NUM_CCs];
uint8_t tdd_config_s[MAX_NUM_CCs];
lte_prefix_type_t prefix_type[MAX_NUM_CCs];
int16_t eutra_band[MAX_NUM_CCs];
uint32_t downlink_frequency[MAX_NUM_CCs];
int32_t uplink_frequency_offset[MAX_NUM_CCs];
int16_t Nid_cell[MAX_NUM_CCs];// for testing, change later
int16_t N_RB_DL[MAX_NUM_CCs];// for testing, change later
int nb_antennas_tx[MAX_NUM_CCs];
int nb_antennas_rx[MAX_NUM_CCs];
long prach_root[MAX_NUM_CCs];
long prach_config_index[MAX_NUM_CCs];
BOOLEAN_t prach_high_speed[MAX_NUM_CCs];
long prach_zero_correlation[MAX_NUM_CCs];
long prach_freq_offset[MAX_NUM_CCs];
long pucch_delta_shift[MAX_NUM_CCs];
long pucch_nRB_CQI[MAX_NUM_CCs];
long pucch_nCS_AN[MAX_NUM_CCs];
#ifndef Rel10
long pucch_n1_AN[MAX_NUM_CCs];
#endif
long pdsch_referenceSignalPower[MAX_NUM_CCs];
long pdsch_p_b[MAX_NUM_CCs];
long pusch_n_SB[MAX_NUM_CCs];
long pusch_hoppingMode[MAX_NUM_CCs];
long pusch_hoppingOffset[MAX_NUM_CCs];
BOOLEAN_t pusch_enable64QAM[MAX_NUM_CCs];
BOOLEAN_t pusch_groupHoppingEnabled[MAX_NUM_CCs];
long pusch_groupAssignment[MAX_NUM_CCs];
BOOLEAN_t pusch_sequenceHoppingEnabled[MAX_NUM_CCs];
long pusch_nDMRS1[MAX_NUM_CCs];
long phich_duration[MAX_NUM_CCs];
long phich_resource[MAX_NUM_CCs];
BOOLEAN_t srs_enable[MAX_NUM_CCs];
long srs_BandwidthConfig[MAX_NUM_CCs];
long srs_SubframeConfig[MAX_NUM_CCs];
BOOLEAN_t srs_ackNackST[MAX_NUM_CCs];
BOOLEAN_t srs_MaxUpPts[MAX_NUM_CCs];
long pusch_p0_Nominal[MAX_NUM_CCs];
long pusch_alpha[MAX_NUM_CCs];
long pucch_p0_Nominal[MAX_NUM_CCs];
long msg3_delta_Preamble[MAX_NUM_CCs];
long ul_CyclicPrefixLength[MAX_NUM_CCs];
e_DeltaFList_PUCCH__deltaF_PUCCH_Format1 pucch_deltaF_Format1[MAX_NUM_CCs];
e_DeltaFList_PUCCH__deltaF_PUCCH_Format1b pucch_deltaF_Format1b[MAX_NUM_CCs];
e_DeltaFList_PUCCH__deltaF_PUCCH_Format2 pucch_deltaF_Format2[MAX_NUM_CCs];
e_DeltaFList_PUCCH__deltaF_PUCCH_Format2a pucch_deltaF_Format2a[MAX_NUM_CCs];
e_DeltaFList_PUCCH__deltaF_PUCCH_Format2b pucch_deltaF_Format2b[MAX_NUM_CCs];
long rach_numberOfRA_Preambles[MAX_NUM_CCs];
BOOLEAN_t rach_preamblesGroupAConfig[MAX_NUM_CCs];
long rach_sizeOfRA_PreamblesGroupA[MAX_NUM_CCs];
long rach_messageSizeGroupA[MAX_NUM_CCs];
e_RACH_ConfigCommon__preambleInfo__preamblesGroupAConfig__messagePowerOffsetGroupB rach_messagePowerOffsetGroupB[MAX_NUM_CCs];
long rach_powerRampingStep[MAX_NUM_CCs];
long rach_preambleInitialReceivedTargetPower[MAX_NUM_CCs];
long rach_preambleTransMax[MAX_NUM_CCs];
long rach_raResponseWindowSize[MAX_NUM_CCs];
long rach_macContentionResolutionTimer[MAX_NUM_CCs];
long rach_maxHARQ_Msg3Tx[MAX_NUM_CCs];
long bcch_modificationPeriodCoeff[MAX_NUM_CCs];
long pcch_defaultPagingCycle[MAX_NUM_CCs];
long pcch_nB[MAX_NUM_CCs];
long ue_TimersAndConstants_t300[MAX_NUM_CCs];
long ue_TimersAndConstants_t301[MAX_NUM_CCs];
long ue_TimersAndConstants_t310[MAX_NUM_CCs];
long ue_TimersAndConstants_t311[MAX_NUM_CCs];
long ue_TimersAndConstants_n310[MAX_NUM_CCs];
long ue_TimersAndConstants_n311[MAX_NUM_CCs];
} RrcConfigurationReq;
// UE: NAS -> RRC messages
......
openair2/ENB_APP/Makefile.inc
View file @ cd18c09f
......@@ -3,5 +3,5 @@ ENB_APP_DIR = $(OPENAIR2_TOP)/ENB_APP
ENB_APP_OBJS = $(ENB_APP_DIR)/enb_app.o \
$(ENB_APP_DIR)/enb_config.o
ENB_APP_incl = \
-I$(ENB_APP_DIR)
-I$(ENB_APP_DIR) -I$(OPENAIR2_TOP)
openair2/ENB_APP/enb_app.c
View file @ cd18c09f
......@@ -71,14 +71,15 @@ extern unsigned char NB_eNB_INST;
static void configure_phy(uint32_t enb_id, const Enb_properties_array_t *enb_properties)
{
MessageDef *msg_p;
int CC_id;
msg_p = itti_alloc_new_message (TASK_ENB_APP, PHY_CONFIGURATION_REQ);
PHY_CONFIGURATION_REQ (msg_p).frame_type = enb_properties->properties[enb_id]->frame_type;
PHY_CONFIGURATION_REQ (msg_p).prefix_type = enb_properties->properties[enb_id]->prefix_type;
PHY_CONFIGURATION_REQ (msg_p).downlink_frequency = enb_properties->properties[enb_id]->downlink_frequency;
PHY_CONFIGURATION_REQ (msg_p).uplink_frequency_offset = enb_properties->properties[enb_id]->uplink_frequency_offset;
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
PHY_CONFIGURATION_REQ (msg_p).frame_type[CC_id] = enb_properties->properties[enb_id]->frame_type[CC_id];
PHY_CONFIGURATION_REQ (msg_p).prefix_type[CC_id] = enb_properties->properties[enb_id]->prefix_type[CC_id];
PHY_CONFIGURATION_REQ (msg_p).downlink_frequency[CC_id] = enb_properties->properties[enb_id]->downlink_frequency[CC_id];
PHY_CONFIGURATION_REQ (msg_p).uplink_frequency_offset[CC_id] = enb_properties->properties[enb_id]->uplink_frequency_offset[CC_id];
}
itti_send_msg_to_task (TASK_PHY_ENB, enb_id, msg_p);
}
......@@ -86,6 +87,7 @@ static void configure_phy(uint32_t enb_id, const Enb_properties_array_t *enb_pro
static void configure_rrc(uint32_t enb_id, const Enb_properties_array_t *enb_properties)
{
MessageDef *msg_p = NULL;
int CC_id;
msg_p = itti_alloc_new_message (TASK_ENB_APP, RRC_CONFIGURATION_REQ);
......@@ -94,12 +96,13 @@ static void configure_rrc(uint32_t enb_id, const Enb_properties_array_t *enb_pro
RRC_CONFIGURATION_REQ (msg_p).mcc = enb_properties->properties[enb_id]->mcc;
RRC_CONFIGURATION_REQ (msg_p).mnc = enb_properties->properties[enb_id]->mnc;
RRC_CONFIGURATION_REQ (msg_p).mnc_digit_length = enb_properties->properties[enb_id]->mnc_digit_length;
RRC_CONFIGURATION_REQ (msg_p).default_drx = enb_properties->properties[enb_id]->default_drx;
RRC_CONFIGURATION_REQ (msg_p).frame_type = enb_properties->properties[enb_id]->frame_type;
RRC_CONFIGURATION_REQ (msg_p).tdd_config = enb_properties->properties[enb_id]->tdd_config;
RRC_CONFIGURATION_REQ (msg_p).tdd_config_s = enb_properties->properties[enb_id]->tdd_config_s;
RRC_CONFIGURATION_REQ (msg_p).eutra_band = enb_properties->properties[enb_id]->eutra_band;
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
RRC_CONFIGURATION_REQ (msg_p).pcch_defaultPagingCycle[CC_id] = enb_properties->properties[enb_id]->pcch_defaultPagingCycle[CC_id];
RRC_CONFIGURATION_REQ (msg_p).frame_type[CC_id] = enb_properties->properties[enb_id]->frame_type[CC_id];
RRC_CONFIGURATION_REQ (msg_p).tdd_config[CC_id] = enb_properties->properties[enb_id]->tdd_config[CC_id];
RRC_CONFIGURATION_REQ (msg_p).tdd_config_s[CC_id] = enb_properties->properties[enb_id]->tdd_config_s[CC_id];
RRC_CONFIGURATION_REQ (msg_p).eutra_band[CC_id] = enb_properties->properties[enb_id]->eutra_band[CC_id];
}
itti_send_msg_to_task (TASK_RRC_ENB, enb_id, msg_p);
}
......@@ -139,7 +142,7 @@ static uint32_t eNB_app_register(uint32_t enb_id_start, uint32_t enb_id_end, con
s1ap_register_eNB->mcc = enb_properties->properties[enb_id]->mcc;
s1ap_register_eNB->mnc = enb_properties->properties[enb_id]->mnc;
s1ap_register_eNB->mnc_digit_length = enb_properties->properties[enb_id]->mnc_digit_length;
s1ap_register_eNB->default_drx = enb_properties->properties[enb_id]->default_drx;
s1ap_register_eNB->default_drx = enb_properties->properties[enb_id]->pcch_defaultPagingCycle[0];
s1ap_register_eNB->nb_mme = enb_properties->properties[enb_id]->nb_mme;
AssertFatal (s1ap_register_eNB->nb_mme <= S1AP_MAX_NB_MME_IP_ADDRESS, "Too many MME for eNB %d (%d/%d)!", enb_id, s1ap_register_eNB->nb_mme, S1AP_MAX_NB_MME_IP_ADDRESS);
......
openair2/ENB_APP/enb_config.c
View file @ cd18c09f
This diff is collapsed.
openair2/ENB_APP/enb_config.h
View file @ cd18c09f
......@@ -42,6 +42,7 @@
#include "commonDef.h"
#include "PHY/impl_defs_lte.h"
#include "s1ap_messages_types.h"
#include "RRC/LITE/MESSAGES/SystemInformationBlockType2.h"
// Hard to find a defined value for max enb...
#define MAX_ENB 16
......@@ -89,22 +90,81 @@ typedef struct Enb_properties_s {
uint16_t mnc;
uint8_t mnc_digit_length;
/* Default Paging DRX of the eNB as defined in TS 36.304 */
paging_drx_t default_drx;
/* Physical parameters */
lte_frame_type_t frame_type;
uint8_t tdd_config;
uint8_t tdd_config_s;
lte_prefix_type_t prefix_type;
int16_t eutra_band;
uint32_t downlink_frequency;
int32_t uplink_frequency_offset;
/* Nb of component carrier for a given enb */
int16_t nb_cc;
int16_t cell_id[2];//cell_id[MAX_NUM_CCs];// for testing, change later
int16_t N_RB_DL[2];//N_RB_DL[MAX_NUM_CCs];// for testing, change later
lte_frame_type_t frame_type[1+MAX_NUM_CCs];
uint8_t tdd_config[1+MAX_NUM_CCs];
uint8_t tdd_config_s[1+MAX_NUM_CCs];
lte_prefix_type_t prefix_type[1+MAX_NUM_CCs];
int16_t eutra_band[1+MAX_NUM_CCs];
uint64_t downlink_frequency[1+MAX_NUM_CCs];
int32_t uplink_frequency_offset[1+MAX_NUM_CCs];
int16_t Nid_cell[1+MAX_NUM_CCs];// for testing, change later
int16_t N_RB_DL[1+MAX_NUM_CCs];// for testing, change later
int nb_antennas_tx[1+MAX_NUM_CCs];
int nb_antennas_rx[1+MAX_NUM_CCs];
long prach_root[1+MAX_NUM_CCs];
long prach_config_index[1+MAX_NUM_CCs];
BOOLEAN_t prach_high_speed[1+MAX_NUM_CCs];
long prach_zero_correlation[1+MAX_NUM_CCs];
long prach_freq_offset[1+MAX_NUM_CCs];
long pucch_delta_shift[1+MAX_NUM_CCs];
long pucch_nRB_CQI[1+MAX_NUM_CCs];
long pucch_nCS_AN[1+MAX_NUM_CCs];
#ifndef Rel10
long pucch_n1_AN[1+MAX_NUM_CCs];
#endif
long pdsch_referenceSignalPower[1+MAX_NUM_CCs];
long pdsch_p_b[1+MAX_NUM_CCs];
long pusch_n_SB[1+MAX_NUM_CCs];
long pusch_hoppingMode[1+MAX_NUM_CCs];
long pusch_hoppingOffset[1+MAX_NUM_CCs];
BOOLEAN_t pusch_enable64QAM[1+MAX_NUM_CCs];
BOOLEAN_t pusch_groupHoppingEnabled[1+MAX_NUM_CCs];
long pusch_groupAssignment[1+MAX_NUM_CCs];
BOOLEAN_t pusch_sequenceHoppingEnabled[1+MAX_NUM_CCs];
long pusch_nDMRS1[1+MAX_NUM_CCs];
long phich_duration[1+MAX_NUM_CCs];
long phich_resource[1+MAX_NUM_CCs];
BOOLEAN_t srs_enable[1+MAX_NUM_CCs];
long srs_BandwidthConfig[1+MAX_NUM_CCs];
long srs_SubframeConfig[1+MAX_NUM_CCs];
BOOLEAN_t srs_ackNackST[1+MAX_NUM_CCs];
BOOLEAN_t srs_MaxUpPts[1+MAX_NUM_CCs];
long pusch_p0_Nominal[1+MAX_NUM_CCs];
long pusch_alpha[1+MAX_NUM_CCs];
long pucch_p0_Nominal[1+MAX_NUM_CCs];
long msg3_delta_Preamble[1+MAX_NUM_CCs];
long ul_CyclicPrefixLength[1+MAX_NUM_CCs];
e_DeltaFList_PUCCH__deltaF_PUCCH_Format1 pucch_deltaF_Format1[1+MAX_NUM_CCs];
e_DeltaFList_PUCCH__deltaF_PUCCH_Format1b pucch_deltaF_Format1b[1+MAX_NUM_CCs];
e_DeltaFList_PUCCH__deltaF_PUCCH_Format2 pucch_deltaF_Format2[1+MAX_NUM_CCs];
e_DeltaFList_PUCCH__deltaF_PUCCH_Format2a pucch_deltaF_Format2a[1+MAX_NUM_CCs];
e_DeltaFList_PUCCH__deltaF_PUCCH_Format2b pucch_deltaF_Format2b[1+MAX_NUM_CCs];
long rach_numberOfRA_Preambles[1+MAX_NUM_CCs];
BOOLEAN_t rach_preamblesGroupAConfig[1+MAX_NUM_CCs];
long rach_sizeOfRA_PreamblesGroupA[1+MAX_NUM_CCs];
long rach_messageSizeGroupA[1+MAX_NUM_CCs];
e_RACH_ConfigCommon__preambleInfo__preamblesGroupAConfig__messagePowerOffsetGroupB rach_messagePowerOffsetGroupB[1+MAX_NUM_CCs];
long rach_powerRampingStep[1+MAX_NUM_CCs];
long rach_preambleInitialReceivedTargetPower[1+MAX_NUM_CCs];
long rach_preambleTransMax[1+MAX_NUM_CCs];
long rach_raResponseWindowSize[1+MAX_NUM_CCs];
long rach_macContentionResolutionTimer[1+MAX_NUM_CCs];
long rach_maxHARQ_Msg3Tx[1+MAX_NUM_CCs];
long bcch_modificationPeriodCoeff[1+MAX_NUM_CCs];
long pcch_defaultPagingCycle[1+MAX_NUM_CCs];
long pcch_nB[1+MAX_NUM_CCs];
long ue_TimersAndConstants_t300[1+MAX_NUM_CCs];
long ue_TimersAndConstants_t301[1+MAX_NUM_CCs];
long ue_TimersAndConstants_t310[1+MAX_NUM_CCs];
long ue_TimersAndConstants_t311[1+MAX_NUM_CCs];
long ue_TimersAndConstants_n310[1+MAX_NUM_CCs];
long ue_TimersAndConstants_n311[1+MAX_NUM_CCs];
/* Nb of MME to connect to */
uint8_t nb_mme;
......
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @ cd18c09f
......@@ -365,6 +365,7 @@ void schedule_ue_spec(module_id_t module_idP,
stop_meas(&eNB->schedule_dlsch_preprocessor);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,VCD_FUNCTION_OUT);
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
if (mbsfn_flag[CC_id]>0)
continue;
......@@ -400,7 +401,7 @@ void schedule_ue_spec(module_id_t module_idP,
nb_available_rb = pre_nb_available_rbs[CC_id][UE_id];
UE_list->eNB_UE_stats[CC_id][UE_id].crnti= rnti;
UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status=mac_get_rrc_status(module_idP,1,UE_id);
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,subframeP,&harq_pid,&round,0);
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid;
UE_list->eNB_UE_stats[CC_id][UE_id].harq_round = round;
......@@ -1640,7 +1641,7 @@ void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, subframeP %d: Checking if Msg4 was acknowledged: \n",
module_idP,frameP,subframeP);
// Get candidate harq_pid from PHY
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,RA_template->rnti,subframeP,&harq_pid,&round,0);
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,RA_template->rnti,frameP,subframeP,&harq_pid,&round,0);
if (round>0) {
// we have to schedule a retransmission
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD)
......@@ -1688,16 +1689,16 @@ void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP
}
} // RA is scheduled in this subframeP
LOG_I(MAC,"Doing UE_spec DCIs\n");
// UE specific DCIs
for (UE_id=UE_list->head;UE_id>=0;UE_id=UE_list->next[UE_id]) {
LOG_I(MAC,"UE_id: %d => status %d\n",UE_id,eNB_dlsch_info[module_idP][UE_id].status);
// printf("UE_id: %d => status %d\n",UE_id,eNB_dlsch_info[module_idP][UE_id].status);
if (eNB_dlsch_info[module_idP][UE_id].status == S_DL_SCHEDULED) {
// clear scheduling flag
eNB_dlsch_info[module_idP][UE_id].status = S_DL_WAITING;
rnti = UE_RNTI(module_idP,UE_id);
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,subframeP,&harq_pid,&round,0);
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
DLSCH_dci = (void *)UE_list->UE_template[CC_id][UE_id].DLSCH_DCI[harq_pid];
......
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
View file @ cd18c09f
......@@ -194,6 +194,15 @@ uint8_t find_num_active_UEs_in_cbagroup(module_id_t module_idP, int CC_id,unsign
return(nb_ue_in_pusch);
}
#endif
void dump_ue_list(UE_list_t *listP) {
int j;
for (j=listP->head;j>=0;j=listP->next[j]) {
LOG_T(MAC,"node %d => %d\n",j,listP->next[j]);
}
}
int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP) {
int UE_id;
int j;
......@@ -201,6 +210,7 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP) {
UE_list_t *UE_list = &eNB_mac_inst[mod_idP].UE_list;
LOG_D(MAC,"[eNB %d, CC_id %d] Adding UE with rnti %x (next avail %d, num_UEs %d)\n",mod_idP,cc_idP,rntiP,UE_list->avail,UE_list->num_UEs);
dump_ue_list(UE_list);
if (UE_list->avail>=0) {
UE_id = UE_list->avail;
......@@ -224,8 +234,12 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP) {
eNB_ulsch_info[mod_idP][UE_id].status = S_UL_WAITING;
eNB_dlsch_info[mod_idP][UE_id].status = S_UL_WAITING;
LOG_D(MAC,"[eNB %d] Add UE_id %d on Primary CC_id %d: rnti %x\n",mod_idP,UE_id,cc_idP,rntiP);
dump_ue_list(UE_list);
return(UE_id);
}
LOG_E(MAC,"error in add_new_ue(), could not find space in UE_list, Dumping UE list\n");
dump_ue_list(UE_list);
return(-1);
}
......@@ -237,6 +251,7 @@ int mac_remove_ue(module_id_t mod_idP, int ue_idP) {
int pCC_id = UE_PCCID(mod_idP,ue_idP);
LOG_I(MAC,"Removing UE %d from Primary CC_id %d (rnti %x)\n",ue_idP,pCC_id, UE_list->UE_template[pCC_id][ue_idP].rnti);
dump_ue_list(UE_list);
// clear all remaining pending transmissions
UE_list->UE_template[pCC_id][ue_idP].bsr_info[LCGID0] = 0;
......@@ -266,18 +281,23 @@ int mac_remove_ue(module_id_t mod_idP, int ue_idP) {
UE_list->next[i] = UE_list->avail;
UE_list->avail = i;
UE_list->active[i] = FALSE;
UE_list->num_UEs--;
return(0);
}
prev=i;
}
UE_list->num_UEs--;
LOG_E(MAC,"error in mac_remove_ue(), could not find previous to %d in UE_list, should never happen, Dumping UE list\n",ue_idP);
dump_ue_list(UE_list);
mac_xface->macphy_exit("");
return(-1);
}
int prev(UE_list_t *listP, int nodeP) {
int j;
......@@ -287,35 +307,75 @@ int prev(UE_list_t *listP, int nodeP) {
if (listP->next[j]==nodeP)
return(j);
}
LOG_E(MAC,"error in prev(), could not find previous in UE_list, should never happen\n");
LOG_E(MAC,"error in prev(), could not find previous to %d in UE_list, should never happen, Dumping UE list\n",nodeP);
dump_ue_list(listP);
return(-1);
}
void swap_UEs(UE_list_t *listP,int nodeiP, int nodejP) {
int prev_i,prev_j,next_i;
int prev_i,prev_j,next_i,next_j;
LOG_D(MAC,"Swapping UE %d,%d\n",nodeiP,nodejP);
dump_ue_list(listP);
prev_i = prev(listP,nodeiP);
prev_j = prev(listP,nodejP);
if ((prev_i<0) || (prev_j<0))
mac_xface->macphy_exit("");
next_i = listP->next[nodeiP];
listP->next[nodeiP] = listP->next[nodejP];
next_j = listP->next[nodejP];
LOG_D(MAC,"next_i %d, next_i, next_j %d, head %d\n",next_i,next_j,listP->head);
if (next_i == nodejP) { // case ... p(i) i j n(j) ... => ... p(j) j i n(i) ...
LOG_D(MAC,"Case ... p(i) i j n(j) ... => ... p(j) j i n(i) ...\n");
listP->next[nodeiP] = next_j;
listP->next[nodejP] = nodeiP;
if (nodeiP==listP->head) // case i j n(j)
listP->head = nodejP;
else
listP->next[prev_i] = nodejP;
}
else if (next_j == nodeiP) { // case ... p(j) j i n(i) ... => ... p(i) i j n(j) ...
LOG_D(MAC,"Case ... p(j) j i n(i) ... => ... p(i) i j n(j) ...\n");
listP->next[nodejP] = next_i;
listP->next[nodeiP] = nodejP;
if (nodejP==listP->head) // case j i n(i)
listP->head = nodeiP;
else
listP->next[prev_j] = nodeiP;
}
else { // case ... p(i) i n(i) ... p(j) j n(j) ...
listP->next[nodejP] = next_i;
listP->next[nodeiP] = next_j;
if (nodeiP==listP->head) {
LOG_D(MAC,"changing head to %d\n",nodejP);
listP->head=nodejP;
listP->next[prev_j] = nodeiP;
}
else {
listP->next[prev_i] = nodejP;
}
if (nodejP==listP->head) {
else if (nodejP==listP->head){
LOG_D(MAC,"changing head to %d\n",nodeiP);
listP->head=nodeiP;
listP->next[prev_i] = nodejP;
}
else {
listP->next[prev_i] = nodejP;
listP->next[prev_j] = nodeiP;
}
}
LOG_D(MAC,"After swap\n");
dump_ue_list(listP);
}
void SR_indication(module_id_t mod_idP, int cc_idP, frame_t frameP, rnti_t rntiP, sub_frame_t subframeP) {
......
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @ cd18c09f
......@@ -527,8 +527,9 @@ void schedule_ulsch_rnti(module_id_t module_idP,
if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
int8_t ret;
// Get candidate harq_pid from PHY
ret = mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,subframeP,&harq_pid,&round,1);
LOG_I(MAC,"Got harq_pid %d, round %d, UE_id %d\n",harq_pid,round,UE_id);
ret = mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,1);
LOG_I(MAC,"Got harq_pid %d, round %d, UE_id %d (UE_to_be_scheduled %d)\n",harq_pid,round,UE_id,
UE_is_to_be_scheduled(module_idP,CC_id,UE_id));
/* [SR] 01/07/13: Don't schedule UE if we cannot get harq pid */
#ifndef EXMIMO_IOT
......@@ -538,8 +539,8 @@ void schedule_ulsch_rnti(module_id_t module_idP,
if (round==0)
#endif
{
LOG_D(MAC,"[eNB %d][PUSCH %x] Frame %d subframeP %d Scheduling UE %d (SR %d)\n",
module_idP,rnti,frameP,subframeP,UE_id,
LOG_D(MAC,"[eNB %d][PUSCH %d] Frame %d subframeP %d Scheduling UE %d round %d (SR %d)\n",
module_idP,harq_pid,frameP,subframeP,UE_id,round,
UE_template->ul_SR);
// reset the scheduling request
......@@ -559,7 +560,10 @@ void schedule_ulsch_rnti(module_id_t module_idP,
if (round > 0) {
ndi = UE_template->oldNDI_UL[harq_pid];
mcs = rvidx_tab[round&3] + 29; //not correct for round==4!
if ((round&3)==0)
mcs = openair_daq_vars.target_ue_ul_mcs;
else
mcs = rvidx_tab[round&3] + 28; //not correct for round==4!
}
else {
ndi = 1-UE_template->oldNDI_UL[harq_pid];
......@@ -569,13 +573,14 @@ void schedule_ulsch_rnti(module_id_t module_idP,
LOG_D(MAC,"[eNB %d] ULSCH scheduler: Ndi %d, mcs %d\n",module_idP,ndi,mcs);
if((cooperation_flag > 0) && (UE_id == 1)) { // Allocation on same set of RBs
/* if((cooperation_flag > 0) && (UE_id == 1)) { // Allocation on same set of RBs
// RIV:resource indication value // function in openair1/PHY/LTE_TRANSPORT/dci_tools.c
rballoc = mac_xface->computeRIV(mac_xface->lte_frame_parms->N_RB_UL,
((UE_id-1)*4),//openair_daq_vars.ue_ul_nb_rb),
4);//openair_daq_vars.ue_ul_nb_rb);
}
else if ((round==0) && (mcs < 29)) {
}*/
if (round==0) {
rb_table_index = 1;
TBS = mac_xface->get_TBS_UL(mcs,rb_table[rb_table_index]);
buffer_occupancy = ((UE_template->bsr_info[LCGID0] == 0) &&
......@@ -618,7 +623,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
//rb_table_index = 8;
LOG_I(MAC,"[eNB %d][PUSCH %d/%x] Frame %d subframeP %d Scheduled UE (mcs %d, first rb %d, nb_rb %d, rb_table_index %d, TBS %d, harq_pid %d)\n",
module_idP,UE_id,rnti,frameP,subframeP,mcs,
module_idP,harq_pid,rnti,frameP,subframeP,mcs,
*first_rb,rb_table[rb_table_index],
rb_table_index,mac_xface->get_TBS_UL(mcs,rb_table[rb_table_index]),
harq_pid);
......@@ -628,6 +633,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
rb_table[rb_table_index]);//openair_daq_vars.ue_ul_nb_rb);
*first_rb+=rb_table[rb_table_index]; // increment for next UE allocation
UE_template->nb_rb_ul[harq_pid] = rb_table[rb_table_index]; //store for possible retransmission
buffer_occupancy -= mac_xface->get_TBS_UL(mcs,rb_table[rb_table_index]);
......
openair2/LAYER2/MAC/pre_processor.c
View file @ cd18c09f
......@@ -219,13 +219,13 @@ void assign_rbs_required (module_id_t Mod_id,
// This function scans all CC_ids for a particular UE to find the maximum round index of its HARQ processes
int maxround(module_id_t Mod_id,uint16_t rnti,sub_frame_t subframe) {
int maxround(module_id_t Mod_id,uint16_t rnti,int frame,sub_frame_t subframe) {
uint8_t round,round_max=0,harq_pid;
int CC_id;
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++){
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,subframe,&harq_pid,&round,0);
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frame,subframe,&harq_pid,&round,0);
if (round > round_max)
round_max = round;
}
......@@ -252,8 +252,9 @@ int maxcqi(module_id_t Mod_id,uint16_t rnti) {
// This fuction sorts the UE in order their dlsch buffer and CQI
void sort_UEs (module_id_t Mod_id,
sub_frame_t subframe) {
void sort_UEs (module_id_t Mod_idP,
int frameP,
sub_frame_t subframeP) {
int UE_id1,UE_id2;
......@@ -262,30 +263,30 @@ void sort_UEs (module_id_t Mod_id,
int i=0,ii=0,j=0;
rnti_t rnti1,rnti2;
UE_list_t *UE_list = &eNB_mac_inst[Mod_id].UE_list;
UE_list_t *UE_list = &eNB_mac_inst[Mod_idP].UE_list;
for (i=UE_list->head;i>=0;i=UE_list->next[i]) {
rnti1 = UE_RNTI(Mod_id,i);
rnti1 = UE_RNTI(Mod_idP,i);
if(rnti1 == 0)
continue;
UE_id1 = i;
pCC_id1 = UE_PCCID(Mod_id,UE_id1);
cqi1 = maxcqi(Mod_id,rnti1); //
round1 = maxround(Mod_id,rnti1,subframe);
pCC_id1 = UE_PCCID(Mod_idP,UE_id1);
cqi1 = maxcqi(Mod_idP,rnti1); //
round1 = maxround(Mod_idP,rnti1,frameP,subframeP);
for(ii=UE_list->next[i];ii>=0;ii=UE_list->next[ii]){
UE_id2 = ii;
rnti2 = UE_RNTI(Mod_id,UE_id2);
rnti2 = UE_RNTI(Mod_idP,UE_id2);
if(rnti2 == 0)
continue;
cqi2 = maxcqi(Mod_id,rnti2);
round2 = maxround(Mod_id,rnti2,subframe); //mac_xface->get_ue_active_harq_pid(Mod_id,rnti2,subframe,&harq_pid2,&round2,0);
pCC_id2 = UE_PCCID(Mod_id,UE_id2);
cqi2 = maxcqi(Mod_idP,rnti2);
round2 = maxround(Mod_idP,rnti2,frameP,subframeP); //mac_xface->get_ue_active_harq_pid(Mod_id,rnti2,subframe,&harq_pid2,&round2,0);
pCC_id2 = UE_PCCID(Mod_idP,UE_id2);
if(round2 > round1){ // Check first if one of the UEs has an active HARQ process which needs service and swap order
swap_UEs(UE_list,UE_id1,UE_id2);
......@@ -331,8 +332,8 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
int *mbsfn_flag){
unsigned char rballoc_sub[MAX_NUM_CCs][13],harq_pid=0,harq_pid1=0,harq_pid2=0,round=0,round1=0,round2=0,total_ue_count;
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][13];
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],harq_pid=0,harq_pid1=0,harq_pid2=0,round=0,round1=0,round2=0,total_ue_count;
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX];
int UE_id, UE_id2, i;
uint16_t ii,j;
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
......@@ -357,11 +358,14 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
continue;
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(Mod_id,CC_id);
min_rb_unit[CC_id]=get_min_rb_unit(Mod_id,CC_id);
for (i=UE_list->head;i>=0;i=UE_list->next[i]) {
UE_id = i;
// Initialize scheduling information for all active UEs
dlsch_scheduler_pre_processor_reset(UE_id,
CC_id,
N_RBG[CC_id],
......@@ -376,14 +380,22 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
}
}
// Store the DLSCH buffer for each logical channel
store_dlsch_buffer (Mod_id,frameP,subframeP);
// Calculate the number of RBs required by each UE on the basis of logical channel's buffer
assign_rbs_required (Mod_id,frameP,subframeP,nb_rbs_required,min_rb_unit);
// Sorts the user on the basis of dlsch logical channel buffer and CQI
sort_UEs (Mod_id,subframeP);
sort_UEs (Mod_id,frameP,subframeP);
total_ue_count =0;
// loop over all active UEs
......@@ -402,7 +414,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
average_rbs_per_user[CC_id]=0;
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,subframeP,&harq_pid,&round,0);
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
if(round>0)
nb_rbs_required[CC_id][UE_id] = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
//nb_rbs_required_remaining[UE_id] = nb_rbs_required[UE_id];
......@@ -480,7 +492,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
if(rnti == 0)
continue;
transmission_mode = mac_xface->get_transmission_mode(Mod_id,CC_id,rnti);
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,subframeP,&harq_pid,&round,0);
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
rrc_status = mac_get_rrc_status(Mod_id,1,UE_id);
/* 1st allocate for the retx */
......@@ -523,7 +535,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
continue;
eNB_UE_stats2 = mac_xface->get_eNB_UE_stats(Mod_id,CC_id,rnti2);
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti2,subframeP,&harq_pid2,&round2,0);
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti2,frameP,subframeP,&harq_pid2,&round2,0);
if ((mac_get_rrc_status(Mod_id,1,UE_id2) >= RRC_RECONFIGURED) &&
(round2==0) &&
......@@ -635,8 +647,8 @@ void dlsch_scheduler_pre_processor_reset (int UE_id,
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][13],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][13]){
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]){
int i;
nb_rbs_required[CC_id][UE_id]=0;
pre_nb_available_rbs[CC_id][UE_id] = 0;
......@@ -662,8 +674,8 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][13],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][13]){
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]){
int i;
......
openair2/LAYER2/MAC/proto.h
View file @ cd18c09f
......@@ -178,8 +178,8 @@ void dlsch_scheduler_pre_processor_reset (int UE_id,
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][13],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][13]);
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]);
// eNB functions
/* \brief This function assigns pre-available RBS to each UE in specified sub-bands before scheduling is done
......@@ -215,8 +215,8 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][13],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][13]);
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]);
/* \brief Function to trigger the eNB scheduling procedure. It is called by PHY at the beginning of each subframe, \f$n$\f
and generates all DLSCH allocations for subframe \f$n\f$ and ULSCH allocations for subframe \f$n+k$\f. The resultant DCI_PDU is
......
openair2/PHY_INTERFACE/defs.h
View file @ cd18c09f
......@@ -236,7 +236,7 @@ typedef struct
uint16_t (*get_TBS_UL)(uint8_t mcs, uint16_t nb_rb);
/// Function to retrieve the HARQ round index for a particular UL/DLSCH and harq_pid
int (*get_ue_active_harq_pid)(module_id_t Mod_id, uint8_t CC_id,rnti_t rnti, uint8_t subframe, uint8_t *harq_pid, uint8_t *round, uint8_t ul_flag);
int (*get_ue_active_harq_pid)(module_id_t Mod_id, uint8_t CC_id,rnti_t rnti, int frame, uint8_t subframe, uint8_t *harq_pid, uint8_t *round, uint8_t ul_flag);
/// Function to retrieve number of CCE
uint16_t (*get_nCCE_max)(module_id_t Mod_id,uint8_t CC_id);
......
openair2/RRC/LITE/MESSAGES/asn1_msg.c
View file @ cd18c09f
This diff is collapsed.
openair2/UTIL/OCG/OCG.h
View file @ cd18c09f
......@@ -732,13 +732,13 @@ The following diagram is based on graphviz (http://www.graphviz.org/), you need
// phy related params
unsigned int n_frames;
unsigned int n_frames_flag; // if set, then let the emulation goes to infinity
unsigned char frame_type;
char * frame_type_name;
unsigned char tdd_config;
unsigned char tdd_config_S;
unsigned char extended_prefix_flag;
unsigned char N_RB_DL;
unsigned char transmission_mode;
unsigned char frame_type[MAX_NUM_CCs];
char * frame_type_name[MAX_NUM_CCs];
unsigned char tdd_config[MAX_NUM_CCs];
unsigned char tdd_config_S[MAX_NUM_CCs];
unsigned char extended_prefix_flag[MAX_NUM_CCs];
unsigned char N_RB_DL[MAX_NUM_CCs];
unsigned char transmission_mode[MAX_NUM_CCs];
int max_predefined_traffic_config_index;
int max_customized_traffic_config_index;
......
openair2/UTIL/OCG/OCG_parse_XML.c
View file @ cd18c09f
......@@ -947,19 +947,19 @@ void characters(void *user_data, const xmlChar *xmlch, int xmllen) { // called o
} else if (system_frequency_GHz_) {
oai_emulation.environment_system_config.system_frequency_GHz = atof(ch);
} else if (number_of_rbs_dl_) {
oai_emulation.info.N_RB_DL = atoi(ch);
oai_emulation.info.N_RB_DL[0] = atoi(ch);
} else if (transmission_mode_) {
oai_emulation.info.transmission_mode = atoi(ch);
oai_emulation.info.transmission_mode[0] = atoi(ch);
} else if (frame_config_) {
if (frame_type_) {
oai_emulation.info.frame_type = atoi(ch);
if (oai_emulation.info.frame_type) {
oai_emulation.info.frame_type_name = "TDD";
oai_emulation.info.frame_type[0] = atoi(ch);
if (oai_emulation.info.frame_type[0]) {
oai_emulation.info.frame_type_name[0] = "TDD";
} else {
oai_emulation.info.frame_type_name = "FDD";
oai_emulation.info.frame_type_name[0] = "FDD";
}
} else if (tdd_config_) {
oai_emulation.info.tdd_config = atoi(ch);
oai_emulation.info.tdd_config[0] = atoi(ch);
}
} else if (antenna_) {
if (eNB_antenna_) {
......
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