Commit d2bf4ddc authored by Raymond Knopp's avatar Raymond Knopp

git-svn-id: http://svn.eurecom.fr/openair4G/trunk@5739 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent b1e97ab1
...@@ -837,11 +837,8 @@ void phy_init_lte_top(LTE_DL_FRAME_PARMS *lte_frame_parms) { ...@@ -837,11 +837,8 @@ void phy_init_lte_top(LTE_DL_FRAME_PARMS *lte_frame_parms) {
init_td8(); init_td8();
init_td16(); init_td16();
#ifdef USER_MODE
lte_sync_time_init(lte_frame_parms); lte_sync_time_init(lte_frame_parms);
#else
// lte_sync_time_init(lte_frame_parms) has to be called from the real-time thread, since it uses SSE instructions.
#endif
generate_ul_ref_sigs(); generate_ul_ref_sigs();
generate_ul_ref_sigs_rx(); generate_ul_ref_sigs_rx();
......
...@@ -45,9 +45,11 @@ phy_adjust_gain (PHY_VARS_UE *phy_vars_ue, uint8_t eNB_id) { ...@@ -45,9 +45,11 @@ phy_adjust_gain (PHY_VARS_UE *phy_vars_ue, uint8_t eNB_id) {
exmimo_config_t *p_exmimo_config = openair0_exmimo_pci[card].exmimo_config_ptr; exmimo_config_t *p_exmimo_config = openair0_exmimo_pci[card].exmimo_config_ptr;
uint16_t i; uint16_t i;
#endif #endif
int rssi;
//rx_power_fil_dB = dB_fixed(phy_vars_ue->PHY_measurements.rssi); rssi = dB_fixed(phy_vars_ue->PHY_measurements.rssi);
rx_power_fil_dB = phy_vars_ue->PHY_measurements.rx_power_avg_dB[eNB_id]; if (rssi>0) rx_power_fil_dB = dB_fixed(phy_vars_ue->PHY_measurements.rssi);
else rx_power_fil_dB = phy_vars_ue->PHY_measurements.rx_power_avg_dB[eNB_id];
// Gain control with hysterisis // Gain control with hysterisis
// Adjust gain in phy_vars_ue->rx_vars[0].rx_total_gain_dB // Adjust gain in phy_vars_ue->rx_vars[0].rx_total_gain_dB
...@@ -78,6 +80,7 @@ phy_adjust_gain (PHY_VARS_UE *phy_vars_ue, uint8_t eNB_id) { ...@@ -78,6 +80,7 @@ phy_adjust_gain (PHY_VARS_UE *phy_vars_ue, uint8_t eNB_id) {
phy_vars_ue->rx_total_gain_dB = MIN_RF_GAIN; phy_vars_ue->rx_total_gain_dB = MIN_RF_GAIN;
} }
printf("Gain control: rx_total_gain_dB = %d (max %d,rxpf %d)\n",phy_vars_ue->rx_total_gain_dB,MAX_RF_GAIN,rx_power_fil_dB);
#ifdef EXMIMO #ifdef EXMIMO
......
...@@ -1832,13 +1832,13 @@ int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars, ...@@ -1832,13 +1832,13 @@ int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars,
lte_ue_pdcch_vars[eNB_id]->llr16, //subsequent function require 16 bit llr, but output must be 8 bit (actually clipped to 4, because of the Viterbi decoder) lte_ue_pdcch_vars[eNB_id]->llr16, //subsequent function require 16 bit llr, but output must be 8 bit (actually clipped to 4, because of the Viterbi decoder)
lte_ue_pdcch_vars[eNB_id]->llr, lte_ue_pdcch_vars[eNB_id]->llr,
s); s);
/*
#ifdef DEBUG_PHY #ifdef DEBUG_PHY
if (subframe==5) { if (subframe==5) {
write_output("llr8_seq.m","llr8",&lte_ue_pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4); write_output("llr8_seq.m","llr8",&lte_ue_pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
write_output("llr16_seq.m","llr16",&lte_ue_pdcch_vars[eNB_id]->llr16[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4); write_output("llr16_seq.m","llr16",&lte_ue_pdcch_vars[eNB_id]->llr16[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
} }
#endif #endif*/
} }
else { else {
#endif //MU_RECEIVER #endif //MU_RECEIVER
...@@ -1846,9 +1846,9 @@ int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars, ...@@ -1846,9 +1846,9 @@ int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars,
lte_ue_pdcch_vars[eNB_id]->rxdataF_comp, lte_ue_pdcch_vars[eNB_id]->rxdataF_comp,
(char *)lte_ue_pdcch_vars[eNB_id]->llr, (char *)lte_ue_pdcch_vars[eNB_id]->llr,
s); s);
#ifdef DEBUG_PHY /*#ifdef DEBUG_PHY
write_output("llr8_seq.m","llr8",&lte_ue_pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4); write_output("llr8_seq.m","llr8",&lte_ue_pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
#endif #endif*/
#ifdef MU_RECEIVER #ifdef MU_RECEIVER
} }
#endif //MU_RECEIVER #endif //MU_RECEIVER
......
...@@ -4031,11 +4031,6 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, ...@@ -4031,11 +4031,6 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
harq_pid = subframe2harq_pid(frame_parms, harq_pid = subframe2harq_pid(frame_parms,
pdcch_alloc2ul_frame(frame_parms,phy_vars_ue->frame,subframe), pdcch_alloc2ul_frame(frame_parms,phy_vars_ue->frame,subframe),
pdcch_alloc2ul_subframe(frame_parms,subframe)); pdcch_alloc2ul_subframe(frame_parms,subframe));
/*
msg("Scheduling UE transmission for frame %d, subframe %d harq_pid = %d\n",
pdcch_alloc2ul_frame(frame_parms,phy_vars_ue->frame,subframe),
pdcch_alloc2ul_subframe(frame_parms,subframe),harq_pid);
*/
if (harq_pid == 255) { if (harq_pid == 255) {
LOG_E(PHY, "frame %d, subframe %d, rnti %x, format %d: illegal harq_pid!\n", LOG_E(PHY, "frame %d, subframe %d, rnti %x, format %d: illegal harq_pid!\n",
......
...@@ -276,6 +276,8 @@ int initial_sync(PHY_VARS_UE *phy_vars_ue, runmode_t mode) { ...@@ -276,6 +276,8 @@ int initial_sync(PHY_VARS_UE *phy_vars_ue, runmode_t mode) {
(mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) ) (mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) )
//phy_adjust_gain(phy_vars_ue,0); //phy_adjust_gain(phy_vars_ue,0);
gain_control_all(phy_vars_ue->PHY_measurements.rx_power_avg_dB[0],0); gain_control_all(phy_vars_ue->PHY_measurements.rx_power_avg_dB[0],0);
#else
phy_adjust_gain(phy_vars_ue,0);
#endif #endif
// SSS detection // SSS detection
......
...@@ -762,7 +762,7 @@ uint16_t rx_pbch(LTE_UE_COMMON *lte_ue_common_vars, ...@@ -762,7 +762,7 @@ uint16_t rx_pbch(LTE_UE_COMMON *lte_ue_common_vars,
pbch_E = (frame_parms->Ncp==0) ? 1920 : 1728; //RE/RB * #RB * bits/RB (QPSK) pbch_E = (frame_parms->Ncp==0) ? 1920 : 1728; //RE/RB * #RB * bits/RB (QPSK)
pbch_e_rx = &lte_ue_pbch_vars->llr[frame_mod4*(pbch_E>>2)]; pbch_e_rx = &lte_ue_pbch_vars->llr[frame_mod4*(pbch_E>>2)];
#ifdef DEBUG_PBCH #ifdef DEBUG_PBCH
msg("[PBCH] starting symbol loop\n"); msg("[PBCH] starting symbol loop (Ncp %d, frame_mod4 %d,mimo_mode %d\n",frame_parms->Ncp,frame_mod4,mimo_mode);
#endif #endif
// clear LLR buffer // clear LLR buffer
......
...@@ -142,10 +142,6 @@ void generate_pcfich(uint8_t num_pdcch_symbols, ...@@ -142,10 +142,6 @@ void generate_pcfich(uint8_t num_pdcch_symbols,
uint8_t i; uint8_t i;
uint32_t symbol_offset,m,re_offset,reg_offset; uint32_t symbol_offset,m,re_offset,reg_offset;
int16_t gain_lin_QPSK; int16_t gain_lin_QPSK;
#ifdef IFFT_FPGA
uint8_t qpsk_table_offset = 0;
uint8_t qpsk_table_offset2 = 0;
#endif
uint16_t *pcfich_reg = frame_parms->pcfich_reg; uint16_t *pcfich_reg = frame_parms->pcfich_reg;
int nushiftmod3 = frame_parms->nushift%3; int nushiftmod3 = frame_parms->nushift%3;
...@@ -164,28 +160,15 @@ void generate_pcfich(uint8_t num_pdcch_symbols, ...@@ -164,28 +160,15 @@ void generate_pcfich(uint8_t num_pdcch_symbols,
gain_lin_QPSK = amp/2; gain_lin_QPSK = amp/2;
if (frame_parms->mode1_flag) { // SISO if (frame_parms->mode1_flag) { // SISO
#ifndef IFFT_FPGA
for (i=0;i<16;i++) { for (i=0;i<16;i++) {
((int16_t*)(&(pcfich_d[0][i])))[0] = ((pcfich_bt[2*i] == 1) ? -gain_lin_QPSK : gain_lin_QPSK); ((int16_t*)(&(pcfich_d[0][i])))[0] = ((pcfich_bt[2*i] == 1) ? -gain_lin_QPSK : gain_lin_QPSK);
((int16_t*)(&(pcfich_d[1][i])))[0] = ((pcfich_bt[2*i] == 1) ? -gain_lin_QPSK : gain_lin_QPSK); ((int16_t*)(&(pcfich_d[1][i])))[0] = ((pcfich_bt[2*i] == 1) ? -gain_lin_QPSK : gain_lin_QPSK);
((int16_t*)(&(pcfich_d[0][i])))[1] = ((pcfich_bt[2*i+1] == 1) ? -gain_lin_QPSK : gain_lin_QPSK); ((int16_t*)(&(pcfich_d[0][i])))[1] = ((pcfich_bt[2*i+1] == 1) ? -gain_lin_QPSK : gain_lin_QPSK);
((int16_t*)(&(pcfich_d[1][i])))[1] = ((pcfich_bt[2*i+1] == 1) ? -gain_lin_QPSK : gain_lin_QPSK); ((int16_t*)(&(pcfich_d[1][i])))[1] = ((pcfich_bt[2*i+1] == 1) ? -gain_lin_QPSK : gain_lin_QPSK);
} }
#else
for (i=0;i<16;i++) {
qpsk_table_offset = MOD_TABLE_QPSK_OFFSET;
if (pcfich_bt[2*i] == 1)
qpsk_table_offset+=2;
if (pcfich_bt[2*i+1] == 1)
qpsk_table_offset+=1;
pcfich_d[0][i] = (mod_sym_t) qpsk_table_offset;
pcfich_d[1][i] = (mod_sym_t) qpsk_table_offset;
}
#endif
} }
else { // ALAMOUTI else { // ALAMOUTI
#ifndef IFFT_FPGA
for (i=0;i<16;i+=2) { for (i=0;i<16;i+=2) {
// first antenna position n -> x0 // first antenna position n -> x0
((int16_t*)(&(pcfich_d[0][i])))[0] = ((pcfich_bt[2*i] == 1) ? -gain_lin_QPSK : gain_lin_QPSK); ((int16_t*)(&(pcfich_d[0][i])))[0] = ((pcfich_bt[2*i] == 1) ? -gain_lin_QPSK : gain_lin_QPSK);
...@@ -201,83 +184,25 @@ void generate_pcfich(uint8_t num_pdcch_symbols, ...@@ -201,83 +184,25 @@ void generate_pcfich(uint8_t num_pdcch_symbols,
} }
#else
for (i=0;i<16;i+=2) {
qpsk_table_offset = MOD_TABLE_QPSK_OFFSET; //x0
qpsk_table_offset2 = MOD_TABLE_QPSK_OFFSET; //x0*
// flipping bit for imag part of symbol means taking x0*
if (pcfich_bt[2*i] == 1) { //real
qpsk_table_offset+=2;
qpsk_table_offset2+=2;
}
if (pcfich_bt[2*i+1] == 1) //imag
qpsk_table_offset+=1;
else
qpsk_table_offset2+=1;
pcfich_d[0][i] = (mod_sym_t) qpsk_table_offset; // x0
pcfich_d[1][i+1] = (mod_sym_t) qpsk_table_offset2; // x0*
qpsk_table_offset = MOD_TABLE_QPSK_OFFSET; //-x1*
qpsk_table_offset2 = MOD_TABLE_QPSK_OFFSET;//x1
// flipping bit for real part of symbol means taking -x1*
if (pcfich_bt[2*i+2] == 1) //real
qpsk_table_offset2+=2;
else
qpsk_table_offset+=2;
if (pcfich_bt[2*i+3] == 1) { //imag
qpsk_table_offset+=1;
qpsk_table_offset2+=1;
}
pcfich_d[1][i] = (mod_sym_t) qpsk_table_offset; // -x1*
pcfich_d[0][i+1] = (mod_sym_t) qpsk_table_offset2; // x1
}
#endif
} }
// mapping // mapping
nsymb = (frame_parms->Ncp==0) ? 14:12; nsymb = (frame_parms->Ncp==0) ? 14:12;
#ifdef IFFT_FPGA
symbol_offset = (uint32_t)frame_parms->N_RB_DL*12*((subframe*nsymb));
re_offset = frame_parms->N_RB_DL*12/2;
#else
symbol_offset = (uint32_t)frame_parms->ofdm_symbol_size*((subframe*nsymb)); symbol_offset = (uint32_t)frame_parms->ofdm_symbol_size*((subframe*nsymb));
re_offset = frame_parms->first_carrier_offset; re_offset = frame_parms->first_carrier_offset;
#endif
// loop over 4 quadruplets and lookup REGs // loop over 4 quadruplets and lookup REGs
m=0; m=0;
for (pcfich_quad=0;pcfich_quad<4;pcfich_quad++) { for (pcfich_quad=0;pcfich_quad<4;pcfich_quad++) {
reg_offset = re_offset+((uint16_t)pcfich_reg[pcfich_quad]*6); reg_offset = re_offset+((uint16_t)pcfich_reg[pcfich_quad]*6);
#ifdef IFFT_FPGA
if (reg_offset>=(frame_parms->N_RB_DL*12))
reg_offset-=(frame_parms->N_RB_DL*12);
#else
if (reg_offset>=frame_parms->ofdm_symbol_size) if (reg_offset>=frame_parms->ofdm_symbol_size)
reg_offset=1 + reg_offset-frame_parms->ofdm_symbol_size; reg_offset=1 + reg_offset-frame_parms->ofdm_symbol_size;
#endif
// printf("mapping pcfich reg_offset %d\n",reg_offset); // printf("mapping pcfich reg_offset %d\n",reg_offset);
for (i=0;i<6;i++) { for (i=0;i<6;i++) {
if ((i!=nushiftmod3)&&(i!=(nushiftmod3+3))) { if ((i!=nushiftmod3)&&(i!=(nushiftmod3+3))) {
txdataF[0][symbol_offset+reg_offset+i] = pcfich_d[0][m]; txdataF[0][symbol_offset+reg_offset+i] = pcfich_d[0][m];
/*
#ifndef IFFT_FPGA
printf("pcfich: quad %d, i %d, offset %d => m%d (%d,%d)\n",pcfich_quad,i,reg_offset+i,m,
((int16_t*)&txdataF[0][symbol_offset+reg_offset+i])[0],
((int16_t*)&txdataF[0][symbol_offset+reg_offset+i])[1]);
#else
printf("pcfich: quad %d, i %d, offset %d => m%d (%d)\n",pcfich_quad,i,reg_offset+i,m,
txdataF[0][symbol_offset+reg_offset+i]);
#endif
*/
if (frame_parms->nb_antennas_tx_eNB>1) if (frame_parms->nb_antennas_tx_eNB>1)
txdataF[1][symbol_offset+reg_offset+i] = pcfich_d[1][m]; txdataF[1][symbol_offset+reg_offset+i] = pcfich_d[1][m];
m++; m++;
......
...@@ -1158,6 +1158,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB, ...@@ -1158,6 +1158,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
#endif #endif
start_meas(&phy_vars_eNB->ulsch_rate_unmatching_stats); start_meas(&phy_vars_eNB->ulsch_rate_unmatching_stats);
if (lte_rate_matching_turbo_rx(ulsch->harq_processes[harq_pid]->RTC[r], if (lte_rate_matching_turbo_rx(ulsch->harq_processes[harq_pid]->RTC[r],
G, G,
ulsch->harq_processes[harq_pid]->w[r], ulsch->harq_processes[harq_pid]->w[r],
...@@ -1188,14 +1189,14 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB, ...@@ -1188,14 +1189,14 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
&ulsch->harq_processes[harq_pid]->d[r][96], &ulsch->harq_processes[harq_pid]->d[r][96],
ulsch->harq_processes[harq_pid]->w[r]); ulsch->harq_processes[harq_pid]->w[r]);
stop_meas(&phy_vars_eNB->ulsch_deinterleaving_stats); stop_meas(&phy_vars_eNB->ulsch_deinterleaving_stats);
/*
/*#ifdef DEBUG_ULSCH_DECODING #ifdef DEBUG_ULSCH_DECODING
msg("decoder input(segment %d) :",r); msg("decoder input(segment %d) :",r);
for (i=0;i<(3*8*Kr_bytes)+12;i++) for (i=0;i<(3*8*Kr_bytes)+12;i++)
msg("%d : %d\n",i,ulsch->harq_processes[harq_pid]->d[r][96+i]); msg("%d : %d\n",i,ulsch->harq_processes[harq_pid]->d[r][96+i]);
msg("\n"); msg("\n");
#endif*/ #endif
*/
} }
#ifdef OMP #ifdef OMP
......
...@@ -1565,7 +1565,7 @@ void dump_ulsch(PHY_VARS_eNB *PHY_vars_eNB,uint8_t sched_subframe, uint8_t UE_id ...@@ -1565,7 +1565,7 @@ void dump_ulsch(PHY_VARS_eNB *PHY_vars_eNB,uint8_t sched_subframe, uint8_t UE_id
harq_pid = subframe2harq_pid(&PHY_vars_eNB->lte_frame_parms,PHY_vars_eNB->proc[sched_subframe].frame_rx,subframe); harq_pid = subframe2harq_pid(&PHY_vars_eNB->lte_frame_parms,PHY_vars_eNB->proc[sched_subframe].frame_rx,subframe);
printf("Dumping ULSCH in subframe %d with harq_pid %d, for NB_rb %d, mcs %d, Qm %d, N_symb %d\n", subframe,harq_pid,PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->nb_rb,PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->mcs,get_Qm_ul(PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->mcs),PHY_vars_eNB->ulsch_eNB[UE_id]->Nsymb_pusch); printf("Dumping ULSCH in subframe %d with harq_pid %d, for NB_rb %d, mcs %d, Qm %d, N_symb %d\n", subframe,harq_pid,PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->nb_rb,PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->mcs,get_Qm_ul(PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->mcs),PHY_vars_eNB->ulsch_eNB[UE_id]->Nsymb_pusch);
#ifndef OAI_EMU //#ifndef OAI_EMU
write_output("/tmp/ulsch_d.m","ulsch_dseq",&PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->d[0][96], write_output("/tmp/ulsch_d.m","ulsch_dseq",&PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->d[0][96],
PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->Kplus*3,1,0); PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->Kplus*3,1,0);
write_output("/tmp/rxsig0.m","rxs0", &PHY_vars_eNB->lte_eNB_common_vars.rxdata[0][0][0],PHY_vars_eNB->lte_frame_parms.samples_per_tti*10,1,1); write_output("/tmp/rxsig0.m","rxs0", &PHY_vars_eNB->lte_eNB_common_vars.rxdata[0][0][0],PHY_vars_eNB->lte_frame_parms.samples_per_tti*10,1,1);
...@@ -1590,6 +1590,6 @@ void dump_ulsch(PHY_VARS_eNB *PHY_vars_eNB,uint8_t sched_subframe, uint8_t UE_id ...@@ -1590,6 +1590,6 @@ void dump_ulsch(PHY_VARS_eNB *PHY_vars_eNB,uint8_t sched_subframe, uint8_t UE_id
write_output("/tmp/ulsch_rxF_llr.m","ulsch_llr",PHY_vars_eNB->lte_eNB_pusch_vars[UE_id]->llr,PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->nb_rb*12*get_Qm_ul(PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->mcs)*PHY_vars_eNB->ulsch_eNB[UE_id]->Nsymb_pusch,1,0); write_output("/tmp/ulsch_rxF_llr.m","ulsch_llr",PHY_vars_eNB->lte_eNB_pusch_vars[UE_id]->llr,PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->nb_rb*12*get_Qm_ul(PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->mcs)*PHY_vars_eNB->ulsch_eNB[UE_id]->Nsymb_pusch,1,0);
write_output("/tmp/ulsch_ch_mag.m","ulsch_ch_mag",&PHY_vars_eNB->lte_eNB_pusch_vars[UE_id]->ul_ch_mag[0][0][0],PHY_vars_eNB->lte_frame_parms.N_RB_UL*12*nsymb,1,1); write_output("/tmp/ulsch_ch_mag.m","ulsch_ch_mag",&PHY_vars_eNB->lte_eNB_pusch_vars[UE_id]->ul_ch_mag[0][0][0],PHY_vars_eNB->lte_frame_parms.N_RB_UL*12*nsymb,1,1);
// write_output("ulsch_ch_mag1.m","ulsch_ch_mag1",&PHY_vars_eNB->lte_eNB_pusch_vars[UE_id]->ul_ch_mag[0][1][0],PHY_vars_eNB->lte_frame_parms.N_RB_UL*12*nsymb,1,1); // write_output("ulsch_ch_mag1.m","ulsch_ch_mag1",&PHY_vars_eNB->lte_eNB_pusch_vars[UE_id]->ul_ch_mag[0][1][0],PHY_vars_eNB->lte_frame_parms.N_RB_UL*12*nsymb,1,1);
#endif //#endif
} }
...@@ -89,6 +89,8 @@ int slot_fep_ul(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -89,6 +89,8 @@ int slot_fep_ul(LTE_DL_FRAME_PARMS *frame_parms,
void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRAME_PARMS *frame_parms); void normal_prefix_mod(int32_t *txdataF,int32_t *txdata,uint8_t nsymb,LTE_DL_FRAME_PARMS *frame_parms);
void do_OFDM_mod(mod_sym_t **txdataF, int32_t **txdata, uint32_t frame,uint16_t next_slot, LTE_DL_FRAME_PARMS *frame_parms);
void remove_7_5_kHz(PHY_VARS_eNB *phy_vars_eNB,uint8_t subframe); void remove_7_5_kHz(PHY_VARS_eNB *phy_vars_eNB,uint8_t subframe);
void apply_7_5_kHz(PHY_VARS_UE *phy_vars_ue,int32_t*txdata,uint8_t subframe); void apply_7_5_kHz(PHY_VARS_UE *phy_vars_ue,int32_t*txdata,uint8_t subframe);
......
...@@ -37,7 +37,7 @@ This section deals with basic functions for OFDM Modulation. ...@@ -37,7 +37,7 @@ This section deals with basic functions for OFDM Modulation.
*/ */
#include "PHY/defs.h" #include "PHY/defs.h"
#include "UTIL/LOG/log.h"
//static short temp2[2048*4] __attribute__((aligned(16))); //static short temp2[2048*4] __attribute__((aligned(16)));
...@@ -244,4 +244,64 @@ void PHY_ofdm_mod(int *input, /// pointer to complex input ...@@ -244,4 +244,64 @@ void PHY_ofdm_mod(int *input, /// pointer to complex input
*/ */
} }
void do_OFDM_mod(mod_sym_t **txdataF, int32_t **txdata, uint32_t frame,uint16_t next_slot, LTE_DL_FRAME_PARMS *frame_parms) {
int aa, slot_offset, slot_offset_F;
slot_offset_F = (next_slot)*(frame_parms->ofdm_symbol_size)*((frame_parms->Ncp==1) ? 6 : 7);
slot_offset = (next_slot)*(frame_parms->samples_per_tti>>1);
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
if (is_pmch_subframe(frame,next_slot>>1,frame_parms)) {
if ((next_slot%2)==0) {
LOG_D(PHY,"Frame %d, subframe %d: Doing MBSFN modulation (slot_offset %d)\n",frame,next_slot>>1,slot_offset);
PHY_ofdm_mod(&txdataF[aa][slot_offset_F], // input
&txdata[aa][slot_offset], // output
frame_parms->log2_symbol_size, // log2_fft_size
12, // number of symbols
frame_parms->ofdm_symbol_size>>2, // number of prefix samples
frame_parms->twiddle_ifft, // IFFT twiddle factors
frame_parms->rev, // bit-reversal permutation
CYCLIC_PREFIX);
if (frame_parms->Ncp == EXTENDED)
PHY_ofdm_mod(&txdataF[aa][slot_offset_F], // input
&txdata[aa][slot_offset], // output
frame_parms->log2_symbol_size, // log2_fft_size
2, // number of symbols
frame_parms->nb_prefix_samples, // number of prefix samples
frame_parms->twiddle_ifft, // IFFT twiddle factors
frame_parms->rev, // bit-reversal permutation
CYCLIC_PREFIX);
else {
LOG_D(PHY,"Frame %d, subframe %d: Doing PDCCH modulation\n",frame,next_slot>>1);
normal_prefix_mod(&txdataF[aa][slot_offset_F],
&txdata[aa][slot_offset],
2,
frame_parms);
}
}
}
else {
if (frame_parms->Ncp == EXTENDED)
PHY_ofdm_mod(&txdataF[aa][slot_offset_F], // input
&txdata[aa][slot_offset], // output
frame_parms->log2_symbol_size, // log2_fft_size
6, // number of symbols
frame_parms->nb_prefix_samples, // number of prefix samples
frame_parms->twiddle_ifft, // IFFT twiddle factors
frame_parms->rev, // bit-reversal permutation
CYCLIC_PREFIX);
else {
normal_prefix_mod(&txdataF[aa][slot_offset_F],
&txdata[aa][slot_offset],
7,
frame_parms);
}
}
}
}
/** @} */ /** @} */
...@@ -102,11 +102,7 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue, ...@@ -102,11 +102,7 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
for (aa=0;aa<frame_parms->nb_antennas_rx;aa++) { for (aa=0;aa<frame_parms->nb_antennas_rx;aa++) {
#ifdef NEW_FFT
memset(&ue_common_vars->rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int)); memset(&ue_common_vars->rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
#else
memset(&ue_common_vars->rxdataF[aa][2*frame_parms->ofdm_symbol_size*symbol],0,2*frame_parms->ofdm_symbol_size*sizeof(int));
#endif
if (l==0) { if (l==0) {
rx_offset = sample_offset + slot_offset + nb_prefix_samples0 + subframe_offset - SOFFSET; rx_offset = sample_offset + slot_offset + nb_prefix_samples0 + subframe_offset - SOFFSET;
...@@ -116,24 +112,10 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue, ...@@ -116,24 +112,10 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
memcpy((short *)&ue_common_vars->rxdata[aa][frame_length_samples], memcpy((short *)&ue_common_vars->rxdata[aa][frame_length_samples],
(short *)&ue_common_vars->rxdata[aa][0], (short *)&ue_common_vars->rxdata[aa][0],
frame_parms->ofdm_symbol_size*sizeof(int)); frame_parms->ofdm_symbol_size*sizeof(int));
#ifndef NEW_FFT
fft((short *)&ue_common_vars->rxdata[aa][(sample_offset +
slot_offset +
nb_prefix_samples0 +
subframe_offset -
SOFFSET) % frame_length_samples],
(short*)&ue_common_vars->rxdataF[aa][2*frame_parms->ofdm_symbol_size*symbol],
frame_parms->twiddle_fft,
frame_parms->rev,
frame_parms->log2_symbol_size,
frame_parms->log2_symbol_size>>1,
0);
#else
start_meas(&phy_vars_ue->rx_dft_stats); start_meas(&phy_vars_ue->rx_dft_stats);
dft((int16_t *)&ue_common_vars->rxdata[aa][(rx_offset) % frame_length_samples], dft((int16_t *)&ue_common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&ue_common_vars->rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1); (int16_t *)&ue_common_vars->rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
stop_meas(&phy_vars_ue->rx_dft_stats); stop_meas(&phy_vars_ue->rx_dft_stats);
#endif
} }
else { else {
...@@ -148,38 +130,11 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue, ...@@ -148,38 +130,11 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
(short *)&ue_common_vars->rxdata[aa][0], (short *)&ue_common_vars->rxdata[aa][0],
frame_parms->ofdm_symbol_size*sizeof(int)); frame_parms->ofdm_symbol_size*sizeof(int));
#ifndef NEW_FFT
fft((short *)&ue_common_vars->rxdata[aa][(sample_offset +
slot_offset +
(frame_parms->ofdm_symbol_size+nb_prefix_samples0+nb_prefix_samples) +
(frame_parms->ofdm_symbol_size+nb_prefix_samples)*(l-1) +
subframe_offset-
SOFFSET) % frame_length_samples],
(short*)&ue_common_vars->rxdataF[aa][2*frame_parms->ofdm_symbol_size*symbol],
frame_parms->twiddle_fft,
frame_parms->rev,
frame_parms->log2_symbol_size,
frame_parms->log2_symbol_size>>1,
0);
#else
start_meas(&phy_vars_ue->rx_dft_stats); start_meas(&phy_vars_ue->rx_dft_stats);
dft((int16_t *)&ue_common_vars->rxdata[aa][(rx_offset) % frame_length_samples], dft((int16_t *)&ue_common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&ue_common_vars->rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1); (int16_t *)&ue_common_vars->rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
stop_meas(&phy_vars_ue->rx_dft_stats); stop_meas(&phy_vars_ue->rx_dft_stats);
#endif
} }
/*
#ifndef NEW_FFT
memcpy(&ue_common_vars->rxdataF2[aa][2*subframe_offset_F+2*frame_parms->ofdm_symbol_size*symbol],
&ue_common_vars->rxdataF[aa][2*frame_parms->ofdm_symbol_size*symbol],
2*frame_parms->ofdm_symbol_size*sizeof(int));
#else
memcpy(&ue_common_vars->rxdataF2[aa][subframe_offset_F+frame_parms->ofdm_symbol_size*symbol],
&ue_common_vars->rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
frame_parms->ofdm_symbol_size*sizeof(int));
#endif
*/
} }
#ifndef PERFECT_CE #ifndef PERFECT_CE
if ((l==0) || (l==(4-frame_parms->Ncp))) { if ((l==0) || (l==(4-frame_parms->Ncp))) {
......
...@@ -362,6 +362,7 @@ typedef struct ...@@ -362,6 +362,7 @@ typedef struct
uint32_t rx_gain_med[4]; uint32_t rx_gain_med[4];
uint32_t rx_gain_byp[4]; uint32_t rx_gain_byp[4];
int8_t tx_power_dBm; int8_t tx_power_dBm;
int tx_total_RE;
int8_t tx_power_max_dBm; int8_t tx_power_max_dBm;
uint32_t frame; uint32_t frame;
uint8_t n_connected_eNB; uint8_t n_connected_eNB;
......
...@@ -183,7 +183,7 @@ ...@@ -183,7 +183,7 @@
//the min and max gains have to match the calibrated gain table //the min and max gains have to match the calibrated gain table
//#define MAX_RF_GAIN 160 //#define MAX_RF_GAIN 160
//#define MIN_RF_GAIN 96 //#define MIN_RF_GAIN 96
#define MAX_RF_GAIN 160 #define MAX_RF_GAIN 200
#define MIN_RF_GAIN 80 #define MIN_RF_GAIN 80
#define PHY_SYNCH_OFFSET ((OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES)-1) // OFFSET of BEACON SYNCH #define PHY_SYNCH_OFFSET ((OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES)-1) // OFFSET of BEACON SYNCH
......
...@@ -527,7 +527,7 @@ LTE_DL_FRAME_PARMS *get_lte_frame_parms(module_id_t Mod_id, uint8_t CC_id); ...@@ -527,7 +527,7 @@ LTE_DL_FRAME_PARMS *get_lte_frame_parms(module_id_t Mod_id, uint8_t CC_id);
MU_MIMO_mode* get_mu_mimo_mode (module_id_t Mod_id, uint8_t CC_id); MU_MIMO_mode* get_mu_mimo_mode (module_id_t Mod_id, uint8_t CC_id);
int get_ue_active_harq_pid(uint8_t Mod_id,uint8_t CC_id,uint16_t rnti,uint8_t subframe,uint8_t *harq_pid,uint8_t *round,uint8_t ul_flag); int get_ue_active_harq_pid(uint8_t Mod_id,uint8_t CC_id,uint16_t rnti,int frame, uint8_t subframe,uint8_t *harq_pid,uint8_t *round,uint8_t ul_flag);
void ulsch_decoding_procedures(unsigned char last_slot, unsigned int i, PHY_VARS_eNB *phy_vars_eNB, unsigned char abstraction_flag); void ulsch_decoding_procedures(unsigned char last_slot, unsigned int i, PHY_VARS_eNB *phy_vars_eNB, unsigned char abstraction_flag);
......
...@@ -77,7 +77,6 @@ ...@@ -77,7 +77,6 @@
#define NS_PER_SLOT 500000 #define NS_PER_SLOT 500000
#define PUCCH 1 #define PUCCH 1
#define PUCCH1_THRES 15 #define PUCCH1_THRES 15
#define PUCCH1a_THRES 15 #define PUCCH1a_THRES 15
...@@ -211,7 +210,7 @@ int8_t find_next_ue_index(PHY_VARS_eNB *phy_vars_eNB) { ...@@ -211,7 +210,7 @@ int8_t find_next_ue_index(PHY_VARS_eNB *phy_vars_eNB) {
return(-1); return(-1);
} }
int get_ue_active_harq_pid(uint8_t Mod_id,uint8_t CC_id,uint16_t rnti,uint8_t sched_subframe,uint8_t *harq_pid,uint8_t *round,uint8_t ul_flag) { int get_ue_active_harq_pid(uint8_t Mod_id,uint8_t CC_id,uint16_t rnti,int frame, uint8_t subframe,uint8_t *harq_pid,uint8_t *round,uint8_t ul_flag) {
LTE_eNB_DLSCH_t *DLSCH_ptr; LTE_eNB_DLSCH_t *DLSCH_ptr;
LTE_eNB_ULSCH_t *ULSCH_ptr; LTE_eNB_ULSCH_t *ULSCH_ptr;
...@@ -219,8 +218,8 @@ int get_ue_active_harq_pid(uint8_t Mod_id,uint8_t CC_id,uint16_t rnti,uint8_t sc ...@@ -219,8 +218,8 @@ int get_ue_active_harq_pid(uint8_t Mod_id,uint8_t CC_id,uint16_t rnti,uint8_t sc
uint8_t ulsch_subframe,ulsch_frame; uint8_t ulsch_subframe,ulsch_frame;
uint8_t i; uint8_t i;
int8_t UE_id = find_ue(rnti,PHY_vars_eNB_g[Mod_id][CC_id]); int8_t UE_id = find_ue(rnti,PHY_vars_eNB_g[Mod_id][CC_id]);
int frame = PHY_vars_eNB_g[Mod_id][CC_id]->proc[sched_subframe].frame_tx; // int frame = PHY_vars_eNB_g[Mod_id][CC_id]->proc[sched_subframe].frame_tx;
int subframe = PHY_vars_eNB_g[Mod_id][CC_id]->proc[sched_subframe].subframe_tx; // int subframe = PHY_vars_eNB_g[Mod_id][CC_id]->proc[sched_subframe].subframe_tx;
if (UE_id==-1) { if (UE_id==-1) {
LOG_E(PHY,"Cannot find UE with rnti %x\n",rnti); LOG_E(PHY,"Cannot find UE with rnti %x\n",rnti);
...@@ -2096,6 +2095,23 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e ...@@ -2096,6 +2095,23 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
phy_procedures_emos_eNB_TX(next_slot, phy_vars_eNB); phy_procedures_emos_eNB_TX(next_slot, phy_vars_eNB);
#endif #endif
#ifndef EXMIMO
#ifndef USRP
if (abstraction_flag==0) {
start_meas(&phy_vars_eNB->ofdm_mod_stats);
do_OFDM_mod(phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
phy_vars_eNB->lte_eNB_common_vars.txdata[0],
phy_vars_eNB->proc[sched_subframe].frame_tx,subframe<<1,
&phy_vars_eNB->lte_frame_parms);
do_OFDM_mod(phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
phy_vars_eNB->lte_eNB_common_vars.txdata[0],
phy_vars_eNB->proc[sched_subframe].frame_tx,1+(subframe<<1),
&phy_vars_eNB->lte_frame_parms);
stop_meas(&phy_vars_eNB->ofdm_mod_stats);
}
#endif
#endif
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX,0); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX,0);
stop_meas(&phy_vars_eNB->phy_proc_tx); stop_meas(&phy_vars_eNB->phy_proc_tx);
...@@ -2991,11 +3007,12 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e ...@@ -2991,11 +3007,12 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
for (j=0;j<phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->TBS>>3;j++) for (j=0;j<phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->TBS>>3;j++)
printf("%x.",phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->c[0][j]); printf("%x.",phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->c[0][j]);
printf("\n"); printf("\n");
dump_ulsch(phy_vars_eNB,sched_subframe,i);*/ */
// dump_ulsch(phy_vars_eNB,sched_subframe,i);
//#ifndef EXMIMO_IOT //#ifndef EXMIMO_IOT
LOG_W(PHY,"[eNB] Frame %d, Subframe %d: Msg3 in error\n", frame,subframe); LOG_W(PHY,"[eNB] Frame %d, Subframe %d: Msg3 in error\n", frame,subframe);
//#else //#else
// mac_exit_wrapper("Msg3 error"); //mac_exit_wrapper("Msg3 error");
//#endif //#endif
} // This is Msg3 error } // This is Msg3 error
else { //normal ULSCH else { //normal ULSCH
...@@ -3017,6 +3034,7 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e ...@@ -3017,6 +3034,7 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
// dump_ulsch(phy_vars_eNB,sched_subframe,i); // dump_ulsch(phy_vars_eNB,sched_subframe,i);
//mac_exit_wrapper("ULSCH error");
if (phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round== phy_vars_eNB->ulsch_eNB[i]->Mdlharq) { if (phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round== phy_vars_eNB->ulsch_eNB[i]->Mdlharq) {
LOG_I(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d ULSCH Mdlharq %d reached\n", LOG_I(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d ULSCH Mdlharq %d reached\n",
......
...@@ -367,7 +367,7 @@ void process_timing_advance(uint8_t Mod_id,uint8_t CC_id,int16_t timing_advance) ...@@ -367,7 +367,7 @@ void process_timing_advance(uint8_t Mod_id,uint8_t CC_id,int16_t timing_advance)
uint8_t is_SR_TXOp(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe) { uint8_t is_SR_TXOp(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe) {
LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d Checking for SR TXOp (sr_ConfigIndex %d)\n", LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d Checking for SR TXOp (sr_ConfigIndex %d)\n",
phy_vars_ue->Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,phy_vars_ue->frame,subframe, phy_vars_ue->Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,phy_vars_ue->frame+(subframe==0)?1:0,subframe,
phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex); phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex);
if (phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 4) { // 5 ms SR period if (phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 4) { // 5 ms SR period
...@@ -717,6 +717,8 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB ...@@ -717,6 +717,8 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB
#else #else
phy_vars_ue->tx_power_dBm = UE_TX_POWER; phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif #endif
phy_vars_ue->tx_total_RE = phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->nb_rb*12;
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d harq pid %d, Po_PUSCH : %d dBm\n", LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d harq pid %d, Po_PUSCH : %d dBm\n",
phy_vars_ue->Mod_id,harq_pid,(((next_slot>>1)==0)?1:0)+phy_vars_ue->frame,next_slot>>1,harq_pid, phy_vars_ue->tx_power_dBm); phy_vars_ue->Mod_id,harq_pid,(((next_slot>>1)==0)?1:0)+phy_vars_ue->frame,next_slot>>1,harq_pid, phy_vars_ue->tx_power_dBm);
...@@ -919,6 +921,8 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB ...@@ -919,6 +921,8 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB
#else #else
phy_vars_ue->tx_power_dBm = UE_TX_POWER; phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif #endif
phy_vars_ue->tx_total_RE = phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->nb_rb*12;
LOG_I(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d, generating PUSCH, Po_PUSCH: %d dBm, amp %d\n", LOG_I(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d, generating PUSCH, Po_PUSCH: %d dBm, amp %d\n",
phy_vars_ue->Mod_id,harq_pid,(((next_slot>>1)==0)?1:0)+phy_vars_ue->frame,next_slot>>1,phy_vars_ue->tx_power_dBm, phy_vars_ue->Mod_id,harq_pid,(((next_slot>>1)==0)?1:0)+phy_vars_ue->frame,next_slot>>1,phy_vars_ue->tx_power_dBm,
#ifdef EXMIMO #ifdef EXMIMO
...@@ -1030,7 +1034,7 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB ...@@ -1030,7 +1034,7 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB
// Check for SR and do ACK/NACK accordingly // Check for SR and do ACK/NACK accordingly
if (is_SR_TXOp(phy_vars_ue,eNB_id,next_slot>>1)==1) { if (is_SR_TXOp(phy_vars_ue,eNB_id,next_slot>>1)==1) {
LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d: got SR_TXOp, Checking for SR for PUSCH from MAC\n", LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d: got SR_TXOp, Checking for SR for PUSCH from MAC\n",
phy_vars_ue->Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,phy_vars_ue->frame,next_slot>>1); phy_vars_ue->Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,phy_vars_ue->frame+(next_slot==0)?1:0,next_slot>>1);
#ifdef OPENAIR2 #ifdef OPENAIR2
SR_payload = mac_xface->ue_get_SR(phy_vars_ue->Mod_id, SR_payload = mac_xface->ue_get_SR(phy_vars_ue->Mod_id,
phy_vars_ue->CC_id, phy_vars_ue->CC_id,
...@@ -1045,7 +1049,7 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB ...@@ -1045,7 +1049,7 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB
if (SR_payload>0) { if (SR_payload>0) {
generate_ul_signal = 1; generate_ul_signal = 1;
LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d got the SR for PUSCH is %d\n", LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d got the SR for PUSCH is %d\n",
phy_vars_ue->Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,phy_vars_ue->frame,next_slot>>1,SR_payload); phy_vars_ue->Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,phy_vars_ue->frame+(next_slot==0)?1:0,next_slot>>1,SR_payload);
} }
else { else {
phy_vars_ue->sr[next_slot>>1]=0; phy_vars_ue->sr[next_slot>>1]=0;
...@@ -1073,12 +1077,13 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB ...@@ -1073,12 +1077,13 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB
#else #else
phy_vars_ue->tx_power_dBm = UE_TX_POWER; phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif #endif
phy_vars_ue->tx_total_RE = 12;
if (SR_payload>0) { if (SR_payload>0) {
LOG_I(PHY,"[UE %d][SR %x] Frame %d subframe %d Generating PUCCH 1a/1b (with SR for PUSCH), n1_pucch %d, Po_PUCCH, amp %d\n", LOG_I(PHY,"[UE %d][SR %x] Frame %d subframe %d Generating PUCCH 1a/1b (with SR for PUSCH), n1_pucch %d, Po_PUCCH, amp %d\n",
phy_vars_ue->Mod_id, phy_vars_ue->Mod_id,
phy_vars_ue->dlsch_ue[eNB_id][0]->rnti, phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
phy_vars_ue->frame, next_slot>>1, phy_vars_ue->frame+(next_slot==0)?1:0, next_slot>>1,
phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex, phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex,
Po_PUCCH, Po_PUCCH,
#ifdef EXMIMO #ifdef EXMIMO
...@@ -1142,11 +1147,12 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB ...@@ -1142,11 +1147,12 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB
#else #else
phy_vars_ue->tx_power_dBm = UE_TX_POWER; phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif #endif
phy_vars_ue->tx_total_RE = 12;
LOG_I(PHY,"[UE %d][SR %x] Frame %d subframe %d Generating PUCCH 1 (SR for PUSCH), n1_pucch %d, Po_PUCCH %d\n", LOG_I(PHY,"[UE %d][SR %x] Frame %d subframe %d Generating PUCCH 1 (SR for PUSCH), n1_pucch %d, Po_PUCCH %d\n",
phy_vars_ue->Mod_id, phy_vars_ue->Mod_id,
phy_vars_ue->dlsch_ue[eNB_id][0]->rnti, phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
phy_vars_ue->frame, next_slot>>1, phy_vars_ue->frame+(next_slot==0)?1:0, next_slot>>1,
phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex, phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex,
Po_PUCCH); Po_PUCCH);
...@@ -1316,6 +1322,8 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB ...@@ -1316,6 +1322,8 @@ void phy_procedures_UE_TX(uint8_t next_slot,PHY_VARS_UE *phy_vars_ue,uint8_t eNB
phy_vars_ue->tx_power_dBm = UE_TX_POWER; phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif #endif
phy_vars_ue->tx_total_RE = 96;
#ifdef EXMIMO #ifdef EXMIMO
phy_vars_ue->lte_ue_prach_vars[eNB_id]->amp = get_tx_amp(phy_vars_ue->tx_power_dBm,phy_vars_ue->tx_power_max_dBm); phy_vars_ue->lte_ue_prach_vars[eNB_id]->amp = get_tx_amp(phy_vars_ue->tx_power_dBm,phy_vars_ue->tx_power_max_dBm);
#else #else
...@@ -1491,10 +1499,15 @@ void lte_ue_measurement_procedures(uint8_t last_slot, uint16_t l, PHY_VARS_UE *p ...@@ -1491,10 +1499,15 @@ void lte_ue_measurement_procedures(uint8_t last_slot, uint16_t l, PHY_VARS_UE *p
// AGC // AGC
#ifdef EXMIMO #ifdef EXMIMO
if ((openair_daq_vars.rx_gain_mode == DAQ_AGC_ON) && if ((openair_daq_vars.rx_gain_mode == DAQ_AGC_ON) &&
(mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) ) (mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) )
//phy_adjust_gain (phy_vars_ue,0);
gain_control_all(phy_vars_ue->PHY_measurements.rx_power_avg_dB[eNB_id],0); gain_control_all(phy_vars_ue->PHY_measurements.rx_power_avg_dB[eNB_id],0);
#else
phy_adjust_gain (phy_vars_ue,0);
#endif #endif
eNB_id = 0; eNB_id = 0;
......
...@@ -87,17 +87,18 @@ double dac_fixed_gain(double **s_re, ...@@ -87,17 +87,18 @@ double dac_fixed_gain(double **s_re,
uint32_t input_offset_meas, uint32_t input_offset_meas,
uint32_t length_meas, uint32_t length_meas,
uint8_t B, uint8_t B,
double txpwr_dBm) { double txpwr_dBm,
int NB_RE) {
int i; int i;
int aa; int aa;
double amp,amp1; double amp,amp1;
amp = pow(10.0,.05*txpwr_dBm)/sqrt(nb_tx_antennas); //this is amp per tx antenna amp = sqrt(NB_RE)*pow(10.0,.05*txpwr_dBm)/sqrt(nb_tx_antennas); //this is amp per tx antenna
amp1 = 0; amp1 = 0;
for (aa=0;aa<nb_tx_antennas;aa++) { for (aa=0;aa<nb_tx_antennas;aa++) {
amp1 += sqrt((double)signal_energy((int32_t*)&input[aa][input_offset_meas],length_meas) * (512.0/300.0)); amp1 += sqrt((double)signal_energy((int32_t*)&input[aa][input_offset_meas],length_meas));
} }
amp1/=nb_tx_antennas; amp1/=nb_tx_antennas;
...@@ -118,11 +119,10 @@ double dac_fixed_gain(double **s_re, ...@@ -118,11 +119,10 @@ double dac_fixed_gain(double **s_re,
for (aa=0;aa<nb_tx_antennas;aa++) { for (aa=0;aa<nb_tx_antennas;aa++) {
s_re[aa][i] = amp*((double)(((short *)input[aa]))[((i+input_offset)<<1)])/amp1; ///(1<<(B-1)); s_re[aa][i] = amp*((double)(((short *)input[aa]))[((i+input_offset)<<1)])/amp1; ///(1<<(B-1));
s_im[aa][i] = amp*((double)(((short *)input[aa]))[((i+input_offset)<<1)+1])/amp1; ///(1<<(B-1)); s_im[aa][i] = amp*((double)(((short *)input[aa]))[((i+input_offset)<<1)+1])/amp1; ///(1<<(B-1));
} }
} }
// printf("ener %e\n",signal_energy_fp(s_re,s_im,nb_tx_antennas,length,0)); // printf("ener %e\n",signal_energy_fp(s_re,s_im,nb_tx_antennas,length,0));
return(signal_energy_fp(s_re,s_im,nb_tx_antennas,512,0)); return(signal_energy_fp(s_re,s_im,nb_tx_antennas,length_meas,0));
} }
...@@ -101,4 +101,5 @@ double dac_fixed_gain(double **s_re, ...@@ -101,4 +101,5 @@ double dac_fixed_gain(double **s_re,
unsigned int input_offset_meas, unsigned int input_offset_meas,
unsigned int length_meas, unsigned int length_meas,
unsigned char B, unsigned char B,
double gain); double gain,
int NB_RE);
...@@ -46,7 +46,7 @@ extern int write_output(const char *,const char *,void *,int,int,char); ...@@ -46,7 +46,7 @@ extern int write_output(const char *,const char *,void *,int,int,char);
//double pn[1024]; //double pn[1024];
//#define DEBUG_RF 1 #define DEBUG_RF 1
//free(input_data); //free(input_data);
void rf_rx(double **r_re, void rf_rx(double **r_re,
......
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