Commit eb45cb86 authored by Robert Schmidt's avatar Robert Schmidt

Only check for SR at beginning of frame (slot 0)

parent e6033d24
...@@ -417,7 +417,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -417,7 +417,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
schedule_nr_prach(module_idP, f, s); schedule_nr_prach(module_idP, f, s);
} }
// This schedule SR // Schedule SR: check in slot 0 for the whole frame
if (slot == 0)
nr_sr_reporting(module_idP, frame, slot); nr_sr_reporting(module_idP, frame, slot);
// Schedule CSI measurement reporting: check in slot 0 for the whole frame // Schedule CSI measurement reporting: check in slot 0 for the whole frame
......
...@@ -764,15 +764,17 @@ void nr_sr_reporting(int Mod_idP, frame_t SFN, sub_frame_t slot) ...@@ -764,15 +764,17 @@ void nr_sr_reporting(int Mod_idP, frame_t SFN, sub_frame_t slot)
int SR_period; int SR_offset; int SR_period; int SR_offset;
periodicity__SRR(SchedulingRequestResourceConfig,&SR_period,&SR_offset); periodicity__SRR(SchedulingRequestResourceConfig,&SR_period,&SR_offset);
//for (int SRslot=0;SRslot<n_slots_frame;j++){ const int num_SRs = n_slots_frame / SR_period;
if (((SFN*n_slots_frame)+slot-SR_offset)%SR_period ==0){ AssertFatal(num_SRs <= 2,
NR_PUCCH_ResourceId_t *PucchResourceId = SchedulingRequestResourceConfig->resource; "cannot handle more than 2 SRs per frame, but have %d!\n",
num_SRs);
curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[0]; const bool SR_even = !(n_slots_frame % SR_period);
curr_pucch->sr_flag=true; AssertFatal(SR_even, "cannot handle SR periodicity not evenly dividing number of slots\n");
curr_pucch->frame = SFN; // first condition: SR every frame; second condition: less than every frame
curr_pucch->ul_slot = slot; if (!(SR_period < n_slots_frame || SFN % (SR_period / n_slots_frame) == SR_offset / n_slots_frame))
return;
NR_PUCCH_ResourceId_t *PucchResourceId = SchedulingRequestResourceConfig->resource;
int found = -1; int found = -1;
pucchresset = pucch_Config->resourceSetToAddModList->list.array[0]; // set with formats 0,1 pucchresset = pucch_Config->resourceSetToAddModList->list.array[0]; // set with formats 0,1
...@@ -785,9 +787,20 @@ void nr_sr_reporting(int Mod_idP, frame_t SFN, sub_frame_t slot) ...@@ -785,9 +787,20 @@ void nr_sr_reporting(int Mod_idP, frame_t SFN, sub_frame_t slot)
} }
AssertFatal(found>-1,"SR resource not found among PUCCH resources"); AssertFatal(found>-1,"SR resource not found among PUCCH resources");
for (int i = 0; i < num_SRs; ++i) {
curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[i];
curr_pucch->sr_flag=true;
curr_pucch->frame = SFN;
curr_pucch->ul_slot = (i * SR_period + SR_offset) % n_slots_frame; // first, start on slot 0
curr_pucch->resource_indicator = found; curr_pucch->resource_indicator = found;
LOG_I(MAC,"Scheduling Request identified for frame %d slot %d with %d SR bit\n",SFN,slot,curr_pucch->sr_flag); LOG_D(MAC,
"Scheduling Request for %4d.%2d with SR bit %d sched_pucch %d resource %d\n",
curr_pucch->frame,
curr_pucch->ul_slot,
curr_pucch->sr_flag,
i,
curr_pucch->resource_indicator);
} }
} }
} }
......
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