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wangjie
OpenXG-RAN
Commits
ed54f598
Commit
ed54f598
authored
Jun 22, 2021
by
francescomani
Browse files
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Browse Files
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Plain Diff
handling dl dmrs ports at phy
parent
ee2f133c
Changes
11
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Showing
11 changed files
with
235 additions
and
193 deletions
+235
-193
common/utils/nr/nr_common.c
common/utils/nr/nr_common.c
+18
-0
common/utils/nr/nr_common.h
common/utils/nr/nr_common.h
+1
-1
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+1
-1
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+6
-4
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+2
-0
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+1
-0
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+5
-4
openair2/LAYER2/NR_MAC_UE/mac_extern.h
openair2/LAYER2/NR_MAC_UE/mac_extern.h
+4
-4
openair2/LAYER2/NR_MAC_UE/mac_vars.c
openair2/LAYER2/NR_MAC_UE/mac_vars.c
+137
-137
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+59
-40
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+1
-2
No files found.
common/utils/nr/nr_common.c
View file @
ed54f598
...
@@ -196,6 +196,24 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) {
...
@@ -196,6 +196,24 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx) {
}
}
}
}
int
get_dmrs_port
(
int
nl
,
uint16_t
dmrs_ports
)
{
if
(
dmrs_ports
==
0
)
return
0
;
// dci 1_0
int
p
=
-
1
;
int
found
=
-
1
;
for
(
int
i
=
0
;
i
<
12
;
i
++
)
{
// loop over dmrs ports
if
((
dmrs_ports
>>
i
)
&
0x01
)
{
// check if current bit is 1
found
++
;
if
(
found
==
nl
)
{
// found antenna port number corresponding to current layer
p
=
i
;
break
;
}
}
}
AssertFatal
(
p
>-
1
,
"No dmrs port corresponding to layer %d found
\n
"
,
nl
);
return
p
;
}
int
get_subband_size
(
int
NPRB
,
int
size
)
{
int
get_subband_size
(
int
NPRB
,
int
size
)
{
// implements table 5.2.1.4-2 from 36.214
// implements table 5.2.1.4-2 from 36.214
//
//
...
...
common/utils/nr/nr_common.h
View file @
ed54f598
...
@@ -62,7 +62,7 @@ uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx);
...
@@ -62,7 +62,7 @@ uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx);
uint32_t
nr_get_code_rate
(
uint8_t
Imcs
,
uint8_t
table_idx
);
uint32_t
nr_get_code_rate
(
uint8_t
Imcs
,
uint8_t
table_idx
);
int
get_subband_size
(
int
NPRB
,
int
size
);
int
get_subband_size
(
int
NPRB
,
int
size
);
void
SLIV2SL
(
int
SLIV
,
int
*
S
,
int
*
L
);
void
SLIV2SL
(
int
SLIV
,
int
*
S
,
int
*
L
);
int
get_dmrs_port
(
int
nl
,
uint16_t
dmrs_ports
);
#define CEILIDIV(a,b) ((a+b-1)/b)
#define CEILIDIV(a,b) ((a+b-1)/b)
#define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1))
#define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1))
...
...
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @
ed54f598
...
@@ -465,7 +465,7 @@ typedef struct {
...
@@ -465,7 +465,7 @@ typedef struct {
uint8_t
pucch_resource_id
;
uint8_t
pucch_resource_id
;
uint8_t
pdsch_to_harq_feedback_time_ind
;
uint8_t
pdsch_to_harq_feedback_time_ind
;
uint8_t
n_dmrs_cdm_groups
;
uint8_t
n_dmrs_cdm_groups
;
uint
8_t
dmrs_ports
[
10
]
;
uint
16_t
dmrs_ports
;
uint8_t
n_front_load_symb
;
uint8_t
n_front_load_symb
;
uint8_t
tci_state
;
uint8_t
tci_state
;
fapi_nr_dl_srs_config_t
srs_config
;
fapi_nr_dl_srs_config_t
srs_config
;
...
...
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
View file @
ed54f598
...
@@ -38,6 +38,7 @@
...
@@ -38,6 +38,7 @@
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
#include "common/utils/nr/nr_common.h"
//#define DEBUG_DLSCH
//#define DEBUG_DLSCH
//#define DEBUG_DLSCH_MAPPING
//#define DEBUG_DLSCH_MAPPING
...
@@ -280,10 +281,11 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
...
@@ -280,10 +281,11 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
#endif
#endif
for
(
int
nl
=
0
;
nl
<
rel15
->
nrOfLayers
;
nl
++
)
{
for
(
int
nl
=
0
;
nl
<
rel15
->
nrOfLayers
;
nl
++
)
{
int
dmrs_port
=
get_dmrs_port
(
nl
,
rel15
->
dmrsPorts
);
// DMRS params for this ap
// DMRS params for this ap
get_Wt
(
Wt
,
nl
,
dmrs_Type
);
get_Wt
(
Wt
,
dmrs_port
,
dmrs_Type
);
get_Wf
(
Wf
,
nl
,
dmrs_Type
);
get_Wf
(
Wf
,
dmrs_port
,
dmrs_Type
);
delta
=
get_delta
(
nl
,
dmrs_Type
);
delta
=
get_delta
(
dmrs_port
,
dmrs_Type
);
l_prime
=
0
;
// single symbol nl 0
l_prime
=
0
;
// single symbol nl 0
l0
=
get_l0
(
rel15
->
dlDmrsSymbPos
);
l0
=
get_l0
(
rel15
->
dlDmrsSymbPos
);
l_overline
=
l0
;
l_overline
=
l0
;
...
...
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
View file @
ed54f598
...
@@ -300,6 +300,8 @@ typedef struct {
...
@@ -300,6 +300,8 @@ typedef struct {
uint8_t
dmrsConfigType
;
uint8_t
dmrsConfigType
;
// Number of DMRS CDM groups with no data
// Number of DMRS CDM groups with no data
uint8_t
n_dmrs_cdm_groups
;
uint8_t
n_dmrs_cdm_groups
;
/// DMRS ports bitmap
uint16_t
dmrs_ports
;
/// Starting Symbol number
/// Starting Symbol number
uint16_t
start_symbol
;
uint16_t
start_symbol
;
/// Current subband PMI allocation
/// Current subband PMI allocation
...
...
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @
ed54f598
...
@@ -116,6 +116,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
...
@@ -116,6 +116,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq
->
dlDmrsSymbPos
=
dlsch_config_pdu
->
dlDmrsSymbPos
;
dlsch0_harq
->
dlDmrsSymbPos
=
dlsch_config_pdu
->
dlDmrsSymbPos
;
dlsch0_harq
->
dmrsConfigType
=
dlsch_config_pdu
->
dmrsConfigType
;
dlsch0_harq
->
dmrsConfigType
=
dlsch_config_pdu
->
dmrsConfigType
;
dlsch0_harq
->
n_dmrs_cdm_groups
=
dlsch_config_pdu
->
n_dmrs_cdm_groups
;
dlsch0_harq
->
n_dmrs_cdm_groups
=
dlsch_config_pdu
->
n_dmrs_cdm_groups
;
dlsch0_harq
->
dmrs_ports
=
dlsch_config_pdu
->
dmrs_ports
;
dlsch0_harq
->
mcs
=
dlsch_config_pdu
->
mcs
;
dlsch0_harq
->
mcs
=
dlsch_config_pdu
->
mcs
;
dlsch0_harq
->
rvidx
=
dlsch_config_pdu
->
rv
;
dlsch0_harq
->
rvidx
=
dlsch_config_pdu
->
rv
;
dlsch0
->
g_pucch
=
dlsch_config_pdu
->
accumulated_delta_PUCCH
;
dlsch0
->
g_pucch
=
dlsch_config_pdu
->
accumulated_delta_PUCCH
;
...
...
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
ed54f598
...
@@ -761,17 +761,18 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
...
@@ -761,17 +761,18 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
uint16_t
s1
=
dlsch0_harq
->
nb_symbols
;
uint16_t
s1
=
dlsch0_harq
->
nb_symbols
;
bool
is_SI
=
dlsch0
->
rnti_type
==
_SI_RNTI_
;
bool
is_SI
=
dlsch0
->
rnti_type
==
_SI_RNTI_
;
LOG_D
(
PHY
,
"[UE %d] PDSCH type %d active in nr_slot_rx %d, harq_pid %d (%d), rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d, DMRS mask %x
\n
"
,
ue
->
Mod_id
,
pdsch
,
nr_slot_rx
,
harq_pid
,
dlsch0
->
harq_processes
[
harq_pid
]
->
status
,
pdsch_start_rb
,
pdsch_nb_rb
,
s0
,
s1
,
dlsch0
->
harq_processes
[
harq_pid
]
->
dlDmrsSymbPos
);
LOG_D
(
PHY
,
"[UE %d] PDSCH type %d active in nr_slot_rx %d, harq_pid %d (%d), rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d, DMRS mask %x
\n
"
,
ue
->
Mod_id
,
pdsch
,
nr_slot_rx
,
harq_pid
,
dlsch0_harq
->
status
,
pdsch_start_rb
,
pdsch_nb_rb
,
s0
,
s1
,
dlsch0_harq
->
dlDmrsSymbPos
);
for
(
m
=
s0
;
m
<
(
s0
+
s1
);
m
++
)
{
for
(
m
=
s0
;
m
<
(
s0
+
s1
);
m
++
)
{
if
(((
1
<<
m
)
&
dlsch0
->
harq_processes
[
harq_pid
]
->
dlDmrsSymbPos
)
>
0
)
{
if
(((
1
<<
m
)
&
dlsch0
_harq
->
dlDmrsSymbPos
)
>
0
)
{
for
(
uint8_t
aatx
=
0
;
aatx
<
dlsch0
->
harq_processes
[
harq_pid
]
->
Nl
;
aatx
++
)
{
//for MIMO Config: it shall loop over no_layers
for
(
uint8_t
aatx
=
0
;
aatx
<
dlsch0
_harq
->
Nl
;
aatx
++
)
{
//for MIMO Config: it shall loop over no_layers
nr_pdsch_channel_estimation
(
ue
,
nr_pdsch_channel_estimation
(
ue
,
proc
,
proc
,
0
/*eNB_id*/
,
0
/*eNB_id*/
,
is_SI
,
is_SI
,
nr_slot_rx
,
nr_slot_rx
,
aatx
/*p*/
,
get_dmrs_port
(
aatx
,
dlsch0_harq
->
dmrs_ports
)
,
m
,
m
,
BWPStart
,
BWPStart
,
ue
->
frame_parms
.
first_carrier_offset
+
(
BWPStart
+
pdsch_start_rb
)
*
12
,
ue
->
frame_parms
.
first_carrier_offset
+
(
BWPStart
+
pdsch_start_rb
)
*
12
,
...
...
openair2/LAYER2/NR_MAC_UE/mac_extern.h
View file @
ed54f598
...
@@ -57,12 +57,12 @@ extern const uint8_t table_7_3_1_1_2_21[19][4];
...
@@ -57,12 +57,12 @@ extern const uint8_t table_7_3_1_1_2_21[19][4];
extern
const
uint8_t
table_7_3_1_1_2_22
[
6
][
5
];
extern
const
uint8_t
table_7_3_1_1_2_22
[
6
][
5
];
extern
const
uint8_t
table_7_3_1_1_2_23
[
5
][
6
];
extern
const
uint8_t
table_7_3_1_1_2_23
[
5
][
6
];
extern
const
uint8_t
table_7_3_2_3_3_1
[
12
][
5
];
extern
const
uint8_t
table_7_3_2_3_3_1
[
12
][
5
];
extern
const
uint8_t
table_7_3_2_3_3_2_oneCodeword
[
31
][
6
];
extern
const
uint8_t
table_7_3_2_3_3_2_oneCodeword
[
31
][
10
];
extern
const
uint8_t
table_7_3_2_3_3_2_twoCodeword
[
4
][
10
];
extern
const
uint8_t
table_7_3_2_3_3_2_twoCodeword
[
4
][
10
];
extern
const
uint8_t
table_7_3_2_3_3_3_oneCodeword
[
24
][
5
];
extern
const
uint8_t
table_7_3_2_3_3_3_oneCodeword
[
24
][
7
];
extern
const
uint8_t
table_7_3_2_3_3_3_twoCodeword
[
2
][
7
];
extern
const
uint8_t
table_7_3_2_3_3_3_twoCodeword
[
2
][
7
];
extern
const
uint8_t
table_7_3_2_3_3_4_oneCodeword
[
58
][
6
];
extern
const
uint8_t
table_7_3_2_3_3_4_oneCodeword
[
58
][
14
];
extern
const
uint8_t
table_7_3_2_3_3_4_twoCodeword
[
6
][
1
0
];
extern
const
uint8_t
table_7_3_2_3_3_4_twoCodeword
[
6
][
1
4
];
extern
const
uint16_t
table_7_2_1
[
16
];
extern
const
uint16_t
table_7_2_1
[
16
];
...
...
openair2/LAYER2/NR_MAC_UE/mac_vars.c
View file @
ed54f598
...
@@ -257,161 +257,161 @@ const uint8_t table_7_3_1_1_2_23[5][6] = {
...
@@ -257,161 +257,161 @@ const uint8_t table_7_3_1_1_2_23[5][6] = {
};
};
const
uint8_t
table_7_3_2_3_3_1
[
12
][
5
]
=
{
const
uint8_t
table_7_3_2_3_3_1
[
12
][
5
]
=
{
{
1
,
0
,
0
,
0
,
0
},
{
1
,
1
,
0
,
0
,
0
},
{
1
,
1
,
0
,
0
,
0
},
{
1
,
0
,
1
,
0
,
0
},
{
1
,
0
,
1
,
0
,
0
},
{
2
,
0
,
0
,
0
,
0
},
{
1
,
1
,
1
,
0
,
0
},
{
2
,
1
,
0
,
0
,
0
},
{
2
,
1
,
0
,
0
,
0
},
{
2
,
2
,
0
,
0
,
0
},
{
2
,
3
,
0
,
0
,
0
},
{
2
,
0
,
1
,
0
,
0
},
{
2
,
0
,
1
,
0
,
0
},
{
2
,
2
,
3
,
0
,
0
},
{
2
,
0
,
0
,
1
,
0
},
{
2
,
0
,
1
,
2
,
0
},
{
2
,
0
,
0
,
0
,
1
},
{
2
,
0
,
1
,
2
,
3
},
{
2
,
1
,
1
,
0
,
0
},
{
2
,
0
,
2
,
0
,
0
}
{
2
,
0
,
0
,
1
,
1
},
{
2
,
1
,
1
,
1
,
0
},
{
2
,
1
,
1
,
1
,
1
},
{
2
,
1
,
0
,
1
,
0
}
};
};
const
uint8_t
table_7_3_2_3_3_2_oneCodeword
[
31
][
6
]
=
{
const
uint8_t
table_7_3_2_3_3_2_oneCodeword
[
31
][
10
]
=
{
{
1
,
0
,
0
,
0
,
0
,
1
},
{
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
1
,
1
,
0
,
0
,
0
,
1
},
{
1
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
1
,
0
,
1
,
0
,
0
,
1
},
{
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
0
,
0
,
0
,
1
},
{
2
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
1
,
0
,
0
,
0
,
1
},
{
2
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
2
,
0
,
0
,
0
,
1
},
{
2
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
3
,
0
,
0
,
0
,
1
},
{
2
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
1
,
0
,
0
,
1
},
{
2
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
2
,
3
,
0
,
0
,
1
},
{
2
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
1
,
2
,
0
,
1
},
{
2
,
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
1
,
2
,
3
,
1
},
{
2
,
1
,
1
,
1
,
1
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
2
,
0
,
0
,
1
},
{
2
,
1
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
0
,
0
,
0
,
2
},
{
2
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
2
,
1
,
0
,
0
,
0
,
2
},
{
2
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
2
,
2
,
0
,
0
,
0
,
2
},
{
2
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
2
},
{
2
,
3
,
0
,
0
,
0
,
2
},
{
2
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
2
},
{
2
,
4
,
0
,
0
,
0
,
2
},
{
2
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
2
},
{
2
,
5
,
0
,
0
,
0
,
2
},
{
2
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
2
},
{
2
,
6
,
0
,
0
,
0
,
2
},
{
2
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
2
},
{
2
,
7
,
0
,
0
,
0
,
2
},
{
2
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
2
},
{
2
,
0
,
1
,
0
,
0
,
2
},
{
2
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
2
,
2
,
3
,
0
,
0
,
2
},
{
2
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
2
},
{
2
,
4
,
5
,
0
,
0
,
2
},
{
2
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
2
},
{
2
,
6
,
7
,
0
,
0
,
2
},
{
2
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
1
,
2
},
{
2
,
0
,
4
,
0
,
0
,
2
},
{
2
,
1
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
2
},
{
2
,
2
,
6
,
0
,
0
,
2
},
{
2
,
0
,
0
,
1
,
0
,
0
,
0
,
1
,
0
,
2
},
{
2
,
0
,
1
,
4
,
0
,
2
},
{
2
,
1
,
1
,
0
,
0
,
1
,
0
,
0
,
0
,
2
},
{
2
,
2
,
3
,
6
,
0
,
2
},
{
2
,
0
,
0
,
1
,
1
,
0
,
0
,
1
,
0
,
2
},
{
2
,
0
,
1
,
4
,
5
,
2
},
{
2
,
1
,
1
,
0
,
0
,
1
,
1
,
0
,
0
,
2
},
{
2
,
2
,
3
,
6
,
7
,
2
},
{
2
,
0
,
0
,
1
,
1
,
0
,
0
,
1
,
1
,
2
},
{
2
,
0
,
2
,
4
,
6
,
2
}
{
2
,
1
,
0
,
1
,
0
,
1
,
0
,
1
,
0
,
2
}
};
};
const
uint8_t
table_7_3_2_3_3_2_twoCodeword
[
4
][
10
]
=
{
const
uint8_t
table_7_3_2_3_3_2_twoCodeword
[
4
][
10
]
=
{
{
2
,
0
,
1
,
2
,
3
,
4
,
0
,
0
,
0
,
2
},
{
2
,
1
,
1
,
1
,
1
,
1
,
0
,
0
,
0
,
2
},
{
2
,
0
,
1
,
2
,
3
,
4
,
6
,
0
,
0
,
2
},
{
2
,
1
,
1
,
1
,
1
,
1
,
0
,
1
,
0
,
2
},
{
2
,
0
,
1
,
2
,
3
,
4
,
5
,
6
,
0
,
2
},
{
2
,
1
,
1
,
1
,
1
,
1
,
1
,
1
,
0
,
2
},
{
2
,
0
,
1
,
2
,
3
,
4
,
5
,
6
,
7
,
2
}
{
2
,
1
,
1
,
1
,
1
,
1
,
1
,
1
,
1
,
2
}
};
};
const
uint8_t
table_7_3_2_3_3_3_oneCodeword
[
24
][
5
]
=
{
const
uint8_t
table_7_3_2_3_3_3_oneCodeword
[
24
][
7
]
=
{
{
1
,
0
,
0
,
0
,
0
},
{
1
,
1
,
0
,
0
,
0
,
0
,
0
},
{
1
,
1
,
0
,
0
,
0
},
{
1
,
0
,
1
,
0
,
0
,
0
,
0
},
{
1
,
0
,
1
,
0
,
0
},
{
1
,
1
,
1
,
0
,
0
,
0
,
0
},
{
2
,
0
,
0
,
0
,
0
},
{
2
,
1
,
0
,
0
,
0
,
0
,
0
},
{
2
,
1
,
0
,
0
,
0
},
{
2
,
0
,
1
,
0
,
0
,
0
,
0
},
{
2
,
2
,
0
,
0
,
0
},
{
2
,
0
,
0
,
1
,
0
,
0
,
0
},
{
2
,
3
,
0
,
0
,
0
},
{
2
,
0
,
0
,
0
,
1
,
0
,
0
},
{
2
,
0
,
1
,
0
,
0
},
{
2
,
1
,
1
,
0
,
0
,
0
,
0
},
{
2
,
2
,
3
,
0
,
0
},
{
2
,
0
,
0
,
1
,
1
,
0
,
0
},
{
2
,
0
,
1
,
2
,
0
},
{
2
,
1
,
1
,
1
,
0
,
0
,
0
},
{
2
,
0
,
1
,
2
,
3
},
{
2
,
1
,
1
,
1
,
1
,
0
,
0
},
{
3
,
0
,
0
,
0
,
0
},
{
3
,
1
,
0
,
0
,
0
,
0
,
0
},
{
3
,
1
,
0
,
0
,
0
},
{
3
,
0
,
1
,
0
,
0
,
0
,
0
},
{
3
,
2
,
0
,
0
,
0
},
{
3
,
0
,
0
,
1
,
0
,
0
,
0
},
{
3
,
3
,
0
,
0
,
0
},
{
3
,
0
,
0
,
0
,
1
,
0
,
0
},
{
3
,
4
,
0
,
0
,
0
},
{
3
,
0
,
0
,
0
,
0
,
1
,
0
},
{
3
,
5
,
0
,
0
,
0
},
{
3
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
0
,
1
,
0
,
0
},
{
3
,
1
,
1
,
0
,
0
,
0
,
0
},
{
3
,
2
,
3
,
0
,
0
},
{
3
,
0
,
0
,
1
,
1
,
0
,
0
},
{
3
,
4
,
5
,
0
,
0
},
{
3
,
0
,
0
,
0
,
0
,
1
,
1
},
{
3
,
0
,
1
,
2
,
0
},
{
3
,
1
,
1
,
1
,
0
,
0
,
0
},
{
3
,
3
,
4
,
5
,
0
},
{
3
,
0
,
0
,
0
,
1
,
1
,
1
},
{
3
,
0
,
1
,
2
,
3
},
{
3
,
1
,
1
,
1
,
1
,
0
,
0
},
{
2
,
0
,
2
,
0
,
0
}
{
3
,
1
,
0
,
1
,
0
,
0
,
0
}
};
};
const
uint8_t
table_7_3_2_3_3_3_twoCodeword
[
2
][
7
]
=
{
const
uint8_t
table_7_3_2_3_3_3_twoCodeword
[
2
][
7
]
=
{
{
3
,
0
,
1
,
2
,
3
,
4
,
0
},
{
3
,
1
,
1
,
1
,
1
,
1
,
0
},
{
3
,
0
,
1
,
2
,
3
,
4
,
5
}
{
3
,
1
,
1
,
1
,
1
,
1
,
1
}
};
};
const
uint8_t
table_7_3_2_3_3_4_oneCodeword
[
58
][
6
]
=
{
const
uint8_t
table_7_3_2_3_3_4_oneCodeword
[
58
][
14
]
=
{
{
1
,
0
,
0
,
0
,
0
,
1
},
{
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
1
,
1
,
0
,
0
,
0
,
1
},
{
1
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
1
,
0
,
1
,
0
,
0
,
1
},
{
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
0
,
0
,
0
,
1
},
{
2
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
1
,
0
,
0
,
0
,
1
},
{
2
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
2
,
0
,
0
,
0
,
1
},
{
2
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
3
,
0
,
0
,
0
,
1
},
{
2
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
1
,
0
,
0
,
1
},
{
2
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
2
,
3
,
0
,
0
,
1
},
{
2
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
1
,
2
,
0
,
1
},
{
2
,
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
1
,
2
,
3
,
1
},
{
2
,
1
,
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
0
,
0
,
0
,
0
,
1
},
{
3
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
1
,
0
,
0
,
0
,
1
},
{
3
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
2
,
0
,
0
,
0
,
1
},
{
3
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
3
,
0
,
0
,
0
,
1
},
{
3
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
4
,
0
,
0
,
0
,
1
},
{
3
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
5
,
0
,
0
,
0
,
1
},
{
3
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
0
,
1
,
0
,
0
,
1
},
{
3
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
2
,
3
,
0
,
0
,
1
},
{
3
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
4
,
5
,
0
,
0
,
1
},
{
3
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
0
,
1
,
2
,
0
,
1
},
{
3
,
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
3
,
4
,
5
,
0
,
1
},
{
3
,
0
,
0
,
0
,
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
0
,
1
,
2
,
3
,
1
},
{
3
,
1
,
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
2
,
0
,
0
,
1
},
{
2
,
1
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
0
,
0
,
0
,
0
,
2
},
{
3
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
1
,
0
,
0
,
0
,
2
},
{
3
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
2
,
0
,
0
,
0
,
2
},
{
3
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
3
,
0
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
4
,
0
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
5
,
0
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
6
,
0
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
7
,
0
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
2
},
{
3
,
8
,
0
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
2
},
{
3
,
9
,
0
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
2
},
{
3
,
10
,
0
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
2
},
{
3
,
11
,
0
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
2
},
{
3
,
0
,
1
,
0
,
0
,
2
},
{
3
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
2
,
3
,
0
,
0
,
2
},
{
3
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
4
,
5
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
6
,
7
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
2
},
{
3
,
8
,
9
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
2
},
{
3
,
10
,
11
,
0
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
1
,
2
},
{
3
,
0
,
1
,
6
,
0
,
2
},
{
3
,
1
,
1
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
2
},
{
3
,
2
,
3
,
8
,
0
,
2
},
{
3
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
2
},
{
3
,
4
,
5
,
10
,
0
,
2
},
{
3
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
1
,
0
,
2
},
{
3
,
0
,
1
,
6
,
7
,
2
},
{
3
,
1
,
1
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
2
},
{
3
,
2
,
3
,
8
,
9
,
2
},
{
3
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
2
},
{
3
,
4
,
5
,
10
,
1
1
,
2
},
{
3
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
1
,
1
,
2
},
{
1
,
0
,
0
,
0
,
0
,
2
},
{
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
1
,
1
,
0
,
0
,
0
,
2
},
{
1
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
1
,
6
,
0
,
0
,
0
,
2
},
{
1
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
2
},
{
1
,
7
,
0
,
0
,
0
,
2
},
{
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
2
},
{
1
,
0
,
1
,
0
,
0
,
2
},
{
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
1
,
6
,
7
,
0
,
0
,
2
},
{
1
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
2
},
{
2
,
0
,
1
,
0
,
0
,
2
},
{
2
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
2
,
2
,
3
,
0
,
0
,
2
},
{
2
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
2
},
{
2
,
6
,
7
,
0
,
0
,
2
},
{
2
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
0
,
0
,
2
},
{
2
,
8
,
9
,
0
,
0
,
2
}
{
2
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
1
,
0
,
0
,
2
}
};
};
const
uint8_t
table_7_3_2_3_3_4_twoCodeword
[
6
][
1
0
]
=
{
const
uint8_t
table_7_3_2_3_3_4_twoCodeword
[
6
][
1
4
]
=
{
{
3
,
0
,
1
,
2
,
3
,
4
,
0
,
0
,
0
,
1
},
{
3
,
1
,
1
,
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
3
,
0
,
1
,
2
,
3
,
4
,
5
,
0
,
0
,
1
},
{
3
,
1
,
1
,
1
,
1
,
1
,
1
,
0
,
0
,
0
,
0
,
0
,
0
,
1
},
{
2
,
0
,
1
,
2
,
3
,
6
,
0
,
0
,
0
,
2
},
{
2
,
1
,
1
,
1
,
1
,
0
,
0
,
1
,
0
,
0
,
0
,
0
,
0
,
2
},
{
2
,
0
,
1
,
2
,
3
,
6
,
8
,
0
,
0
,
2
},
{
2
,
1
,
1
,
1
,
1
,
0
,
0
,
1
,
0
,
1
,
0
,
0
,
0
,
2
},
{
2
,
0
,
1
,
2
,
3
,
6
,
7
,
8
,
0
,
2
},
{
2
,
1
,
1
,
1
,
1
,
0
,
0
,
1
,
1
,
1
,
0
,
0
,
0
,
2
},
{
2
,
0
,
1
,
2
,
3
,
6
,
7
,
8
,
9
,
2
}
{
2
,
1
,
1
,
1
,
1
,
0
,
0
,
1
,
1
,
1
,
1
,
0
,
0
,
2
},
};
};
// table 7.2-1 TS 38.321
// table 7.2-1 TS 38.321
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
ed54f598
...
@@ -698,6 +698,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
...
@@ -698,6 +698,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0
->
n_dmrs_cdm_groups
=
1
;
dlsch_config_pdu_1_0
->
n_dmrs_cdm_groups
=
1
;
else
else
dlsch_config_pdu_1_0
->
n_dmrs_cdm_groups
=
2
;
dlsch_config_pdu_1_0
->
n_dmrs_cdm_groups
=
2
;
dlsch_config_pdu_1_0
->
dmrs_ports
=
0
;
/* VRB_TO_PRB_MAPPING */
/* VRB_TO_PRB_MAPPING */
dlsch_config_pdu_1_0
->
vrb_to_prb_mapping
=
(
dci
->
vrb_to_prb_mapping
.
val
==
0
)
?
vrb_to_prb_mapping_non_interleaved
:
vrb_to_prb_mapping_interleaved
;
dlsch_config_pdu_1_0
->
vrb_to_prb_mapping
=
(
dci
->
vrb_to_prb_mapping
.
val
==
0
)
?
vrb_to_prb_mapping_non_interleaved
:
vrb_to_prb_mapping_interleaved
;
/* MCS TABLE INDEX */
/* MCS TABLE INDEX */
...
@@ -974,31 +975,35 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
...
@@ -974,31 +975,35 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
if
((
dmrs_type
==
NULL
)
&&
(
max_length
==
NULL
)){
if
((
dmrs_type
==
NULL
)
&&
(
max_length
==
NULL
)){
// Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1
// Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
dmrs_ports
[
0
]
=
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
1
];
dlsch_config_pdu_1_1
->
dmrs_ports
=
(
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
1
]
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
1
]
=
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
2
];
(
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
2
]
<<
1
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
2
]
=
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
3
];
(
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
2
]
<<
2
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
3
]
=
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
4
]
;
(
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
4
]
<<
3
))
;
}
}
if
((
dmrs_type
==
NULL
)
&&
(
max_length
!=
NULL
)){
if
((
dmrs_type
==
NULL
)
&&
(
max_length
!=
NULL
)){
// Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2
// Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2
if
(
n_codewords
==
1
)
{
if
(
n_codewords
==
1
)
{
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
dmrs_ports
[
0
]
=
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
1
];
dlsch_config_pdu_1_1
->
dmrs_ports
=
(
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
1
]
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
1
]
=
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
2
];
(
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
1
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
2
]
=
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
3
];
(
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
2
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
3
]
=
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
4
];
(
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
4
]
<<
3
)
+
dlsch_config_pdu_1_1
->
n_front_load_symb
=
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
5
];
(
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
5
]
<<
4
)
+
(
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
6
]
<<
5
)
+
(
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
7
]
<<
6
)
+
(
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
8
]
<<
7
));
dlsch_config_pdu_1_1
->
n_front_load_symb
=
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
9
];
}
}
if
(
n_codewords
==
1
)
{
if
(
n_codewords
==
1
)
{
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
dmrs_ports
[
0
]
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
1
];
dlsch_config_pdu_1_1
->
dmrs_ports
=
(
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
1
]
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
1
]
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
2
];
(
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
1
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
2
]
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
3
];
(
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
2
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
3
]
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
4
];
(
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
4
]
<<
3
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
4
]
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
5
];
(
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
5
]
<<
4
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
5
]
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
6
];
(
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
6
]
<<
5
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
6
]
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
7
];
(
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
7
]
<<
6
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
7
]
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
8
]
;
(
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
8
]
<<
7
))
;
dlsch_config_pdu_1_1
->
n_front_load_symb
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
9
];
dlsch_config_pdu_1_1
->
n_front_load_symb
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
9
];
}
}
}
}
...
@@ -1006,41 +1011,55 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
...
@@ -1006,41 +1011,55 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1
// Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1
if
(
n_codewords
==
1
)
{
if
(
n_codewords
==
1
)
{
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
dmrs_ports
[
0
]
=
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
1
];
dlsch_config_pdu_1_1
->
dmrs_ports
=
(
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
1
]
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
1
]
=
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
2
];
(
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
1
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
2
]
=
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
3
];
(
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
2
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
3
]
=
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
4
];
(
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
4
]
<<
3
)
+
(
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
5
]
<<
4
)
+
(
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
6
]
<<
5
));
}
}
if
(
n_codewords
==
1
)
{
if
(
n_codewords
==
1
)
{
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
dmrs_ports
[
0
]
=
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
1
];
dlsch_config_pdu_1_1
->
dmrs_ports
=
(
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
1
]
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
1
]
=
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
2
];
(
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
1
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
2
]
=
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
3
];
(
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
2
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
3
]
=
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
4
];
(
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
4
]
<<
3
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
4
]
=
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
5
];
(
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
5
]
<<
4
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
5
]
=
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
6
]
;
(
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
6
]
<<
5
))
;
}
}
}
}
if
((
dmrs_type
!=
NULL
)
&&
(
max_length
!=
NULL
)){
if
((
dmrs_type
!=
NULL
)
&&
(
max_length
!=
NULL
)){
// Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2
// Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2
if
(
n_codewords
==
1
)
{
if
(
n_codewords
==
1
)
{
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
dmrs_ports
[
0
]
=
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
1
];
dlsch_config_pdu_1_1
->
dmrs_ports
=
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
1
]
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
1
]
=
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
2
];
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
1
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
2
]
=
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
3
];
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
2
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
3
]
=
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
4
];
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
4
]
<<
3
)
+
dlsch_config_pdu_1_1
->
n_front_load_symb
=
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
5
];
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
5
]
<<
4
)
+
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
6
]
<<
5
)
+
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
7
]
<<
6
)
+
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
8
]
<<
7
)
+
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
9
]
<<
8
)
+
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
10
]
<<
9
)
+
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
11
]
<<
10
)
+
(
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
12
]
<<
11
));
dlsch_config_pdu_1_1
->
n_front_load_symb
=
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
13
];
}
}
if
(
n_codewords
==
1
)
{
if
(
n_codewords
==
1
)
{
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
dmrs_ports
[
0
]
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
1
];
dlsch_config_pdu_1_1
->
dmrs_ports
=
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
1
]
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
1
]
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
2
];
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
1
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
2
]
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
3
];
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
2
]
<<
2
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
3
]
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
4
];
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
4
]
<<
3
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
4
]
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
5
];
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
5
]
<<
4
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
5
]
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
6
];
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
6
]
<<
5
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
6
]
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
7
];
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
7
]
<<
6
)
+
dlsch_config_pdu_1_1
->
dmrs_ports
[
7
]
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
8
];
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
8
]
<<
7
)
+
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
9
]
<<
8
)
+
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
10
]
<<
9
)
+
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
11
]
<<
10
)
+
(
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
12
]
<<
11
));
dlsch_config_pdu_1_1
->
n_front_load_symb
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
9
];
dlsch_config_pdu_1_1
->
n_front_load_symb
=
table_7_3_2_3_3_4_twoCodeword
[
dci
->
antenna_ports
.
val
][
9
];
}
}
}
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
ed54f598
...
@@ -694,8 +694,7 @@ void pf_dl(module_id_t module_id,
...
@@ -694,8 +694,7 @@ void pf_dl(module_id_t module_id,
const
long
f
=
sched_ctrl
->
search_space
->
searchSpaceType
->
choice
.
ue_Specific
->
dci_Formats
;
const
long
f
=
sched_ctrl
->
search_space
->
searchSpaceType
->
choice
.
ue_Specific
->
dci_Formats
;
const
uint8_t
num_dmrs_cdm_grps_no_data
=
sched_ctrl
->
active_bwp
?
(
f
?
1
:
(
ps
->
nrOfSymbols
==
2
?
1
:
2
))
:
(
ps
->
nrOfSymbols
==
2
?
1
:
2
);
const
uint8_t
num_dmrs_cdm_grps_no_data
=
sched_ctrl
->
active_bwp
?
(
f
?
1
:
(
ps
->
nrOfSymbols
==
2
?
1
:
2
))
:
(
ps
->
nrOfSymbols
==
2
?
1
:
2
);
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
numDmrsCdmGrpsNoData
!=
num_dmrs_cdm_grps_no_data
)
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
numDmrsCdmGrpsNoData
!=
num_dmrs_cdm_grps_no_data
)
nr_set_pdsch_semi_static
(
nr_set_pdsch_semi_static
(
scc
,
UE_info
->
CellGroup
[
UE_id
],
sched_ctrl
->
active_bwp
,
tda
,
num_dmrs_cdm_grps_no_data
,
ps
);
scc
,
UE_info
->
CellGroup
[
UE_id
],
sched_ctrl
->
active_bwp
,
tda
,
num_dmrs_cdm_grps_no_data
,
ps
);
sched_pdsch
->
Qm
=
nr_get_Qm_dl
(
sched_pdsch
->
mcs
,
ps
->
mcsTableIdx
);
sched_pdsch
->
Qm
=
nr_get_Qm_dl
(
sched_pdsch
->
mcs
,
ps
->
mcsTableIdx
);
sched_pdsch
->
R
=
nr_get_code_rate_dl
(
sched_pdsch
->
mcs
,
ps
->
mcsTableIdx
);
sched_pdsch
->
R
=
nr_get_code_rate_dl
(
sched_pdsch
->
mcs
,
ps
->
mcsTableIdx
);
sched_pdsch
->
pucch_allocation
=
alloc
;
sched_pdsch
->
pucch_allocation
=
alloc
;
...
...
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