Commit f967ba17 authored by Mario Hudon's avatar Mario Hudon

Added some comments and cleaned up code

parent 7ecba96f
...@@ -36,23 +36,13 @@ ...@@ -36,23 +36,13 @@
#include "NR_CellGroupConfig.h" #include "NR_CellGroupConfig.h"
#include "nr_mac.h" #include "nr_mac.h"
#define MAX_NB_PRACH_ASSOC_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD (16) // Maximum number of association periods in max association pattern period (160ms)
#define MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PERIOD (16) // Maximum association period is 16
#define MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD (16) // Max association pattern period is 160ms and minimum PRACH configuration period is 10ms
#define MAX_NB_FRAMES_IN_PRACH_CONF_PERIOD (16) // Max PRACH configuration period is 160ms and frame is 10ms
#define MAX_NB_SLOTS_IN_FRAME (160) // Max number of slots in a frame (@ SCS 240kHz = 160)
#define MAX_NB_PRACH_OCCASIONS_IN_TIME (7) // Max number of PRACH occasions in time per slot
#define MAX_NB_PRACH_OCCASIONS_IN_FREQ (8) // Max number of PRACH occasions in frequency per slot
#define MAX_NB_FRAMES_IN_ASSOCIATION_PATTERN_PERIOD (16) // Maximum number of frames in the maximum association pattern period
#define MAX_NB_ASSOCIATION_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD (16) // Max nb of association periods in an association pattern period of 160ms
#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot
#define MAX_NB_SSBS (64)
#define MAX_RO_PER_SSB_RATIO (8)
#define MAX_SSB_PER_RO_RATIO (16)
// Maximum number of SSBs that can be mapped in an association pattern // ===============================================
// Here we chose an arbitrary maximum number - maximum number of slots in an association pattern * maximum number of ROs in a slot // SSB to RO mapping public defines and structures
#define MAX_NB_SSBS_IN_ASSOCIATION_PATTERN (MAX_NB_PRACH_OCCASIONS_IN_TIME*MAX_NB_PRACH_OCCASIONS_IN_FREQ*MAX_NB_SLOTS_IN_FRAME*MAX_NB_FRAMES_IN_ASSOCIATION_PATTERN_PERIOD) // ===============================================
#define MAX_SSB_PER_RO (16) // Maximum number of SSBs that can be mapped to a single RO
#define MAX_TDM (7) // Maximum nb of PRACH occasions TDMed in a slot
#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot
// PRACH occasion details // PRACH occasion details
typedef struct prach_occasion_info { typedef struct prach_occasion_info {
...@@ -60,19 +50,22 @@ typedef struct prach_occasion_info { ...@@ -60,19 +50,22 @@ typedef struct prach_occasion_info {
uint8_t fdm; // 1, 2, 4 or 8 (possible values of msg1-FDM) uint8_t fdm; // 1, 2, 4 or 8 (possible values of msg1-FDM)
uint8_t slot; // 0 - 159 (maximum number of slots in a 10ms frame - @ 240kHz) uint8_t slot; // 0 - 159 (maximum number of slots in a 10ms frame - @ 240kHz)
uint8_t frame; // 0 - 15 (maximum number of frames in a 160ms association pattern) uint8_t frame; // 0 - 15 (maximum number of frames in a 160ms association pattern)
uint8_t mapped_ssb_idx[MAX_SSB_PER_RO_RATIO]; // List of mapped SSBs uint8_t mapped_ssb_idx[MAX_SSB_PER_RO]; // List of mapped SSBs
uint8_t nb_mapped_ssbs; uint8_t nb_mapped_ssbs;
uint16_t format; // RO preamble format uint16_t format; // RO preamble format
} prach_occasion_info_t; } prach_occasion_info_t;
// PRACH occasions details in a slot // PRACH occasion slot details
// A PRACH occasion slot is a series of PRACH occasions in time (symbols) and frequency // A PRACH occasion slot is a series of PRACH occasions in time (symbols) and frequency
typedef struct prach_occasion_slot { typedef struct prach_occasion_slot {
prach_occasion_info_t prach_occasion[MAX_NB_PRACH_OCCASIONS_IN_TIME][MAX_FDM]; // Starting symbol of each PRACH occasions in a slot - 0Xff when no more valid PRACH occasion in that slot prach_occasion_info_t prach_occasion[MAX_TDM][MAX_FDM]; // Starting symbol of each PRACH occasions in a slot
uint8_t nb_of_prach_occasions_in_time; uint8_t nb_of_prach_occasions_in_time;
uint8_t nb_of_prach_occasions_in_freq; uint8_t nb_of_prach_occasions_in_freq;
} prach_occasion_slot_t; } prach_occasion_slot_t;
// ========================================
typedef enum { typedef enum {
NR_DL_DCI_FORMAT_1_0 = 0, NR_DL_DCI_FORMAT_1_0 = 0,
NR_DL_DCI_FORMAT_1_1, NR_DL_DCI_FORMAT_1_1,
...@@ -126,7 +119,7 @@ void find_monitoring_periodicity_offset_common(NR_SearchSpace_t *ss, ...@@ -126,7 +119,7 @@ void find_monitoring_periodicity_offset_common(NR_SearchSpace_t *ss,
uint16_t *offset); uint16_t *offset);
void build_ssb_to_ro_map(NR_ServingCellConfigCommon_t *scc); void build_ssb_to_ro_map(NR_ServingCellConfigCommon_t *scc);
int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, int frame, int slot, prach_occasion_slot_t *prach_occasion_slot_p); int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, int frame, int slot, prach_occasion_info_t **prach_occasion_info_pp);
int get_nr_prach_info_from_index(uint8_t index, int get_nr_prach_info_from_index(uint8_t index,
int frame, int frame,
......
...@@ -357,6 +357,7 @@ int nr_rrc_mac_config_req_ue( ...@@ -357,6 +357,7 @@ int nr_rrc_mac_config_req_ue(
} }
mac->scg = cell_group_config; mac->scg = cell_group_config;
// Setup the SSB to Rach Occasions mapping according to the config
build_ssb_to_ro_map(mac->scc); build_ssb_to_ro_map(mac->scc);
/* /*
......
...@@ -951,10 +951,10 @@ void nr_ue_msg2_scheduler(module_id_t mod_id, ...@@ -951,10 +951,10 @@ void nr_ue_msg2_scheduler(module_id_t mod_id,
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) { void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) {
// uint8_t config_index, mu, N_dur, N_t_slot, start_symbol; // uint8_t config_index, mu, N_dur, N_t_slot, start_symbol;
prach_occasion_slot_t prach_occasion_slot;
uint16_t format, format0, format1, ncs; uint16_t format, format0, format1, ncs;
// int msg1_FDM, is_nr_prach_slot, fdm; // int msg1_FDM, is_nr_prach_slot, fdm;
int is_nr_prach_slot; int is_nr_prach_slot;
prach_occasion_info_t *prach_occasion_info_p;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP); NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
...@@ -967,7 +967,6 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -967,7 +967,6 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
NR_RACH_ConfigCommon_t *setup = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup; NR_RACH_ConfigCommon_t *setup = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup;
// NR_FrequencyInfoDL_t *frequencyInfoDL = scc->downlinkConfigCommon->frequencyInfoDL; // NR_FrequencyInfoDL_t *frequencyInfoDL = scc->downlinkConfigCommon->frequencyInfoDL;
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric;
// config_index = rach_ConfigGeneric->prach_ConfigurationIndex; // config_index = rach_ConfigGeneric->prach_ConfigurationIndex;
mac->RA_offset = 2; // to compensate the rx frame offset at the gNB mac->RA_offset = 2; // to compensate the rx frame offset at the gNB
...@@ -990,15 +989,21 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -990,15 +989,21 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
// &N_t_slot, // &N_t_slot,
// &N_dur); // &N_dur);
uint8_t selected_gnb_ssb_idx = 0; // WIP Need to get the proper selected ssb_idx // WIP-IDCC Need to get the proper selected ssb_idx
mac->generate_nr_prach = 0; uint8_t selected_gnb_ssb_idx = 0;
// Get any valid PRACH occasion in the current slot for the selected SSB index
is_nr_prach_slot = get_nr_prach_info_from_ssb_index(selected_gnb_ssb_idx, is_nr_prach_slot = get_nr_prach_info_from_ssb_index(selected_gnb_ssb_idx,
(int)frameP, (int)frameP,
(int)slotP, (int)slotP,
&prach_occasion_slot); &prach_occasion_info_p);
if (is_nr_prach_slot && mac->ra_state == RA_UE_IDLE) { if (is_nr_prach_slot && mac->ra_state == RA_UE_IDLE) {
AssertFatal(NULL != prach_occasion_info_p,"PRACH Occasion Info not returned in a valid NR Prach Slot\n");
mac->generate_nr_prach = 1;
// fdm = rach_ConfigGeneric->msg1_FDM; // fdm = rach_ConfigGeneric->msg1_FDM;
// //
// switch (fdm){ // switch (fdm){
...@@ -1012,7 +1017,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -1012,7 +1017,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
// AssertFatal(1 == 0, "Unknown msg1_FDM from rach_ConfigGeneric %d\n", fdm); // AssertFatal(1 == 0, "Unknown msg1_FDM from rach_ConfigGeneric %d\n", fdm);
// } // }
format = prach_occasion_slot.prach_occasion[0][0].format; format = prach_occasion_info_p->format;
format0 = format & 0xff; // single PRACH format format0 = format & 0xff; // single PRACH format
format1 = (format >> 8) & 0xff; // dual PRACH format format1 = (format >> 8) & 0xff; // dual PRACH format
...@@ -1021,13 +1026,6 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -1021,13 +1026,6 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
// for (int n = 0; n < msg1_FDM; n++) { // one structure per frequency domain occasion // for (int n = 0; n < msg1_FDM; n++) { // one structure per frequency domain occasion
// Go through all the ROs in the slot and find the first that is mapped to the selected SSB index
for (int ro_in_time=0; ro_in_time < prach_occasion_slot.nb_of_prach_occasions_in_time; ro_in_time++) {
for (int ro_in_freq=0; ro_in_freq < prach_occasion_slot.nb_of_prach_occasions_in_freq; ro_in_freq++) {
prach_occasion_info_t *prach_occasion_info_p = &prach_occasion_slot.prach_occasion[ro_in_time][ro_in_freq];
for (uint8_t ssb_nb=0; ssb_nb<prach_occasion_info_p->nb_mapped_ssbs; ssb_nb++) {
if (prach_occasion_info_p->mapped_ssb_idx[ssb_nb] == selected_gnb_ssb_idx) {
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PRACH; ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PRACH;
prach_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].prach_config_pdu; prach_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].prach_config_pdu;
memset(prach_config_pdu, 0, sizeof(fapi_nr_ul_config_prach_pdu)); memset(prach_config_pdu, 0, sizeof(fapi_nr_ul_config_prach_pdu));
...@@ -1036,16 +1034,20 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -1036,16 +1034,20 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
ncs = get_NCS(rach_ConfigGeneric->zeroCorrelationZoneConfig, format0, setup->restrictedSetConfig); ncs = get_NCS(rach_ConfigGeneric->zeroCorrelationZoneConfig, format0, setup->restrictedSetConfig);
// filling PRACH PDU for FAPI config request // filling PRACH PDU for FAPI config request
prach_config_pdu->phys_cell_id = *scc->physCellId; // prach_config_pdu->phys_cell_id = *scc->physCellId;
// prach_config_pdu->num_prach_ocas = N_t_slot; // prach_config_pdu->num_prach_ocas = N_t_slot;
prach_config_pdu->num_prach_ocas = 1;
// prach_config_pdu->prach_start_symbol = start_symbol; // prach_config_pdu->prach_start_symbol = start_symbol;
prach_config_pdu->prach_start_symbol = prach_occasion_info_p->start_symbol;
// prach_config_pdu->num_ra = n; // prach_config_pdu->num_ra = n;
prach_config_pdu->phys_cell_id = *scc->physCellId;
prach_config_pdu->num_prach_ocas = 1;
prach_config_pdu->prach_start_symbol = prach_occasion_info_p->start_symbol;
prach_config_pdu->num_ra = prach_occasion_info_p->fdm; prach_config_pdu->num_ra = prach_occasion_info_p->fdm;
prach_config_pdu->num_cs = ncs; prach_config_pdu->num_cs = ncs;
// prach_config_pdu->root_seq_id = prach_config->num_prach_fd_occasions_list[n].prach_root_sequence_index; // prach_config_pdu->root_seq_id = prach_config->num_prach_fd_occasions_list[n].prach_root_sequence_index;
prach_config_pdu->root_seq_id = prach_config->num_prach_fd_occasions_list[prach_occasion_info_p->fdm].prach_root_sequence_index; prach_config_pdu->root_seq_id = prach_config->num_prach_fd_occasions_list[prach_occasion_info_p->fdm].prach_root_sequence_index;
prach_config_pdu->restricted_set = prach_config->restricted_set_config; prach_config_pdu->restricted_set = prach_config->restricted_set_config;
// prach_config_pdu->freq_msg1 = prach_config->num_prach_fd_occasions_list[n].k1; // prach_config_pdu->freq_msg1 = prach_config->num_prach_fd_occasions_list[n].k1;
prach_config_pdu->freq_msg1 = prach_config->num_prach_fd_occasions_list[prach_occasion_info_p->fdm].k1; prach_config_pdu->freq_msg1 = prach_config->num_prach_fd_occasions_list[prach_occasion_info_p->fdm].k1;
...@@ -1109,23 +1111,13 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -1109,23 +1111,13 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
AssertFatal(1 == 0, "Invalid PRACH format"); AssertFatal(1 == 0, "Invalid PRACH format");
} }
} // if format1 } // if format1
// } for n
} else {
mac->generate_nr_prach = 0;
} // if-else is_nr_prach_slot
// RO matching the SSB is found -> get out of mapping loop
mac->generate_nr_prach = 1;
break;
} // if selected_gnb_ssb_idx
} // for ssb_nb
// RO matching the SSB is found -> get out of mapping loop
if (1 == mac->generate_nr_prach) break;
} // for ro_in_freq
// RO matching the SSB is found -> get out of mapping loop
if (1 == mac->generate_nr_prach) break;
} // for ro_in_time
}
mac->scheduled_response.ul_config = ul_config; mac->scheduled_response.ul_config = ul_config;
} } // if is_nr_UL_slot
} }
//////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////
......
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