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wangjie
OpenXG-RAN
Commits
fb4d2107
Commit
fb4d2107
authored
Nov 18, 2019
by
Raymond Knopp
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Plain Diff
nr-ip-over-lte: disable UL procedures.
parent
615f2787
Changes
3
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3 changed files
with
12 additions
and
9 deletions
+12
-9
executables/nr-gnb.c
executables/nr-gnb.c
+2
-2
executables/nr-ue.c
executables/nr-ue.c
+9
-6
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
.../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
+1
-1
No files found.
executables/nr-gnb.c
View file @
fb4d2107
...
@@ -194,10 +194,10 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t
...
@@ -194,10 +194,10 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t
// UE-specific RX processing for subframe n
// UE-specific RX processing for subframe n
if (nfapi_mode == 0 || nfapi_mode == 1) */
if (nfapi_mode == 0 || nfapi_mode == 1) */
if
(
slot_rx
==
NR_UPLINK_SLOT
||
gNB
->
frame_parms
.
frame_type
==
FDD
)
{
/*
if (slot_rx == NR_UPLINK_SLOT || gNB->frame_parms.frame_type == FDD) {
nfapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_pdu_rel15 = &gNB->ulsch[1][0]->harq_processes[0]->ulsch_pdu.ulsch_pdu_rel15;
nfapi_nr_ul_config_ulsch_pdu_rel15_t *ulsch_pdu_rel15 = &gNB->ulsch[1][0]->harq_processes[0]->ulsch_pdu.ulsch_pdu_rel15;
phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx, ulsch_pdu_rel15->start_symbol, ulsch_pdu_rel15->start_symbol + ulsch_pdu_rel15->number_symbols);
phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx, ulsch_pdu_rel15->start_symbol, ulsch_pdu_rel15->start_symbol + ulsch_pdu_rel15->number_symbols);
}
}
*/
pthread_mutex_lock
(
&
gNB
->
UL_INFO_mutex
);
pthread_mutex_lock
(
&
gNB
->
UL_INFO_mutex
);
gNB
->
UL_INFO
.
frame
=
frame_rx
;
gNB
->
UL_INFO
.
frame
=
frame_rx
;
...
...
executables/nr-ue.c
View file @
fb4d2107
...
@@ -371,13 +371,13 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
...
@@ -371,13 +371,13 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
nr_ue_dcireq
(
&
dcireq
);
//to be replaced with function pointer later
nr_ue_dcireq
(
&
dcireq
);
//to be replaced with function pointer later
scheduled_response
.
dl_config
=
&
dcireq
.
dl_config_req
;
scheduled_response
.
dl_config
=
&
dcireq
.
dl_config_req
;
scheduled_response
.
ul_config
=
&
dcireq
.
ul_config_req
;
scheduled_response
.
ul_config
=
NULL
;
scheduled_response
.
tx_request
=
NULL
;
scheduled_response
.
tx_request
=
NULL
;
scheduled_response
.
module_id
=
UE
->
Mod_id
;
scheduled_response
.
module_id
=
UE
->
Mod_id
;
scheduled_response
.
CC_id
=
0
;
scheduled_response
.
CC_id
=
0
;
scheduled_response
.
frame
=
proc
->
frame_rx
;
scheduled_response
.
frame
=
proc
->
frame_rx
;
scheduled_response
.
slot
=
proc
->
nr_tti_rx
;
scheduled_response
.
slot
=
proc
->
nr_tti_rx
;
/*
//--------------------------Temporary configuration-----------------------------//
//--------------------------Temporary configuration-----------------------------//
n_rnti = 0x1234;
n_rnti = 0x1234;
nb_rb = 50;
nb_rb = 50;
...
@@ -403,6 +403,7 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
...
@@ -403,6 +403,7 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.rv = rvidx;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.rv = rvidx;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid;
*/
nr_ue_scheduled_response
(
&
scheduled_response
);
nr_ue_scheduled_response
(
&
scheduled_response
);
#ifdef UE_SLOT_PARALLELISATION
#ifdef UE_SLOT_PARALLELISATION
...
@@ -473,7 +474,7 @@ void UE_processing(void *arg) {
...
@@ -473,7 +474,7 @@ void UE_processing(void *arg) {
#endif
#endif
*/
*/
/*
if (proc->nr_tti_tx == NR_UPLINK_SLOT || UE->frame_parms.frame_type == FDD){
if (proc->nr_tti_tx == NR_UPLINK_SLOT || UE->frame_parms.frame_type == FDD){
thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_tx];
thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_tx];
...
@@ -483,6 +484,7 @@ void UE_processing(void *arg) {
...
@@ -483,6 +484,7 @@ void UE_processing(void *arg) {
phy_procedures_nrUE_TX(UE,proc,0,thread_id);
phy_procedures_nrUE_TX(UE,proc,0,thread_id);
}
}
*/
//phy_procedures_UE_TX(UE,proc,0,0,UE->mode,no_relay);
//phy_procedures_UE_TX(UE,proc,0,0,UE->mode,no_relay);
...
@@ -732,7 +734,7 @@ void *UE_thread(void *arg) {
...
@@ -732,7 +734,7 @@ void *UE_thread(void *arg) {
rxp
,
rxp
,
readBlockSize
,
readBlockSize
,
UE
->
frame_parms
.
nb_antennas_rx
),
""
);
UE
->
frame_parms
.
nb_antennas_rx
),
""
);
/*
if (slot_nr==18)
if (slot_nr==18)
AssertFatal( writeBlockSize ==
AssertFatal( writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
UE->rfdevice.trx_write_func(&UE->rfdevice,
...
@@ -744,7 +746,7 @@ if (slot_nr==18)
...
@@ -744,7 +746,7 @@ if (slot_nr==18)
writeBlockSize,
writeBlockSize,
UE->frame_parms.nb_antennas_tx,
UE->frame_parms.nb_antennas_tx,
4),"");
4),"");
*/
if
(
slot_nr
==
(
nb_slot_frame
-
1
))
{
if
(
slot_nr
==
(
nb_slot_frame
-
1
))
{
// read in first symbol of next frame and adjust for timing drift
// read in first symbol of next frame and adjust for timing drift
int
first_symbols
=
writeBlockSize
-
readBlockSize
;
int
first_symbols
=
writeBlockSize
-
readBlockSize
;
...
@@ -842,3 +844,4 @@ void init_NR_UE(int nb_inst) {
...
@@ -842,3 +844,4 @@ void init_NR_UE(int nb_inst) {
printf
(
"UE threads created by %ld
\n
"
,
gettid
());
printf
(
"UE threads created by %ld
\n
"
,
gettid
());
}
}
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
View file @
fb4d2107
...
@@ -254,7 +254,7 @@ RUs = (
...
@@ -254,7 +254,7 @@ RUs = (
max_pdschReferenceSignalPower
= -
27
;
max_pdschReferenceSignalPower
= -
27
;
max_rxgain
=
114
;
max_rxgain
=
114
;
eNB_instances
= [
0
];
eNB_instances
= [
0
];
sdr_addrs
=
"addr=192.168.10.2,second_addr=192.168.20.2,mgmt_addr=192.168.10.2,clock_source=
external,time_source=ex
ternal"
;
sdr_addrs
=
"addr=192.168.10.2,second_addr=192.168.20.2,mgmt_addr=192.168.10.2,clock_source=
internal,time_source=in
ternal"
;
}
}
);
);
...
...
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