NEON: more fp16 using intrinsics supported by architecture v7 (skip version) (#1081)

* [NEON] Add vabal_{s/u}{8/16/32}

* [NEON] Add vabal_high_{s/u}{8/16/32}

* [NEON] Add all vcale* intrinsics (9)

* [NEON] Add all vcalt intrinsics (9)

* [NEON] Add vcreate_f16

* [NEON] Add vreinterpret_u64_f16

* [NEON] Add vcvth_f16_s16 and vcvth_f16_u16

* [NEON] Add vduph_lane_f16, vdup_lane_f16, and vdupq_lane_f16

* [NEON] Add vext_f16

* [NEON] Add 16 vcvt{q}_n_* intrinsics

* [Fix] Correct function input parameters

* [NEON] Add 6 vcvtn_{s/u}{16/32/64}_f{*} intrinsics

* [Fix] Correct vdup_lane_f16 and vdupq_lane_f16.

* [Fix] Correct function input parameters.

* [NEON] Add 24 vcvt{q}_n_* intrinsics

* [NEON] Add all vcvtn* intrinsics

* [NEON] Add vfmah_f16 and vfma_f16

* [NEON] Add vfma_n_f16 and vfmaq_n_f16

* [NEON] Add vmulh_f16

* [NEON] Add fma_lane related intrinsics.

* [NEON] Add 5 vmul* related intrinsics
vmulh_lane_f16, vmulh_laneq_f16, vmul_lane_f16,
vmul_laneq_f16, vmulq_laneq_f16.

* [NEON] Add neg related intrinsics.

* [NEON] Add all fms, fms_n, and fms_lane intrinsics

* [NEON] Add types float16x{4/8}x{2/3/4}

* [NEON] Add 9 vld1 related intrinsics

* [Fix] Modified wrong rounding implementation.
Modified wrong implementation "Ties to Away" to "rounding to nearest
with ties to Away"
add.h: Remove redundant code.

* [Fix] Fix wrong intrinsic alias names.

* [Refactor] Remove redundant functions.

* [NEON] Add 45 ld2 related intrinsics
one ld2_f16, twenty-two ld2_lane series, and twenty-two ld2_dup series.

* [NEON] Add ld3_dup, ld3_lane, and ld4_dup

* [NEON] Add vld3_f16 and vld4_f16.

* [NEON] Add vld{3/4}_{dup/lane} series intrinsics

* [NEON] Add mla_{high}_lane series intrinsics

* [NEON] Add qdmlal_{high}_{lane} series intrinsics.

* [NEON] Add qdmlal_lane and qdmlal_n series intrinsics

* [NEON] Add mls_lane and mlsl_high_lane series intrinsics

* [NEON] Add 22 qdmlsl series intrinsics

* [NEON] Add 10 qdmull_* series intrinsics

* [NEON] Add 3 qdmulh series intrinsics

* [Fix] Fix wrong function name.

* [Fix] Correct the wrong alias function name.

* [NEON] Add qdmullh_lane{q}_s{16/32} related intrinsics

* [NEON] Add qdmull_n and qdmull_high_lane series intrinsics

* [Fix] Add conditions for fp16 intrinsics

* [Hack] Skip functions that trigger compiler bugs.

arm/neon.h

@@ -31,6 +31,8 @@
 #include "neon/types.h"
 
 #include "neon/aba.h"
+#include "neon/abal.h"
+#include "neon/abal_high.h"
 #include "neon/abd.h"
 #include "neon/abdl.h"
 #include "neon/abs.h"
@@ -50,6 +52,8 @@
 #include "neon/cadd_rot90.h"
 #include "neon/cage.h"
 #include "neon/cagt.h"
+#include "neon/cale.h"
+#include "neon/calt.h"
 #include "neon/ceq.h"
 #include "neon/ceqz.h"
 #include "neon/cge.h"
@@ -72,6 +76,7 @@
 #include "neon/cmla_rot270.h"
 #include "neon/cnt.h"
 #include "neon/cvt.h"
+#include "neon/cvt_n.h"
 #include "neon/cvtn.h"
 #include "neon/combine.h"
 #include "neon/create.h"
@@ -85,6 +90,9 @@
 #include "neon/fma.h"
 #include "neon/fma_lane.h"
 #include "neon/fma_n.h"
+#include "neon/fms.h"
+#include "neon/fms_lane.h"
+#include "neon/fms_n.h"
 #include "neon/get_high.h"
 #include "neon/get_lane.h"
 #include "neon/get_low.h"
@@ -100,8 +108,13 @@
 #include "neon/ld1q_x3.h"
 #include "neon/ld1q_x4.h"
 #include "neon/ld2.h"
+#include "neon/ld2_dup.h"
+#include "neon/ld2_lane.h"
 #include "neon/ld3.h"
+#include "neon/ld3_dup.h"
+#include "neon/ld3_lane.h"
 #include "neon/ld4.h"
+#include "neon/ld4_dup.h"
 #include "neon/ld4_lane.h"
 #include "neon/max.h"
 #include "neon/maxnm.h"
@@ -114,16 +127,20 @@
 #include "neon/mla_n.h"
 #include "neon/mlal.h"
 #include "neon/mlal_high.h"
+#include "neon/mlal_high_lane.h"
 #include "neon/mlal_high_n.h"
 #include "neon/mlal_lane.h"
 #include "neon/mlal_n.h"
 #include "neon/mls.h"
+#include "neon/mls_lane.h"
 #include "neon/mls_n.h"
 #include "neon/mlsl.h"
 #include "neon/mlsl_high.h"
+#include "neon/mlsl_high_lane.h"
 #include "neon/mlsl_high_n.h"
 #include "neon/mlsl_lane.h"
 #include "neon/mlsl_n.h"
+//#include "neon/mmlaq.h"
 #include "neon/movl.h"
 #include "neon/movl_high.h"
 #include "neon/movn.h"
@@ -146,10 +163,27 @@
 #include "neon/pmin.h"
 #include "neon/qabs.h"
 #include "neon/qadd.h"
+#include "neon/qdmlal.h"
+#include "neon/qdmlal_high.h"
+#include "neon/qdmlal_high_lane.h"
+#include "neon/qdmlal_high_n.h"
+#include "neon/qdmlal_lane.h"
+#include "neon/qdmlal_n.h"
+#include "neon/qdmlsl.h"
+#include "neon/qdmlsl_high.h"
+#include "neon/qdmlsl_high_lane.h"
+#include "neon/qdmlsl_high_n.h"
+#include "neon/qdmlsl_lane.h"
+#include "neon/qdmlsl_n.h"
 #include "neon/qdmulh.h"
 #include "neon/qdmulh_lane.h"
 #include "neon/qdmulh_n.h"
 #include "neon/qdmull.h"
+#include "neon/qdmull_high.h"
+#include "neon/qdmull_high_lane.h"
+#include "neon/qdmull_high_n.h"
+#include "neon/qdmull_lane.h"
+#include "neon/qdmull_n.h"
 #include "neon/qrdmulh.h"
 #include "neon/qrdmulh_lane.h"
 #include "neon/qrdmulh_n.h"

arm/neon/abal.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_ABAL_H)
+#define SIMDE_ARM_NEON_ABAL_H
+
+#include "abdl.h"
+#include "add.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x8_t
+simde_vabal_s8(simde_int16x8_t a, simde_int8x8_t b, simde_int8x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vabal_s8(a, b, c);
+  #else
+    return simde_vaddq_s16(simde_vabdl_s8(b, c), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vabal_s8
+  #define vabal_s8(a, b, c) simde_vabal_s8((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vabal_s16(simde_int32x4_t a, simde_int16x4_t b, simde_int16x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vabal_s16(a, b, c);
+  #else
+    return simde_vaddq_s32(simde_vabdl_s16(b, c), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vabal_s16
+  #define vabal_s16(a, b, c) simde_vabal_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vabal_s32(simde_int64x2_t a, simde_int32x2_t b, simde_int32x2_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vabal_s32(a, b, c);
+  #else
+    return simde_vaddq_s64(simde_vabdl_s32(b, c), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vabal_s32
+  #define vabal_s32(a, b, c) simde_vabal_s32((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8_t
+simde_vabal_u8(simde_uint16x8_t a, simde_uint8x8_t b, simde_uint8x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vabal_u8(a, b, c);
+  #else
+    return simde_vaddq_u16(simde_vabdl_u8(b, c), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vabal_u8
+  #define vabal_u8(a, b, c) simde_vabal_u8((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4_t
+simde_vabal_u16(simde_uint32x4_t a, simde_uint16x4_t b, simde_uint16x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vabal_u16(a, b, c);
+  #else
+    return simde_vaddq_u32(simde_vabdl_u16(b, c), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vabal_u16
+  #define vabal_u16(a, b, c) simde_vabal_u16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vabal_u32(simde_uint64x2_t a, simde_uint32x2_t b, simde_uint32x2_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vabal_u32(a, b, c);
+  #else
+    return simde_vaddq_u64(simde_vabdl_u32(b, c), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vabal_u32
+  #define vabal_u32(a, b, c) simde_vabal_u32((a), (b), (c))
+#endif
+
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_abal_H) */

arm/neon/abal_high.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_ABAL_HIGH_H)
+#define SIMDE_ARM_NEON_ABAL_HIGH_H
+
+#include "abdl.h"
+#include "add.h"
+#include "movl_high.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x8_t
+simde_vabal_high_s8(simde_int16x8_t a, simde_int8x16_t b, simde_int8x16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vabal_high_s8(a, b, c);
+  #else
+    return simde_vaddq_s16(simde_vabdl_s8(simde_vget_high_s8(b), simde_vget_high_s8(c)), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vabal_high_s8
+  #define vabal_high_s8(a, b, c) simde_vabal_high_s8((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vabal_high_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vabal_high_s16(a, b, c);
+  #else
+    return simde_vaddq_s32(simde_vabdl_s16(simde_vget_high_s16(b), simde_vget_high_s16(c)), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vabal_high_s16
+  #define vabal_high_s16(a, b, c) simde_vabal_high_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vabal_high_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vabal_high_s32(a, b, c);
+  #else
+    return simde_vaddq_s64(simde_vabdl_s32(simde_vget_high_s32(b), simde_vget_high_s32(c)), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vabal_high_s32
+  #define vabal_high_s32(a, b, c) simde_vabal_high_s32((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8_t
+simde_vabal_high_u8(simde_uint16x8_t a, simde_uint8x16_t b, simde_uint8x16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vabal_high_u8(a, b, c);
+  #else
+    return simde_vaddq_u16(simde_vabdl_u8(simde_vget_high_u8(b), simde_vget_high_u8(c)), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vabal_high_u8
+  #define vabal_high_u8(a, b, c) simde_vabal_high_u8((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4_t
+simde_vabal_high_u16(simde_uint32x4_t a, simde_uint16x8_t b, simde_uint16x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vabal_high_u16(a, b, c);
+  #else
+    return simde_vaddq_u32(simde_vabdl_u16(simde_vget_high_u16(b), simde_vget_high_u16(c)), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vabal_high_u16
+  #define vabal_high_u16(a, b, c) simde_vabal_high_u16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vabal_high_u32(simde_uint64x2_t a, simde_uint32x4_t b, simde_uint32x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vabal_high_u32(a, b, c);
+  #else
+    return simde_vaddq_u64(simde_vabdl_u32(simde_vget_high_u32(b), simde_vget_high_u32(c)), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vabal_high_u32
+  #define vabal_high_u32(a, b, c) simde_vabal_high_u32((a), (b), (c))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_abal_H) */

arm/neon/cale.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_CALE_H)
+#define SIMDE_ARM_NEON_CALE_H
+
+#include "cage.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint16_t
+simde_vcaleh_f16(simde_float16_t a, simde_float16_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcaleh_f16(a, b);
+  #else
+    return simde_vcageh_f16(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcaleh_f16
+  #define vcaleh_f16(a, b) simde_vcaleh_f16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint32_t
+simde_vcales_f32(simde_float32_t a, simde_float32_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcales_f32(a, b);
+  #else
+    return simde_vcages_f32(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcales_f32
+  #define vcales_f32(a, b) simde_vcales_f32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint64_t
+simde_vcaled_f64(simde_float64_t a, simde_float64_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcaled_f64(a, b);
+  #else
+    return simde_vcaged_f64(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcaled_f64
+  #define vcaled_f64(a, b) simde_vcaled_f64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x4_t
+simde_vcale_f16(simde_float16x4_t a, simde_float16x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcale_f16(a, b);
+  #else
+    return simde_vcage_f16(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcale_f16
+  #define vcale_f16(a, b) simde_vcale_f16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x2_t
+simde_vcale_f32(simde_float32x2_t a, simde_float32x2_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vcale_f32(a, b);
+  #else
+    return simde_vcage_f32(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcale_f32
+  #define vcale_f32(a, b) simde_vcale_f32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1_t
+simde_vcale_f64(simde_float64x1_t a, simde_float64x1_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcale_f64(a, b);
+  #else
+    return simde_vcage_f64(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcale_f64
+  #define vcale_f64(a, b) simde_vcale_f64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8_t
+simde_vcaleq_f16(simde_float16x8_t a, simde_float16x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcaleq_f16(a, b);
+  #else
+    return simde_vcageq_f16(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcaleq_f16
+  #define vcaleq_f16(a, b) simde_vcaleq_f16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4_t
+simde_vcaleq_f32(simde_float32x4_t a, simde_float32x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vcaleq_f32(a, b);
+  #else
+    return simde_vcageq_f32(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcaleq_f32
+  #define vcaleq_f32(a, b) simde_vcaleq_f32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vcaleq_f64(simde_float64x2_t a, simde_float64x2_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcaleq_f64(a, b);
+  #else
+    return simde_vcageq_f64(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcaleq_f64
+  #define vcaleq_f64(a, b) simde_vcaleq_f64((a), (b))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_cale_H) */

arm/neon/calt.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_CALT_H)
+#define SIMDE_ARM_NEON_CALT_H
+
+#include "cagt.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint16_t
+simde_vcalth_f16(simde_float16_t a, simde_float16_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcalth_f16(a, b);
+  #else
+    return simde_vcagth_f16(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcalth_f16
+  #define vcalth_f16(a, b) simde_vcalth_f16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint32_t
+simde_vcalts_f32(simde_float32_t a, simde_float32_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcalts_f32(a, b);
+  #else
+    return simde_vcagts_f32(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcalts_f32
+  #define vcalts_f32(a, b) simde_vcalts_f32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint64_t
+simde_vcaltd_f64(simde_float64_t a, simde_float64_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcaltd_f64(a, b);
+  #else
+    return simde_vcagtd_f64(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcaltd_f64
+  #define vcaltd_f64(a, b) simde_vcaltd_f64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x4_t
+simde_vcalt_f16(simde_float16x4_t a, simde_float16x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcalt_f16(a, b);
+  #else
+    return simde_vcagt_f16(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcalt_f16
+  #define vcalt_f16(a, b) simde_vcalt_f16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x2_t
+simde_vcalt_f32(simde_float32x2_t a, simde_float32x2_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vcalt_f32(a, b);
+  #else
+    return simde_vcagt_f32(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcalt_f32
+  #define vcalt_f32(a, b) simde_vcalt_f32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1_t
+simde_vcalt_f64(simde_float64x1_t a, simde_float64x1_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcalt_f64(a, b);
+  #else
+    return simde_vcagt_f64(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcalt_f64
+  #define vcalt_f64(a, b) simde_vcalt_f64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8_t
+simde_vcaltq_f16(simde_float16x8_t a, simde_float16x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcaltq_f16(a, b);
+  #else
+    return simde_vcagtq_f16(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcaltq_f16
+  #define vcaltq_f16(a, b) simde_vcaltq_f16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4_t
+simde_vcaltq_f32(simde_float32x4_t a, simde_float32x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vcaltq_f32(a, b);
+  #else
+    return simde_vcagtq_f32(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcaltq_f32
+  #define vcaltq_f32(a, b) simde_vcaltq_f32((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vcaltq_f64(simde_float64x2_t a, simde_float64x2_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcaltq_f64(a, b);
+  #else
+    return simde_vcagtq_f64(b, a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcaltq_f64
+  #define vcaltq_f64(a, b) simde_vcaltq_f64((a), (b))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_CAGT_H) */

arm/neon/create.h

@@ -23,11 +23,10 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2020      Christopher Moore <moore@free.fr>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
-/* N.B. CM: vcreate_f16 and vcreate_bf16 are omitted as
- * SIMDe has no 16-bit floating point support.
- * Idem for the poly types. */
+/* Yi-Yen Chung: Added vcreate_f16 */
 
 #if !defined(SIMDE_ARM_NEON_CREATE_H)
 #define SIMDE_ARM_NEON_CREATE_H
@@ -152,6 +151,20 @@ simde_vcreate_u64(uint64_t a) {
   #define vcreate_u64(a) simde_vcreate_u64(a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vcreate_f16(uint64_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcreate_f16(a);
+  #else
+    return simde_vreinterpret_f16_u64(simde_vdup_n_u64(a));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcreate_f16
+  #define vcreate_f16(a) simde_vcreate_f16(a)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vcreate_f32(uint64_t a) {

arm/neon/cvt.h

@@ -141,9 +141,9 @@ simde_vcvt_f64_f32(simde_float32x2_t a) {
 
 SIMDE_FUNCTION_ATTRIBUTES
 int16_t
-simde_x_vcvts_s16_f16(simde_float16 a) {
-  #if defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_ARM_NEON_FP16)
-    return HEDLEY_STATIC_CAST(int16_t, a);
+simde_vcvth_s16_f16(simde_float16 a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvth_s16_f16(a);
   #else
     simde_float32 af = simde_float16_to_float32(a);
     if (HEDLEY_UNLIKELY(af < HEDLEY_STATIC_CAST(simde_float32, INT16_MIN))) {
@@ -157,12 +157,16 @@ simde_x_vcvts_s16_f16(simde_float16 a) {
     }
   #endif
 }
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvth_s16_f16
+  #define vcvth_s16_f16(a) simde_vcvth_s16_f16(a)
+#endif
 
 SIMDE_FUNCTION_ATTRIBUTES
 uint16_t
-simde_x_vcvts_u16_f16(simde_float16 a) {
-  #if defined(SIMDE_FAST_CONVERSION_RANGE)
-    return HEDLEY_STATIC_CAST(uint16_t, simde_float16_to_float32(a));
+simde_vcvth_u16_f16(simde_float16 a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvth_u16_f16(a);
   #else
     simde_float32 af = simde_float16_to_float32(a);
     if (HEDLEY_UNLIKELY(af < SIMDE_FLOAT32_C(0.0))) {
@@ -176,6 +180,10 @@ simde_x_vcvts_u16_f16(simde_float16 a) {
     }
   #endif
 }
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvth_u16_f16
+  #define vcvth_u16_f16(a) simde_vcvth_u16_f16(a)
+#endif
 
 SIMDE_FUNCTION_ATTRIBUTES
 int32_t
@@ -266,7 +274,7 @@ simde_vcvtd_s64_f64(simde_float64 a) {
       return INT64_MIN;
     } else if (HEDLEY_UNLIKELY(a > HEDLEY_STATIC_CAST(simde_float64, INT64_MAX))) {
       return INT64_MAX;
-    } else if (simde_math_isnanf(a)) {
+    } else if (simde_math_isnan(a)) {
       return 0;
     } else {
       return HEDLEY_STATIC_CAST(int64_t, a);
@@ -344,7 +352,7 @@ simde_vcvt_s16_f16(simde_float16x4_t a) {
     #else
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-        r_.values[i] = simde_x_vcvts_s16_f16(a_.values[i]);
+        r_.values[i] = simde_vcvth_s16_f16(a_.values[i]);
       }
     #endif
 
@@ -396,7 +404,7 @@ simde_vcvt_u16_f16(simde_float16x4_t a) {
     #else
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-        r_.values[i] = simde_x_vcvts_u16_f16(a_.values[i]);
+        r_.values[i] = simde_vcvth_u16_f16(a_.values[i]);
       }
     #endif
 
@@ -501,7 +509,7 @@ simde_vcvtq_s16_f16(simde_float16x8_t a) {
     #else
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-        r_.values[i] = simde_x_vcvts_s16_f16(a_.values[i]);
+        r_.values[i] = simde_vcvth_s16_f16(a_.values[i]);
       }
     #endif
 
@@ -605,7 +613,7 @@ simde_vcvtq_u16_f16(simde_float16x8_t a) {
     #else
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-        r_.values[i] = simde_x_vcvts_u16_f16(a_.values[i]);
+        r_.values[i] = simde_vcvth_u16_f16(a_.values[i]);
       }
     #endif
 
@@ -1182,8 +1190,6 @@ simde_vcvtas_s32_f32(simde_float32 a) {
     } else if (HEDLEY_UNLIKELY(simde_math_isnanf(a))) {
       return 0;
     } else {
-      // Round to Nearest with Ties to Away (a.k.a Rounding away from zero) rounding mode.
-      // For example, 23.2 gets rounded to 24, and −23.2 gets rounded to −24.
       return HEDLEY_STATIC_CAST(int32_t, simde_math_roundf(a));
     }
   #endif
@@ -1199,13 +1205,13 @@ simde_vcvtas_u32_f32(simde_float32 a) {
   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
     return vcvtas_u32_f32(a);
   #else
-    if (HEDLEY_UNLIKELY(a > HEDLEY_STATIC_CAST(simde_float32, UINT32_MAX))) {
+    if (HEDLEY_UNLIKELY(a < SIMDE_FLOAT32_C(0.0))) {
+      return 0;
+    } else if (HEDLEY_UNLIKELY(a >= HEDLEY_STATIC_CAST(simde_float32, UINT32_MAX))) {
       return UINT32_MAX;
     } else if (HEDLEY_UNLIKELY(simde_math_isnanf(a))) {
       return 0;
     } else {
-      // Round to Nearest with Ties to Away (a.k.a Rounding away from zero) rounding mode.
-      // For example, 23.2 gets rounded to 24, and −23.2 gets rounded to −24.
       if(a < 0) return 0;
       return HEDLEY_STATIC_CAST(uint32_t, simde_math_roundf(a));
     }

arm/neon/cvt_n.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_CVT_N_H)
+#define SIMDE_ARM_NEON_CVT_N_H
+
+#include "types.h"
+#include "cvt.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x4_t
+simde_vcvt_n_s16_f16(simde_float16x4_t a, const int n)
+    SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
+  simde_float16x4_private a_ = simde_float16x4_to_private(a);
+  simde_int16x4_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvth_s16_f16(simde_float16_from_float32(
+          simde_float16_to_float32(a_.values[i]) *
+          HEDLEY_STATIC_CAST(float, pow(2, n))));
+  }
+
+  return simde_int16x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vcvt_n_s16_f16(a, n) vcvt_n_s16_f16((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_s16_f16
+  #define vcvt_n_s16_f16(a, n) simde_vcvt_n_s16_f16((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x2_t
+simde_vcvt_n_s32_f32(simde_float32x2_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) {
+  simde_float32x2_private a_ = simde_float32x2_to_private(a);
+  simde_int32x2_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvts_s32_f32(a_.values[i] * HEDLEY_STATIC_CAST(float, pow(2, n)));
+  }
+
+  return simde_int32x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vcvt_n_s32_f32(a, n) vcvt_n_s32_f32((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_s32_f32
+  #define vcvt_n_s32_f32(a, n) simde_vcvt_n_s32_f32((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x1_t
+simde_vcvt_n_s64_f64(simde_float64x1_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) {
+  simde_float64x1_private a_ = simde_float64x1_to_private(a);
+  simde_int64x1_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvtd_s64_f64(a_.values[i] * pow(2, n));
+  }
+
+  return simde_int64x1_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vcvt_n_s64_f64(a, n) vcvt_n_s64_f64((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_s64_f64
+  #define vcvt_n_s64_f64(a, n) simde_vcvt_n_s64_f64((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x4_t
+simde_vcvt_n_u16_f16(simde_float16x4_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
+  simde_float16x4_private a_ = simde_float16x4_to_private(a);
+  simde_uint16x4_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvth_u16_f16(simde_float16_from_float32(
+          simde_float16_to_float32(a_.values[i]) *
+          HEDLEY_STATIC_CAST(float, pow(2, n))));
+  }
+
+  return simde_uint16x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vcvt_n_u16_f16(a, n) vcvt_n_u16_f16((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_u16_f16
+  #define vcvt_n_u16_f16(a, n) simde_vcvt_n_u16_f16((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x2_t
+simde_vcvt_n_u32_f32(simde_float32x2_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) {
+  simde_float32x2_private a_ = simde_float32x2_to_private(a);
+  simde_uint32x2_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvts_u32_f32(a_.values[i] * HEDLEY_STATIC_CAST(float, pow(2, n)));
+  }
+
+  return simde_uint32x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vcvt_n_u32_f32(a, n) vcvt_n_u32_f32((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_u32_f32
+  #define vcvt_n_u32_f32(a, n) simde_vcvt_n_u32_f32((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1_t
+simde_vcvt_n_u64_f64(simde_float64x1_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) {
+  simde_float64x1_private a_ = simde_float64x1_to_private(a);
+  simde_uint64x1_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvtd_u64_f64(a_.values[i] * pow(2, n));
+  }
+
+  return simde_uint64x1_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_46844)
+  #define simde_vcvt_n_u64_f64(a, n) vcvt_n_u64_f64((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_u64_f64
+  #define vcvt_n_u64_f64(a, n) simde_vcvt_n_u64_f64((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x8_t
+simde_vcvtq_n_s16_f16(simde_float16x8_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
+  simde_float16x8_private a_ = simde_float16x8_to_private(a);
+  simde_int16x8_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvth_s16_f16(simde_float16_from_float32(
+          simde_float16_to_float32(a_.values[i]) *
+          HEDLEY_STATIC_CAST(float, pow(2, n))));
+  }
+
+  return simde_int16x8_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vcvtq_n_s16_f16(a, n) vcvtq_n_s16_f16((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_s16_f16
+  #define vcvtq_n_s16_f16(a, n) simde_vcvtq_n_s16_f16((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vcvtq_n_s32_f32(simde_float32x4_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) {
+  simde_float32x4_private a_ = simde_float32x4_to_private(a);
+  simde_int32x4_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvts_s32_f32(a_.values[i] * HEDLEY_STATIC_CAST(float, pow(2, n)));
+  }
+
+  return simde_int32x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vcvtq_n_s32_f32(a, n) vcvtq_n_s32_f32((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_s32_f32
+  #define vcvtq_n_s32_f32(a, n) simde_vcvtq_n_s32_f32((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vcvtq_n_s64_f64(simde_float64x2_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) {
+  simde_float64x2_private a_ = simde_float64x2_to_private(a);
+  simde_int64x2_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvtd_s64_f64(a_.values[i] * pow(2, n));
+  }
+
+  return simde_int64x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vcvtq_n_s64_f64(a, n) vcvtq_n_s64_f64((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_s64_f64
+  #define vcvtq_n_s64_f64(a, n) simde_vcvtq_n_s64_f64((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8_t
+simde_vcvtq_n_u16_f16(simde_float16x8_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
+  simde_float16x8_private a_ = simde_float16x8_to_private(a);
+  simde_uint16x8_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvth_u16_f16(simde_float16_from_float32(
+          simde_float16_to_float32(a_.values[i]) *
+          HEDLEY_STATIC_CAST(float, pow(2, n))));
+  }
+
+  return simde_uint16x8_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+#define simde_vcvtq_n_u16_f16(a, n) vcvtq_n_u16_f16((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_u16_f16
+  #define vcvtq_n_u16_f16(a, n) simde_vcvtq_n_u16_f16((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4_t
+simde_vcvtq_n_u32_f32(simde_float32x4_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) {
+  simde_float32x4_private a_ = simde_float32x4_to_private(a);
+  simde_uint32x4_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvts_u32_f32(a_.values[i] * HEDLEY_STATIC_CAST(float, pow(2, n)));
+  }
+
+  return simde_uint32x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_46844)
+  #define simde_vcvtq_n_u32_f32(a, n) vcvtq_n_u32_f32((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_u32_f32
+  #define vcvtq_n_u32_f32(a, n) simde_vcvtq_n_u32_f32((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vcvtq_n_u64_f64(simde_float64x2_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) {
+  simde_float64x2_private a_ = simde_float64x2_to_private(a);
+  simde_uint64x2_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vcvtd_u64_f64(a_.values[i] * pow(2, n));
+  }
+
+  return simde_uint64x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_46844)
+  #define simde_vcvtq_n_u64_f64(a, n) vcvtq_n_u64_f64((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_u64_f64
+  #define vcvtq_n_u64_f64(a, n) simde_vcvtq_n_u64_f64((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vcvt_n_f16_u16(simde_uint16x4_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
+  simde_uint16x4_private a_ = simde_uint16x4_to_private(a);
+  simde_float16x4_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_float16_from_float32(HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n)));
+  }
+
+  return simde_float16x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vcvt_n_f16_u16(a, n) vcvt_n_f16_u16((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_f16_u16
+  #define vcvt_n_f16_u16(a, n) simde_vcvt_n_f16_u16((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vcvt_n_f16_s16(simde_int16x4_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
+  simde_int16x4_private a_ = simde_int16x4_to_private(a);
+  simde_float16x4_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_float16_from_float32(HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n)));
+  }
+
+  return simde_float16x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vcvt_n_f16_s16(a, n) vcvt_n_f16_s16((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_f16_s16
+  #define vcvt_n_f16_s16(a, n) simde_vcvt_n_f16_s16((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vcvtq_n_f16_u16(simde_uint16x8_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
+  simde_uint16x8_private a_ = simde_uint16x8_to_private(a);
+  simde_float16x8_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_float16_from_float32(HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n)));
+  }
+
+  return simde_float16x8_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vcvtq_n_f16_u16(a, n) vcvtq_n_f16_u16((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_f16_u16
+  #define vcvtq_n_f16_u16(a, n) simde_vcvtq_n_f16_u16((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vcvtq_n_f16_s16(simde_int16x8_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 16) {
+  simde_int16x8_private a_ = simde_int16x8_to_private(a);
+  simde_float16x8_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_float16_from_float32(HEDLEY_STATIC_CAST(simde_float32, (a_.values[i] / pow(2, n))));
+  }
+
+  return simde_float16x8_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vcvtq_n_f16_s16(a, n) vcvtq_n_f16_s16((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_f16_s16
+  #define vcvtq_n_f16_s16(a, n) simde_vcvtq_n_f16_s16((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x2_t
+simde_vcvt_n_f32_u32(simde_uint32x2_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) {
+  simde_uint32x2_private a_ = simde_uint32x2_to_private(a);
+  simde_float32x2_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n));
+  }
+
+  return simde_float32x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vcvt_n_f32_u32(a, n) vcvt_n_f32_u32((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_f32_u32
+  #define vcvt_n_f32_u32(a, n) simde_vcvt_n_f32_u32((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x2_t
+simde_vcvt_n_f32_s32(simde_int32x2_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) {
+  simde_int32x2_private a_ = simde_int32x2_to_private(a);
+  simde_float32x2_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n));
+  }
+
+  return simde_float32x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vcvt_n_f32_s32(a, n) vcvt_n_f32_s32((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_f32_s32
+  #define vcvt_n_f32_s32(a, n) simde_vcvt_n_f32_s32((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x1_t
+simde_vcvt_n_f64_u64(simde_uint64x1_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) {
+  simde_uint64x1_private a_ = simde_uint64x1_to_private(a);
+  simde_float64x1_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n));
+  }
+
+  return simde_float64x1_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vcvt_n_f64_u64(a, n) vcvt_n_f64_u64((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_f64_u64
+  #define vcvt_n_f64_u64(a, n) simde_vcvt_n_f64_u64((a), (n))
+#endif
+
+/* Eric: Skip this function since it will trigger a compiler error when using i686-linux-gnu-g++-11.
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x2_t
+simde_vcvtq_n_f64_u64(simde_uint64x2_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) {
+  simde_uint64x2_private a_ = simde_uint64x2_to_private(a);
+  simde_float64x2_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n));
+  }
+
+  return simde_float64x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vcvtq_n_f64_u64(a, n) vcvtq_n_f64_u64((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_f64_u64
+  #define vcvtq_n_f64_u64(a, n) simde_vcvtq_n_f64_u64((a), (n))
+#endif
+*/
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x1_t
+simde_vcvt_n_f64_s64(simde_int64x1_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) {
+  simde_int64x1_private a_ = simde_int64x1_to_private(a);
+  simde_float64x1_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n));
+  }
+
+  return simde_float64x1_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vcvt_n_f64_s64(a, n) vcvt_n_f64_s64((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvt_n_f64_s64
+  #define vcvt_n_f64_s64(a, n) simde_vcvt_n_f64_s64((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x2_t
+simde_vcvtq_n_f64_s64(simde_int64x2_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 64) {
+  simde_int64x2_private a_ = simde_int64x2_to_private(a);
+  simde_float64x2_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n));
+  }
+
+  return simde_float64x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vcvtq_n_f64_s64(a, n) vcvtq_n_f64_s64((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_f64_s64
+  #define vcvtq_n_f64_s64(a, n) simde_vcvtq_n_f64_s64((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x4_t
+simde_vcvtq_n_f32_s32(simde_int32x4_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) {
+  simde_int32x4_private a_ = simde_int32x4_to_private(a);
+  simde_float32x4_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n));
+  }
+
+  return simde_float32x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vcvtq_n_f32_s32(a, n) vcvtq_n_f32_s32((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_f32_s32
+  #define vcvtq_n_f32_s32(a, n) simde_vcvtq_n_f32_s32((a), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x4_t
+simde_vcvtq_n_f32_u32(simde_uint32x4_t a, const int n)
+   SIMDE_REQUIRE_CONSTANT_RANGE(n, 1, 32) {
+  simde_uint32x4_private a_ = simde_uint32x4_to_private(a);
+  simde_float32x4_private r_;
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(simde_float64, a_.values[i]) / pow(2, n));
+  }
+
+  return simde_float32x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vcvtq_n_f32_u32(a, n) vcvtq_n_f32_u32((a), (n))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcvtq_n_f32_u32
+  #define vcvtq_n_f32_u32(a, n) simde_vcvtq_n_f32_u32((a), (n))
+#endif
+
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* SIMDE_ARM_NEON_CVT_N_H */

arm/neon/cvtn.h

@@ -22,12 +22,16 @@
  *
  * Copyright:
  *   2023      Michael R. Crusoe <crusoe@debian.org>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_CVTN_H)
 #define SIMDE_ARM_NEON_CVTN_H
 
 #include "types.h"
+#include "cvt.h"
+#include "calt.h"
+#include "cagt.h"
 
 HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
@@ -99,6 +103,180 @@ simde_vcvtnq_s64_f64(simde_float64x2_t a) {
   #define vcvtnq_s64_f64(a) simde_vcvtnq_s64_f64(a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_vcvtnh_s64_f16(simde_float16 a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvtnh_s64_f16(a);
+  #elif defined(SIMDE_FAST_CONVERSION_RANGE)
+    return HEDLEY_STATIC_CAST(int64_t, simde_math_roundevenf(simde_float16_to_float32(a)));
+  #else
+    simde_float32 a_ = simde_float16_to_float32(a);
+    if (HEDLEY_UNLIKELY(a_ < HEDLEY_STATIC_CAST(simde_float32, INT64_MIN))) {
+      return INT64_MIN;
+    } else if (HEDLEY_UNLIKELY(a_ > HEDLEY_STATIC_CAST(simde_float32, INT64_MAX))) {
+      return INT64_MAX;
+    } else if (simde_math_isnanf(a_)) {
+      return 0;
+    } else {
+      return HEDLEY_STATIC_CAST(int64_t, simde_math_roundevenf(a_));
+    }
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtnh_s64_f16
+  #define vcvtnh_s64_f16(a) simde_vcvtnh_s64_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_vcvtnh_s32_f16(simde_float16 a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvtnh_s32_f16(a);
+  #elif defined(SIMDE_FAST_CONVERSION_RANGE)
+    return HEDLEY_STATIC_CAST(int32_t, simde_math_roundevenf(simde_float16_to_float32(a)));
+  #else
+    simde_float32 a_ = simde_float16_to_float32(a);
+    if (HEDLEY_UNLIKELY(a_ < HEDLEY_STATIC_CAST(simde_float32, INT32_MIN))) {
+      return INT32_MIN;
+    } else if (HEDLEY_UNLIKELY(a_ > HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) {
+      return INT32_MAX;
+    } else if (simde_math_isnanf(a_)) {
+      return 0;
+    } else {
+      return HEDLEY_STATIC_CAST(int32_t, simde_math_roundevenf(a_));
+    }
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtnh_s32_f16
+  #define vcvtnh_s32_f16(a) simde_vcvtnh_s32_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int16_t
+simde_vcvtnh_s16_f16(simde_float16 a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvtnh_s16_f16(a);
+  #elif defined(SIMDE_FAST_CONVERSION_RANGE)
+    return HEDLEY_STATIC_CAST(int16_t, simde_math_roundevenf(simde_float16_to_float32(a)));
+  #else
+    simde_float32 a_ = simde_float16_to_float32(a);
+    if (HEDLEY_UNLIKELY(a_ < HEDLEY_STATIC_CAST(simde_float32, INT16_MIN))) {
+      return INT16_MIN;
+    } else if (HEDLEY_UNLIKELY(a_ > HEDLEY_STATIC_CAST(simde_float32, INT16_MAX))) {
+      return INT16_MAX;
+    } else if (simde_math_isnanf(a_)) {
+      return 0;
+    } else {
+      return HEDLEY_STATIC_CAST(int16_t, simde_math_roundevenf(a_));
+    }
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtnh_s16_f16
+  #define vcvtnh_s16_f16(a) simde_vcvtnh_s16_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint64_t
+simde_vcvtnh_u64_f16(simde_float16 a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvtnh_u64_f16(a);
+  #elif defined(SIMDE_FAST_CONVERSION_RANGE)
+    return HEDLEY_STATIC_CAST(uint64_t, simde_math_roundevenf(simde_float16_to_float32(a)));
+  #else
+    simde_float32 a_ = simde_float16_to_float32(a);
+    if (HEDLEY_UNLIKELY(a_ < HEDLEY_STATIC_CAST(simde_float32, 0))) {
+      return 0;
+    } else if (HEDLEY_UNLIKELY(a_ > HEDLEY_STATIC_CAST(simde_float32, UINT64_MAX))) {
+      return UINT64_MAX;
+    } else if (simde_math_isnanf(a_)) {
+      return 0;
+    } else {
+      return HEDLEY_STATIC_CAST(uint64_t, simde_math_roundevenf(a_));
+    }
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtnh_u64_f16
+  #define vcvtnh_u64_f16(a) simde_vcvtnh_u64_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint32_t
+simde_vcvtnh_u32_f16(simde_float16 a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvtnh_u32_f16(a);
+  #elif defined(SIMDE_FAST_CONVERSION_RANGE)
+    return HEDLEY_STATIC_CAST(uint32_t, simde_math_roundevenf(simde_float16_to_float32(a)));
+  #else
+    simde_float32 a_ = simde_float16_to_float32(a);
+    if (HEDLEY_UNLIKELY(a_ < HEDLEY_STATIC_CAST(simde_float32, 0))) {
+      return 0;
+    } else if (HEDLEY_UNLIKELY(a_ > HEDLEY_STATIC_CAST(simde_float32, UINT32_MAX))) {
+      return UINT32_MAX;
+    } else if (simde_math_isnanf(a_)) {
+      return 0;
+    } else {
+      return HEDLEY_STATIC_CAST(uint32_t, simde_math_roundevenf(a_));
+    }
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtnh_u32_f16
+  #define vcvtnh_u32_f16(a) simde_vcvtnh_u32_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+uint16_t
+simde_vcvtnh_u16_f16(simde_float16 a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvtnh_u16_f16(a);
+  #elif defined(SIMDE_FAST_CONVERSION_RANGE)
+    return HEDLEY_STATIC_CAST(uint16_t, simde_math_roundevenf(simde_float16_to_float32(a)));
+  #else
+    simde_float32 a_ = simde_float16_to_float32(a);
+    if (HEDLEY_UNLIKELY(a_ < HEDLEY_STATIC_CAST(simde_float32, 0))) {
+      return 0;
+    } else if (HEDLEY_UNLIKELY(a_ > HEDLEY_STATIC_CAST(simde_float32, UINT16_MAX))) {
+      return UINT16_MAX;
+    } else if (simde_math_isnanf(a_)) {
+      return 0;
+    } else {
+      return HEDLEY_STATIC_CAST(uint16_t, simde_math_roundevenf(a_));
+    }
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtnh_u16_f16
+  #define vcvtnh_u16_f16(a) simde_vcvtnh_u16_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_vcvtns_s32_f32(simde_float32 a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcvtns_s32_f32(a);
+  #elif defined(SIMDE_FAST_CONVERSION_RANGE)
+    return HEDLEY_STATIC_CAST(int32_t, simde_math_roundevenf(a));
+  #else
+    if (HEDLEY_UNLIKELY(a < HEDLEY_STATIC_CAST(simde_float32, INT32_MIN))) {
+      return INT32_MIN;
+    } else if (HEDLEY_UNLIKELY(a > HEDLEY_STATIC_CAST(simde_float32, INT32_MAX))) {
+      return INT32_MAX;
+    } else if (HEDLEY_UNLIKELY(simde_math_isnanf(a))) {
+      return 0;
+    } else {
+      return HEDLEY_STATIC_CAST(int32_t, simde_math_roundevenf(a));
+    }
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtns_s32_f32
+  #define vcvtns_s32_f32(a) simde_vcvtns_s32_f32(a)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 uint32_t
 simde_vcvtns_u32_f32(simde_float32 a) {
@@ -111,7 +289,7 @@ simde_vcvtns_u32_f32(simde_float32 a) {
       return 0;
     } else if (HEDLEY_UNLIKELY(a > HEDLEY_STATIC_CAST(simde_float32, UINT32_MAX))) {
       return UINT32_MAX;
-    } else if (simde_math_isnanf(a)) {
+    } else if (HEDLEY_UNLIKELY(simde_math_isnanf(a))) {
       return 0;
     } else {
       return HEDLEY_STATIC_CAST(uint32_t, simde_math_roundevenf(a));
@@ -157,6 +335,30 @@ simde_vcvtnq_u32_f32(simde_float32x4_t a) {
   #define vcvtnq_u32_f32(a) simde_vcvtnq_u32_f32(a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_vcvtnd_s64_f64(simde_float64 a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcvtnd_s64_f64(a);
+  #elif defined(SIMDE_FAST_CONVERSION_RANGE)
+    return HEDLEY_STATIC_CAST(int64_t, simde_math_roundeven(a));
+  #else
+    if (HEDLEY_UNLIKELY(a < HEDLEY_STATIC_CAST(simde_float64, INT64_MIN))) {
+      return INT64_MIN;
+    } else if (HEDLEY_UNLIKELY(a > HEDLEY_STATIC_CAST(simde_float64, INT64_MAX))) {
+      return INT64_MAX;
+    } else if (simde_math_isnan(a)) {
+      return 0;
+    } else {
+      return HEDLEY_STATIC_CAST(int64_t, simde_math_roundeven(a));
+    }
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtnd_s64_f64
+  #define vcvtnd_s64_f64(a) simde_vcvtnd_s64_f64(a)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 uint64_t
 simde_vcvtnd_u64_f64(simde_float64 a) {
@@ -215,6 +417,182 @@ simde_vcvtnq_u64_f64(simde_float64x2_t a) {
   #define vcvtnq_u64_f64(a) simde_vcvtnq_u64_f64(a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x8_t
+simde_vcvtnq_s16_f16(simde_float16x8_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvtnq_s16_f16(a);
+  #else
+    simde_float16x8_private a_ = simde_float16x8_to_private(a);
+    simde_int16x8_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vcvtnh_s16_f16(a_.values[i]);
+    }
+
+    return simde_int16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtnq_s16_f16
+  #define vcvtnq_s16_f16(a) simde_vcvtnq_s16_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x4_t
+simde_vcvtn_s16_f16(simde_float16x4_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvtn_s16_f16(a);
+  #else
+    simde_float16x4_private a_ = simde_float16x4_to_private(a);
+    simde_int16x4_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vcvtnh_s16_f16(a_.values[i]);
+    }
+
+    return simde_int16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtn_s16_f16
+  #define vcvtn_s16_f16(a) simde_vcvtn_s16_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8_t
+simde_vcvtnq_u16_f16(simde_float16x8_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvtnq_u16_f16(a);
+  #else
+    simde_float16x8_private a_ = simde_float16x8_to_private(a);
+    simde_uint16x8_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vcvtnh_u16_f16(a_.values[i]);
+    }
+
+    return simde_uint16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtnq_u16_f16
+  #define vcvtnq_u16_f16(a) simde_vcvtnq_u16_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x4_t
+simde_vcvtn_u16_f16(simde_float16x4_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvtn_u16_f16(a);
+  #else
+    simde_float16x4_private a_ = simde_float16x4_to_private(a);
+    simde_uint16x4_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vcvtnh_u16_f16(a_.values[i]);
+    }
+
+    return simde_uint16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtn_u16_f16
+  #define vcvtn_u16_f16(a) simde_vcvtn_u16_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x2_t
+simde_vcvtn_u32_f32(simde_float32x2_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vcvtn_u32_f32(a);
+  #else
+    simde_float32x2_private a_ = simde_float32x2_to_private(a);
+    simde_uint32x2_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vcvtns_u32_f32(a_.values[i]);
+    }
+
+    return simde_uint32x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtn_u32_f32
+  #define vcvtn_u32_f32(a) simde_vcvtn_u32_f32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x2_t
+simde_vcvtn_s32_f32(simde_float32x2_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vcvtn_s32_f32(a);
+  #else
+    simde_float32x2_private a_ = simde_float32x2_to_private(a);
+    simde_int32x2_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vcvtns_s32_f32(a_.values[i]);
+    }
+
+    return simde_int32x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtn_s32_f32
+  #define vcvtn_s32_f32(a) simde_vcvtn_s32_f32(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x1_t
+simde_vcvtn_s64_f64(simde_float64x1_t a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcvtn_s64_f64(a);
+  #else
+    simde_float64x1_private a_ = simde_float64x1_to_private(a);
+    simde_int64x1_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vcvtnd_s64_f64(a_.values[i]);
+    }
+
+    return simde_int64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtn_s64_f64
+  #define vcvtn_s64_f64(a) simde_vcvtn_s64_f64(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1_t
+simde_vcvtn_u64_f64(simde_float64x1_t a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vcvtn_u64_f64(a);
+  #else
+    simde_float64x1_private a_ = simde_float64x1_to_private(a);
+    simde_uint64x1_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vcvtnd_u64_f64(a_.values[i]);
+    }
+
+    return simde_uint64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvtn_u64_f64
+  #define vcvtn_u64_f64(a) simde_vcvtn_u64_f64(a)
+#endif
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/dup_lane.h

@@ -22,6 +22,7 @@
  *
  * Copyright:
  *   2020-2021 Evan Nemerson <evan@nemerson.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_DUP_LANE_H)
@@ -146,6 +147,46 @@ simde_vdupd_lane_u64(simde_uint64x1_t vec, const int lane)
   #define vdupd_lane_u64(vec, lane) simde_vdupd_lane_u64((vec), (lane))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16_t
+simde_vduph_lane_f16(simde_float16x4_t vec, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  return simde_float16x4_to_private(vec).values[lane];
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vduph_lane_f16(vec, lane) vduph_lane_f16(vec, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vduph_lane_f16
+  #define vduph_lane_f16(vec, lane) simde_vduph_lane_f16((vec), (lane))
+#endif
+
+// simde_vdup_lane_f16
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vdup_lane_f16(vec, lane) vdup_lane_f16(vec, lane)
+#else
+  #define simde_vdup_lane_f16(vec, lane) simde_vdup_n_f16(simde_vduph_lane_f16(vec, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vdup_lane_f16
+  #define vdup_lane_f16(vec, lane) simde_vdup_lane_f16((vec), (lane))
+#endif
+
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vdupq_lane_f16(simde_float16x4_t vec, const int lane)
+  SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  return simde_vdupq_n_f16(simde_float16x4_to_private(vec).values[lane]);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+#define simde_vdupq_lane_f16(vec, lane) vdupq_lane_f16(vec, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vdupq_lane_f16
+  #define vdupq_lane_f16(vec, lane) simde_vdupq_lane_f16((vec), (lane))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float64_t
 simde_vdupd_lane_f64(simde_float64x1_t vec, const int lane)

arm/neon/ext.h

@@ -34,6 +34,32 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vext_f16(simde_float16x4_t a, simde_float16x4_t b, const int n)
+    SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 3) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    simde_float16x4_t r;
+    SIMDE_CONSTIFY_4_(vext_f16, r, (HEDLEY_UNREACHABLE(), a), n, a, b);
+    return r;
+  #else
+    simde_float16x4_private
+      a_ = simde_float16x4_to_private(a),
+      b_ = simde_float16x4_to_private(b),
+      r_ = a_;
+    const size_t n_ = HEDLEY_STATIC_CAST(size_t, n);
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      size_t src = i + n_;
+      r_.values[i] = (src < (sizeof(r_.values) / sizeof(r_.values[0]))) ? a_.values[src] : b_.values[src & 3];
+    }
+    return simde_float16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vext_f16
+  #define vext_f16(a, b, n) simde_vext_f16((a), (b), (n))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vext_f32(simde_float32x2_t a, simde_float32x2_t b, const int n)

arm/neon/fma.h

@@ -35,6 +35,20 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16_t
+simde_vfmah_f16(simde_float16_t a, simde_float16_t b, simde_float16_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+    return vfmah_f16(a, b, c);
+  #else
+    return simde_vaddh_f16(a, simde_vmulh_f16(b, c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmah_f16
+  #define vfmah_f16(a, b, c) simde_vfmah_f16(a, b, c)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vfma_f32(simde_float32x2_t a, simde_float32x2_t b, simde_float32x2_t c) {
@@ -63,6 +77,20 @@ simde_vfma_f64(simde_float64x1_t a, simde_float64x1_t b, simde_float64x1_t c) {
   #define vfma_f64(a, b, c) simde_vfma_f64(a, b, c)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vfma_f16(simde_float16x4_t a, simde_float16x4_t b, simde_float16x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+    return vfma_f16(a, b, c);
+  #else
+    return simde_vadd_f16(a, simde_vmul_f16(b, c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vfma_f16
+  #define vfma_f16(a, b, c) simde_vfma_f16(a, b, c)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float16x8_t
 simde_vfmaq_f16(simde_float16x8_t a, simde_float16x8_t b, simde_float16x8_t c) {

arm/neon/fma_lane.h

@@ -22,6 +22,7 @@
 *
 * Copyright:
 *   2021      Atharva Nimbalkar <atharvakn@gmail.com>
+*   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
 */
 
 #if !defined(SIMDE_ARM_NEON_FMA_LANE_H)
@@ -83,6 +84,52 @@ SIMDE_BEGIN_DECLS_
   #define vfmad_laneq_f64(a, b, v, lane) simde_vfmad_laneq_f64(a, b, v, lane)
 #endif
 
+/* simde_vfmah_lane_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+    #define simde_vfmah_lane_f16(a, b, v, lane) \
+    SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vfmah_lane_f16(a, b, v, lane))
+  #else
+    #define simde_vfmah_lane_f16(a, b, v, lane) vfmah_lane_f16((a), (b), (v), (lane))
+  #endif
+#else
+  #define simde_vfmah_lane_f16(a, b, v, lane) \
+  simde_vget_lane_f16( \
+    simde_vadd_f16( \
+      simde_vdup_n_f16(a), \
+      simde_vdup_n_f16(simde_vmulh_lane_f16(b, v, lane)) \
+    ), \
+    0 \
+  )
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmah_lane_f16
+  #define vfmah_lane_f16(a, b, v, lane) simde_vfmah_lane_f16(a, b, v, lane)
+#endif
+
+/* simde_vfmah_laneq_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+    #define simde_vfmah_laneq_f16(a, b, v, lane) \
+    SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vfmah_laneq_f16(a, b, v, lane))
+  #else
+    #define simde_vfmah_laneq_f16(a, b, v, lane) vfmah_laneq_f16((a), (b), (v), (lane))
+  #endif
+#else
+  #define simde_vfmah_laneq_f16(a, b, v, lane) \
+  simde_vget_lane_f16( \
+    simde_vadd_f16( \
+      simde_vdup_n_f16(a), \
+      simde_vdup_n_f16(simde_vmulh_laneq_f16(b, v, lane)) \
+    ), \
+    0 \
+  )
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmah_laneq_f16
+  #define vfmah_laneq_f16(a, b, v, lane) simde_vfmah_laneq_f16(a, b, v, lane)
+#endif
+
 /* simde_vfmas_lane_f32 */
 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
   #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
@@ -129,6 +176,17 @@ SIMDE_BEGIN_DECLS_
   #define vfmas_laneq_f32(a, b, v, lane) simde_vfmas_laneq_f32(a, b, v, lane)
 #endif
 
+/* simde_vfma_lane_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vfma_lane_f16(a, b, v, lane) vfma_lane_f16(a, b, v, lane)
+#else
+  #define simde_vfma_lane_f16(a, b, v, lane) simde_vadd_f16(a, simde_vmul_lane_f16(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfma_lane_f16
+  #define vfma_lane_f16(a, b, v, lane) simde_vfma_lane_f16(a, b, v, lane)
+#endif
+
 /* simde_vfma_lane_f32 */
 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
   #define simde_vfma_lane_f32(a, b, v, lane) vfma_lane_f32(a, b, v, lane)
@@ -151,6 +209,17 @@ SIMDE_BEGIN_DECLS_
   #define vfma_lane_f64(a, b, v, lane) simde_vfma_lane_f64(a, b, v, lane)
 #endif
 
+/* simde_vfma_laneq_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vfma_laneq_f16(a, b, v, lane) vfma_laneq_f16((a), (b), (v), (lane))
+#else
+  #define simde_vfma_laneq_f16(a, b, v, lane) simde_vadd_f16(a, simde_vmul_laneq_f16(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfma_laneq_f16
+  #define vfma_laneq_f16(a, b, v, lane) simde_vfma_laneq_f16(a, b, v, lane)
+#endif
+
 /* simde_vfma_laneq_f32 */
 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
   #define simde_vfma_laneq_f32(a, b, v, lane) vfma_laneq_f32((a), (b), (v), (lane))
@@ -184,6 +253,17 @@ SIMDE_BEGIN_DECLS_
   #define vfmaq_lane_f64(a, b, v, lane) simde_vfmaq_lane_f64(a, b, v, lane)
 #endif
 
+/* simde_vfmaq_lane_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vfmaq_lane_f16(a, b, v, lane) vfmaq_lane_f16((a), (b), (v), (lane))
+#else
+  #define simde_vfmaq_lane_f16(a, b, v, lane) simde_vaddq_f16(a, simde_vmulq_lane_f16(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmaq_lane_f16
+  #define vfmaq_lane_f16(a, b, v, lane) simde_vfmaq_lane_f16(a, b, v, lane)
+#endif
+
 /* simde_vfmaq_lane_f32 */
 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
   #define simde_vfmaq_lane_f32(a, b, v, lane) vfmaq_lane_f32((a), (b), (v), (lane))
@@ -195,6 +275,18 @@ SIMDE_BEGIN_DECLS_
   #define vfmaq_lane_f32(a, b, v, lane) simde_vfmaq_lane_f32(a, b, v, lane)
 #endif
 
+/* simde_vfmaq_laneq_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vfmaq_laneq_f16(a, b, v, lane) vfmaq_laneq_f16((a), (b), (v), (lane))
+#else
+  #define simde_vfmaq_laneq_f16(a, b, v, lane) \
+  simde_vaddq_f16(a, simde_vmulq_laneq_f16(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmaq_laneq_f16
+  #define vfmaq_laneq_f16(a, b, v, lane) simde_vfmaq_laneq_f16(a, b, v, lane)
+#endif
+
 /* simde_vfmaq_laneq_f32 */
 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
   #define simde_vfmaq_laneq_f32(a, b, v, lane) vfmaq_laneq_f32((a), (b), (v), (lane))

arm/neon/fma_n.h

@@ -22,6 +22,7 @@
 *
 * Copyright:
 *   2021      Evan Nemerson <evan@nemerson.com>
+*   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
 */
 
 #if !defined(SIMDE_ARM_NEON_FMA_N_H)
@@ -35,6 +36,34 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vfma_n_f16(simde_float16x4_t a, simde_float16x4_t b, simde_float16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16)
+    return vfma_n_f16(a, b, c);
+  #else
+    return simde_vfma_f16(a, b, simde_vdup_n_f16(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfma_n_f16
+  #define vfma_n_f16(a, b, c) simde_vfma_n_f16(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vfmaq_n_f16(simde_float16x8_t a, simde_float16x8_t b, simde_float16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16)
+    return vfmaq_n_f16(a, b, c);
+  #else
+    return simde_vfmaq_f16(a, b, simde_vdupq_n_f16(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmaq_n_f16
+  #define vfmaq_n_f16(a, b, c) simde_vfmaq_n_f16(a, b, c)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vfma_n_f32(simde_float32x2_t a, simde_float32x2_t b, simde_float32_t c) {

arm/neon/fms.h

+/* SPDX-License-Identifier: MIT
+*
+* Permission is hereby granted, free of charge, to any person
+* obtaining a copy of this software and associated documentation
+* files (the "Software"), to deal in the Software without
+* restriction, including without limitation the rights to use, copy,
+* modify, merge, publish, distribute, sublicense, and/or sell copies
+* of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be
+* included in all copies or substantial portions of the Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Copyright:
+*   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+*/
+
+#if !defined(SIMDE_ARM_NEON_FMS_H)
+#define SIMDE_ARM_NEON_FMS_H
+
+#include "add.h"
+#include "mul.h"
+#include "neg.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16_t
+simde_vfmsh_f16(simde_float16_t a, simde_float16_t b, simde_float16_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+    return vfmsh_f16(a, b, c);
+  #else
+    return simde_vaddh_f16(a, simde_vnegh_f16(simde_vmulh_f16(b, c)));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsh_f16
+  #define vfmsh_f16(a, b, c) simde_vfmsh_f16(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x2_t
+simde_vfms_f32(simde_float32x2_t a, simde_float32x2_t b, simde_float32x2_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+    return vfms_f32(a, b, c);
+  #else
+    return simde_vadd_f32(a, simde_vneg_f32(simde_vmul_f32(b, c)));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vfms_f32
+  #define vfms_f32(a, b, c) simde_vfms_f32(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x1_t
+simde_vfms_f64(simde_float64x1_t a, simde_float64x1_t b, simde_float64x1_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+    return vfms_f64(a, b, c);
+  #else
+    return simde_vadd_f64(a, simde_vneg_f64(simde_vmul_f64(b, c)));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vfms_f64
+  #define vfms_f64(a, b, c) simde_vfms_f64(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vfms_f16(simde_float16x4_t a, simde_float16x4_t b, simde_float16x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+    return vfms_f16(a, b, c);
+  #else
+    return simde_vadd_f16(a, simde_vneg_f16(simde_vmul_f16(b, c)));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vfms_f16
+  #define vfms_f16(a, b, c) simde_vfms_f16(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vfmsq_f16(simde_float16x8_t a, simde_float16x8_t b, simde_float16x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+    return vfmsq_f16(a, b, c);
+  #else
+    return simde_vaddq_f16(a, simde_vnegq_f16(simde_vmulq_f16(b, c)));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_f16
+  #define vfmsq_f16(a, b, c) simde_vfmsq_f16(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x4_t
+simde_vfmsq_f32(simde_float32x4_t a, simde_float32x4_t b, simde_float32x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+    return vfmsq_f32(a, b, c);
+  #else
+    return simde_vaddq_f32(a, simde_vnegq_f32(simde_vmulq_f32(b, c)));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_f32
+  #define vfmsq_f32(a, b, c) simde_vfmsq_f32(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x2_t
+simde_vfmsq_f64(simde_float64x2_t a, simde_float64x2_t b, simde_float64x2_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+    return vfmsq_f64(a, b, c);
+  #else
+    return simde_vaddq_f64(a, simde_vnegq_f64(simde_vmulq_f64(b, c)));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_f64
+  #define vfmsq_f64(a, b, c) simde_vfmsq_f64(a, b, c)
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_FMS_H) */

arm/neon/fms_lane.h

+/* SPDX-License-Identifier: MIT
+*
+* Permission is hereby granted, free of charge, to any person
+* obtaining a copy of this software and associated documentation
+* files (the "Software"), to deal in the Software without
+* restriction, including without limitation the rights to use, copy,
+* modify, merge, publish, distribute, sublicense, and/or sell copies
+* of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be
+* included in all copies or substantial portions of the Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Copyright:
+*   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+*/
+
+#if !defined(SIMDE_ARM_NEON_FMS_LANE_H)
+#define SIMDE_ARM_NEON_FMS_LANE_H
+
+#include "sub.h"
+#include "dup_n.h"
+#include "get_lane.h"
+#include "mul.h"
+#include "mul_lane.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+/* simde_vfmsd_lane_f64 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+    #define simde_vfmsd_lane_f64(a, b, v, lane) \
+    SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vfmsd_lane_f64(a, b, v, lane))
+  #else
+    #define simde_vfmsd_lane_f64(a, b, v, lane) vfmsd_lane_f64((a), (b), (v), (lane))
+  #endif
+#else
+  #define simde_vfmsd_lane_f64(a, b, v, lane) \
+  simde_vget_lane_f64( \
+    simde_vsub_f64( \
+      simde_vdup_n_f64(a), \
+      simde_vdup_n_f64(simde_vmuld_lane_f64(b, v, lane)) \
+    ), \
+    0 \
+  )
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsd_lane_f64
+  #define vfmsd_lane_f64(a, b, v, lane) simde_vfmsd_lane_f64(a, b, v, lane)
+#endif
+
+/* simde_vfmsd_laneq_f64 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+    #define simde_vfmsd_laneq_f64(a, b, v, lane) \
+    SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vfmsd_laneq_f64(a, b, v, lane))
+  #else
+    #define simde_vfmsd_laneq_f64(a, b, v, lane) vfmsd_laneq_f64((a), (b), (v), (lane))
+  #endif
+#else
+  #define simde_vfmsd_laneq_f64(a, b, v, lane) \
+  simde_vget_lane_f64( \
+    simde_vsub_f64( \
+      simde_vdup_n_f64(a), \
+      simde_vdup_n_f64(simde_vmuld_laneq_f64(b, v, lane)) \
+    ), \
+    0 \
+  )
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsd_laneq_f64
+  #define vfmsd_laneq_f64(a, b, v, lane) simde_vfmsd_laneq_f64(a, b, v, lane)
+#endif
+
+/* simde_vfmsh_lane_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+    #define simde_vfmsh_lane_f16(a, b, v, lane) \
+    SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vfmsh_lane_f16(a, b, v, lane))
+  #else
+    #define simde_vfmsh_lane_f16(a, b, v, lane) vfmsh_lane_f16((a), (b), (v), (lane))
+  #endif
+#else
+  #define simde_vfmsh_lane_f16(a, b, v, lane) \
+  simde_vget_lane_f16( \
+    simde_vsub_f16( \
+      simde_vdup_n_f16(a), \
+      simde_vdup_n_f16(simde_vmulh_lane_f16(b, v, lane)) \
+    ), \
+    0 \
+  )
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsh_lane_f16
+  #define vfmsh_lane_f16(a, b, v, lane) simde_vfmsh_lane_f16(a, b, v, lane)
+#endif
+
+/* simde_vfmsh_laneq_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+    #define simde_vfmsh_laneq_f16(a, b, v, lane) \
+    SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vfmsh_laneq_f16(a, b, v, lane))
+  #else
+    #define simde_vfmsh_laneq_f16(a, b, v, lane) vfmsh_laneq_f16((a), (b), (v), (lane))
+  #endif
+#else
+  #define simde_vfmsh_laneq_f16(a, b, v, lane) \
+  simde_vget_lane_f16( \
+    simde_vsub_f16( \
+      simde_vdup_n_f16(a), \
+      simde_vdup_n_f16(simde_vmulh_laneq_f16(b, v, lane)) \
+    ), \
+    0 \
+  )
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsh_laneq_f16
+  #define vfmsh_laneq_f16(a, b, v, lane) simde_vfmsh_laneq_f16(a, b, v, lane)
+#endif
+
+/* simde_vfmss_lane_f32 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+    #define simde_vfmss_lane_f32(a, b, v, lane) \
+    SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vfmss_lane_f32(a, b, v, lane))
+  #else
+    #define simde_vfmss_lane_f32(a, b, v, lane) vfmss_lane_f32((a), (b), (v), (lane))
+  #endif
+#else
+  #define simde_vfmss_lane_f32(a, b, v, lane) \
+  simde_vget_lane_f32( \
+    simde_vsub_f32( \
+      simde_vdup_n_f32(a), \
+      simde_vdup_n_f32(simde_vmuls_lane_f32(b, v, lane)) \
+    ), \
+    0 \
+  )
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmss_lane_f32
+  #define vfmss_lane_f32(a, b, v, lane) simde_vfmss_lane_f32(a, b, v, lane)
+#endif
+
+/* simde_vfmss_laneq_f32 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+    #define simde_vfmss_laneq_f32(a, b, v, lane) \
+    SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vfmss_laneq_f32(a, b, v, lane))
+  #else
+    #define simde_vfmss_laneq_f32(a, b, v, lane) vfmss_laneq_f32((a), (b), (v), (lane))
+  #endif
+#else
+  #define simde_vfmss_laneq_f32(a, b, v, lane) \
+  simde_vget_lane_f32( \
+    simde_vsub_f32( \
+      simde_vdup_n_f32(a), \
+      simde_vdup_n_f32(simde_vmuls_laneq_f32(b, v, lane)) \
+    ), \
+    0 \
+  )
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmss_laneq_f32
+  #define vfmss_laneq_f32(a, b, v, lane) simde_vfmss_laneq_f32(a, b, v, lane)
+#endif
+
+/* simde_vfms_lane_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vfms_lane_f16(a, b, v, lane) vfms_lane_f16(a, b, v, lane)
+#else
+  #define simde_vfms_lane_f16(a, b, v, lane) simde_vsub_f16(a, simde_vmul_lane_f16(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfms_lane_f16
+  #define vfms_lane_f16(a, b, v, lane) simde_vfms_lane_f16(a, b, v, lane)
+#endif
+
+/* simde_vfms_lane_f32 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #define simde_vfms_lane_f32(a, b, v, lane) vfms_lane_f32(a, b, v, lane)
+#else
+  #define simde_vfms_lane_f32(a, b, v, lane) simde_vsub_f32(a, simde_vmul_lane_f32(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfms_lane_f32
+  #define vfms_lane_f32(a, b, v, lane) simde_vfms_lane_f32(a, b, v, lane)
+#endif
+
+/* simde_vfms_lane_f64 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #define simde_vfms_lane_f64(a, b, v, lane) vfms_lane_f64((a), (b), (v), (lane))
+#else
+  #define simde_vfms_lane_f64(a, b, v, lane) simde_vsub_f64(a, simde_vmul_lane_f64(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfms_lane_f64
+  #define vfms_lane_f64(a, b, v, lane) simde_vfms_lane_f64(a, b, v, lane)
+#endif
+
+/* simde_vfms_laneq_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vfms_laneq_f16(a, b, v, lane) vfms_laneq_f16((a), (b), (v), (lane))
+#else
+  #define simde_vfms_laneq_f16(a, b, v, lane) simde_vsub_f16(a, simde_vmul_laneq_f16(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfms_laneq_f16
+  #define vfms_laneq_f16(a, b, v, lane) simde_vfms_laneq_f16(a, b, v, lane)
+#endif
+
+/* simde_vfms_laneq_f32 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #define simde_vfms_laneq_f32(a, b, v, lane) vfms_laneq_f32((a), (b), (v), (lane))
+#else
+  #define simde_vfms_laneq_f32(a, b, v, lane) simde_vsub_f32(a, simde_vmul_laneq_f32(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfms_laneq_f32
+  #define vfms_laneq_f32(a, b, v, lane) simde_vfms_laneq_f32(a, b, v, lane)
+#endif
+
+/* simde_vfms_laneq_f64 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #define simde_vfms_laneq_f64(a, b, v, lane) vfms_laneq_f64((a), (b), (v), (lane))
+#else
+  #define simde_vfms_laneq_f64(a, b, v, lane) simde_vsub_f64(a, simde_vmul_laneq_f64(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfms_laneq_f64
+  #define vfms_laneq_f64(a, b, v, lane) simde_vfms_laneq_f64(a, b, v, lane)
+#endif
+
+/* simde_vfmsq_lane_f64 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #define simde_vfmsq_lane_f64(a, b, v, lane) vfmsq_lane_f64((a), (b), (v), (lane))
+#else
+  #define simde_vfmsq_lane_f64(a, b, v, lane) simde_vsubq_f64(a, simde_vmulq_lane_f64(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_lane_f64
+  #define vfmsq_lane_f64(a, b, v, lane) simde_vfmsq_lane_f64(a, b, v, lane)
+#endif
+
+/* simde_vfmsq_lane_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vfmsq_lane_f16(a, b, v, lane) vfmsq_lane_f16((a), (b), (v), (lane))
+#else
+  #define simde_vfmsq_lane_f16(a, b, v, lane) simde_vsubq_f16(a, simde_vmulq_lane_f16(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_lane_f16
+  #define vfmsq_lane_f16(a, b, v, lane) simde_vfmsq_lane_f16(a, b, v, lane)
+#endif
+
+/* simde_vfmsq_lane_f32 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #define simde_vfmsq_lane_f32(a, b, v, lane) vfmsq_lane_f32((a), (b), (v), (lane))
+#else
+  #define simde_vfmsq_lane_f32(a, b, v, lane) simde_vsubq_f32(a, simde_vmulq_lane_f32(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_lane_f32
+  #define vfmsq_lane_f32(a, b, v, lane) simde_vfmsq_lane_f32(a, b, v, lane)
+#endif
+
+/* simde_vfmsq_laneq_f16 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vfmsq_laneq_f16(a, b, v, lane) vfmsq_laneq_f16((a), (b), (v), (lane))
+#else
+  #define simde_vfmsq_laneq_f16(a, b, v, lane) \
+  simde_vsubq_f16(a, simde_vmulq_laneq_f16(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_laneq_f16
+  #define vfmsq_laneq_f16(a, b, v, lane) simde_vfmsq_laneq_f16(a, b, v, lane)
+#endif
+
+/* simde_vfmsq_laneq_f32 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #define simde_vfmsq_laneq_f32(a, b, v, lane) vfmsq_laneq_f32((a), (b), (v), (lane))
+#else
+  #define simde_vfmsq_laneq_f32(a, b, v, lane) \
+  simde_vsubq_f32(a, simde_vmulq_laneq_f32(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_laneq_f32
+  #define vfmsq_laneq_f32(a, b, v, lane) simde_vfmsq_laneq_f32(a, b, v, lane)
+#endif
+
+/* simde_vfmsq_laneq_f64 */
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
+  #define simde_vfmsq_laneq_f64(a, b, v, lane) vfmsq_laneq_f64((a), (b), (v), (lane))
+#else
+  #define simde_vfmsq_laneq_f64(a, b, v, lane) \
+  simde_vsubq_f64(a, simde_vmulq_laneq_f64(b, v, lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_laneq_f64
+  #define vfmsq_laneq_f64(a, b, v, lane) simde_vfmsq_laneq_f64(a, b, v, lane)
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_FMS_LANE_H) */

arm/neon/fms_n.h

+/* SPDX-License-Identifier: MIT
+*
+* Permission is hereby granted, free of charge, to any person
+* obtaining a copy of this software and associated documentation
+* files (the "Software"), to deal in the Software without
+* restriction, including without limitation the rights to use, copy,
+* modify, merge, publish, distribute, sublicense, and/or sell copies
+* of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be
+* included in all copies or substantial portions of the Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Copyright:
+*   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+*/
+
+#if !defined(SIMDE_ARM_NEON_FMS_N_H)
+#define SIMDE_ARM_NEON_FMS_N_H
+
+#include "types.h"
+#include "dup_n.h"
+#include "fms.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vfms_n_f16(simde_float16x4_t a, simde_float16x4_t b, simde_float16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16)
+    return vfms_n_f16(a, b, c);
+  #else
+    return simde_vfms_f16(a, b, simde_vdup_n_f16(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfms_n_f16
+  #define vfms_n_f16(a, b, c) simde_vfms_n_f16(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vfmsq_n_f16(simde_float16x8_t a, simde_float16x8_t b, simde_float16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399) && defined(SIMDE_ARM_NEON_FP16)
+    return vfmsq_n_f16(a, b, c);
+  #else
+    return simde_vfmsq_f16(a, b, simde_vdupq_n_f16(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_n_f16
+  #define vfmsq_n_f16(a, b, c) simde_vfmsq_n_f16(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x2_t
+simde_vfms_n_f32(simde_float32x2_t a, simde_float32x2_t b, simde_float32_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399)
+    return vfms_n_f32(a, b, c);
+  #else
+    return simde_vfms_f32(a, b, simde_vdup_n_f32(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vfms_n_f32
+  #define vfms_n_f32(a, b, c) simde_vfms_n_f32(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x1_t
+simde_vfms_n_f64(simde_float64x1_t a, simde_float64x1_t b, simde_float64_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))
+    return vfms_n_f64(a, b, c);
+  #else
+    return simde_vfms_f64(a, b, simde_vdup_n_f64(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vfms_n_f64
+  #define vfms_n_f64(a, b, c) simde_vfms_n_f64(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x4_t
+simde_vfmsq_n_f32(simde_float32x4_t a, simde_float32x4_t b, simde_float32_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0)) && !defined(SIMDE_BUG_GCC_95399)
+    return vfmsq_n_f32(a, b, c);
+  #else
+    return simde_vfmsq_f32(a, b, simde_vdupq_n_f32(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_n_f32
+  #define vfmsq_n_f32(a, b, c) simde_vfmsq_n_f32(a, b, c)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x2_t
+simde_vfmsq_n_f64(simde_float64x2_t a, simde_float64x2_t b, simde_float64_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_FMA) && (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0))
+    return vfmsq_n_f64(a, b, c);
+  #else
+    return simde_vfmsq_f64(a, b, simde_vdupq_n_f64(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vfmsq_n_f64
+  #define vfmsq_n_f64(a, b, c) simde_vfmsq_n_f64(a, b, c)
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_FMS_N_H) */

arm/neon/get_lane.h

@@ -276,7 +276,7 @@ simde_vgetq_lane_f16(simde_float16x8_t v, const int lane)
   simde_float16_t r;
 
   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
-    SIMDE_CONSTIFY_8_(vget_lane_f16, r, (HEDLEY_UNREACHABLE(), SIMDE_FLOAT16_VALUE(0.0)), lane, v);
+    SIMDE_CONSTIFY_8_(vgetq_lane_f16, r, (HEDLEY_UNREACHABLE(), SIMDE_FLOAT16_VALUE(0.0)), lane, v);
   #else
     simde_float16x8_private v_ = simde_float16x8_to_private(v);
 

arm/neon/ld1_dup.h

@@ -36,6 +36,20 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vld1_dup_f16(simde_float16 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vld1_dup_f16(ptr);
+  #else
+    return simde_vdup_n_f16(*ptr);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_dup_f16
+  #define vld1_dup_f16(a) simde_vld1_dup_f16((a))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vld1_dup_f32(simde_float32 const * ptr) {

arm/neon/ld1_lane.h

@@ -22,6 +22,7 @@
  *
  * Copyright:
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD1_LANE_H)
@@ -161,6 +162,22 @@ simde_uint64x1_t simde_vld1_lane_u64(uint64_t const *ptr, simde_uint64x1_t src,
   #define vld1_lane_u64(ptr, src, lane) simde_vld1_lane_u64((ptr), (src), (lane))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t simde_vld1_lane_f16(simde_float16_t const *ptr, simde_float16x4_t src,
+                                     const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_float16x4_private r = simde_float16x4_to_private(src);
+  r.values[lane] = *ptr;
+  return simde_float16x4_from_private(r);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vld1_lane_f16(ptr, src, lane) vld1_lane_f16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_lane_f16
+  #define vld1_lane_f16(ptr, src, lane) simde_vld1_lane_f16((ptr), (src), (lane))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t simde_vld1_lane_f32(simde_float32_t const *ptr, simde_float32x2_t src,
                                      const int lane)
@@ -321,6 +338,22 @@ simde_uint64x2_t simde_vld1q_lane_u64(uint64_t const *ptr, simde_uint64x2_t src,
   #define vld1q_lane_u64(ptr, src, lane) simde_vld1q_lane_u64((ptr), (src), (lane))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t simde_vld1q_lane_f16(simde_float16_t const *ptr, simde_float16x8_t src,
+                                     const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_float16x8_private r = simde_float16x8_to_private(src);
+  r.values[lane] = *ptr;
+  return simde_float16x8_from_private(r);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vld1q_lane_f16(ptr, src, lane) vld1q_lane_f16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_lane_f16
+  #define vld1q_lane_f16(ptr, src, lane) simde_vld1q_lane_f16((ptr), (src), (lane))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x4_t simde_vld1q_lane_f32(simde_float32_t const *ptr, simde_float32x4_t src,
                                      const int lane)

arm/neon/ld1_x2.h

@@ -24,6 +24,7 @@
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
  *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD1_X2_H)
@@ -40,6 +41,29 @@ SIMDE_BEGIN_DECLS_
 
 #if !defined(SIMDE_BUG_INTEL_857088)
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x2_t
+simde_vld1_f16_x2(simde_float16 const ptr[HEDLEY_ARRAY_PARAM(8)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
+      (!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1_f16_x2(ptr);
+  #else
+    simde_float16x4_private a_[2];
+    for (size_t i = 0; i < 8; i++) {
+      a_[i / 4].values[i % 4] = ptr[i];
+    }
+    simde_float16x4x2_t s_ = { { simde_float16x4_from_private(a_[0]),
+                                 simde_float16x4_from_private(a_[1]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_f16_x2
+  #define vld1_f16_x2(a) simde_vld1_f16_x2((a))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2x2_t
 simde_vld1_f32_x2(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(4)]) {

arm/neon/ld1_x3.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD1_X3_H)
@@ -39,6 +40,30 @@ SIMDE_BEGIN_DECLS_
 
 #if !defined(SIMDE_BUG_INTEL_857088)
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x3_t
+simde_vld1_f16_x3(simde_float16 const ptr[HEDLEY_ARRAY_PARAM(12)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
+      (!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1_f16_x3(ptr);
+  #else
+    simde_float16x4_private a_[3];
+    for (size_t i = 0; i < 12; i++) {
+      a_[i / 4].values[i % 4] = ptr[i];
+    }
+    simde_float16x4x3_t s_ = { { simde_float16x4_from_private(a_[0]),
+                                 simde_float16x4_from_private(a_[1]),
+                                 simde_float16x4_from_private(a_[2]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_f16_x3
+  #define vld1_f16_x3(a) simde_vld1_f16_x3((a))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2x3_t
 simde_vld1_f32_x3(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(6)]) {

arm/neon/ld1_x4.h

@@ -24,6 +24,7 @@
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
  *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD1_X4_H)
@@ -40,6 +41,31 @@ SIMDE_BEGIN_DECLS_
 
 #if !defined(SIMDE_BUG_INTEL_857088)
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x4_t
+simde_vld1_f16_x4(simde_float16 const ptr[HEDLEY_ARRAY_PARAM(16)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
+      (!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1_f16_x4(ptr);
+  #else
+    simde_float16x4_private a_[4];
+    for (size_t i = 0; i < 16; i++) {
+      a_[i / 4].values[i % 4] = ptr[i];
+    }
+    simde_float16x4x4_t s_ = { { simde_float16x4_from_private(a_[0]),
+                                 simde_float16x4_from_private(a_[1]),
+                                 simde_float16x4_from_private(a_[2]),
+                                 simde_float16x4_from_private(a_[3]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_f16_x4
+  #define vld1_f16_x4(a) simde_vld1_f16_x4((a))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2x4_t
 simde_vld1_f32_x4(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(8)]) {

arm/neon/ld1q_x2.h

@@ -24,6 +24,7 @@
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
  *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD1Q_X2_H)
@@ -40,6 +41,30 @@ SIMDE_BEGIN_DECLS_
 
 #if !defined(SIMDE_BUG_INTEL_857088)
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8x2_t
+simde_vld1q_f16_x2(simde_float16 const ptr[HEDLEY_ARRAY_PARAM(16)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
+      (!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
+      defined(SIMDE_ARM_NEON_FP16)
+    return vld1q_f16_x2(ptr);
+  #else
+    simde_float16x8_private a_[2];
+    for (size_t i = 0; i < 16; i++) {
+      a_[i / 8].values[i % 8] = ptr[i];
+    }
+    simde_float16x8x2_t s_ = { { simde_float16x8_from_private(a_[0]),
+                                 simde_float16x8_from_private(a_[1]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_f16_x2
+  #define vld1q_f16_x2(a) simde_vld1q_f16_x2((a))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x4x2_t
 simde_vld1q_f32_x2(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(8)]) {

arm/neon/ld1q_x3.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD1Q_X3_H)
@@ -39,6 +40,30 @@ SIMDE_BEGIN_DECLS_
 
 #if !defined(SIMDE_BUG_INTEL_857088)
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8x3_t
+simde_vld1q_f16_x3(simde_float16 const ptr[HEDLEY_ARRAY_PARAM(24)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
+      (!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_f16_x3(ptr);
+  #else
+    simde_float16x8_private a_[3];
+    for (size_t i = 0; i < 24; i++) {
+      a_[i / 8].values[i % 8] = ptr[i];
+    }
+    simde_float16x8x3_t s_ = { { simde_float16x8_from_private(a_[0]),
+                                 simde_float16x8_from_private(a_[1]),
+                                 simde_float16x8_from_private(a_[2]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_f16_x3
+  #define vld1q_f16_x3(a) simde_vld1q_f16_x3((a))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x4x3_t
 simde_vld1q_f32_x3(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(12)]) {

arm/neon/ld1q_x4.h

@@ -24,6 +24,7 @@
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
  *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD1Q_X4_H)
@@ -40,6 +41,31 @@ SIMDE_BEGIN_DECLS_
 
 #if !defined(SIMDE_BUG_INTEL_857088)
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8x4_t
+simde_vld1q_f16_x4(simde_float16 const ptr[HEDLEY_ARRAY_PARAM(32)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
+      (!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(7,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_f16_x4(ptr);
+  #else
+    simde_float16x8_private a_[4];
+    for (size_t i = 0; i < 32; i++) {
+      a_[i / 8].values[i % 8] = ptr[i];
+    }
+    simde_float16x8x4_t s_ = { { simde_float16x8_from_private(a_[0]),
+                                 simde_float16x8_from_private(a_[1]),
+                                 simde_float16x8_from_private(a_[2]),
+                                 simde_float16x8_from_private(a_[3]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_f16_x4
+  #define vld1q_f16_x4(a) simde_vld1q_f16_x4((a))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x4x4_t
 simde_vld1q_f32_x4(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(16)]) {

arm/neon/ld2.h

@@ -342,6 +342,33 @@ simde_vld2_u64(uint64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
   #define vld2_u64(a) simde_vld2_u64((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x2_t
+simde_vld2_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vld2_f16(ptr);
+  #else
+    simde_float16x4_private r_[2];
+
+    for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_[0])) ; i++) {
+      for (size_t j = 0 ; j < (sizeof(r_[0].values) / sizeof(r_[0].values[0])) ; j++) {
+        r_[i].values[j] = ptr[i + (j * (sizeof(r_) / sizeof(r_[0])))];
+      }
+    }
+
+    simde_float16x4x2_t r = { {
+      simde_float16x4_from_private(r_[0]),
+      simde_float16x4_from_private(r_[1]),
+    } };
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_f16
+  #define vld2_f16(a) simde_vld2_f16((a))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2x2_t
 simde_vld2_f32(simde_float32_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {

arm/neon/ld2_dup.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_LD2_DUP_H)
+#define SIMDE_ARM_NEON_LD2_DUP_H
+
+#include "dup_n.h"
+#include "reinterpret.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x2_t
+simde_vld2_dup_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vld2_dup_f16(ptr);
+  #else
+    simde_float16x4x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_f16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_f16
+  #define vld2_dup_f16(a) simde_vld2_dup_f16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x2x2_t
+simde_vld2_dup_f32(simde_float32 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_dup_f32(ptr);
+  #else
+    simde_float32x2x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_f32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_f32
+  #define vld2_dup_f32(a) simde_vld2_dup_f32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x1x2_t
+simde_vld2_dup_f64(simde_float64 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vld2_dup_f64(ptr);
+  #else
+    simde_float64x1x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_f64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_f64
+  #define vld2_dup_f64(a) simde_vld2_dup_f64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x8x2_t
+simde_vld2_dup_s8(int8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_dup_s8(ptr);
+  #else
+    simde_int8x8x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_s8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_s8
+  #define vld2_dup_s8(a) simde_vld2_dup_s8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x4x2_t
+simde_vld2_dup_s16(int16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_dup_s16(ptr);
+  #else
+    simde_int16x4x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_s16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_s16
+  #define vld2_dup_s16(a) simde_vld2_dup_s16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x2x2_t
+simde_vld2_dup_s32(int32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_dup_s32(ptr);
+  #else
+    simde_int32x2x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_s32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_s32
+  #define vld2_dup_s32(a) simde_vld2_dup_s32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x1x2_t
+simde_vld2_dup_s64(int64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_dup_s64(ptr);
+  #else
+    simde_int64x1x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_s64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_s64
+  #define vld2_dup_s64(a) simde_vld2_dup_s64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x8x2_t
+simde_vld2_dup_u8(uint8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_dup_u8(ptr);
+  #else
+    simde_uint8x8x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_u8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_u8
+  #define vld2_dup_u8(a) simde_vld2_dup_u8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x4x2_t
+simde_vld2_dup_u16(uint16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_dup_u16(ptr);
+  #else
+    simde_uint16x4x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_u16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_u16
+  #define vld2_dup_u16(a) simde_vld2_dup_u16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x2x2_t
+simde_vld2_dup_u32(uint32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_dup_u32(ptr);
+  #else
+    simde_uint32x2x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_u32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_u32
+  #define vld2_dup_u32(a) simde_vld2_dup_u32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1x2_t
+simde_vld2_dup_u64(uint64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_dup_u64(ptr);
+  #else
+    simde_uint64x1x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdup_n_u64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_dup_u64
+  #define vld2_dup_u64(a) simde_vld2_dup_u64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8x2_t
+simde_vld2q_dup_f16(simde_float16 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vld2q_dup_f16(ptr);
+  #else
+    simde_float16x8x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_f16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_f16
+  #define vld2q_dup_f16(a) simde_vld2q_dup_f16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x4x2_t
+simde_vld2q_dup_f32(simde_float32 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2q_dup_f32(ptr);
+  #else
+    simde_float32x4x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_f32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_f32
+  #define vld2q_dup_f32(a) simde_vld2q_dup_f32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x2x2_t
+simde_vld2q_dup_f64(simde_float64 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vld2q_dup_f64(ptr);
+  #else
+    simde_float64x2x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_f64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_f64
+  #define vld2q_dup_f64(a) simde_vld2q_dup_f64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x16x2_t
+simde_vld2q_dup_s8(int8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2q_dup_s8(ptr);
+  #else
+    simde_int8x16x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_s8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_s8
+  #define vld2q_dup_s8(a) simde_vld2q_dup_s8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x8x2_t
+simde_vld2q_dup_s16(int16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2q_dup_s16(ptr);
+  #else
+    simde_int16x8x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_s16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_s16
+  #define vld2q_dup_s16(a) simde_vld2q_dup_s16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4x2_t
+simde_vld2q_dup_s32(int32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2q_dup_s32(ptr);
+  #else
+    simde_int32x4x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_s32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_s32
+  #define vld2q_dup_s32(a) simde_vld2q_dup_s32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2x2_t
+simde_vld2q_dup_s64(int64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2q_dup_s64(ptr);
+  #else
+    simde_int64x2x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_s64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_s64
+  #define vld2q_dup_s64(a) simde_vld2q_dup_s64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x16x2_t
+simde_vld2q_dup_u8(uint8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2q_dup_u8(ptr);
+  #else
+    simde_uint8x16x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_u8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_u8
+  #define vld2q_dup_u8(a) simde_vld2q_dup_u8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8x2_t
+simde_vld2q_dup_u16(uint16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2q_dup_u16(ptr);
+  #else
+    simde_uint16x8x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_u16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_u16
+  #define vld2q_dup_u16(a) simde_vld2q_dup_u16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4x2_t
+simde_vld2q_dup_u32(uint32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2q_dup_u32(ptr);
+  #else
+    simde_uint32x4x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_u32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_u32
+  #define vld2q_dup_u32(a) simde_vld2q_dup_u32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2x2_t
+simde_vld2q_dup_u64(uint64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2q_dup_u64(ptr);
+  #else
+    simde_uint64x2x2_t r;
+
+    for (size_t i = 0 ; i < 2 ; i++) {
+      r.val[i] = simde_vdupq_n_u64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_dup_u64
+  #define vld2q_dup_u64(a) simde_vld2q_dup_u64((a))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_LD2_DUP_H) */

arm/neon/ld2_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_LD2_LANE_H)
+#define SIMDE_ARM_NEON_LD2_LANE_H
+
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x8x2_t simde_vld2_lane_s8(int8_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_int8x8x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_int8x8x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_int8x8_private tmp_ = simde_int8x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int8x8_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld2_lane_s8(ptr, src, lane) vld2_lane_s8(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_s8
+  #define vld2_lane_s8(ptr, src, lane) simde_vld2_lane_s8((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x4x2_t simde_vld2_lane_s16(int16_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_int16x4x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int16x4x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_int16x4_private tmp_ = simde_int16x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int16x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld2_lane_s16(ptr, src, lane) vld2_lane_s16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_s16
+  #define vld2_lane_s16(ptr, src, lane) simde_vld2_lane_s16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x2x2_t simde_vld2_lane_s32(int32_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_int32x2x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_int32x2x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_int32x2_private tmp_ = simde_int32x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int32x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld2_lane_s32(ptr, src, lane) vld2_lane_s32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_s32
+  #define vld2_lane_s32(ptr, src, lane) simde_vld2_lane_s32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x1x2_t simde_vld2_lane_s64(int64_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_int64x1x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) {
+  simde_int64x1x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_int64x1_private tmp_ = simde_int64x1_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int64x1_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld2_lane_s64(ptr, src, lane) vld2_lane_s64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_s64
+  #define vld2_lane_s64(ptr, src, lane) simde_vld2_lane_s64((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x8x2_t simde_vld2_lane_u8(uint8_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint8x8x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_uint8x8x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_uint8x8_private tmp_ = simde_uint8x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint8x8_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld2_lane_u8(ptr, src, lane) vld2_lane_u8(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_u8
+  #define vld2_lane_u8(ptr, src, lane) simde_vld2_lane_u8((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x4x2_t simde_vld2_lane_u16(uint16_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint16x4x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_uint16x4x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_uint16x4_private tmp_ = simde_uint16x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint16x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld2_lane_u16(ptr, src, lane) vld2_lane_u16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_u16
+  #define vld2_lane_u16(ptr, src, lane) simde_vld2_lane_u16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x2x2_t simde_vld2_lane_u32(uint32_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint32x2x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_uint32x2x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_uint32x2_private tmp_ = simde_uint32x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint32x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld2_lane_u32(ptr, src, lane) vld2_lane_u32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_u32
+  #define vld2_lane_u32(ptr, src, lane) simde_vld2_lane_u32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1x2_t simde_vld2_lane_u64(uint64_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint64x1x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) {
+  simde_uint64x1x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_uint64x1_private tmp_ = simde_uint64x1_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint64x1_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld2_lane_u64(ptr, src, lane) vld2_lane_u64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_u64
+  #define vld2_lane_u64(ptr, src, lane) simde_vld2_lane_u64((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x2_t simde_vld2_lane_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_float16x4x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_float16x4x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_float16x4_private tmp_ = simde_float16x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float16x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vld2_lane_f16(ptr, src, lane) vld2_lane_f16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_f16
+  #define vld2_lane_f16(ptr, src, lane) simde_vld2_lane_f16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x2x2_t simde_vld2_lane_f32(simde_float32_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_float32x2x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_float32x2x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_float32x2_private tmp_ = simde_float32x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float32x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld2_lane_f32(ptr, src, lane) vld2_lane_f32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_f32
+  #define vld2_lane_f32(ptr, src, lane) simde_vld2_lane_f32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x1x2_t simde_vld2_lane_f64(simde_float64_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_float64x1x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) {
+  simde_float64x1x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_float64x1_private tmp_ = simde_float64x1_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float64x1_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld2_lane_f64(ptr, src, lane) vld2_lane_f64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2_lane_f64
+  #define vld2_lane_f64(ptr, src, lane) simde_vld2_lane_f64((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x16x2_t simde_vld2q_lane_s8(int8_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_int8x16x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) {
+  simde_int8x16x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_int8x16_private tmp_ = simde_int8x16_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int8x16_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld2q_lane_s8(ptr, src, lane) vld2q_lane_s8(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_s8
+  #define vld2q_lane_s8(ptr, src, lane) simde_vld2q_lane_s8((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x8x2_t simde_vld2q_lane_s16(int16_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_int16x8x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_int16x8x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_int16x8_private tmp_ = simde_int16x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int16x8_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld2q_lane_s16(ptr, src, lane) vld2q_lane_s16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_s16
+  #define vld2q_lane_s16(ptr, src, lane) simde_vld2q_lane_s16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4x2_t simde_vld2q_lane_s32(int32_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_int32x4x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int32x4x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_int32x4_private tmp_ = simde_int32x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int32x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld2q_lane_s32(ptr, src, lane) vld2q_lane_s32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_s32
+  #define vld2q_lane_s32(ptr, src, lane) simde_vld2q_lane_s32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2x2_t simde_vld2q_lane_s64(int64_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_int64x2x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_int64x2x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_int64x2_private tmp_ = simde_int64x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int64x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld2q_lane_s64(ptr, src, lane) vld2q_lane_s64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_s64
+  #define vld2q_lane_s64(ptr, src, lane) simde_vld2q_lane_s64((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x16x2_t simde_vld2q_lane_u8(uint8_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint8x16x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) {
+  simde_uint8x16x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_uint8x16_private tmp_ = simde_uint8x16_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint8x16_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld2q_lane_u8(ptr, src, lane) vld2q_lane_u8(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_u8
+  #define vld2q_lane_u8(ptr, src, lane) simde_vld2q_lane_u8((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8x2_t simde_vld2q_lane_u16(uint16_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint16x8x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_uint16x8x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_uint16x8_private tmp_ = simde_uint16x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint16x8_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld2q_lane_u16(ptr, src, lane) vld2q_lane_u16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_u16
+  #define vld2q_lane_u16(ptr, src, lane) simde_vld2q_lane_u16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4x2_t simde_vld2q_lane_u32(uint32_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint32x4x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_uint32x4x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_uint32x4_private tmp_ = simde_uint32x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint32x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld2q_lane_u32(ptr, src, lane) vld2q_lane_u32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_u32
+  #define vld2q_lane_u32(ptr, src, lane) simde_vld2q_lane_u32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2x2_t simde_vld2q_lane_u64(uint64_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint64x2x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_uint64x2x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_uint64x2_private tmp_ = simde_uint64x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint64x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld2q_lane_u64(ptr, src, lane) vld2q_lane_u64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_u64
+  #define vld2q_lane_u64(ptr, src, lane) simde_vld2q_lane_u64((ptr), (src), (lane))
+#endif
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8x2_t simde_vld2q_lane_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_float16x8x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_float16x8x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_float16x8_private tmp_ = simde_float16x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float16x8_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vld2q_lane_f16(ptr, src, lane) vld2q_lane_f16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_f16
+  #define vld2q_lane_f16(ptr, src, lane) simde_vld2q_lane_f16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x4x2_t simde_vld2q_lane_f32(simde_float32_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_float32x4x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_float32x4x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_float32x4_private tmp_ = simde_float32x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float32x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld2q_lane_f32(ptr, src, lane) vld2q_lane_f32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_f32
+  #define vld2q_lane_f32(ptr, src, lane) simde_vld2q_lane_f32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x2x2_t simde_vld2q_lane_f64(simde_float64_t const ptr[HEDLEY_ARRAY_PARAM(2)], simde_float64x2x2_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_float64x2x2_t r;
+
+  for (size_t i = 0 ; i < 2 ; i++) {
+    simde_float64x2_private tmp_ = simde_float64x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float64x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld2q_lane_f64(ptr, src, lane) vld2q_lane_f64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_lane_f64
+  #define vld2q_lane_f64(ptr, src, lane) simde_vld2q_lane_f64((ptr), (src), (lane))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_LD2_LANE_H) */

arm/neon/ld3.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2020      Sean Maher <seanptmaher@gmail.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD3_H)
@@ -40,6 +41,34 @@ SIMDE_BEGIN_DECLS_
 
 #if !defined(SIMDE_BUG_INTEL_857088)
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x3_t
+simde_vld3_f16(simde_float16 const *ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vld3_f16(ptr);
+  #else
+    simde_float16x4_private r_[3];
+
+    for (size_t i = 0; i < (sizeof(r_) / sizeof(r_[0])); i++) {
+      for (size_t j = 0 ; j < (sizeof(r_[0].values) / sizeof(r_[0].values[0])) ; j++) {
+        r_[i].values[j] = ptr[i + (j * (sizeof(r_) / sizeof(r_[0])))];
+      }
+    }
+
+    simde_float16x4x3_t r = { {
+      simde_float16x4_from_private(r_[0]),
+      simde_float16x4_from_private(r_[1]),
+      simde_float16x4_from_private(r_[2])
+    } };
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_f16
+  #define vld3_f16(a) simde_vld3_f16((a))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2x3_t
 simde_vld3_f32(simde_float32 const *ptr) {

arm/neon/ld3_dup.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_LD3_DUP_H)
+#define SIMDE_ARM_NEON_LD3_DUP_H
+
+#include "dup_n.h"
+#include "reinterpret.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x3_t
+simde_vld3_dup_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vld3_dup_f16(ptr);
+  #else
+    simde_float16x4x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_f16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_f16
+  #define vld3_dup_f16(a) simde_vld3_dup_f16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x2x3_t
+simde_vld3_dup_f32(simde_float32 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld3_dup_f32(ptr);
+  #else
+    simde_float32x2x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_f32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_f32
+  #define vld3_dup_f32(a) simde_vld3_dup_f32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x1x3_t
+simde_vld3_dup_f64(simde_float64 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vld3_dup_f64(ptr);
+  #else
+    simde_float64x1x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_f64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_f64
+  #define vld3_dup_f64(a) simde_vld3_dup_f64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x8x3_t
+simde_vld3_dup_s8(int8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld3_dup_s8(ptr);
+  #else
+    simde_int8x8x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_s8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_s8
+  #define vld3_dup_s8(a) simde_vld3_dup_s8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x4x3_t
+simde_vld3_dup_s16(int16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld3_dup_s16(ptr);
+  #else
+    simde_int16x4x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_s16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_s16
+  #define vld3_dup_s16(a) simde_vld3_dup_s16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x2x3_t
+simde_vld3_dup_s32(int32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld3_dup_s32(ptr);
+  #else
+    simde_int32x2x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_s32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_s32
+  #define vld3_dup_s32(a) simde_vld3_dup_s32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x1x3_t
+simde_vld3_dup_s64(int64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld3_dup_s64(ptr);
+  #else
+    simde_int64x1x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_s64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_s64
+  #define vld3_dup_s64(a) simde_vld3_dup_s64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x8x3_t
+simde_vld3_dup_u8(uint8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld3_dup_u8(ptr);
+  #else
+    simde_uint8x8x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_u8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_u8
+  #define vld3_dup_u8(a) simde_vld3_dup_u8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x4x3_t
+simde_vld3_dup_u16(uint16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld3_dup_u16(ptr);
+  #else
+    simde_uint16x4x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_u16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_u16
+  #define vld3_dup_u16(a) simde_vld3_dup_u16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x2x3_t
+simde_vld3_dup_u32(uint32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld3_dup_u32(ptr);
+  #else
+    simde_uint32x2x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_u32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_u32
+  #define vld3_dup_u32(a) simde_vld3_dup_u32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1x3_t
+simde_vld3_dup_u64(uint64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld3_dup_u64(ptr);
+  #else
+    simde_uint64x1x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdup_n_u64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_dup_u64
+  #define vld3_dup_u64(a) simde_vld3_dup_u64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8x3_t
+simde_vld3q_dup_f16(simde_float16 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vld3q_dup_f16(ptr);
+  #else
+    simde_float16x8x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_f16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_f16
+  #define vld3q_dup_f16(a) simde_vld3q_dup_f16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x4x3_t
+simde_vld3q_dup_f32(simde_float32 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld3q_dup_f32(ptr);
+  #else
+    simde_float32x4x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_f32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_f32
+  #define vld3q_dup_f32(a) simde_vld3q_dup_f32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x2x3_t
+simde_vld3q_dup_f64(simde_float64 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vld3q_dup_f64(ptr);
+  #else
+    simde_float64x2x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_f64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_f64
+  #define vld3q_dup_f64(a) simde_vld3q_dup_f64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x16x3_t
+simde_vld3q_dup_s8(int8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld3q_dup_s8(ptr);
+  #else
+    simde_int8x16x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_s8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_s8
+  #define vld3q_dup_s8(a) simde_vld3q_dup_s8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x8x3_t
+simde_vld3q_dup_s16(int16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld3q_dup_s16(ptr);
+  #else
+    simde_int16x8x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_s16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_s16
+  #define vld3q_dup_s16(a) simde_vld3q_dup_s16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4x3_t
+simde_vld3q_dup_s32(int32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld3q_dup_s32(ptr);
+  #else
+    simde_int32x4x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_s32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_s32
+  #define vld3q_dup_s32(a) simde_vld3q_dup_s32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2x3_t
+simde_vld3q_dup_s64(int64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld3q_dup_s64(ptr);
+  #else
+    simde_int64x2x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_s64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_s64
+  #define vld3q_dup_s64(a) simde_vld3q_dup_s64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x16x3_t
+simde_vld3q_dup_u8(uint8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld3q_dup_u8(ptr);
+  #else
+    simde_uint8x16x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_u8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_u8
+  #define vld3q_dup_u8(a) simde_vld3q_dup_u8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8x3_t
+simde_vld3q_dup_u16(uint16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld3q_dup_u16(ptr);
+  #else
+    simde_uint16x8x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_u16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_u16
+  #define vld3q_dup_u16(a) simde_vld3q_dup_u16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4x3_t
+simde_vld3q_dup_u32(uint32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld3q_dup_u32(ptr);
+  #else
+    simde_uint32x4x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_u32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_u32
+  #define vld3q_dup_u32(a) simde_vld3q_dup_u32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2x3_t
+simde_vld3q_dup_u64(uint64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld3q_dup_u64(ptr);
+  #else
+    simde_uint64x2x3_t r;
+
+    for (size_t i = 0 ; i < 3 ; i++) {
+      r.val[i] = simde_vdupq_n_u64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_dup_u64
+  #define vld3q_dup_u64(a) simde_vld3q_dup_u64((a))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_LD3_DUP_H) */

arm/neon/ld3_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_LD3_LANE_H)
+#define SIMDE_ARM_NEON_LD3_LANE_H
+
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x8x3_t simde_vld3_lane_s8(int8_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_int8x8x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_int8x8x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_int8x8_private tmp_ = simde_int8x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int8x8_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld3_lane_s8(ptr, src, lane) vld3_lane_s8(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_s8
+  #define vld3_lane_s8(ptr, src, lane) simde_vld3_lane_s8((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x4x3_t simde_vld3_lane_s16(int16_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_int16x4x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int16x4x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_int16x4_private tmp_ = simde_int16x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int16x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld3_lane_s16(ptr, src, lane) vld3_lane_s16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_s16
+  #define vld3_lane_s16(ptr, src, lane) simde_vld3_lane_s16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x2x3_t simde_vld3_lane_s32(int32_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_int32x2x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_int32x2x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_int32x2_private tmp_ = simde_int32x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int32x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld3_lane_s32(ptr, src, lane) vld3_lane_s32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_s32
+  #define vld3_lane_s32(ptr, src, lane) simde_vld3_lane_s32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x1x3_t simde_vld3_lane_s64(int64_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_int64x1x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) {
+  simde_int64x1x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_int64x1_private tmp_ = simde_int64x1_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int64x1_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld3_lane_s64(ptr, src, lane) vld3_lane_s64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_s64
+  #define vld3_lane_s64(ptr, src, lane) simde_vld3_lane_s64((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x8x3_t simde_vld3_lane_u8(uint8_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint8x8x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_uint8x8x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_uint8x8_private tmp_ = simde_uint8x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint8x8_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld3_lane_u8(ptr, src, lane) vld3_lane_u8(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_u8
+  #define vld3_lane_u8(ptr, src, lane) simde_vld3_lane_u8((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x4x3_t simde_vld3_lane_u16(uint16_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint16x4x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_uint16x4x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_uint16x4_private tmp_ = simde_uint16x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint16x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld3_lane_u16(ptr, src, lane) vld3_lane_u16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_u16
+  #define vld3_lane_u16(ptr, src, lane) simde_vld3_lane_u16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x2x3_t simde_vld3_lane_u32(uint32_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint32x2x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_uint32x2x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_uint32x2_private tmp_ = simde_uint32x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint32x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld3_lane_u32(ptr, src, lane) vld3_lane_u32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_u32
+  #define vld3_lane_u32(ptr, src, lane) simde_vld3_lane_u32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1x3_t simde_vld3_lane_u64(uint64_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint64x1x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) {
+  simde_uint64x1x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_uint64x1_private tmp_ = simde_uint64x1_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint64x1_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld3_lane_u64(ptr, src, lane) vld3_lane_u64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_u64
+  #define vld3_lane_u64(ptr, src, lane) simde_vld3_lane_u64((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x3_t simde_vld3_lane_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_float16x4x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_float16x4x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_float16x4_private tmp_ = simde_float16x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float16x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vld3_lane_f16(ptr, src, lane) vld3_lane_f16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_f16
+  #define vld3_lane_f16(ptr, src, lane) simde_vld3_lane_f16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x2x3_t simde_vld3_lane_f32(simde_float32_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_float32x2x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_float32x2x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_float32x2_private tmp_ = simde_float32x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float32x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld3_lane_f32(ptr, src, lane) vld3_lane_f32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_f32
+  #define vld3_lane_f32(ptr, src, lane) simde_vld3_lane_f32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x1x3_t simde_vld3_lane_f64(simde_float64_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_float64x1x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) {
+  simde_float64x1x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_float64x1_private tmp_ = simde_float64x1_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float64x1_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld3_lane_f64(ptr, src, lane) vld3_lane_f64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3_lane_f64
+  #define vld3_lane_f64(ptr, src, lane) simde_vld3_lane_f64((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x16x3_t simde_vld3q_lane_s8(int8_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_int8x16x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) {
+  simde_int8x16x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_int8x16_private tmp_ = simde_int8x16_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int8x16_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld3q_lane_s8(ptr, src, lane) vld3q_lane_s8(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_s8
+  #define vld3q_lane_s8(ptr, src, lane) simde_vld3q_lane_s8((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x8x3_t simde_vld3q_lane_s16(int16_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_int16x8x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_int16x8x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_int16x8_private tmp_ = simde_int16x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int16x8_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld3q_lane_s16(ptr, src, lane) vld3q_lane_s16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_s16
+  #define vld3q_lane_s16(ptr, src, lane) simde_vld3q_lane_s16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4x3_t simde_vld3q_lane_s32(int32_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_int32x4x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int32x4x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_int32x4_private tmp_ = simde_int32x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int32x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld3q_lane_s32(ptr, src, lane) vld3q_lane_s32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_s32
+  #define vld3q_lane_s32(ptr, src, lane) simde_vld3q_lane_s32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2x3_t simde_vld3q_lane_s64(int64_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_int64x2x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_int64x2x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_int64x2_private tmp_ = simde_int64x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_int64x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld3q_lane_s64(ptr, src, lane) vld3q_lane_s64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_s64
+  #define vld3q_lane_s64(ptr, src, lane) simde_vld3q_lane_s64((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x16x3_t simde_vld3q_lane_u8(uint8_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint8x16x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) {
+  simde_uint8x16x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_uint8x16_private tmp_ = simde_uint8x16_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint8x16_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld3q_lane_u8(ptr, src, lane) vld3q_lane_u8(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_u8
+  #define vld3q_lane_u8(ptr, src, lane) simde_vld3q_lane_u8((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8x3_t simde_vld3q_lane_u16(uint16_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint16x8x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_uint16x8x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_uint16x8_private tmp_ = simde_uint16x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint16x8_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld3q_lane_u16(ptr, src, lane) vld3q_lane_u16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_u16
+  #define vld3q_lane_u16(ptr, src, lane) simde_vld3q_lane_u16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4x3_t simde_vld3q_lane_u32(uint32_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint32x4x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_uint32x4x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_uint32x4_private tmp_ = simde_uint32x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint32x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld3q_lane_u32(ptr, src, lane) vld3q_lane_u32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_u32
+  #define vld3q_lane_u32(ptr, src, lane) simde_vld3q_lane_u32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2x3_t simde_vld3q_lane_u64(uint64_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint64x2x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_uint64x2x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_uint64x2_private tmp_ = simde_uint64x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_uint64x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld3q_lane_u64(ptr, src, lane) vld3q_lane_u64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_u64
+  #define vld3q_lane_u64(ptr, src, lane) simde_vld3q_lane_u64((ptr), (src), (lane))
+#endif
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8x3_t simde_vld3q_lane_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_float16x8x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_float16x8x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_float16x8_private tmp_ = simde_float16x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float16x8_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vld3q_lane_f16(ptr, src, lane) vld3q_lane_f16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_f16
+  #define vld3q_lane_f16(ptr, src, lane) simde_vld3q_lane_f16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x4x3_t simde_vld3q_lane_f32(simde_float32_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_float32x4x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_float32x4x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_float32x4_private tmp_ = simde_float32x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float32x4_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld3q_lane_f32(ptr, src, lane) vld3q_lane_f32(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_f32
+  #define vld3q_lane_f32(ptr, src, lane) simde_vld3q_lane_f32((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x2x3_t simde_vld3q_lane_f64(simde_float64_t const ptr[HEDLEY_ARRAY_PARAM(3)], simde_float64x2x3_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_float64x2x3_t r;
+
+  for (size_t i = 0 ; i < 3 ; i++) {
+    simde_float64x2_private tmp_ = simde_float64x2_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float64x2_from_private(tmp_);
+  }
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vld3q_lane_f64(ptr, src, lane) vld3q_lane_f64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld3q_lane_f64
+  #define vld3q_lane_f64(ptr, src, lane) simde_vld3q_lane_f64((ptr), (src), (lane))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_LD3_LANE_H) */

arm/neon/ld4.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2020      Sean Maher <seanptmaher@gmail.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD4_H)
@@ -39,6 +40,26 @@ SIMDE_BEGIN_DECLS_
 
 #if !defined(SIMDE_BUG_INTEL_857088)
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x4_t
+simde_vld4_f16(simde_float16 const ptr[HEDLEY_ARRAY_PARAM(16)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vld4_f16(ptr);
+  #else
+    simde_float16x4_private a_[4];
+    for (size_t i = 0; i < (sizeof(simde_float16x4_t) / sizeof(*ptr)) * 4 ; i++) {
+      a_[i % 4].values[i / 4] = ptr[i];
+    }
+    simde_float16x4x4_t s_ = { { simde_float16x4_from_private(a_[0]), simde_float16x4_from_private(a_[1]),
+                                 simde_float16x4_from_private(a_[2]), simde_float16x4_from_private(a_[3]) } };
+    return (s_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_f16
+  #define vld4_f16(a) simde_vld4_f16((a))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2x4_t
 simde_vld4_f32(simde_float32 const ptr[HEDLEY_ARRAY_PARAM(8)]) {

arm/neon/ld4_dup.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_LD4_DUP_H)
+#define SIMDE_ARM_NEON_LD4_DUP_H
+
+#include "dup_n.h"
+#include "reinterpret.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x4_t
+simde_vld4_dup_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vld4_dup_f16(ptr);
+  #else
+    simde_float16x4x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_f16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_f16
+  #define vld4_dup_f16(a) simde_vld4_dup_f16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x2x4_t
+simde_vld4_dup_f32(simde_float32 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld4_dup_f32(ptr);
+  #else
+    simde_float32x2x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_f32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_f32
+  #define vld4_dup_f32(a) simde_vld4_dup_f32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x1x4_t
+simde_vld4_dup_f64(simde_float64 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vld4_dup_f64(ptr);
+  #else
+    simde_float64x1x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_f64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_f64
+  #define vld4_dup_f64(a) simde_vld4_dup_f64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x8x4_t
+simde_vld4_dup_s8(int8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld4_dup_s8(ptr);
+  #else
+    simde_int8x8x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_s8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_s8
+  #define vld4_dup_s8(a) simde_vld4_dup_s8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x4x4_t
+simde_vld4_dup_s16(int16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld4_dup_s16(ptr);
+  #else
+    simde_int16x4x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_s16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_s16
+  #define vld4_dup_s16(a) simde_vld4_dup_s16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x2x4_t
+simde_vld4_dup_s32(int32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld4_dup_s32(ptr);
+  #else
+    simde_int32x2x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_s32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_s32
+  #define vld4_dup_s32(a) simde_vld4_dup_s32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x1x4_t
+simde_vld4_dup_s64(int64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld4_dup_s64(ptr);
+  #else
+    simde_int64x1x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_s64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_s64
+  #define vld4_dup_s64(a) simde_vld4_dup_s64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x8x4_t
+simde_vld4_dup_u8(uint8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld4_dup_u8(ptr);
+  #else
+    simde_uint8x8x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_u8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_u8
+  #define vld4_dup_u8(a) simde_vld4_dup_u8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x4x4_t
+simde_vld4_dup_u16(uint16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld4_dup_u16(ptr);
+  #else
+    simde_uint16x4x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_u16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_u16
+  #define vld4_dup_u16(a) simde_vld4_dup_u16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x2x4_t
+simde_vld4_dup_u32(uint32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld4_dup_u32(ptr);
+  #else
+    simde_uint32x2x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_u32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_u32
+  #define vld4_dup_u32(a) simde_vld4_dup_u32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1x4_t
+simde_vld4_dup_u64(uint64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld4_dup_u64(ptr);
+  #else
+    simde_uint64x1x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdup_n_u64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_dup_u64
+  #define vld4_dup_u64(a) simde_vld4_dup_u64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8x4_t
+simde_vld4q_dup_f16(simde_float16 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vld4q_dup_f16(ptr);
+  #else
+    simde_float16x8x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_f16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_f16
+  #define vld4q_dup_f16(a) simde_vld4q_dup_f16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float32x4x4_t
+simde_vld4q_dup_f32(simde_float32 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld4q_dup_f32(ptr);
+  #else
+    simde_float32x4x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_f32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_f32
+  #define vld4q_dup_f32(a) simde_vld4q_dup_f32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x2x4_t
+simde_vld4q_dup_f64(simde_float64 const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vld4q_dup_f64(ptr);
+  #else
+    simde_float64x2x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_f64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_f64
+  #define vld4q_dup_f64(a) simde_vld4q_dup_f64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x16x4_t
+simde_vld4q_dup_s8(int8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld4q_dup_s8(ptr);
+  #else
+    simde_int8x16x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_s8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_s8
+  #define vld4q_dup_s8(a) simde_vld4q_dup_s8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x8x4_t
+simde_vld4q_dup_s16(int16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld4q_dup_s16(ptr);
+  #else
+    simde_int16x8x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_s16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_s16
+  #define vld4q_dup_s16(a) simde_vld4q_dup_s16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4x4_t
+simde_vld4q_dup_s32(int32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld4q_dup_s32(ptr);
+  #else
+    simde_int32x4x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_s32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_s32
+  #define vld4q_dup_s32(a) simde_vld4q_dup_s32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2x4_t
+simde_vld4q_dup_s64(int64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld4q_dup_s64(ptr);
+  #else
+    simde_int64x2x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_s64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_s64
+  #define vld4q_dup_s64(a) simde_vld4q_dup_s64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x16x4_t
+simde_vld4q_dup_u8(uint8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld4q_dup_u8(ptr);
+  #else
+    simde_uint8x16x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_u8(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_u8
+  #define vld4q_dup_u8(a) simde_vld4q_dup_u8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8x4_t
+simde_vld4q_dup_u16(uint16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld4q_dup_u16(ptr);
+  #else
+    simde_uint16x8x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_u16(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_u16
+  #define vld4q_dup_u16(a) simde_vld4q_dup_u16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4x4_t
+simde_vld4q_dup_u32(uint32_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld4q_dup_u32(ptr);
+  #else
+    simde_uint32x4x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_u32(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_u32
+  #define vld4q_dup_u32(a) simde_vld4q_dup_u32((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2x4_t
+simde_vld4q_dup_u64(uint64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld4q_dup_u64(ptr);
+  #else
+    simde_uint64x2x4_t r;
+
+    for (size_t i = 0 ; i < 4 ; i++) {
+      r.val[i] = simde_vdupq_n_u64(ptr[i]);
+    }
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_dup_u64
+  #define vld4q_dup_u64(a) simde_vld4q_dup_u64((a))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_LD3_DUP_H) */

arm/neon/ld4_lane.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
  *   2021      Evan Nemerson <evan@nemerson.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 /* In older versions of clang, __builtin_neon_vld4_lane_v would
@@ -99,6 +100,7 @@ simde_vld4_lane_s16(int16_t const ptr[HEDLEY_ARRAY_PARAM(4)], simde_int16x4x4_t
   #define vld4_lane_s16(ptr, src, lane) simde_vld4_lane_s16((ptr), (src), (lane))
 #endif
 
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_int32x2x4_t
 simde_vld4_lane_s32(int32_t const ptr[HEDLEY_ARRAY_PARAM(4)], simde_int32x2x4_t src, const int lane)
@@ -261,6 +263,33 @@ simde_vld4_lane_u64(uint64_t const ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x1x4_
   #define vld4_lane_u64(ptr, src, lane) simde_vld4_lane_u64((ptr), (src), (lane))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4x4_t
+simde_vld4_lane_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(4)], simde_float16x4x4_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_float16x4x4_t r;
+
+  for (size_t i = 0 ; i < 4 ; i++) {
+    simde_float16x4_private tmp_ = simde_float16x4_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float16x4_from_private(tmp_);
+  }
+
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(10,0,0)
+    #define simde_vld4_lane_f16(ptr, src, lane) \
+      SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vld4_lane_f16(ptr, src, lane))
+  #else
+    #define simde_vld4_lane_f16(ptr, src, lane) vld4_lane_f16(ptr, src, lane)
+  #endif
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4_lane_f16
+  #define vld4_lane_f16(ptr, src, lane) simde_vld4_lane_f16((ptr), (src), (lane))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2x4_t
 simde_vld4_lane_f32(simde_float32_t const ptr[HEDLEY_ARRAY_PARAM(4)], simde_float32x2x4_t src, const int lane)
@@ -531,6 +560,33 @@ simde_vld4q_lane_u64(uint64_t const ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x2x4
   #define vld4q_lane_u64(ptr, src, lane) simde_vld4q_lane_u64((ptr), (src), (lane))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8x4_t
+simde_vld4q_lane_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(4)], simde_float16x8x4_t src, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_float16x8x4_t r;
+
+  for (size_t i = 0 ; i < 4 ; i++) {
+    simde_float16x8_private tmp_ = simde_float16x8_to_private(src.val[i]);
+    tmp_.values[lane] = ptr[i];
+    r.val[i] = simde_float16x8_from_private(tmp_);
+  }
+
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(10,0,0)
+    #define simde_vld4q_lane_f16(ptr, src, lane) \
+      SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vld4q_lane_f16(ptr, src, lane))
+  #else
+    #define simde_vld4q_lane_f16(ptr, src, lane) vld4q_lane_f16(ptr, src, lane)
+  #endif
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld4q_lane_f16
+  #define vld4q_lane_f16(ptr, src, lane) simde_vld4q_lane_f16((ptr), (src), (lane))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x4x4_t
 simde_vld4q_lane_f32(simde_float32_t const ptr[HEDLEY_ARRAY_PARAM(4)], simde_float32x4x4_t src, const int lane)

arm/neon/mla_lane.h

@@ -22,6 +22,7 @@
  *
  * Copyright:
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_MLA_LANE_H)
@@ -44,6 +45,28 @@ SIMDE_BEGIN_DECLS_
   #define vmla_lane_f32(a, b, v, lane) simde_vmla_lane_f32((a), (b), (v), (lane))
 #endif
 
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmla_laneq_f32(a, b, v, lane) vmla_laneq_f32((a), (b), (v), (lane))
+#else
+  #define simde_vmla_laneq_f32(a, b, v, lane) simde_vmla_f32((a), (b), simde_vdup_laneq_f32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmla_laneq_f32
+  #define vmla_laneq_f32(a, b, v, lane) simde_vmla_laneq_f32((a), (b), (v), (lane))
+#endif
+
+/* Eric: Skip this function since it will trigger a compiler error when using i686-linux-gnu-g++-11.
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlaq_laneq_f32(a, b, v, lane) vmlaq_laneq_f32((a), (b), (v), (lane))
+#else
+  #define simde_vmlaq_laneq_f32(a, b, v, lane) simde_vmlaq_f32((a), (b), simde_vdupq_laneq_f32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlaq_laneq_f32
+  #define vmlaq_laneq_f32(a, b, v, lane) simde_vmlaq_laneq_f32((a), (b), (v), (lane))
+#endif
+*/
+
 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
   #define simde_vmla_lane_s16(a, b, v, lane) vmla_lane_s16((a), (b), (v), (lane))
 #else
@@ -54,6 +77,26 @@ SIMDE_BEGIN_DECLS_
   #define vmla_lane_s16(a, b, v, lane) simde_vmla_lane_s16((a), (b), (v), (lane))
 #endif
 
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmla_laneq_s16(a, b, v, lane) vmla_laneq_s16((a), (b), (v), (lane))
+#else
+  #define simde_vmla_laneq_s16(a, b, v, lane) simde_vmla_s16((a), (b), simde_vdup_laneq_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmla_laneq_s16
+  #define vmla_laneq_s16(a, b, v, lane) simde_vmla_laneq_s16((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlaq_laneq_s16(a, b, v, lane) vmlaq_laneq_s16((a), (b), (v), (lane))
+#else
+  #define simde_vmlaq_laneq_s16(a, b, v, lane) simde_vmlaq_s16((a), (b), simde_vdupq_laneq_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlaq_laneq_s16
+  #define vmlaq_laneq_s16(a, b, v, lane) simde_vmlaq_laneq_s16((a), (b), (v), (lane))
+#endif
+
 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
   #define simde_vmla_lane_s32(a, b, v, lane) vmla_lane_s32((a), (b), (v), (lane))
 #else
@@ -64,6 +107,26 @@ SIMDE_BEGIN_DECLS_
   #define vmla_lane_s32(a, b, v, lane) simde_vmla_lane_s32((a), (b), (v), (lane))
 #endif
 
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmla_laneq_s32(a, b, v, lane) vmla_laneq_s32((a), (b), (v), (lane))
+#else
+  #define simde_vmla_laneq_s32(a, b, v, lane) simde_vmla_s32((a), (b), simde_vdup_laneq_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmla_laneq_s32
+  #define vmla_laneq_s32(a, b, v, lane) simde_vmla_laneq_s32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlaq_laneq_s32(a, b, v, lane) vmlaq_laneq_s32((a), (b), (v), (lane))
+#else
+  #define simde_vmlaq_laneq_s32(a, b, v, lane) simde_vmlaq_s32((a), (b), simde_vdupq_laneq_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlaq_laneq_s32
+  #define vmlaq_laneq_s32(a, b, v, lane) simde_vmlaq_laneq_s32((a), (b), (v), (lane))
+#endif
+
 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
   #define simde_vmla_lane_u16(a, b, v, lane) vmla_lane_u16((a), (b), (v), (lane))
 #else
@@ -74,6 +137,26 @@ SIMDE_BEGIN_DECLS_
   #define vmla_lane_u16(a, b, v, lane) simde_vmla_lane_u16((a), (b), (v), (lane))
 #endif
 
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmla_laneq_u16(a, b, v, lane) vmla_laneq_u16((a), (b), (v), (lane))
+#else
+  #define simde_vmla_laneq_u16(a, b, v, lane) simde_vmla_u16((a), (b), simde_vdup_laneq_u16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmla_laneq_u16
+  #define vmla_laneq_u16(a, b, v, lane) simde_vmla_laneq_u16((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlaq_laneq_u16(a, b, v, lane) vmlaq_laneq_u16((a), (b), (v), (lane))
+#else
+  #define simde_vmlaq_laneq_u16(a, b, v, lane) simde_vmlaq_u16((a), (b), simde_vdupq_laneq_u16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlaq_laneq_u16
+  #define vmlaq_laneq_u16(a, b, v, lane) simde_vmlaq_laneq_u16((a), (b), (v), (lane))
+#endif
+
 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
   #define simde_vmla_lane_u32(a, b, v, lane) vmla_lane_u32((a), (b), (v), (lane))
 #else
@@ -84,6 +167,26 @@ SIMDE_BEGIN_DECLS_
   #define vmla_lane_u32(a, b, v, lane) simde_vmla_lane_u32((a), (b), (v), (lane))
 #endif
 
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmla_laneq_u32(a, b, v, lane) vmla_laneq_u32((a), (b), (v), (lane))
+#else
+  #define simde_vmla_laneq_u32(a, b, v, lane) simde_vmla_u32((a), (b), simde_vdup_laneq_u32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmla_laneq_u32
+  #define vmla_laneq_u32(a, b, v, lane) simde_vmla_laneq_u32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlaq_laneq_u32(a, b, v, lane) vmlaq_laneq_u32((a), (b), (v), (lane))
+#else
+  #define simde_vmlaq_laneq_u32(a, b, v, lane) simde_vmlaq_u32((a), (b), simde_vdupq_laneq_u32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlaq_laneq_u32
+  #define vmlaq_laneq_u32(a, b, v, lane) simde_vmlaq_laneq_u32((a), (b), (v), (lane))
+#endif
+
 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
   #define simde_vmlaq_lane_f32(a, b, v, lane) vmlaq_lane_f32((a), (b), (v), (lane))
 #else

arm/neon/mlal_high_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_MLAL_HIGH_LANE_H)
+#define SIMDE_ARM_NEON_MLAL_HIGH_LANE_H
+
+#include "movl_high.h"
+#include "mlal_high.h"
+#include "dup_n.h"
+#include "mla.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vmlal_high_lane_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+    return simde_vmlal_high_s16(a, b, simde_vdupq_n_s16(simde_int16x4_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlal_high_lane_s16(a, b, v, lane) vmlal_high_lane_s16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlal_high_lane_s16
+  #define vmlal_high_lane_s16(a, b, v, lane) simde_vmlal_high_lane_s16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vmlal_high_laneq_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+    return simde_vmlal_high_s16(a, b, simde_vdupq_n_s16(simde_int16x8_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlal_high_laneq_s16(a, b, v, lane) vmlal_high_laneq_s16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlal_high_laneq_s16
+  #define vmlal_high_laneq_s16(a, b, v, lane) simde_vmlal_high_laneq_s16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vmlal_high_lane_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+    return simde_vmlal_high_s32(a, b, simde_vdupq_n_s32(simde_int32x2_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlal_high_lane_s32(a, b, v, lane) vmlal_high_lane_s32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlal_high_lane_s32
+  #define vmlal_high_lane_s32(a, b, v, lane) simde_vmlal_high_lane_s32((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vmlal_high_laneq_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+    return simde_vmlal_high_s32(a, b, simde_vdupq_n_s32(simde_int32x4_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlal_high_laneq_s32(a, b, v, lane) vmlal_high_laneq_s32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlal_high_laneq_s32
+  #define vmlal_high_laneq_s32(a, b, v, lane) simde_vmlal_high_laneq_s32((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4_t
+simde_vmlal_high_lane_u16(simde_uint32x4_t a, simde_uint16x8_t b, simde_uint16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+    return simde_vmlal_high_u16(a, b, simde_vdupq_n_u16(simde_uint16x4_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlal_high_lane_u16(a, b, v, lane) vmlal_high_lane_u16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlal_high_lane_u16
+  #define vmlal_high_lane_u16(a, b, v, lane) simde_vmlal_high_lane_u16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4_t
+simde_vmlal_high_laneq_u16(simde_uint32x4_t a, simde_uint16x8_t b, simde_uint16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+    return simde_vmlal_high_u16(a, b, simde_vdupq_n_u16(simde_uint16x8_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlal_high_laneq_u16(a, b, v, lane) vmlal_high_laneq_u16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlal_high_laneq_u16
+  #define vmlal_high_laneq_u16(a, b, v, lane) simde_vmlal_high_laneq_u16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vmlal_high_lane_u32(simde_uint64x2_t a, simde_uint32x4_t b, simde_uint32x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+    return simde_vmlal_high_u32(a, b, simde_vdupq_n_u32(simde_uint32x2_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlal_high_lane_u32(a, b, v, lane) vmlal_high_lane_u32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlal_high_lane_u32
+  #define vmlal_high_lane_u32(a, b, v, lane) simde_vmlal_high_lane_u32((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vmlal_high_laneq_u32(simde_uint64x2_t a, simde_uint32x4_t b, simde_uint32x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+    return simde_vmlal_high_u32(a, b, simde_vdupq_n_u32(simde_uint32x4_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlal_high_laneq_u32(a, b, v, lane) vmlal_high_laneq_u32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlal_high_laneq_u32
+  #define vmlal_high_laneq_u32(a, b, v, lane) simde_vmlal_high_laneq_u32((a), (b), (v), (lane))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_MLAL_HIGH_LANE_H) */

arm/neon/mls_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_MLS_LANE_H)
+#define SIMDE_ARM_NEON_MLS_LANE_H
+
+#include "mls.h"
+#include "dup_lane.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vmls_lane_f32(a, b, v, lane) vmls_lane_f32((a), (b), (v), (lane))
+#else
+  #define simde_vmls_lane_f32(a, b, v, lane) simde_vmls_f32((a), (b), simde_vdup_lane_f32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmls_lane_f32
+  #define vmls_lane_f32(a, b, v, lane) simde_vmls_lane_f32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmls_laneq_f32(a, b, v, lane) vmls_laneq_f32((a), (b), (v), (lane))
+#else
+  #define simde_vmls_laneq_f32(a, b, v, lane) simde_vmls_f32((a), (b), simde_vdup_laneq_f32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmls_laneq_f32
+  #define vmls_laneq_f32(a, b, v, lane) simde_vmls_laneq_f32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsq_laneq_f32(a, b, v, lane) vmlsq_laneq_f32((a), (b), (v), (lane))
+#else
+  #define simde_vmlsq_laneq_f32(a, b, v, lane) simde_vmlsq_f32((a), (b), simde_vdupq_laneq_f32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsq_laneq_f32
+  #define vmlsq_laneq_f32(a, b, v, lane) simde_vmlsq_laneq_f32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vmls_lane_s16(a, b, v, lane) vmls_lane_s16((a), (b), (v), (lane))
+#else
+  #define simde_vmls_lane_s16(a, b, v, lane) simde_vmls_s16((a), (b), simde_vdup_lane_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmls_lane_s16
+  #define vmls_lane_s16(a, b, v, lane) simde_vmls_lane_s16((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmls_laneq_s16(a, b, v, lane) vmls_laneq_s16((a), (b), (v), (lane))
+#else
+  #define simde_vmls_laneq_s16(a, b, v, lane) simde_vmls_s16((a), (b), simde_vdup_laneq_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmls_laneq_s16
+  #define vmls_laneq_s16(a, b, v, lane) simde_vmls_laneq_s16((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsq_laneq_s16(a, b, v, lane) vmlsq_laneq_s16((a), (b), (v), (lane))
+#else
+  #define simde_vmlsq_laneq_s16(a, b, v, lane) simde_vmlsq_s16((a), (b), simde_vdupq_laneq_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsq_laneq_s16
+  #define vmlsq_laneq_s16(a, b, v, lane) simde_vmlsq_laneq_s16((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vmls_lane_s32(a, b, v, lane) vmls_lane_s32((a), (b), (v), (lane))
+#else
+  #define simde_vmls_lane_s32(a, b, v, lane) simde_vmls_s32((a), (b), simde_vdup_lane_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmls_lane_s32
+  #define vmls_lane_s32(a, b, v, lane) simde_vmls_lane_s32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmls_laneq_s32(a, b, v, lane) vmls_laneq_s32((a), (b), (v), (lane))
+#else
+  #define simde_vmls_laneq_s32(a, b, v, lane) simde_vmls_s32((a), (b), simde_vdup_laneq_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmls_laneq_s32
+  #define vmls_laneq_s32(a, b, v, lane) simde_vmls_laneq_s32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsq_laneq_s32(a, b, v, lane) vmlsq_laneq_s32((a), (b), (v), (lane))
+#else
+  #define simde_vmlsq_laneq_s32(a, b, v, lane) simde_vmlsq_s32((a), (b), simde_vdupq_laneq_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsq_laneq_s32
+  #define vmlsq_laneq_s32(a, b, v, lane) simde_vmlsq_laneq_s32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vmls_lane_u16(a, b, v, lane) vmls_lane_u16((a), (b), (v), (lane))
+#else
+  #define simde_vmls_lane_u16(a, b, v, lane) simde_vmls_u16((a), (b), simde_vdup_lane_u16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmls_lane_u16
+  #define vmls_lane_u16(a, b, v, lane) simde_vmls_lane_u16((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmls_laneq_u16(a, b, v, lane) vmls_laneq_u16((a), (b), (v), (lane))
+#else
+  #define simde_vmls_laneq_u16(a, b, v, lane) simde_vmls_u16((a), (b), simde_vdup_laneq_u16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmls_laneq_u16
+  #define vmls_laneq_u16(a, b, v, lane) simde_vmls_laneq_u16((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsq_laneq_u16(a, b, v, lane) vmlsq_laneq_u16((a), (b), (v), (lane))
+#else
+  #define simde_vmlsq_laneq_u16(a, b, v, lane) simde_vmlsq_u16((a), (b), simde_vdupq_laneq_u16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsq_laneq_u16
+  #define vmlsq_laneq_u16(a, b, v, lane) simde_vmlsq_laneq_u16((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vmls_lane_u32(a, b, v, lane) vmls_lane_u32((a), (b), (v), (lane))
+#else
+  #define simde_vmls_lane_u32(a, b, v, lane) simde_vmls_u32((a), (b), simde_vdup_lane_u32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmls_lane_u32
+  #define vmls_lane_u32(a, b, v, lane) simde_vmls_lane_u32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmls_laneq_u32(a, b, v, lane) vmls_laneq_u32((a), (b), (v), (lane))
+#else
+  #define simde_vmls_laneq_u32(a, b, v, lane) simde_vmls_u32((a), (b), simde_vdup_laneq_u32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmls_laneq_u32
+  #define vmls_laneq_u32(a, b, v, lane) simde_vmls_laneq_u32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsq_laneq_u32(a, b, v, lane) vmlsq_laneq_u32((a), (b), (v), (lane))
+#else
+  #define simde_vmlsq_laneq_u32(a, b, v, lane) simde_vmlsq_u32((a), (b), simde_vdupq_laneq_u32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsq_laneq_u32
+  #define vmlsq_laneq_u32(a, b, v, lane) simde_vmlsq_laneq_u32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vmlsq_lane_f32(a, b, v, lane) vmlsq_lane_f32((a), (b), (v), (lane))
+#else
+  #define simde_vmlsq_lane_f32(a, b, v, lane) simde_vmlsq_f32((a), (b), simde_vdupq_lane_f32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmlsq_lane_f32
+  #define vmlsq_lane_f32(a, b, v, lane) simde_vmlsq_lane_f32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vmlsq_lane_s16(a, b, v, lane) vmlsq_lane_s16((a), (b), (v), (lane))
+#else
+  #define simde_vmlsq_lane_s16(a, b, v, lane) simde_vmlsq_s16((a), (b), simde_vdupq_lane_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmlsq_lane_s16
+  #define vmlsq_lane_s16(a, b, v, lane) simde_vmlsq_lane_s16((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vmlsq_lane_s32(a, b, v, lane) vmlsq_lane_s32((a), (b), (v), (lane))
+#else
+  #define simde_vmlsq_lane_s32(a, b, v, lane) simde_vmlsq_s32((a), (b), simde_vdupq_lane_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmlsq_lane_s32
+  #define vmlsq_lane_s32(a, b, v, lane) simde_vmlsq_lane_s32((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vmlsq_lane_u16(a, b, v, lane) vmlsq_lane_u16((a), (b), (v), (lane))
+#else
+  #define simde_vmlsq_lane_u16(a, b, v, lane) simde_vmlsq_u16((a), (b), simde_vdupq_lane_u16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmlsq_lane_u16
+  #define vmlsq_lane_u16(a, b, v, lane) simde_vmlsq_lane_u16((a), (b), (v), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vmlsq_lane_u32(a, b, v, lane) vmlsq_lane_u32((a), (b), (v), (lane))
+#else
+  #define simde_vmlsq_lane_u32(a, b, v, lane) simde_vmlsq_u32((a), (b), simde_vdupq_lane_u32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmlsq_lane_u32
+  #define vmlsq_lane_u32(a, b, v, lane) simde_vmlsq_lane_u32((a), (b), (v), (lane))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_MLS_LANE_H) */

arm/neon/mlsl_high_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_MLSL_HIGH_LANE_H)
+#define SIMDE_ARM_NEON_MLSL_HIGH_LANE_H
+
+#include "movl_high.h"
+#include "mlsl_high.h"
+#include "dup_n.h"
+#include "mls.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vmlsl_high_lane_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+    return simde_vmlsl_high_s16(a, b, simde_vdupq_n_s16(simde_int16x4_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsl_high_lane_s16(a, b, v, lane) vmlsl_high_lane_s16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsl_high_lane_s16
+  #define vmlsl_high_lane_s16(a, b, v, lane) simde_vmlsl_high_lane_s16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vmlsl_high_laneq_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+    return simde_vmlsl_high_s16(a, b, simde_vdupq_n_s16(simde_int16x8_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsl_high_laneq_s16(a, b, v, lane) vmlsl_high_laneq_s16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsl_high_laneq_s16
+  #define vmlsl_high_laneq_s16(a, b, v, lane) simde_vmlsl_high_laneq_s16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vmlsl_high_lane_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+    return simde_vmlsl_high_s32(a, b, simde_vdupq_n_s32(simde_int32x2_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsl_high_lane_s32(a, b, v, lane) vmlsl_high_lane_s32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsl_high_lane_s32
+  #define vmlsl_high_lane_s32(a, b, v, lane) simde_vmlsl_high_lane_s32((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vmlsl_high_laneq_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+    return simde_vmlsl_high_s32(a, b, simde_vdupq_n_s32(simde_int32x4_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsl_high_laneq_s32(a, b, v, lane) vmlsl_high_laneq_s32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsl_high_laneq_s32
+  #define vmlsl_high_laneq_s32(a, b, v, lane) simde_vmlsl_high_laneq_s32((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4_t
+simde_vmlsl_high_lane_u16(simde_uint32x4_t a, simde_uint16x8_t b, simde_uint16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+    return simde_vmlsl_high_u16(a, b, simde_vdupq_n_u16(simde_uint16x4_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsl_high_lane_u16(a, b, v, lane) vmlsl_high_lane_u16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsl_high_lane_u16
+  #define vmlsl_high_lane_u16(a, b, v, lane) simde_vmlsl_high_lane_u16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4_t
+simde_vmlsl_high_laneq_u16(simde_uint32x4_t a, simde_uint16x8_t b, simde_uint16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+    return simde_vmlsl_high_u16(a, b, simde_vdupq_n_u16(simde_uint16x8_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsl_high_laneq_u16(a, b, v, lane) vmlsl_high_laneq_u16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsl_high_laneq_u16
+  #define vmlsl_high_laneq_u16(a, b, v, lane) simde_vmlsl_high_laneq_u16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vmlsl_high_lane_u32(simde_uint64x2_t a, simde_uint32x4_t b, simde_uint32x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+    return simde_vmlsl_high_u32(a, b, simde_vdupq_n_u32(simde_uint32x2_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsl_high_lane_u32(a, b, v, lane) vmlsl_high_lane_u32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsl_high_lane_u32
+  #define vmlsl_high_lane_u32(a, b, v, lane) simde_vmlsl_high_lane_u32((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vmlsl_high_laneq_u32(simde_uint64x2_t a, simde_uint32x4_t b, simde_uint32x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+    return simde_vmlsl_high_u32(a, b, simde_vdupq_n_u32(simde_uint32x4_to_private(v).values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vmlsl_high_laneq_u32(a, b, v, lane) vmlsl_high_laneq_u32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmlsl_high_laneq_u32
+  #define vmlsl_high_laneq_u32(a, b, v, lane) simde_vmlsl_high_laneq_u32((a), (b), (v), (lane))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_MLSL_HIGH_LANE_H) */

arm/neon/mul_lane.h

@@ -35,6 +35,25 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16_t
+simde_vmulh_lane_f16(simde_float16_t a, simde_float16x4_t b, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  return simde_vmulh_f16(a, simde_float16x4_to_private(b).values[lane]);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+    #define simde_vmulh_lane_f16(a, b, lane) \
+    SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vmulh_lane_f16(a, b, lane))
+  #else
+    #define simde_vmulh_lane_f16(a, b, lane) vmulh_lane_f16((a), (b), (lane))
+  #endif
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmulh_lane_f16
+  #define vmulh_lane_f16(a, b, lane) simde_vmulh_lane_f16(a, b, lane)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float64_t
 simde_vmuld_lane_f64(simde_float64_t a, simde_float64x1_t b, const int lane)
@@ -92,6 +111,25 @@ simde_vmuls_lane_f32(simde_float32_t a, simde_float32x2_t b, const int lane)
   #define vmuls_lane_f32(a, b, lane) simde_vmuls_lane_f32(a, b, lane)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16_t
+simde_vmulh_laneq_f16(simde_float16_t a, simde_float16x8_t b, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  return simde_vmulh_f16(a, simde_float16x8_to_private(b).values[lane]);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #if defined(__clang__) && !SIMDE_DETECT_CLANG_VERSION_CHECK(11,0,0)
+    #define simde_vmulh_laneq_f16(a, b, lane) \
+    SIMDE_DISABLE_DIAGNOSTIC_EXPR_(SIMDE_DIAGNOSTIC_DISABLE_VECTOR_CONVERSION_, vmulh_laneq_f16(a, b, lane))
+  #else
+    #define simde_vmulh_laneq_f16(a, b, lane) vmulh_laneq_f16((a), (b), (lane))
+  #endif
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmulh_laneq_f16
+  #define vmulh_laneq_f16(a, b, lane) simde_vmulh_laneq_f16(a, b, lane)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32_t
 simde_vmuls_laneq_f32(simde_float32_t a, simde_float32x4_t b, const int lane)
@@ -111,6 +149,30 @@ simde_vmuls_laneq_f32(simde_float32_t a, simde_float32x4_t b, const int lane)
   #define vmuls_laneq_f32(a, b, lane) simde_vmuls_laneq_f32(a, b, lane)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vmul_lane_f16(simde_float16x4_t a, simde_float16x4_t b, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_float16x4_private
+    r_,
+    a_ = simde_float16x4_to_private(a),
+    b_ = simde_float16x4_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vmulh_f16(a_.values[i], b_.values[lane]);
+  }
+
+  return simde_float16x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vmul_lane_f16(a, b, lane) vmul_lane_f16((a), (b), (lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vmul_lane_f16
+  #define vmul_lane_f16(a, b, lane) simde_vmul_lane_f16((a), (b), (lane))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vmul_lane_f32(simde_float32x2_t a, simde_float32x2_t b, const int lane)
@@ -371,6 +433,9 @@ simde_vmulq_lane_f16(simde_float16x8_t a, simde_float16x4_t b, const int lane)
 
   return simde_float16x8_from_private(r_);
 }
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vmulq_lane_f16(a, b, lane) vmulq_lane_f16((a), (b), (lane))
+#endif
 #if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
   #undef vmulq_lane_f16
   #define vmulq_lane_f16(a, b, lane) simde_vmulq_lane_f16((a), (b), (lane))
@@ -520,6 +585,30 @@ simde_vmulq_lane_u32(simde_uint32x4_t a, simde_uint32x2_t b, const int lane)
   #define vmulq_lane_u32(a, b, lane) simde_vmulq_lane_u32((a), (b), (lane))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vmulq_laneq_f16(simde_float16x8_t a, simde_float16x8_t b, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_float16x8_private
+    r_,
+    a_ = simde_float16x8_to_private(a),
+    b_ = simde_float16x8_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vmulh_f16(a_.values[i], b_.values[lane]);
+  }
+
+  return simde_float16x8_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vmulq_laneq_f16(a, b, lane) vmulq_laneq_f16((a), (b), (lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmulq_laneq_f16
+  #define vmulq_laneq_f16(a, b, lane) simde_vmulq_laneq_f16((a), (b), (lane))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x4_t
 simde_vmulq_laneq_f32(simde_float32x4_t a, simde_float32x4_t b, const int lane)
@@ -664,6 +753,30 @@ simde_vmulq_laneq_u32(simde_uint32x4_t a, simde_uint32x4_t b, const int lane)
   #define vmulq_laneq_u32(a, b, lane) simde_vmulq_laneq_u32((a), (b), (lane))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vmul_laneq_f16(simde_float16x4_t a, simde_float16x8_t b, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_float16x4_private
+    r_,
+    a_ = simde_float16x4_to_private(a);
+  simde_float16x8_private b_ = simde_float16x8_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vmulh_f16(a_.values[i], b_.values[lane]);
+  }
+
+  return simde_float16x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+  #define simde_vmul_laneq_f16(a, b, lane) vmul_laneq_f16((a), (b), (lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vmul_laneq_f16
+  #define vmul_laneq_f16(a, b, lane) simde_vmul_laneq_f16((a), (b), (lane))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vmul_laneq_f32(simde_float32x2_t a, simde_float32x4_t b, const int lane)

arm/neon/neg.h

@@ -22,6 +22,7 @@
  *
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_NEG_H)
@@ -47,6 +48,43 @@ simde_vnegd_s64(int64_t a) {
   #define vnegd_s64(a) simde_vnegd_s64(a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16_t
+simde_vnegh_f16(simde_float16_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vnegh_f16(a);
+  #else
+    return simde_float16_from_float32(-simde_float16_to_float32(a));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vnegh_f16
+  #define vnegh_f16(a) simde_vnegh_f16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vneg_f16(simde_float16x4_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vneg_f16(a);
+  #else
+    simde_float16x4_private
+      r_,
+      a_ = simde_float16x4_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vnegh_f16(a_.values[i]);
+    }
+
+    return simde_float16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vneg_f16
+  #define vneg_f16(a) simde_vneg_f16(a)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vneg_f32(simde_float32x2_t a) {
@@ -209,6 +247,29 @@ simde_vneg_s64(simde_int64x1_t a) {
   #define vneg_s64(a) simde_vneg_s64(a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vnegq_f16(simde_float16x8_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vnegq_f16(a);
+  #else
+    simde_float16x8_private
+      r_,
+      a_ = simde_float16x8_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vnegh_f16(a_.values[i]);
+    }
+
+    return simde_float16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vnegq_f16
+  #define vnegq_f16(a) simde_vnegq_f16(a)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x4_t
 simde_vnegq_f32(simde_float32x4_t a) {

arm/neon/qdmlal.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLAL_H)
+#define SIMDE_ARM_NEON_QDMLAL_H
+
+#include "add.h"
+#include "mul.h"
+#include "mul_n.h"
+#include "movl.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_vqdmlalh_s16(int32_t a, int16_t b, int16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlalh_s16(a, b, c);
+  #else
+    return HEDLEY_STATIC_CAST(int32_t, b) * HEDLEY_STATIC_CAST(int32_t, c) * 2 + a;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlalh_s16
+  #define vqdmlalh_s16(a, b, c) simde_vqdmlalh_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_vqdmlals_s32(int64_t a, int32_t b, int32_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlals_s32(a, b, c);
+  #else
+    return HEDLEY_STATIC_CAST(int64_t, b) * HEDLEY_STATIC_CAST(int64_t, c) * 2 + a;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlals_s32
+  #define vqdmlals_s32(a, b, c) simde_vqdmlals_s32((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlal_s16(simde_int32x4_t a, simde_int16x4_t b, simde_int16x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vqdmlal_s16(a, b, c);
+  #else
+    return simde_vaddq_s32(simde_vmulq_n_s32(simde_vmulq_s32(simde_vmovl_s16(b), simde_vmovl_s16(c)), 2), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_s16
+  #define vqdmlal_s16(a, b, c) simde_vqdmlal_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlal_s32(simde_int64x2_t a, simde_int32x2_t b, simde_int32x2_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vqdmlal_s32(a, b, c);
+  #else
+    simde_int64x2_private r_ = simde_int64x2_to_private(
+          simde_x_vmulq_s64(
+          simde_vmovl_s32(b),
+          simde_vmovl_s32(c)));
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
+    }
+
+    return simde_vaddq_s64(a, simde_int64x2_from_private(r_));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_s32
+  #define vqdmlal_s32(a, b, c) simde_vqdmlal_s32((a), (b), (c))
+#endif
+
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLAL_H) */

arm/neon/qdmlal_high.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLAL_HIGH_H)
+#define SIMDE_ARM_NEON_QDMLAL_HIGH_H
+
+#include "movl_high.h"
+#include "mla.h"
+#include "mul_n.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlal_high_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlal_high_s16(a, b, c);
+  #else
+    return simde_vaddq_s32(
+        simde_vmulq_n_s32(
+        simde_vmulq_s32(
+        simde_vmovl_high_s16(b), simde_vmovl_high_s16(c)), 2), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_high_s16
+  #define vqdmlal_high_s16(a, b, c) simde_vqdmlal_high_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlal_high_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlal_high_s32(a, b, c);
+  #else
+    simde_int64x2_private r_ = simde_int64x2_to_private(
+          simde_x_vmulq_s64(
+          simde_vmovl_high_s32(b),
+          simde_vmovl_high_s32(c)));
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
+    }
+
+    return simde_vaddq_s64(a, simde_int64x2_from_private(r_));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_high_s32
+  #define vqdmlal_high_s32(a, b, c) simde_vqdmlal_high_s32((a), (b), (c))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLAL_HIGH_H) */

arm/neon/qdmlal_high_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLAL_HIGH_LANE_H)
+#define SIMDE_ARM_NEON_QDMLAL_HIGH_LANE_H
+
+#include "movl_high.h"
+#include "add.h"
+#include "mul.h"
+#include "mul_n.h"
+#include "dup_n.h"
+#include "mla.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlal_high_lane_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+    return simde_vaddq_s32(
+        simde_vmulq_n_s32(
+        simde_vmulq_s32(
+        simde_vmovl_high_s16(b),
+        simde_vmovl_high_s16(simde_vdupq_n_s16(simde_int16x4_to_private(v).values[lane]))), 2), a);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlal_high_lane_s16(a, b, v, lane) vqdmlal_high_lane_s16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_high_lane_s16
+  #define vqdmlal_high_lane_s16(a, b, v, lane) simde_vqdmlal_high_lane_s16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlal_high_laneq_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+    return simde_vaddq_s32(
+        simde_vmulq_n_s32(
+        simde_vmulq_s32(
+        simde_vmovl_high_s16(b),
+        simde_vmovl_high_s16(simde_vdupq_n_s16(simde_int16x8_to_private(v).values[lane]))), 2), a);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlal_high_laneq_s16(a, b, v, lane) vqdmlal_high_laneq_s16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_high_laneq_s16
+  #define vqdmlal_high_laneq_s16(a, b, v, lane) simde_vqdmlal_high_laneq_s16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlal_high_lane_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_int64x2_private r_ = simde_int64x2_to_private(
+        simde_x_vmulq_s64(
+        simde_vmovl_high_s32(b),
+        simde_vmovl_high_s32(simde_vdupq_n_s32(simde_int32x2_to_private(v).values[lane]))));
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
+  }
+
+  return simde_vaddq_s64(a, simde_int64x2_from_private(r_));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlal_high_lane_s32(a, b, v, lane) vqdmlal_high_lane_s32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_high_lane_s32
+  #define vqdmlal_high_lane_s32(a, b, v, lane) simde_vqdmlal_high_lane_s32((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlal_high_laneq_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int64x2_private r_ = simde_int64x2_to_private(
+        simde_x_vmulq_s64(
+        simde_vmovl_high_s32(b),
+        simde_vmovl_high_s32(simde_vdupq_n_s32(simde_int32x4_to_private(v).values[lane]))));
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
+  }
+
+  return simde_vaddq_s64(a, simde_int64x2_from_private(r_));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlal_high_laneq_s32(a, b, v, lane) vqdmlal_high_laneq_s32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_high_laneq_s32
+  #define vqdmlal_high_laneq_s32(a, b, v, lane) simde_vqdmlal_high_laneq_s32((a), (b), (v), (lane))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLAL_HIGH_LANE_H) */

arm/neon/qdmlal_high_n.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLAL_HIGH_N_H)
+#define SIMDE_ARM_NEON_QDMLAL_HIGH_N_H
+
+#include "movl_high.h"
+#include "dup_n.h"
+#include "add.h"
+#include "mul.h"
+#include "mul_n.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlal_high_n_s16(simde_int32x4_t a, simde_int16x8_t b, int16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlal_high_n_s16(a, b, c);
+  #else
+    return simde_vaddq_s32(
+        simde_vmulq_n_s32(
+        simde_vmulq_s32(
+        simde_vmovl_high_s16(b),
+        simde_vmovl_high_s16(simde_vdupq_n_s16(c))), 2), a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_high_n_s16
+  #define vqdmlal_high_n_s16(a, b, c) simde_vqdmlal_high_n_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlal_high_n_s32(simde_int64x2_t a, simde_int32x4_t b, int32_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlal_high_n_s32(a, b, c);
+  #else
+    simde_int64x2_private r_ = simde_int64x2_to_private(
+          simde_x_vmulq_s64(
+          simde_vmovl_high_s32(b),
+          simde_vmovl_high_s32(simde_vdupq_n_s32(c))));
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
+    }
+
+    return simde_vaddq_s64(a, simde_int64x2_from_private(r_));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_high_n_s32
+  #define vqdmlal_high_n_s32(a, b, c) simde_vqdmlal_high_n_s32((a), (b), (c))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLAL_HIGH_N_H) */

arm/neon/qdmlal_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLAL_LANE_H)
+#define SIMDE_ARM_NEON_QDMLAL_LANE_H
+
+#include "qdmlal.h"
+#include "dup_lane.h"
+#include "get_lane.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vqdmlal_lane_s16(a, b, v, lane) vqdmlal_lane_s16((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlal_lane_s16(a, b, v, lane) simde_vqdmlal_s16((a), (b), simde_vdup_lane_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_lane_s16
+  #define vqdmlal_lane_s16(a, b, c, lane) simde_vqdmlal_lane_s16((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vqdmlal_lane_s32(a, b, v, lane) vqdmlal_lane_s32((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlal_lane_s32(a, b, v, lane) simde_vqdmlal_s32((a), (b), simde_vdup_lane_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_lane_s32
+  #define vqdmlal_lane_s32(a, b, c, lane) simde_vqdmlal_lane_s32((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlal_laneq_s16(a, b, v, lane) vqdmlal_laneq_s16((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlal_laneq_s16(a, b, v, lane) simde_vqdmlal_s16((a), (b), simde_vdup_laneq_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_laneq_s16
+  #define vqdmlal_laneq_s16(a, b, c, lane) simde_vqdmlal_laneq_s16((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlal_laneq_s32(a, b, v, lane) vqdmlal_laneq_s32((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlal_laneq_s32(a, b, v, lane) simde_vqdmlal_s32((a), (b), simde_vdup_laneq_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_laneq_s32
+  #define vqdmlal_laneq_s32(a, b, c, lane) simde_vqdmlal_laneq_s32((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlalh_lane_s16(a, b, v, lane) vqdmlalh_lane_s16((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlalh_lane_s16(a, b, v, lane) simde_vqdmlalh_s16((a), (b), simde_vget_lane_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlalh_lane_s16
+  #define vqdmlalh_lane_s16(a, b, c, lane) simde_vqdmlalh_lane_s16((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlalh_laneq_s16(a, b, v, lane) vqdmlalh_laneq_s16((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlalh_laneq_s16(a, b, v, lane) simde_vqdmlalh_s16((a), (b), simde_vgetq_lane_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlalh_laneq_s16
+  #define vqdmlalh_laneq_s16(a, b, c, lane) simde_vqdmlalh_laneq_s16((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlals_lane_s32(a, b, v, lane) vqdmlals_lane_s32((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlals_lane_s32(a, b, v, lane) simde_vqdmlals_s32((a), (b), simde_vget_lane_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlals_lane_s32
+  #define vqdmlals_lane_s32(a, b, c, lane) simde_vqdmlals_lane_s32((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlals_laneq_s32(a, b, v, lane) vqdmlals_laneq_s32((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlals_laneq_s32(a, b, v, lane) simde_vqdmlals_s32((a), (b), simde_vgetq_lane_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlals_laneq_s32
+  #define vqdmlals_laneq_s32(a, b, c, lane) simde_vqdmlals_laneq_s32((a), (b), (c), (lane))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLAL_LANE_H) */

arm/neon/qdmlal_n.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLAL_N_H)
+#define SIMDE_ARM_NEON_QDMLAL_N_H
+
+#include "dup_n.h"
+#include "qdmlal.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlal_n_s16(simde_int32x4_t a, simde_int16x4_t b, int16_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vqdmlal_n_s16(a, b, c);
+  #else
+    return simde_vqdmlal_s16(a, b, simde_vdup_n_s16(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_n_s16
+  #define vqdmlal_n_s16(a, b, c) simde_vqdmlal_n_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlal_n_s32(simde_int64x2_t a, simde_int32x2_t b, int32_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vqdmlal_n_s32(a, b, c);
+  #else
+    return simde_vqdmlal_s32(a, b, simde_vdup_n_s32(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlal_n_s32
+  #define vqdmlal_n_s32(a, b, c) simde_vqdmlal_n_s32((a), (b), (c))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLAL_N_H) */

arm/neon/qdmlsl.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLSL_H)
+#define SIMDE_ARM_NEON_QDMLSL_H
+
+#include "sub.h"
+#include "mul.h"
+#include "mul_n.h"
+#include "movl.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_vqdmlslh_s16(int32_t a, int16_t b, int16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlslh_s16(a, b, c);
+  #else
+    return a - HEDLEY_STATIC_CAST(int32_t, b) * HEDLEY_STATIC_CAST(int32_t, c) * 2;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlslh_s16
+  #define vqdmlslh_s16(a, b, c) simde_vqdmlslh_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_vqdmlsls_s32(int64_t a, int32_t b, int32_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlsls_s32(a, b, c);
+  #else
+    return a - HEDLEY_STATIC_CAST(int64_t, b) * HEDLEY_STATIC_CAST(int64_t, c) * 2;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsls_s32
+  #define vqdmlsls_s32(a, b, c) simde_vqdmlsls_s32((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlsl_s16(simde_int32x4_t a, simde_int16x4_t b, simde_int16x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vqdmlsl_s16(a, b, c);
+  #else
+    return simde_vsubq_s32(a, simde_vmulq_n_s32(simde_vmulq_s32(simde_vmovl_s16(b), simde_vmovl_s16(c)), 2));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_s16
+  #define vqdmlsl_s16(a, b, c) simde_vqdmlsl_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlsl_s32(simde_int64x2_t a, simde_int32x2_t b, simde_int32x2_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vqdmlsl_s32(a, b, c);
+  #else
+    simde_int64x2_private r_ = simde_int64x2_to_private(
+          simde_x_vmulq_s64(
+          simde_vmovl_s32(b),
+          simde_vmovl_s32(c)));
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
+    }
+
+    return simde_vsubq_s64(a, simde_int64x2_from_private(r_));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_s32
+  #define vqdmlsl_s32(a, b, c) simde_vqdmlsl_s32((a), (b), (c))
+#endif
+
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLSL_H) */

arm/neon/qdmlsl_high.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLSL_HIGH_H)
+#define SIMDE_ARM_NEON_QDMLSL_HIGH_H
+
+#include "movl_high.h"
+#include "sub.h"
+#include "mul.h"
+#include "mul_n.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlsl_high_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlsl_high_s16(a, b, c);
+  #else
+    return simde_vsubq_s32(a, simde_vmulq_n_s32(simde_vmulq_s32(simde_vmovl_high_s16(b), simde_vmovl_high_s16(c)), 2));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_high_s16
+  #define vqdmlsl_high_s16(a, b, c) simde_vqdmlsl_high_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlsl_high_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlsl_high_s32(a, b, c);
+  #else
+    simde_int64x2_private r_ = simde_int64x2_to_private(
+          simde_x_vmulq_s64(
+          simde_vmovl_high_s32(b),
+          simde_vmovl_high_s32(c)));
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
+    }
+
+    return simde_vsubq_s64(a, simde_int64x2_from_private(r_));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_high_s32
+  #define vqdmlsl_high_s32(a, b, c) simde_vqdmlsl_high_s32((a), (b), (c))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLSL_HIGH_H) */

arm/neon/qdmlsl_high_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLSL_HIGH_LANE_H)
+#define SIMDE_ARM_NEON_QDMLSL_HIGH_LANE_H
+
+#include "movl_high.h"
+#include "sub.h"
+#include "mul.h"
+#include "mul_n.h"
+#include "dup_n.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlsl_high_lane_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+    return simde_vsubq_s32(a,
+        simde_vmulq_n_s32(
+        simde_vmulq_s32(
+        simde_vmovl_high_s16(b),
+        simde_vmovl_high_s16(simde_vdupq_n_s16(simde_int16x4_to_private(v).values[lane]))), 2));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlsl_high_lane_s16(a, b, v, lane) vqdmlsl_high_lane_s16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_high_lane_s16
+  #define vqdmlsl_high_lane_s16(a, b, v, lane) simde_vqdmlsl_high_lane_s16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlsl_high_laneq_s16(simde_int32x4_t a, simde_int16x8_t b, simde_int16x8_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+    return simde_vsubq_s32(a,
+        simde_vmulq_n_s32(
+        simde_vmulq_s32(
+        simde_vmovl_high_s16(b),
+        simde_vmovl_high_s16(simde_vdupq_n_s16(simde_int16x8_to_private(v).values[lane]))), 2));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlsl_high_laneq_s16(a, b, v, lane) vqdmlsl_high_laneq_s16(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_high_laneq_s16
+  #define vqdmlsl_high_laneq_s16(a, b, v, lane) simde_vqdmlsl_high_laneq_s16((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlsl_high_lane_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x2_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_int64x2_private r_ = simde_int64x2_to_private(
+        simde_x_vmulq_s64(
+        simde_vmovl_high_s32(b),
+        simde_vmovl_high_s32(simde_vdupq_n_s32(simde_int32x2_to_private(v).values[lane]))));
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
+  }
+
+  return simde_vsubq_s64(a, simde_int64x2_from_private(r_));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlsl_high_lane_s32(a, b, v, lane) vqdmlsl_high_lane_s32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_high_lane_s32
+  #define vqdmlsl_high_lane_s32(a, b, v, lane) simde_vqdmlsl_high_lane_s32((a), (b), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlsl_high_laneq_s32(simde_int64x2_t a, simde_int32x4_t b, simde_int32x4_t v, const int lane) SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int64x2_private r_ = simde_int64x2_to_private(
+        simde_x_vmulq_s64(
+        simde_vmovl_high_s32(b),
+        simde_vmovl_high_s32(simde_vdupq_n_s32(simde_int32x4_to_private(v).values[lane]))));
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
+  }
+
+  return simde_vsubq_s64(a, simde_int64x2_from_private(r_));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlsl_high_laneq_s32(a, b, v, lane) vqdmlsl_high_laneq_s32(a, b, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_high_laneq_s32
+  #define vqdmlsl_high_laneq_s32(a, b, v, lane) simde_vqdmlsl_high_laneq_s32((a), (b), (v), (lane))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLSL_HIGH_LANE_H) */

arm/neon/qdmlsl_high_n.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLSL_HIGH_N_H)
+#define SIMDE_ARM_NEON_QDMLSL_HIGH_N_H
+
+#include "movl_high.h"
+#include "dup_n.h"
+#include "sub.h"
+#include "mul.h"
+#include "mul_n.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlsl_high_n_s16(simde_int32x4_t a, simde_int16x8_t b, int16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlsl_high_n_s16(a, b, c);
+  #else
+    return simde_vsubq_s32(a,
+        simde_vmulq_n_s32(
+        simde_vmulq_s32(
+        simde_vmovl_high_s16(b),
+        simde_vmovl_high_s16(simde_vdupq_n_s16(c))), 2));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_high_n_s16
+  #define vqdmlsl_high_n_s16(a, b, c) simde_vqdmlsl_high_n_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlsl_high_n_s32(simde_int64x2_t a, simde_int32x4_t b, int32_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmlsl_high_n_s32(a, b, c);
+  #else
+    simde_int64x2_private r_ = simde_int64x2_to_private(
+          simde_x_vmulq_s64(
+          simde_vmovl_high_s32(b),
+          simde_vmovl_high_s32(simde_vdupq_n_s32(c))));
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = r_.values[i] * HEDLEY_STATIC_CAST(int64_t, 2);
+    }
+
+    return simde_vsubq_s64(a, simde_int64x2_from_private(r_));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_high_n_s32
+  #define vqdmlsl_high_n_s32(a, b, c) simde_vqdmlsl_high_n_s32((a), (b), (c))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLSL_HIGH_N_H) */

arm/neon/qdmlsl_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLSL_LANE_H)
+#define SIMDE_ARM_NEON_QDMLSL_LANE_H
+
+#include "qdmlsl.h"
+#include "dup_lane.h"
+#include "get_lane.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vqdmlsl_lane_s16(a, b, v, lane) vqdmlsl_lane_s16((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlsl_lane_s16(a, b, v, lane) simde_vqdmlsl_s16((a), (b), simde_vdup_lane_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_lane_s16
+  #define vqdmlsl_lane_s16(a, b, c, lane) simde_vqdmlsl_lane_s16((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vqdmlsl_lane_s32(a, b, v, lane) vqdmlsl_lane_s32((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlsl_lane_s32(a, b, v, lane) simde_vqdmlsl_s32((a), (b), simde_vdup_lane_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_lane_s32
+  #define vqdmlsl_lane_s32(a, b, c, lane) simde_vqdmlsl_lane_s32((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlsl_laneq_s16(a, b, v, lane) vqdmlsl_laneq_s16((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlsl_laneq_s16(a, b, v, lane) simde_vqdmlsl_s16((a), (b), simde_vdup_laneq_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_laneq_s16
+  #define vqdmlsl_laneq_s16(a, b, c, lane) simde_vqdmlsl_laneq_s16((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlsl_laneq_s32(a, b, v, lane) vqdmlsl_laneq_s32((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlsl_laneq_s32(a, b, v, lane) simde_vqdmlsl_s32((a), (b), simde_vdup_laneq_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_laneq_s32
+  #define vqdmlsl_laneq_s32(a, b, c, lane) simde_vqdmlsl_laneq_s32((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlslh_lane_s16(a, b, v, lane) vqdmlslh_lane_s16((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlslh_lane_s16(a, b, v, lane) simde_vqdmlslh_s16((a), (b), simde_vget_lane_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlslh_lane_s16
+  #define vqdmlslh_lane_s16(a, b, c, lane) simde_vqdmlslh_lane_s16((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlslh_laneq_s16(a, b, v, lane) vqdmlslh_laneq_s16((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlslh_laneq_s16(a, b, v, lane) simde_vqdmlslh_s16((a), (b), simde_vgetq_lane_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlslh_laneq_s16
+  #define vqdmlslh_laneq_s16(a, b, c, lane) simde_vqdmlslh_laneq_s16((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlsls_lane_s32(a, b, v, lane) vqdmlsls_lane_s32((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlsls_lane_s32(a, b, v, lane) simde_vqdmlsls_s32((a), (b), simde_vget_lane_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsls_lane_s32
+  #define vqdmlsls_lane_s32(a, b, c, lane) simde_vqdmlsls_lane_s32((a), (b), (c), (lane))
+#endif
+
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmlsls_laneq_s32(a, b, v, lane) vqdmlsls_laneq_s32((a), (b), (v), (lane))
+#else
+  #define simde_vqdmlsls_laneq_s32(a, b, v, lane) simde_vqdmlsls_s32((a), (b), simde_vgetq_lane_s32((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsls_laneq_s32
+  #define vqdmlsls_laneq_s32(a, b, c, lane) simde_vqdmlsls_laneq_s32((a), (b), (c), (lane))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDmlsl_LANE_H) */

arm/neon/qdmlsl_n.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMLSL_N_H)
+#define SIMDE_ARM_NEON_QDMLSL_N_H
+
+#include "dup_n.h"
+#include "qdmlsl.h"
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmlsl_n_s16(simde_int32x4_t a, simde_int16x4_t b, int16_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vqdmlsl_n_s16(a, b, c);
+  #else
+    return simde_vqdmlsl_s16(a, b, simde_vdup_n_s16(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_n_s16
+  #define vqdmlsl_n_s16(a, b, c) simde_vqdmlsl_n_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmlsl_n_s32(simde_int64x2_t a, simde_int32x2_t b, int32_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vqdmlsl_n_s32(a, b, c);
+  #else
+    return simde_vqdmlsl_s32(a, b, simde_vdup_n_s32(c));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmlsl_n_s32
+  #define vqdmlsl_n_s32(a, b, c) simde_vqdmlsl_n_s32((a), (b), (c))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMLSL_N_H) */

arm/neon/qdmulh.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2020      Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_QDMULH_H)
@@ -89,6 +90,21 @@ simde_vqdmulh_s16(simde_int16x4_t a, simde_int16x4_t b) {
   #define vqdmulh_s16(a, b) simde_vqdmulh_s16((a), (b))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+int16_t
+simde_vqdmulhh_s16(int16_t a, int16_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmulhh_s16(a, b);
+  #else
+    int32_t tmp = simde_vqdmullh_s16(a, b);
+    return HEDLEY_STATIC_CAST(int16_t, tmp >> 16);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmulhh_s16
+  #define vqdmulhh_s16(a, b) simde_vqdmulhh_s16((a), (b))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_int32x2_t
 simde_vqdmulh_s32(simde_int32x2_t a, simde_int32x2_t b) {

arm/neon/qdmulh_lane.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2021      Evan Nemerson <evan@nemerson.com>
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_QDMULH_LANE_H)
@@ -37,6 +38,17 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmulhh_lane_s16(a, v, lane) vqdmulhh_lane_s16((a), (v), (lane))
+#else
+  #define simde_vqdmulhh_lane_s16(a, v, lane) \
+    simde_vqdmulhh_s16((a), simde_vget_lane_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmulhh_lane_s16
+  #define vqdmulhh_lane_s16(a, v, lane) simde_vqdmulhh_lane_s16((a), (v), (lane))
+#endif
+
 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
   #define simde_vqdmulh_lane_s16(a, v, lane) vqdmulh_lane_s16((a), (v), (lane))
 #else
@@ -81,6 +93,17 @@ SIMDE_BEGIN_DECLS_
   #define vqdmulhq_lane_s32(a, v, lane) simde_vqdmulhq_lane_s32((a), (v), (lane))
 #endif
 
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmulhh_laneq_s16(a, v, lane) vqdmulhh_laneq_s16((a), (v), (lane))
+#else
+  #define simde_vqdmulhh_laneq_s16(a, v, lane) \
+    simde_vqdmulhh_s16((a), simde_vgetq_lane_s16((v), (lane)))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmulhh_laneq_s16
+  #define vqdmulhh_laneq_s16(a, v, lane) simde_vqdmulhh_laneq_s16((a), (v), (lane))
+#endif
+
 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
   #define simde_vqdmulh_laneq_s16(a, v, lane) vqdmulh_laneq_s16((a), (v), (lane))
 #else

arm/neon/qdmull.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2020      Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 /* Implementation notes (seanptmaher):
@@ -67,8 +68,8 @@ simde_vqdmulls_s32(int32_t a, int32_t b) {
   #endif
 }
 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
-  #undef vqdmulls_s16
-  #define vqdmulls_s16(a, b) simde_vqdmulls_s16((a), (b))
+  #undef vqdmulls_s32
+  #define vqdmulls_s32(a, b) simde_vqdmulls_s32((a), (b))
 #endif
 
 SIMDE_FUNCTION_ATTRIBUTES

arm/neon/qdmull_high.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMULL_HIGH_H)
+#define SIMDE_ARM_NEON_QDMULL_HIGH_H
+
+#include "combine.h"
+#include "get_high.h"
+#include "qdmull.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmull_high_s16(simde_int16x8_t a, simde_int16x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmull_high_s16(a, b);
+  #else
+    return simde_vqdmull_s16(simde_vget_high_s16(a), simde_vget_high_s16(b));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_high_s16
+  #define vqdmull_high_s16(a, b) simde_vqdmull_high_s16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmull_high_s32(simde_int32x4_t a, simde_int32x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmull_high_s32(a, b);
+  #else
+    return simde_vqdmull_s32(simde_vget_high_s32(a), simde_vget_high_s32(b));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_high_s32
+  #define vqdmull_high_s32(a, b) simde_vqdmull_high_s32((a), (b))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMULL_HIGH_H) */

arm/neon/qdmull_high_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMULL_HIGH_LANE_H)
+#define SIMDE_ARM_NEON_QDMULL_HIGH_LANE_H
+
+#include "combine.h"
+#include "qdmull.h"
+#include "dup_n.h"
+#include "get_high.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmull_high_lane_s16(simde_int16x8_t a, simde_int16x4_t v, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int16x4_private
+    v_ = simde_int16x4_to_private(v);
+  return simde_vqdmull_s16(simde_vget_high_s16(a), simde_vdup_n_s16(v_.values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmull_high_lane_s16(a, v, lane) vqdmull_high_lane_s16(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_high_lane_s16
+  #define vqdmull_high_lane_s16(a, v, lane) simde_vqdmull_high_lane_s16((a), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmull_high_laneq_s16(simde_int16x8_t a, simde_int16x8_t v, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_int16x8_private
+    v_ = simde_int16x8_to_private(v);
+  return simde_vqdmull_s16(simde_vget_high_s16(a), simde_vdup_n_s16(v_.values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmull_high_laneq_s16(a, v, lane) vqdmull_high_laneq_s16(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_high_laneq_s16
+  #define vqdmull_high_laneq_s16(a, v, lane) simde_vqdmull_high_laneq_s16((a), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmull_high_lane_s32(simde_int32x4_t a, simde_int32x2_t v, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_int32x2_private
+    v_ = simde_int32x2_to_private(v);
+  return simde_vqdmull_s32(simde_vget_high_s32(a), simde_vdup_n_s32(v_.values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmull_high_lane_s32(a, v, lane) vqdmull_high_lane_s32(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_high_lane_s32
+  #define vqdmull_high_lane_s32(a, v, lane) simde_vqdmull_high_lane_s32((a), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmull_high_laneq_s32(simde_int32x4_t a, simde_int32x4_t v, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int32x4_private
+    v_ = simde_int32x4_to_private(v);
+  return simde_vqdmull_s32(simde_vget_high_s32(a), simde_vdup_n_s32(v_.values[lane]));
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmull_high_laneq_s32(a, v, lane) vqdmull_high_laneq_s32(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_high_laneq_s32
+  #define vqdmull_high_laneq_s32(a, v, lane) simde_vqdmull_high_laneq_s32((a), (v), (lane))
+#endif
+
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMULL_HIGH_LANE_H) */

arm/neon/qdmull_high_n.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMULL_HIGH_N_H)
+#define SIMDE_ARM_NEON_QDMULL_HIGH_N_H
+
+#include "combine.h"
+#include "get_high.h"
+#include "dup_n.h"
+#include "qdmull.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmull_high_n_s16(simde_int16x8_t a, int16_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmull_high_n_s16(a, b);
+  #else
+    return simde_vqdmull_s16(simde_vget_high_s16(a), simde_vdup_n_s16(b));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_high_n_s16
+  #define vqdmull_high_n_s16(a, b) simde_vqdmull_high_n_s16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmull_high_n_s32(simde_int32x4_t a, int32_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vqdmull_high_n_s32(a, b);
+  #else
+    return simde_vqdmull_s32(simde_vget_high_s32(a), simde_vdup_n_s32(b));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_high_n_s32
+  #define vqdmull_high_n_s32(a, b) simde_vqdmull_high_n_s32((a), (b))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMULL_HIGH_N_H) */

arm/neon/qdmull_lane.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMULL_LANE_H)
+#define SIMDE_ARM_NEON_QDMULL_LANE_H
+
+#include "combine.h"
+#include "qdmull.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_vqdmullh_lane_s16(int16_t a, simde_int16x4_t v, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int16x4_private
+    v_ = simde_int16x4_to_private(v);
+
+  return simde_vqdmullh_s16(a, v_.values[lane]);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmullh_lane_s16(a, v, lane) vqdmullh_lane_s16(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmullh_lane_s16
+  #define vqdmullh_lane_s16(a, v, lane) simde_vqdmullh_lane_s16((a), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int32_t
+simde_vqdmullh_laneq_s16(int16_t a, simde_int16x8_t v, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_int16x8_private
+    v_ = simde_int16x8_to_private(v);
+
+  return simde_vqdmullh_s16(a, v_.values[lane]);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmullh_laneq_s16(a, v, lane) vqdmullh_laneq_s16(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmullh_laneq_s16
+  #define vqdmullh_laneq_s16(a, v, lane) simde_vqdmullh_laneq_s16((a), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_vqdmulls_lane_s32(int32_t a, simde_int32x2_t v, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_int32x2_private
+    v_ = simde_int32x2_to_private(v);
+
+  return simde_vqdmulls_s32(a, v_.values[lane]);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmulls_lane_s32(a, v, lane) vqdmulls_lane_s32(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmulls_lane_s32
+  #define vqdmulls_lane_s32(a, v, lane) simde_vqdmulls_lane_s32((a), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+int64_t
+simde_vqdmulls_laneq_s32(int32_t a, simde_int32x4_t v, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int32x4_private
+    v_ = simde_int32x4_to_private(v);
+
+  return simde_vqdmulls_s32(a, v_.values[lane]);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmulls_laneq_s32(a, v, lane) vqdmulls_laneq_s32(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmulls_laneq_s32
+  #define vqdmulls_laneq_s32(a, v, lane) simde_vqdmulls_laneq_s32((a), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmull_lane_s16(simde_int16x4_t a, simde_int16x4_t b, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int32x4_private r_;
+  simde_int16x4_private
+    a_ = simde_int16x4_to_private(a),
+    b_ = simde_int16x4_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vqdmullh_s16(a_.values[i], b_.values[lane]);
+  }
+
+  return simde_int32x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vqdmull_lane_s16(a, v, lane) vqdmull_lane_s16(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_lane_s16
+  #define vqdmull_lane_s16(a, v, lane) simde_vqdmull_lane_s16((a), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmull_laneq_s16(simde_int16x4_t a, simde_int16x8_t b, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_int32x4_private r_;
+  simde_int16x4_private
+    a_ = simde_int16x4_to_private(a);
+  simde_int16x8_private
+    b_ = simde_int16x8_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vqdmullh_s16(a_.values[i], b_.values[lane]);
+  }
+
+  return simde_int32x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmull_laneq_s16(a, v, lane) vqdmull_laneq_s16(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_laneq_s16
+  #define vqdmull_laneq_s16(a, v, lane) simde_vqdmull_laneq_s16((a), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmull_lane_s32(simde_int32x2_t a, simde_int32x2_t b, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_int64x2_private r_;
+  simde_int32x2_private
+    a_ = simde_int32x2_to_private(a),
+    b_ = simde_int32x2_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vqdmulls_s32(a_.values[i], b_.values[lane]);
+  }
+
+  return simde_int64x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vqdmull_lane_s32(a, v, lane) vqdmull_lane_s32(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_lane_s32
+  #define vqdmull_lane_s32(a, v, lane) simde_vqdmull_lane_s32((a), (v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmull_laneq_s32(simde_int32x2_t a, simde_int32x4_t b, const int lane)
+   SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_int64x2_private r_;
+  simde_int32x2_private
+    a_ = simde_int32x2_to_private(a);
+  simde_int32x4_private
+    b_ = simde_int32x4_to_private(b);
+
+  SIMDE_VECTORIZE
+  for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+    r_.values[i] = simde_vqdmulls_s32(a_.values[i], b_.values[lane]);
+  }
+
+  return simde_int64x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+  #define simde_vqdmull_laneq_s32(a, v, lane) vqdmull_laneq_s32(a, v, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_laneq_s32
+  #define vqdmull_laneq_s32(a, v, lane) simde_vqdmull_laneq_s32((a), (v), (lane))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMULL_H) */

arm/neon/qdmull_n.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_QDMULL_N_H)
+#define SIMDE_ARM_NEON_QDMULL_N_H
+
+#include "combine.h"
+#include "dup_n.h"
+#include "qdmull.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_vqdmull_n_s16(simde_int16x4_t a, int16_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vqdmull_n_s16(a, b);
+  #else
+    return simde_vqdmull_s16(a, simde_vdup_n_s16(b));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_n_s16
+  #define vqdmull_n_s16(a, b) simde_vqdmull_n_s16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_vqdmull_n_s32(simde_int32x2_t a, int32_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vqdmull_n_s32(a, b);
+  #else
+    return simde_vqdmull_s32(a, simde_vdup_n_s32(b));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vqdmull_n_s32
+  #define vqdmull_n_s32(a, b) simde_vqdmull_n_s32((a), (b))
+#endif
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_QDMULL_N_H) */

arm/neon/qshl.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2020      Christopher Moore <moore@free.fr>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_QSHL_H)
@@ -330,7 +331,7 @@ simde_vqshld_u64(uint64_t a, int64_t b) {
   #endif
 }
 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
-  #undef vqshldb_u64
+  #undef vqshld_u64
   #define vqshld_u64(a, b) simde_vqshld_u64((a), (b))
 #endif
 

arm/neon/reinterpret.h

@@ -2331,6 +2331,23 @@ simde_vreinterpret_u64_u32(simde_uint32x2_t a) {
   #define vreinterpret_u64_u32 simde_vreinterpret_u64_u32
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1_t
+simde_vreinterpret_u64_f16(simde_float16x4_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vreinterpret_u64_f16(a);
+  #else
+    simde_uint64x1_private r_;
+    simde_float16x4_private a_ = simde_float16x4_to_private(a);
+    simde_memcpy(&r_, &a_, sizeof(r_));
+    return simde_uint64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vreinterpret_u64_f16
+  #define vreinterpret_u64_f16 simde_vreinterpret_u64_f16
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_uint64x1_t
 simde_vreinterpret_u64_f32(simde_float32x2_t a) {

arm/neon/sqrt.h

@@ -37,7 +37,7 @@ SIMDE_FUNCTION_ATTRIBUTES
 simde_float16
 simde_vsqrth_f16(simde_float16 a) {
   #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
-    return vsqrth_f16(a, b);
+    return vsqrth_f16(a);
   #elif defined(simde_math_sqrtf)
     simde_float32 af = simde_float16_to_float32(a);
     return simde_float16_from_float32(simde_math_sqrtf(af));

arm/neon/types.h

@@ -403,9 +403,13 @@ typedef union {
   #if defined(SIMDE_ARM_NEON_FP16)
     typedef     float16_t     simde_float16_t;
     typedef   float16x4_t   simde_float16x4_t;
-    typedef   float16x8_t   simde_float16x8_t;
     typedef float16x4x2_t simde_float16x4x2_t;
+    typedef float16x4x3_t simde_float16x4x3_t;
+    typedef float16x4x4_t simde_float16x4x4_t;
+    typedef   float16x8_t   simde_float16x8_t;
     typedef float16x8x2_t simde_float16x8x2_t;
+    typedef float16x8x3_t simde_float16x8x3_t;
+    typedef float16x8x4_t simde_float16x8x4_t;
   #else
     #define SIMDE_ARM_NEON_NEED_PORTABLE_F16
   #endif
@@ -567,9 +571,21 @@ typedef union {
     typedef struct simde_float16x4x2_t {
     simde_float16x4_t val[2];
     } simde_float16x4x2_t;
+    typedef struct simde_float16x4x3_t {
+    simde_float16x4_t val[3];
+    } simde_float16x4x3_t;
+    typedef struct simde_float16x4x4_t {
+    simde_float16x4_t val[4];
+    } simde_float16x4x4_t;
     typedef struct simde_float16x8x2_t {
     simde_float16x8_t val[2];
     } simde_float16x8x2_t;
+    typedef struct simde_float16x8x3_t {
+    simde_float16x8_t val[3];
+    } simde_float16x8x3_t;
+    typedef struct simde_float16x8x4_t {
+    simde_float16x8_t val[4];
+    } simde_float16x8x4_t;
   #else
     #define SIMDE_ARM_NEON_NEED_PORTABLE_F16
   #endif
@@ -659,9 +675,21 @@ typedef union {
   typedef struct simde_float16x4x2_t {
   simde_float16x4_t val[2];
   } simde_float16x4x2_t;
+  typedef struct simde_float16x4x3_t {
+  simde_float16x4_t val[3];
+  } simde_float16x4x3_t;
+  typedef struct simde_float16x4x4_t {
+  simde_float16x4_t val[4];
+  } simde_float16x4x4_t;
   typedef struct simde_float16x8x2_t {
   simde_float16x8_t val[2];
   } simde_float16x8x2_t;
+  typedef struct simde_float16x8x3_t {
+  simde_float16x8_t val[3];
+  } simde_float16x8x3_t;
+  typedef struct simde_float16x8x4_t {
+  simde_float16x8_t val[4];
+  } simde_float16x8x4_t;
 #endif
 #if defined(SIMDE_ARM_NEON_NEED_PORTABLE_F32)
   typedef simde_float32 simde_float32_t;